From 07b6b3e23cbd531977535b4d1bbef741d13af264 Mon Sep 17 00:00:00 2001 From: Joakim Zhang Date: Fri, 6 Nov 2020 18:56:23 +0800 Subject: [PATCH] dt-bindings: can: fsl,flexcan: fix fsl,clk-source property Correct fsl,clk-source example since flexcan driver uses "of_property_read_u8" to get this property. Fixes: 9d733992772d ("dt-bindings: can: flexcan: add PE clock source property to device tree") Signed-off-by: Joakim Zhang Link: https://lore.kernel.org/r/20201106105627.31061-2-qiangqing.zhang@nxp.com Signed-off-by: Marc Kleine-Budde --- Documentation/devicetree/bindings/net/can/fsl,flexcan.yaml | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/net/can/fsl,flexcan.yaml b/Documentation/devicetree/bindings/net/can/fsl,flexcan.yaml index 0133d777e78e..0d2df30f19db 100644 --- a/Documentation/devicetree/bindings/net/can/fsl,flexcan.yaml +++ b/Documentation/devicetree/bindings/net/can/fsl,flexcan.yaml @@ -100,7 +100,7 @@ properties: by default. 0: clock source 0 (oscillator clock) 1: clock source 1 (peripheral clock) - $ref: /schemas/types.yaml#/definitions/uint32 + $ref: /schemas/types.yaml#/definitions/uint8 default: 1 minimum: 0 maximum: 1 @@ -125,7 +125,7 @@ examples: interrupts = <48 0x2>; interrupt-parent = <&mpic>; clock-frequency = <200000000>; - fsl,clk-source = <0>; + fsl,clk-source = /bits/ 8 <0>; }; - | #include -- 2.11.0