From 083cc71ab3af892078ab720c14aef85f33965fce Mon Sep 17 00:00:00 2001 From: Colin LeMahieu Date: Wed, 4 Feb 2015 23:23:16 +0000 Subject: [PATCH] [Hexagon] Simplifying more load and store patterns and using new addressing patterns. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@228231 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/Hexagon/HexagonInstrInfoV4.td | 113 +++++++++++-------------------- 1 file changed, 41 insertions(+), 72 deletions(-) diff --git a/lib/Target/Hexagon/HexagonInstrInfoV4.td b/lib/Target/Hexagon/HexagonInstrInfoV4.td index d11a1c2d757..e60304b6cd4 100644 --- a/lib/Target/Hexagon/HexagonInstrInfoV4.td +++ b/lib/Target/Hexagon/HexagonInstrInfoV4.td @@ -3652,72 +3652,29 @@ class Loadam_pat : Pat<(Store Value:$val, Addr:$addr), (MI Addr:$addr, Value:$val)>; -let Predicates = [HasV4T], AddedComplexity = 30 in { -def : Pat<(truncstorei8 (i32 IntRegs:$src1), - (HexagonCONST32 tglobaladdr:$absaddr)), - (S2_storerbabs tglobaladdr: $absaddr, IntRegs: $src1)>; +class Stoream_pat + : Pat<(Store Value:$val, Addr:$addr), + (MI Addr:$addr, (ValueMod Value:$val))>; -def : Pat<(truncstorei16 (i32 IntRegs:$src1), - (HexagonCONST32 tglobaladdr:$absaddr)), - (S2_storerhabs tglobaladdr: $absaddr, IntRegs: $src1)>; +def: Storea_pat, I32, addrgp, S2_storerbgp>; +def: Storea_pat, I32, addrgp, S2_storerhgp>; +def: Storea_pat, I32, addrgp, S2_storerigp>; +def: Storea_pat, I64, addrgp, S2_storerdgp>; -def : Pat<(store (i32 IntRegs:$src1), (HexagonCONST32 tglobaladdr:$absaddr)), - (S2_storeriabs tglobaladdr: $absaddr, IntRegs: $src1)>; +let AddedComplexity = 100 in { + def: Storea_pat; + def: Storea_pat; + def: Storea_pat; + def: Storea_pat; -def : Pat<(store (i64 DoubleRegs:$src1), - (HexagonCONST32 tglobaladdr:$absaddr)), - (S2_storerdabs tglobaladdr: $absaddr, DoubleRegs: $src1)>; + // Map from "i1 = constant<-1>; memw(CONST32(#foo)) = i1" + // to "r0 = 1; memw(#foo) = r0" + let AddedComplexity = 100 in + def: Pat<(store (i1 -1), (HexagonCONST32_GP tglobaladdr:$global)), + (S2_storerbgp tglobaladdr:$global, (A2_tfrsi 1))>; } -// 64 bit atomic store -def : Pat <(atomic_store_64 (HexagonCONST32_GP tglobaladdr:$global), - (i64 DoubleRegs:$src1)), - (S2_storerdgp tglobaladdr:$global, (i64 DoubleRegs:$src1))>, - Requires<[HasV4T]>; - -// Map from store(globaladdress) -> memd(#foo) -let AddedComplexity = 100 in -def : Pat <(store (i64 DoubleRegs:$src1), - (HexagonCONST32_GP tglobaladdr:$global)), - (S2_storerdgp tglobaladdr:$global, (i64 DoubleRegs:$src1))>; - -// 8 bit atomic store -def : Pat < (atomic_store_8 (HexagonCONST32_GP tglobaladdr:$global), - (i32 IntRegs:$src1)), - (S2_storerbgp tglobaladdr:$global, (i32 IntRegs:$src1))>; - -// Map from store(globaladdress) -> memb(#foo) -let AddedComplexity = 100 in -def : Pat<(truncstorei8 (i32 IntRegs:$src1), - (HexagonCONST32_GP tglobaladdr:$global)), - (S2_storerbgp tglobaladdr:$global, (i32 IntRegs:$src1))>; - -// Map from "i1 = constant<-1>; memw(CONST32(#foo)) = i1" -// to "r0 = 1; memw(#foo) = r0" -let AddedComplexity = 100 in -def : Pat<(store (i1 -1), (HexagonCONST32_GP tglobaladdr:$global)), - (S2_storerbgp tglobaladdr:$global, (A2_tfrsi 1))>; - -def : Pat<(atomic_store_16 (HexagonCONST32_GP tglobaladdr:$global), - (i32 IntRegs:$src1)), - (S2_storerhgp tglobaladdr:$global, (i32 IntRegs:$src1))>; - -// Map from store(globaladdress) -> memh(#foo) -let AddedComplexity = 100 in -def : Pat<(truncstorei16 (i32 IntRegs:$src1), - (HexagonCONST32_GP tglobaladdr:$global)), - (S2_storerhgp tglobaladdr:$global, (i32 IntRegs:$src1))>; - -// 32 bit atomic store -def : Pat<(atomic_store_32 (HexagonCONST32_GP tglobaladdr:$global), - (i32 IntRegs:$src1)), - (S2_storerigp tglobaladdr:$global, (i32 IntRegs:$src1))>; - -// Map from store(globaladdress) -> memw(#foo) -let AddedComplexity = 100 in -def : Pat<(store (i32 IntRegs:$src1), (HexagonCONST32_GP tglobaladdr:$global)), - (S2_storerigp tglobaladdr:$global, (i32 IntRegs:$src1))>; - //===----------------------------------------------------------------------===// // Template class for non predicated load instructions with // absolute addressing mode. @@ -3899,21 +3856,33 @@ let AddedComplexity = 30 in { def: Loada_pat; } -let Predicates = [HasV4T], AddedComplexity = 30 in { -def : Pat<(i32 (load (HexagonCONST32 tglobaladdr:$absaddr))), - (L4_loadri_abs tglobaladdr: $absaddr)>; +// Indexed store word - global address. +// memw(Rs+#u6:2)=#S8 +let AddedComplexity = 100 in +def: Storex_add_pat; -def : Pat<(i32 (sextloadi8 (HexagonCONST32 tglobaladdr:$absaddr))), - (L4_loadrb_abs tglobaladdr:$absaddr)>; +// Load from a global address that has only one use in the current basic block. +let AddedComplexity = 100 in { + def: Loada_pat; + def: Loada_pat; + def: Loada_pat; -def : Pat<(i32 (zextloadi8 (HexagonCONST32 tglobaladdr:$absaddr))), - (L4_loadrub_abs tglobaladdr:$absaddr)>; + def: Loada_pat; + def: Loada_pat; + def: Loada_pat; -def : Pat<(i32 (sextloadi16 (HexagonCONST32 tglobaladdr:$absaddr))), - (L4_loadrh_abs tglobaladdr:$absaddr)>; + def: Loada_pat; + def: Loada_pat; +} + +// Store to a global address that has only one use in the current basic block. +let AddedComplexity = 100 in { + def: Storea_pat; + def: Storea_pat; + def: Storea_pat; + def: Storea_pat; -def : Pat<(i32 (zextloadi16 (HexagonCONST32 tglobaladdr:$absaddr))), - (L4_loadruh_abs tglobaladdr:$absaddr)>; + def: Stoream_pat; } // Map from Pd = load(globaladdress) -> Rd = memb(globaladdress), Pd = Rd -- 2.11.0