From 1498e9706a722773f677599985a0b8b086b4f09d Mon Sep 17 00:00:00 2001 From: Igor Mammedov Date: Thu, 5 Oct 2017 15:50:52 +0200 Subject: [PATCH] openrisc: use generic cpu_model parsing MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit Signed-off-by: Igor Mammedov Reviewed-by: Philippe Mathieu-Daudé Message-Id: <1507211474-188400-19-git-send-email-imammedo@redhat.com> Acked-by: Stafford Horne Signed-off-by: Eduardo Habkost --- hw/openrisc/openrisc_sim.c | 8 ++------ 1 file changed, 2 insertions(+), 6 deletions(-) diff --git a/hw/openrisc/openrisc_sim.c b/hw/openrisc/openrisc_sim.c index 58638c6ecd..e9558f1ca4 100644 --- a/hw/openrisc/openrisc_sim.c +++ b/hw/openrisc/openrisc_sim.c @@ -125,7 +125,6 @@ static void openrisc_load_kernel(ram_addr_t ram_size, static void openrisc_sim_init(MachineState *machine) { ram_addr_t ram_size = machine->ram_size; - const char *cpu_model = machine->cpu_model; const char *kernel_filename = machine->kernel_filename; OpenRISCCPU *cpu = NULL; MemoryRegion *ram; @@ -133,12 +132,8 @@ static void openrisc_sim_init(MachineState *machine) qemu_irq serial_irq; int n; - if (!cpu_model) { - cpu_model = "or1200"; - } - for (n = 0; n < smp_cpus; n++) { - cpu = OPENRISC_CPU(cpu_generic_init(TYPE_OPENRISC_CPU, cpu_model)); + cpu = OPENRISC_CPU(cpu_create(machine->cpu_type)); if (cpu == NULL) { fprintf(stderr, "Unable to find CPU definition!\n"); exit(1); @@ -180,6 +175,7 @@ static void openrisc_sim_machine_init(MachineClass *mc) mc->init = openrisc_sim_init; mc->max_cpus = 2; mc->is_default = 1; + mc->default_cpu_type = OPENRISC_CPU_TYPE_NAME("or1200"); } DEFINE_MACHINE("or1k-sim", openrisc_sim_machine_init) -- 2.11.0