From 1507fc15064a253aad1fdfff147babf003a42dc8 Mon Sep 17 00:00:00 2001 From: Guillaume Chatelet Date: Fri, 26 Jun 2020 14:14:27 +0000 Subject: [PATCH] [Alignment][NFC] Migrate TTI::isLegalToVectorize{Load,Store}Chain to Align This is patch is part of a series to introduce an Alignment type. See this thread for context: http://lists.llvm.org/pipermail/llvm-dev/2019-July/133851.html See this patch for the introduction of the type: https://reviews.llvm.org/D64790 Differential Revision: https://reviews.llvm.org/D82653 --- llvm/include/llvm/Analysis/TargetTransformInfo.h | 16 ++++++---------- llvm/include/llvm/Analysis/TargetTransformInfoImpl.h | 6 ++---- llvm/lib/Analysis/TargetTransformInfo.cpp | 4 ++-- llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp | 18 +++++++++--------- llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.h | 17 ++++++----------- llvm/lib/Target/NVPTX/NVPTXTargetTransformInfo.h | 6 ++---- llvm/lib/Transforms/Vectorize/LoadStoreVectorizer.cpp | 4 ++-- 7 files changed, 29 insertions(+), 42 deletions(-) diff --git a/llvm/include/llvm/Analysis/TargetTransformInfo.h b/llvm/include/llvm/Analysis/TargetTransformInfo.h index d96bc4f43a1..695b7d6061c 100644 --- a/llvm/include/llvm/Analysis/TargetTransformInfo.h +++ b/llvm/include/llvm/Analysis/TargetTransformInfo.h @@ -1181,13 +1181,11 @@ public: bool isLegalToVectorizeStore(StoreInst *SI) const; /// \returns True if it is legal to vectorize the given load chain. - bool isLegalToVectorizeLoadChain(unsigned ChainSizeInBytes, - unsigned Alignment, + bool isLegalToVectorizeLoadChain(unsigned ChainSizeInBytes, Align Alignment, unsigned AddrSpace) const; /// \returns True if it is legal to vectorize the given store chain. - bool isLegalToVectorizeStoreChain(unsigned ChainSizeInBytes, - unsigned Alignment, + bool isLegalToVectorizeStoreChain(unsigned ChainSizeInBytes, Align Alignment, unsigned AddrSpace) const; /// \returns The new vector factor value if the target doesn't support \p @@ -1478,10 +1476,10 @@ public: virtual bool isLegalToVectorizeLoad(LoadInst *LI) const = 0; virtual bool isLegalToVectorizeStore(StoreInst *SI) const = 0; virtual bool isLegalToVectorizeLoadChain(unsigned ChainSizeInBytes, - unsigned Alignment, + Align Alignment, unsigned AddrSpace) const = 0; virtual bool isLegalToVectorizeStoreChain(unsigned ChainSizeInBytes, - unsigned Alignment, + Align Alignment, unsigned AddrSpace) const = 0; virtual unsigned getLoadVectorFactor(unsigned VF, unsigned LoadSize, unsigned ChainSizeInBytes, @@ -1943,14 +1941,12 @@ public: bool isLegalToVectorizeStore(StoreInst *SI) const override { return Impl.isLegalToVectorizeStore(SI); } - bool isLegalToVectorizeLoadChain(unsigned ChainSizeInBytes, - unsigned Alignment, + bool isLegalToVectorizeLoadChain(unsigned ChainSizeInBytes, Align Alignment, unsigned AddrSpace) const override { return Impl.isLegalToVectorizeLoadChain(ChainSizeInBytes, Alignment, AddrSpace); } - bool isLegalToVectorizeStoreChain(unsigned ChainSizeInBytes, - unsigned Alignment, + bool isLegalToVectorizeStoreChain(unsigned ChainSizeInBytes, Align Alignment, unsigned AddrSpace) const override { return Impl.isLegalToVectorizeStoreChain(ChainSizeInBytes, Alignment, AddrSpace); diff --git a/llvm/include/llvm/Analysis/TargetTransformInfoImpl.h b/llvm/include/llvm/Analysis/TargetTransformInfoImpl.h index b85d0690da6..9cae4f506ab 100644 --- a/llvm/include/llvm/Analysis/TargetTransformInfoImpl.h +++ b/llvm/include/llvm/Analysis/TargetTransformInfoImpl.h @@ -607,14 +607,12 @@ public: bool isLegalToVectorizeStore(StoreInst *SI) const { return true; } - bool isLegalToVectorizeLoadChain(unsigned ChainSizeInBytes, - unsigned Alignment, + bool isLegalToVectorizeLoadChain(unsigned ChainSizeInBytes, Align Alignment, unsigned AddrSpace) const { return true; } - bool isLegalToVectorizeStoreChain(unsigned ChainSizeInBytes, - unsigned Alignment, + bool isLegalToVectorizeStoreChain(unsigned ChainSizeInBytes, Align Alignment, unsigned AddrSpace) const { return true; } diff --git a/llvm/lib/Analysis/TargetTransformInfo.cpp b/llvm/lib/Analysis/TargetTransformInfo.cpp index b62f445802f..c92f27f78ef 100644 --- a/llvm/lib/Analysis/TargetTransformInfo.cpp +++ b/llvm/lib/Analysis/TargetTransformInfo.cpp @@ -910,13 +910,13 @@ bool TargetTransformInfo::isLegalToVectorizeStore(StoreInst *SI) const { } bool TargetTransformInfo::isLegalToVectorizeLoadChain( - unsigned ChainSizeInBytes, unsigned Alignment, unsigned AddrSpace) const { + unsigned ChainSizeInBytes, Align Alignment, unsigned AddrSpace) const { return TTIImpl->isLegalToVectorizeLoadChain(ChainSizeInBytes, Alignment, AddrSpace); } bool TargetTransformInfo::isLegalToVectorizeStoreChain( - unsigned ChainSizeInBytes, unsigned Alignment, unsigned AddrSpace) const { + unsigned ChainSizeInBytes, Align Alignment, unsigned AddrSpace) const { return TTIImpl->isLegalToVectorizeStoreChain(ChainSizeInBytes, Alignment, AddrSpace); } diff --git a/llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp b/llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp index d3bba0fb522..24f079ffe92 100644 --- a/llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp +++ b/llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp @@ -293,8 +293,8 @@ unsigned GCNTTIImpl::getLoadStoreVecRegBitWidth(unsigned AddrSpace) const { } bool GCNTTIImpl::isLegalToVectorizeMemChain(unsigned ChainSizeInBytes, - unsigned Alignment, - unsigned AddrSpace) const { + Align Alignment, + unsigned AddrSpace) const { // We allow vectorization of flat stores, even though we may need to decompose // them later if they may access private memory. We don't have enough context // here, and legalization can handle it. @@ -306,14 +306,14 @@ bool GCNTTIImpl::isLegalToVectorizeMemChain(unsigned ChainSizeInBytes, } bool GCNTTIImpl::isLegalToVectorizeLoadChain(unsigned ChainSizeInBytes, - unsigned Alignment, - unsigned AddrSpace) const { + Align Alignment, + unsigned AddrSpace) const { return isLegalToVectorizeMemChain(ChainSizeInBytes, Alignment, AddrSpace); } bool GCNTTIImpl::isLegalToVectorizeStoreChain(unsigned ChainSizeInBytes, - unsigned Alignment, - unsigned AddrSpace) const { + Align Alignment, + unsigned AddrSpace) const { return isLegalToVectorizeMemChain(ChainSizeInBytes, Alignment, AddrSpace); } @@ -1025,7 +1025,7 @@ unsigned R600TTIImpl::getLoadStoreVecRegBitWidth(unsigned AddrSpace) const { } bool R600TTIImpl::isLegalToVectorizeMemChain(unsigned ChainSizeInBytes, - unsigned Alignment, + Align Alignment, unsigned AddrSpace) const { // We allow vectorization of flat stores, even though we may need to decompose // them later if they may access private memory. We don't have enough context @@ -1034,13 +1034,13 @@ bool R600TTIImpl::isLegalToVectorizeMemChain(unsigned ChainSizeInBytes, } bool R600TTIImpl::isLegalToVectorizeLoadChain(unsigned ChainSizeInBytes, - unsigned Alignment, + Align Alignment, unsigned AddrSpace) const { return isLegalToVectorizeMemChain(ChainSizeInBytes, Alignment, AddrSpace); } bool R600TTIImpl::isLegalToVectorizeStoreChain(unsigned ChainSizeInBytes, - unsigned Alignment, + Align Alignment, unsigned AddrSpace) const { return isLegalToVectorizeMemChain(ChainSizeInBytes, Alignment, AddrSpace); } diff --git a/llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.h b/llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.h index 5c1f81bfce1..508ed061e93 100644 --- a/llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.h +++ b/llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.h @@ -158,14 +158,11 @@ public: VectorType *VecTy) const; unsigned getLoadStoreVecRegBitWidth(unsigned AddrSpace) const; - bool isLegalToVectorizeMemChain(unsigned ChainSizeInBytes, - unsigned Alignment, + bool isLegalToVectorizeMemChain(unsigned ChainSizeInBytes, Align Alignment, unsigned AddrSpace) const; - bool isLegalToVectorizeLoadChain(unsigned ChainSizeInBytes, - unsigned Alignment, + bool isLegalToVectorizeLoadChain(unsigned ChainSizeInBytes, Align Alignment, unsigned AddrSpace) const; - bool isLegalToVectorizeStoreChain(unsigned ChainSizeInBytes, - unsigned Alignment, + bool isLegalToVectorizeStoreChain(unsigned ChainSizeInBytes, Align Alignment, unsigned AddrSpace) const; Type *getMemcpyLoopLoweringType(LLVMContext &Context, Value *Length, unsigned SrcAddrSpace, unsigned DestAddrSpace, @@ -266,13 +263,11 @@ public: unsigned getRegisterBitWidth(bool Vector) const; unsigned getMinVectorRegisterBitWidth() const; unsigned getLoadStoreVecRegBitWidth(unsigned AddrSpace) const; - bool isLegalToVectorizeMemChain(unsigned ChainSizeInBytes, unsigned Alignment, + bool isLegalToVectorizeMemChain(unsigned ChainSizeInBytes, Align Alignment, unsigned AddrSpace) const; - bool isLegalToVectorizeLoadChain(unsigned ChainSizeInBytes, - unsigned Alignment, + bool isLegalToVectorizeLoadChain(unsigned ChainSizeInBytes, Align Alignment, unsigned AddrSpace) const; - bool isLegalToVectorizeStoreChain(unsigned ChainSizeInBytes, - unsigned Alignment, + bool isLegalToVectorizeStoreChain(unsigned ChainSizeInBytes, Align Alignment, unsigned AddrSpace) const; unsigned getMaxInterleaveFactor(unsigned VF); unsigned getCFInstrCost(unsigned Opcode, TTI::TargetCostKind CostKind); diff --git a/llvm/lib/Target/NVPTX/NVPTXTargetTransformInfo.h b/llvm/lib/Target/NVPTX/NVPTXTargetTransformInfo.h index e28a8220c33..88156f68728 100644 --- a/llvm/lib/Target/NVPTX/NVPTXTargetTransformInfo.h +++ b/llvm/lib/Target/NVPTX/NVPTXTargetTransformInfo.h @@ -50,13 +50,11 @@ public: // Loads and stores can be vectorized if the alignment is at least as big as // the load/store we want to vectorize. - bool isLegalToVectorizeLoadChain(unsigned ChainSizeInBytes, - unsigned Alignment, + bool isLegalToVectorizeLoadChain(unsigned ChainSizeInBytes, Align Alignment, unsigned AddrSpace) const { return Alignment >= ChainSizeInBytes; } - bool isLegalToVectorizeStoreChain(unsigned ChainSizeInBytes, - unsigned Alignment, + bool isLegalToVectorizeStoreChain(unsigned ChainSizeInBytes, Align Alignment, unsigned AddrSpace) const { return isLegalToVectorizeLoadChain(ChainSizeInBytes, Alignment, AddrSpace); } diff --git a/llvm/lib/Transforms/Vectorize/LoadStoreVectorizer.cpp b/llvm/lib/Transforms/Vectorize/LoadStoreVectorizer.cpp index 4885dd4351d..9b81afbb4b6 100644 --- a/llvm/lib/Transforms/Vectorize/LoadStoreVectorizer.cpp +++ b/llvm/lib/Transforms/Vectorize/LoadStoreVectorizer.cpp @@ -1073,7 +1073,7 @@ bool Vectorizer::vectorizeStoreChain( return false; } - if (!TTI.isLegalToVectorizeStoreChain(SzInBytes, Alignment.value(), AS)) { + if (!TTI.isLegalToVectorizeStoreChain(SzInBytes, Alignment, AS)) { auto Chains = splitOddVectorElts(Chain, Sz); return vectorizeStoreChain(Chains.first, InstructionsProcessed) | vectorizeStoreChain(Chains.second, InstructionsProcessed); @@ -1218,7 +1218,7 @@ bool Vectorizer::vectorizeLoadChain( return false; } - if (!TTI.isLegalToVectorizeLoadChain(SzInBytes, Alignment.value(), AS)) { + if (!TTI.isLegalToVectorizeLoadChain(SzInBytes, Alignment, AS)) { auto Chains = splitOddVectorElts(Chain, Sz); return vectorizeLoadChain(Chains.first, InstructionsProcessed) | vectorizeLoadChain(Chains.second, InstructionsProcessed); -- 2.11.0