From 18641fd9fa5f540007fdf792cd74c3997694872e Mon Sep 17 00:00:00 2001 From: Huacai Chen Date: Thu, 30 Jul 2020 16:51:27 +0800 Subject: [PATCH] MIPS: DTS: Fix number of msi vectors for Loongson64G HT irqs vectors are 8 groups, each group has 32 irqs, Loongson64C CPUs can use only 4 groups and Loongson64G CPUs can use all 8 groups. So the number of msi vectors of Loongson64G is 192 (32*8 - 64 = 192). Fixes: 24af105962c8004edb9f5bf84 ("MIPS: Loongson64: DeviceTree for LS7A PCH") Signed-off-by: Huacai Chen Signed-off-by: Thomas Bogendoerfer --- arch/mips/boot/dts/loongson/loongson64g_4core_ls7a.dts | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/arch/mips/boot/dts/loongson/loongson64g_4core_ls7a.dts b/arch/mips/boot/dts/loongson/loongson64g_4core_ls7a.dts index bdc911e21ebf..c945f8565d54 100644 --- a/arch/mips/boot/dts/loongson/loongson64g_4core_ls7a.dts +++ b/arch/mips/boot/dts/loongson/loongson64g_4core_ls7a.dts @@ -20,7 +20,11 @@ interrupts = <24 IRQ_TYPE_LEVEL_HIGH>, <25 IRQ_TYPE_LEVEL_HIGH>, <26 IRQ_TYPE_LEVEL_HIGH>, - <27 IRQ_TYPE_LEVEL_HIGH>; + <27 IRQ_TYPE_LEVEL_HIGH>, + <28 IRQ_TYPE_LEVEL_HIGH>, + <29 IRQ_TYPE_LEVEL_HIGH>, + <30 IRQ_TYPE_LEVEL_HIGH>, + <31 IRQ_TYPE_LEVEL_HIGH>; }; }; @@ -31,7 +35,7 @@ interrupt-controller; msi-controller; loongson,msi-base-vec = <64>; - loongson,msi-num-vecs = <128>; + loongson,msi-num-vecs = <192>; interrupt-parent = <&htvec>; }; }; -- 2.11.0