From 19683b948188c25b385004624a260de710346864 Mon Sep 17 00:00:00 2001 From: Paul Brook Date: Sat, 24 Mar 2007 02:51:28 +0000 Subject: [PATCH] 2007-03-24 Paul Brook opcodes/ * arm-dis.c (coprocessor_opcodes): Remove superfluous 0x. (print_insn_coprocessor): Handle %x. --- opcodes/ChangeLog | 5 +++++ opcodes/arm-dis.c | 9 +++++++-- 2 files changed, 12 insertions(+), 2 deletions(-) diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index 5f94a36577..3761ce08bc 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,4 +1,9 @@ 2007-03-24 Paul Brook + + * arm-dis.c (coprocessor_opcodes): Remove superfluous 0x. + (print_insn_coprocessor): Handle %x. + +2007-03-24 Paul Brook Mark Shinwell * arm-dis.c (arm_opcodes): Print SRS base register. diff --git a/opcodes/arm-dis.c b/opcodes/arm-dis.c index 80e5cac062..6e65026c35 100644 --- a/opcodes/arm-dis.c +++ b/opcodes/arm-dis.c @@ -279,8 +279,8 @@ static const struct opcode32 coprocessor_opcodes[] = {FPU_VFP_EXT_V1, 0x0e100b10, 0x0ff00fff, "fmrdl%c\t%12-15r, %z2"}, {FPU_VFP_EXT_V1, 0x0e200b10, 0x0ff00fff, "fmdhr%c\t%z2, %12-15r"}, {FPU_VFP_EXT_V1, 0x0e300b10, 0x0ff00fff, "fmrdh%c\t%12-15r, %z2"}, - {FPU_VFP_EXT_V1xD, 0x0ee00a10, 0x0ff00fff, "fmxr%c\t, %12-15r"}, - {FPU_VFP_EXT_V1xD, 0x0ef00a10, 0x0ff00fff, "fmrx%c\t%12-15r, "}, + {FPU_VFP_EXT_V1xD, 0x0ee00a10, 0x0ff00fff, "fmxr%c\t, %12-15r"}, + {FPU_VFP_EXT_V1xD, 0x0ef00a10, 0x0ff00fff, "fmrx%c\t%12-15r, "}, {FPU_VFP_EXT_V1xD, 0x0e000a10, 0x0ff00f7f, "fmsr%c\t%y2, %12-15r"}, {FPU_VFP_EXT_V1xD, 0x0e100a10, 0x0ff00f7f, "fmrs%c\t%12-15r, %y2"}, {FPU_VFP_EXT_V1xD, 0x0eb50a40, 0x0fbf0f70, "fcmp%7'ezs%c\t%y1"}, @@ -1868,6 +1868,11 @@ print_insn_coprocessor (bfd_vma pc, struct disassemble_info *info, long given, case 'G': func (stream, "%s", iwmmxt_cregnames[value]); break; + + case 'x': + func (stream, "0x%lx", value); + break; + case '`': c++; if (value == 0) -- 2.11.0