From 1a6acc214dc066ea08365b605e109203e9164068 Mon Sep 17 00:00:00 2001 From: Chris Lattner Date: Mon, 9 Apr 2007 05:31:20 +0000 Subject: [PATCH] implement CodeGen/X86/inline-asm-x-scalar.ll:test3 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35802 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp | 11 +++++++++-- 1 file changed, 9 insertions(+), 2 deletions(-) diff --git a/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp b/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp index 59cba1b075d..9df52014602 100644 --- a/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp +++ b/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp @@ -2656,13 +2656,20 @@ void RegsForValue::getCopyToRegs(SDOperand Val, SelectionDAG &DAG, if (MVT::isVector(RegVT)) { assert(Val.getValueType() == MVT::Vector &&"Not a vector-vector cast?"); Val = DAG.getNode(ISD::VBIT_CONVERT, RegVT, Val); - } else if (MVT::isInteger(RegVT)) { + } else if (MVT::isInteger(RegVT) && MVT::isInteger(Val.getValueType())) { if (RegVT < ValueVT) Val = DAG.getNode(ISD::TRUNCATE, RegVT, Val); else Val = DAG.getNode(ISD::ANY_EXTEND, RegVT, Val); - } else + } else if (MVT::isFloatingPoint(RegVT) && + MVT::isFloatingPoint(Val.getValueType())) { Val = DAG.getNode(ISD::FP_EXTEND, RegVT, Val); + } else if (MVT::getSizeInBits(RegVT) == + MVT::getSizeInBits(Val.getValueType())) { + Val = DAG.getNode(ISD::BIT_CONVERT, RegVT, Val); + } else { + assert(0 && "Unknown mismatch!"); + } } Chain = DAG.getCopyToReg(Chain, Regs[0], Val, Flag); Flag = Chain.getValue(1); -- 2.11.0