From 1ca28dc907b3725940fe88bfd91bc3a53081e2d3 Mon Sep 17 00:00:00 2001 From: Johan Hovold Date: Tue, 4 Apr 2023 18:21:10 +0100 Subject: [PATCH] dt-bindings: nvmem: qcom,spmi-sdam: fix example 'reg' property The SPMI PMIC register region width is fixed and should not be encoded in the devicetree. Amend the example with a parent pmic node with the expected '#address-cells' and '#size-cells' and fix up the 'reg' property. Fixes: 9664a6b54c57 ("dt-bindings: nvmem: add binding for QTI SPMI SDAM") Signed-off-by: Johan Hovold Reviewed-by: Krzysztof Kozlowski Signed-off-by: Srinivas Kandagatla Link: https://lore.kernel.org/r/20230404172148.82422-3-srinivas.kandagatla@linaro.org Signed-off-by: Greg Kroah-Hartman --- .../devicetree/bindings/nvmem/qcom,spmi-sdam.yaml | 31 +++++++++++++--------- 1 file changed, 18 insertions(+), 13 deletions(-) diff --git a/Documentation/devicetree/bindings/nvmem/qcom,spmi-sdam.yaml b/Documentation/devicetree/bindings/nvmem/qcom,spmi-sdam.yaml index e08504ef3b6e..4702f10ecca2 100644 --- a/Documentation/devicetree/bindings/nvmem/qcom,spmi-sdam.yaml +++ b/Documentation/devicetree/bindings/nvmem/qcom,spmi-sdam.yaml @@ -42,17 +42,22 @@ unevaluatedProperties: false examples: - | - sdam_1: nvram@b000 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "qcom,spmi-sdam"; - reg = <0xb000 0x100>; - ranges = <0 0xb000 0x100>; - - /* Data cells */ - restart_reason: restart@50 { - reg = <0x50 0x1>; - bits = <6 2>; - }; - }; + pmic { + #address-cells = <1>; + #size-cells = <0>; + + sdam_1: nvram@b000 { + compatible = "qcom,spmi-sdam"; + reg = <0xb000>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0xb000 0x100>; + + /* Data cells */ + restart_reason: restart@50 { + reg = <0x50 0x1>; + bits = <6 2>; + }; + }; + }; ... -- 2.11.0