From 1cc8e6f067f9048556af1d1863271db55b15efc1 Mon Sep 17 00:00:00 2001
From: j_mayer <j_mayer@c046a42c-6fe2-441c-8c8c-71466251a162>
Date: Thu, 4 Oct 2007 01:54:44 +0000
Subject: [PATCH] We must reset the PowerPC CPU _after_ registering it, as
 hardware reset   effect is implementation dependant.

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3323 c046a42c-6fe2-441c-8c8c-71466251a162
---
 hw/ppc405_uc.c    | 6 ++++--
 linux-user/main.c | 2 +-
 2 files changed, 5 insertions(+), 3 deletions(-)

diff --git a/hw/ppc405_uc.c b/hw/ppc405_uc.c
index b6fc491ae0..8a31475ed1 100644
--- a/hw/ppc405_uc.c
+++ b/hw/ppc405_uc.c
@@ -51,20 +51,22 @@ CPUState *ppc405_init (const unsigned char *cpu_model,
 
     /* init CPUs */
     env = cpu_init();
-    qemu_register_reset(&cpu_ppc_reset, env);
-    register_savevm("cpu", 0, 3, cpu_save, cpu_load, env);
     ppc_find_by_name(cpu_model, &def);
     if (def == NULL) {
         cpu_abort(env, "Unable to find PowerPC %s CPU definition\n",
                   cpu_model);
     }
     cpu_ppc_register(env, def);
+    cpu_ppc_reset(env);
     cpu_clk->cb = NULL; /* We don't care about CPU clock frequency changes */
     cpu_clk->opaque = env;
     /* Set time-base frequency to sysclk */
     tb_clk->cb = ppc_emb_timers_init(env, sysclk);
     tb_clk->opaque = env;
     ppc_dcr_init(env, NULL, NULL);
+    /* Register Qemu callbacks */
+    qemu_register_reset(&cpu_ppc_reset, env);
+    register_savevm("cpu", 0, 3, cpu_save, cpu_load, env);
 
     return env;
 }
diff --git a/linux-user/main.c b/linux-user/main.c
index af99d0455a..9c3d67d497 100644
--- a/linux-user/main.c
+++ b/linux-user/main.c
@@ -2100,7 +2100,7 @@ int main(int argc, char **argv)
                       "Unable to find PowerPC CPU definition\n");
         }
         cpu_ppc_register(env, def);
-
+        cpu_ppc_reset(env);
         for (i = 0; i < 32; i++) {
             if (i != 12 && i != 6 && i != 13)
                 env->msr[i] = (regs->msr >> i) & 1;
-- 
2.11.0