From 1df940a102a8bf84dd51df273fa21f438ec83005 Mon Sep 17 00:00:00 2001 From: Mikael Holmen Date: Wed, 10 May 2017 06:33:43 +0000 Subject: [PATCH] [UnreachableBlockElim] Check return value of constrainRegClass(). Summary: MachineRegisterInfo::constrainRegClass() can fail if two register classes don't have a common subclass or if the register class doesn't contain enough registers. Check the return value before trying to remove Phi nodes, and if we can't constrain, we output a COPY instead of simply replacing registers. Reviewers: kparzysz, david2050, wmi Reviewed By: kparzysz Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D32999 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302622 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/CodeGen/UnreachableBlockElim.cpp | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/lib/CodeGen/UnreachableBlockElim.cpp b/lib/CodeGen/UnreachableBlockElim.cpp index f085132b6a9..407fd9b162e 100644 --- a/lib/CodeGen/UnreachableBlockElim.cpp +++ b/lib/CodeGen/UnreachableBlockElim.cpp @@ -206,11 +206,12 @@ bool UnreachableMachineBlockElim::runOnMachineFunction(MachineFunction &F) { if (InputReg != OutputReg) { MachineRegisterInfo &MRI = F.getRegInfo(); unsigned InputSub = Input.getSubReg(); - if (InputSub == 0) { - MRI.constrainRegClass(InputReg, MRI.getRegClass(OutputReg)); + if (InputSub == 0 && + MRI.constrainRegClass(InputReg, MRI.getRegClass(OutputReg))) { MRI.replaceRegWith(OutputReg, InputReg); } else { - // The input register to the PHI has a subregister: + // The input register to the PHI has a subregister or it can't be + // constrained to the proper register class: // insert a COPY instead of simply replacing the output // with the input. const TargetInstrInfo *TII = F.getSubtarget().getInstrInfo(); -- 2.11.0