From 216cf23663789b06508f65f6dc0a72f181c9c03a Mon Sep 17 00:00:00 2001 From: Dave Allison Date: Mon, 18 Aug 2014 15:49:51 -0700 Subject: [PATCH] Workaround problem reading main stack on intel devices. This works around a problem where ART can't read the lowest page of the main stack. The workaround is to add 4K to the stack start address on the main stack on Intel. Please see https://b2.corp.google.com/issues/17111575 for underlying cause. Cherry picked from d970bac690baa6f735b0cd187440546869088a0f Bug: 17031544 Change-Id: Ifc3216e10160bb1eec9d989fd57b10345bc89537 --- runtime/thread.cc | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/runtime/thread.cc b/runtime/thread.cc index d5163a831..7ac685bd8 100644 --- a/runtime/thread.cc +++ b/runtime/thread.cc @@ -552,6 +552,17 @@ void Thread::InitStackHwm() { // The thread might have protected region at the bottom. We need // to install our own region so we need to move the limits // of the stack to make room for it. + +#if defined(__i386__) || defined(__x86_64__) + // Work around issue trying to read last page of stack on Intel. + // The bug for this is b/17111575. The problem is that we are + // unable to read the page just above the guard page on the + // main stack on an intel target. When the bug is fixed + // this can be removed. + if (::art::GetTid() == getpid()) { + guardsize += 4 * KB; + } +#endif tlsPtr_.stack_begin += guardsize + kStackOverflowProtectedSize; tlsPtr_.stack_end += guardsize + kStackOverflowProtectedSize; tlsPtr_.stack_size -= guardsize; -- 2.11.0