From 26442c799857d7b776085dde37fa93fc2fd21bd1 Mon Sep 17 00:00:00 2001 From: Shengjiu Wang Date: Mon, 7 Dec 2020 17:12:34 +0800 Subject: [PATCH] arm64: dts: imx8mn: Configure clock rate for audio plls Configure clock rate for audio plls. audio pll1 is used as parent clock for clocks that is multiple of 8kHz. audio pll2 is used as parent clock for clocks that is multiple of 11kHz. Signed-off-by: Shengjiu Wang Signed-off-by: Shawn Guo --- arch/arm64/boot/dts/freescale/imx8mn.dtsi | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/freescale/imx8mn.dtsi b/arch/arm64/boot/dts/freescale/imx8mn.dtsi index ee1790230490..00808bb40680 100644 --- a/arch/arm64/boot/dts/freescale/imx8mn.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mn.dtsi @@ -581,7 +581,9 @@ <&clk IMX8MN_CLK_NOC>, <&clk IMX8MN_CLK_AUDIO_AHB>, <&clk IMX8MN_CLK_IPG_AUDIO_ROOT>, - <&clk IMX8MN_SYS_PLL3>; + <&clk IMX8MN_SYS_PLL3>, + <&clk IMX8MN_AUDIO_PLL1>, + <&clk IMX8MN_AUDIO_PLL2>; assigned-clock-parents = <&clk IMX8MN_SYS_PLL1_800M>, <&clk IMX8MN_ARM_PLL_OUT>, <&clk IMX8MN_SYS_PLL3_OUT>, @@ -589,7 +591,9 @@ assigned-clock-rates = <0>, <0>, <0>, <400000000>, <400000000>, - <600000000>; + <600000000>, + <393216000>, + <361267200>; }; src: reset-controller@30390000 { -- 2.11.0