From 26c00ab4aae2d29b6c724a9c23d5f6cba2b20e41 Mon Sep 17 00:00:00 2001 From: Laurent Pinchart Date: Thu, 26 Feb 2015 11:21:22 +0200 Subject: [PATCH] ARM: shmobile: lager: Add DU external pixel clocks to DT Declare the fixed 148.5MHz pixel clocks connected to the DU clock inputs. Signed-off-by: Laurent Pinchart Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7790-lager.dts | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+) diff --git a/arch/arm/boot/dts/r8a7790-lager.dts b/arch/arm/boot/dts/r8a7790-lager.dts index 631b3f5fb7d8..329bb994aac0 100644 --- a/arch/arm/boot/dts/r8a7790-lager.dts +++ b/arch/arm/boot/dts/r8a7790-lager.dts @@ -233,6 +233,18 @@ }; }; }; + + x2_clk: x2-clock { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <148500000>; + }; + + x13_clk: x13-clock { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <148500000>; + }; }; &du { @@ -240,6 +252,15 @@ pinctrl-names = "default"; status = "okay"; + clocks = <&mstp7_clks R8A7790_CLK_DU0>, + <&mstp7_clks R8A7790_CLK_DU1>, + <&mstp7_clks R8A7790_CLK_DU2>, + <&mstp7_clks R8A7790_CLK_LVDS0>, + <&mstp7_clks R8A7790_CLK_LVDS1>, + <&x13_clk>, <&x2_clk>; + clock-names = "du.0", "du.1", "du.2", "lvds.0", "lvds.1", + "dclkin.0", "dclkin.1"; + ports { port@0 { endpoint { -- 2.11.0