From 2b9f99bb589b904b5962083e0288a29582ffe5d9 Mon Sep 17 00:00:00 2001 From: Jim Wilson Date: Thu, 7 Jul 2005 19:27:52 +0000 Subject: [PATCH] Kaveh Ghazi's printf format attribute checking patch. bfd: * elf32-xtensa.c (vsprint_msg): Add format attribute. Fix format bugs. * vms.h (_bfd_vms_debug): Add format attribute. (_bfd_vms_debug, _bfd_hexdump): Fix typos. binutils: * bucomm.h (report): Add format attribute. * dlltool.c (inform): Likewise. * dllwrap.c (display, inform, warn): Likewise. * objdump.c (objdump_sprintf): Likewise. * readelf.c (error, warn): Likewise. Fix format bugs. gas: * config/tc-tic30.c (debug): Add format attribute. Fix format bugs. include: * dis-asm.h (fprintf_ftype): Add format attribute. opcodes: * arc-dis.c, arm-dis.c, cris-dis.c, crx-dis.c, d10v-dis.c, d30v-dis.c, fr30-dis.c, h8300-dis.c, h8500-dis.c, i860-dis.c, ia64-dis.c, ip2k-dis.c, m10200-dis.c, m10300-dis.c, m88k-dis.c, mcore-dis.c, mips-dis.c, ms1-dis.c, or32-dis.c, ppc-dis.c, sh64-dis.c, sparc-dis.c, tic4x-dis.c, tic80-dis.c, v850-dis.c: Fix format bugs. * ia64-gen.c (fail, warn): Add format attribute. * or32-opc.c (debug): Likewise. --- bfd/ChangeLog | 7 +++++++ bfd/elf32-xtensa.c | 4 ++-- bfd/vms.h | 4 ++-- include/ChangeLog | 4 ++++ include/dis-asm.h | 2 +- opcodes/ChangeLog | 11 +++++++++++ opcodes/arc-dis.c | 2 +- opcodes/arm-dis.c | 20 ++++++++++---------- opcodes/cris-dis.c | 4 ++-- opcodes/crx-dis.c | 8 ++++---- opcodes/d10v-dis.c | 4 ++-- opcodes/d30v-dis.c | 8 ++++---- opcodes/fr30-dis.c | 4 ++-- opcodes/h8300-dis.c | 8 ++++---- opcodes/h8500-dis.c | 6 +++--- opcodes/i860-dis.c | 2 +- opcodes/ia64-dis.c | 10 +++++----- opcodes/ia64-gen.c | 4 ++-- opcodes/ip2k-dis.c | 20 ++++++++++---------- opcodes/m10200-dis.c | 6 +++--- opcodes/m10300-dis.c | 4 ++-- opcodes/m88k-dis.c | 4 ++-- opcodes/mcore-dis.c | 18 +++++++++--------- opcodes/mips-dis.c | 47 ++++++++++++++++++++++++----------------------- opcodes/ms1-dis.c | 2 +- opcodes/or32-dis.c | 2 +- opcodes/or32-opc.c | 38 +++++++++++++++++++------------------- opcodes/ppc-dis.c | 2 +- opcodes/sh64-dis.c | 16 ++++++++-------- opcodes/sparc-dis.c | 12 ++++++------ opcodes/tic4x-dis.c | 8 ++++---- opcodes/tic80-dis.c | 2 +- opcodes/v850-dis.c | 8 ++++---- 33 files changed, 162 insertions(+), 139 deletions(-) diff --git a/bfd/ChangeLog b/bfd/ChangeLog index 8bc764485c..be2478b72d 100644 --- a/bfd/ChangeLog +++ b/bfd/ChangeLog @@ -1,3 +1,10 @@ +2005-07-07 Kaveh R. Ghazi + + * elf32-xtensa.c (vsprint_msg): Add format attribute. Fix + format bugs. + * vms.h (_bfd_vms_debug): Add format attribute. + (_bfd_vms_debug, _bfd_hexdump): Fix typos. + 2005-07-07 H.J. Lu PR 975 diff --git a/bfd/elf32-xtensa.c b/bfd/elf32-xtensa.c index b18003c2fd..c97aea223a 100644 --- a/bfd/elf32-xtensa.c +++ b/bfd/elf32-xtensa.c @@ -1775,7 +1775,7 @@ elf_xtensa_do_reloc (reloc_howto_type *howto, } -static char * +static char * ATTRIBUTE_PRINTF(2,4) vsprint_msg (const char *origmsg, const char *fmt, int arglen, ...) { /* To reduce the size of the memory leak, @@ -2355,7 +2355,7 @@ elf_xtensa_relocate_section (bfd *output_bfd, else error_message = vsprint_msg (error_message, ": (%s+0x%x)", strlen (name) + 22, - name, rel->r_addend); + name, (int)rel->r_addend); } if (!((*info->callbacks->reloc_dangerous) diff --git a/bfd/vms.h b/bfd/vms.h index 8960aa5586..33ac38b766 100644 --- a/bfd/vms.h +++ b/bfd/vms.h @@ -620,8 +620,8 @@ struct vms_private_data_struct #define SECTION_NAME_TEMPLATE "__SEC__%d" #if VMS_DEBUG -extern void _bfd_vms_debug (int, char *, ..); -extern void _bfd_hexdump (int, unsignedchar *, int, int); +extern void _bfd_vms_debug (int, char *, ...) ATTRIBUTE_PRINTF_2; +extern void _bfd_hexdump (int, unsigned char *, int, int); #define vms_debug _bfd_vms_debug #endif diff --git a/include/ChangeLog b/include/ChangeLog index ac58c8275a..d557750465 100644 --- a/include/ChangeLog +++ b/include/ChangeLog @@ -1,3 +1,7 @@ +2005-07-07 Kaveh R. Ghazi + + * dis-asm.h (fprintf_ftype): Add format attribute. + 2005-07-03 Steve Ellcey PR other/13906 diff --git a/include/dis-asm.h b/include/dis-asm.h index fc1776c15c..67473ad37a 100644 --- a/include/dis-asm.h +++ b/include/dis-asm.h @@ -35,7 +35,7 @@ extern "C" { #include #include "bfd.h" -typedef int (*fprintf_ftype) (void *, const char*, ...); +typedef int (*fprintf_ftype) (void *, const char*, ...) ATTRIBUTE_FPTR_PRINTF_2; enum dis_insn_type { dis_noninsn, /* Not a valid instruction */ diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index 3fa5367a58..c17a3100e7 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,3 +1,14 @@ +2005-07-07 Kaveh R. Ghazi + + * arc-dis.c, arm-dis.c, cris-dis.c, crx-dis.c, d10v-dis.c, + d30v-dis.c, fr30-dis.c, h8300-dis.c, h8500-dis.c, i860-dis.c, + ia64-dis.c, ip2k-dis.c, m10200-dis.c, m10300-dis.c, + m88k-dis.c, mcore-dis.c, mips-dis.c, ms1-dis.c, or32-dis.c, + ppc-dis.c, sh64-dis.c, sparc-dis.c, tic4x-dis.c, tic80-dis.c, + v850-dis.c: Fix format bugs. + * ia64-gen.c (fail, warn): Add format attribute. + * or32-opc.c (debug): Likewise. + 2005-07-07 Khem Raj * arm-dis.c (opcode32 arm_opcodes): Fix ARM VFP fadds instruction diff --git a/opcodes/arc-dis.c b/opcodes/arc-dis.c index fe835ae129..ba48eeffe6 100644 --- a/opcodes/arc-dis.c +++ b/opcodes/arc-dis.c @@ -1202,7 +1202,7 @@ decodeInstr (bfd_vma address, /* Address of this instruction. */ bytes = dsmOneArcInst (address, (void *)& s); /* Display the disassembly instruction. */ - (*func) (stream, "%08x ", s.words[0]); + (*func) (stream, "%08lx ", s.words[0]); (*func) (stream, " "); (*func) (stream, "%-10s ", s.instrBuffer); diff --git a/opcodes/arm-dis.c b/opcodes/arm-dis.c index faff3a06a0..0f3b65e13b 100644 --- a/opcodes/arm-dis.c +++ b/opcodes/arm-dis.c @@ -1578,7 +1578,7 @@ print_insn_arm (bfd_vma pc, struct disassemble_info *info, long given) reg = given >> bitstart; reg &= (2 << (bitend - bitstart)) - 1; - func (stream, "%d", reg); + func (stream, "%ld", reg); } break; case 'W': @@ -1588,7 +1588,7 @@ print_insn_arm (bfd_vma pc, struct disassemble_info *info, long given) reg = given >> bitstart; reg &= (2 << (bitend - bitstart)) - 1; - func (stream, "%d", reg + 1); + func (stream, "%ld", reg + 1); } break; case 'x': @@ -1598,7 +1598,7 @@ print_insn_arm (bfd_vma pc, struct disassemble_info *info, long given) reg = given >> bitstart; reg &= (2 << (bitend - bitstart)) - 1; - func (stream, "0x%08x", reg); + func (stream, "0x%08lx", reg); /* Some SWI instructions have special meanings. */ @@ -1615,7 +1615,7 @@ print_insn_arm (bfd_vma pc, struct disassemble_info *info, long given) reg = given >> bitstart; reg &= (2 << (bitend - bitstart)) - 1; - func (stream, "%01x", reg & 0xf); + func (stream, "%01lx", reg & 0xf); } break; case 'f': @@ -1629,7 +1629,7 @@ print_insn_arm (bfd_vma pc, struct disassemble_info *info, long given) func (stream, "#%s", arm_fp_const[reg & 7]); else - func (stream, "f%d", reg); + func (stream, "f%ld", reg); } break; @@ -1991,7 +1991,7 @@ print_insn_thumb16 (bfd_vma pc, struct disassemble_info *info, long given) long imm = (given & 0x07c0) >> 6; if (imm == 0) imm = 32; - func (stream, "#%d", imm); + func (stream, "#%ld", imm); } break; @@ -2024,15 +2024,15 @@ print_insn_thumb16 (bfd_vma pc, struct disassemble_info *info, long given) break; case 'd': - func (stream, "%d", reg); + func (stream, "%ld", reg); break; case 'H': - func (stream, "%d", reg << 1); + func (stream, "%ld", reg << 1); break; case 'W': - func (stream, "%d", reg << 2); + func (stream, "%ld", reg << 2); break; case 'a': @@ -2044,7 +2044,7 @@ print_insn_thumb16 (bfd_vma pc, struct disassemble_info *info, long given) break; case 'x': - func (stream, "0x%04x", reg); + func (stream, "0x%04lx", reg); break; case 'B': diff --git a/opcodes/cris-dis.c b/opcodes/cris-dis.c index 075cca7d07..3d248b74b7 100644 --- a/opcodes/cris-dis.c +++ b/opcodes/cris-dis.c @@ -1448,7 +1448,7 @@ print_insn_cris_generic (bfd_vma memaddr, advance += 2; /* If to print data as offsets, then shortcut here. */ - (*info->fprintf_func) (info->stream, "case %d%s: -> ", + (*info->fprintf_func) (info->stream, "case %ld%s: -> ", case_offset + no_of_case_offsets - case_offset_counter, case_offset_counter == 1 ? "/default" : @@ -1520,7 +1520,7 @@ print_insn_cris_generic (bfd_vma memaddr, if (matchedp == NULL) { - (*info->fprintf_func) (info->stream, "??0x%lx", insn); + (*info->fprintf_func) (info->stream, "??0x%x", insn); advance += 2; info->insn_type = dis_noninsn; diff --git a/opcodes/crx-dis.c b/opcodes/crx-dis.c index ae4a556a08..8f14e8ba92 100644 --- a/opcodes/crx-dis.c +++ b/opcodes/crx-dis.c @@ -547,7 +547,7 @@ print_arg (argument *a, bfd_vma memaddr, struct disassemble_info *info) func (stream, "%s", string); } else - func (stream, "$0x%x", a->constant); + func (stream, "$0x%lx", a->constant); } else { @@ -556,11 +556,11 @@ print_arg (argument *a, bfd_vma memaddr, struct disassemble_info *info) } } else - func (stream, "$0x%x", a->constant); + func (stream, "$0x%lx", a->constant); break; case arg_idxr: - func (stream, "0x%x(%s,%s,%d)", a->constant, getregname (a->r), + func (stream, "0x%lx(%s,%s,%d)", a->constant, getregname (a->r), getregname (a->i_r), powerof2 (a->scale)); break; @@ -569,7 +569,7 @@ print_arg (argument *a, bfd_vma memaddr, struct disassemble_info *info) break; case arg_cr: - func (stream, "0x%x(%s)", a->constant, getregname (a->r)); + func (stream, "0x%lx(%s)", a->constant, getregname (a->r)); if (IS_INSN_TYPE (LD_STOR_INS_INC)) func (stream, "+"); diff --git a/opcodes/d10v-dis.c b/opcodes/d10v-dis.c index 55a3fd6ce8..61d7f757fd 100644 --- a/opcodes/d10v-dis.c +++ b/opcodes/d10v-dis.c @@ -182,7 +182,7 @@ dis_long (unsigned long insn, } if (!match) - (*info->fprintf_func) (info->stream, ".long\t0x%08x", insn); + (*info->fprintf_func) (info->stream, ".long\t0x%08lx", insn); if (need_paren) (*info->fprintf_func) (info->stream, ")"); @@ -255,7 +255,7 @@ dis_2_short (unsigned long insn, } if (num_match == 0) - (*info->fprintf_func) (info->stream, ".long\t0x%08x", insn); + (*info->fprintf_func) (info->stream, ".long\t0x%08lx", insn); if (need_paren) (*info->fprintf_func) (info->stream, ")"); diff --git a/opcodes/d30v-dis.c b/opcodes/d30v-dis.c index c7385d94c9..2a2916eecc 100644 --- a/opcodes/d30v-dis.c +++ b/opcodes/d30v-dis.c @@ -344,7 +344,7 @@ print_insn_d30v (bfd_vma memaddr, struct disassemble_info *info) { info->bytes_per_line = 8; if (!(result = lookup_opcode (&insn, in1, 0))) - (*info->fprintf_func) (info->stream, ".long\t0x%x", in1); + (*info->fprintf_func) (info->stream, ".long\t0x%lx", in1); else print_insn (info, memaddr, (long long) in1, &insn, 0, result); return 4; @@ -356,7 +356,7 @@ print_insn_d30v (bfd_vma memaddr, struct disassemble_info *info) /* LONG instruction. */ if (!(result = lookup_opcode (&insn, in1, 1))) { - (*info->fprintf_func) (info->stream, ".long\t0x%x,0x%x", in1, in2); + (*info->fprintf_func) (info->stream, ".long\t0x%lx,0x%lx", in1, in2); return 8; } num = (long long) in1 << 32 | in2; @@ -366,7 +366,7 @@ print_insn_d30v (bfd_vma memaddr, struct disassemble_info *info) { num = in1; if (!(result = lookup_opcode (&insn, in1, 0))) - (*info->fprintf_func) (info->stream, ".long\t0x%x", in1); + (*info->fprintf_func) (info->stream, ".long\t0x%lx", in1); else print_insn (info, memaddr, num, &insn, 0, result); @@ -387,7 +387,7 @@ print_insn_d30v (bfd_vma memaddr, struct disassemble_info *info) insn.form = NULL; num = in2; if (!(result = lookup_opcode (&insn, in2, 0))) - (*info->fprintf_func) (info->stream, ".long\t0x%x", in2); + (*info->fprintf_func) (info->stream, ".long\t0x%lx", in2); else print_insn (info, memaddr, num, &insn, 0, result); } diff --git a/opcodes/fr30-dis.c b/opcodes/fr30-dis.c index f756a26197..0f7c8e895f 100644 --- a/opcodes/fr30-dis.c +++ b/opcodes/fr30-dis.c @@ -77,7 +77,7 @@ print_register_list (void * dis_info, if (value & mask) { - (*info->fprintf_func) (info->stream, "r%i", index + offset); + (*info->fprintf_func) (info->stream, "r%li", index + offset); comma = ","; } @@ -90,7 +90,7 @@ print_register_list (void * dis_info, if (value & mask) { - (*info->fprintf_func) (info->stream, "%sr%i", comma, index + offset); + (*info->fprintf_func) (info->stream, "%sr%li", comma, index + offset); comma = ","; } } diff --git a/opcodes/h8300-dis.c b/opcodes/h8300-dis.c index 9c77e912ee..769c12e37d 100644 --- a/opcodes/h8300-dis.c +++ b/opcodes/h8300-dis.c @@ -279,17 +279,17 @@ print_one_arg (disassemble_info *info, if ((x & SIZE) == L_16 || (x & SIZE) == L_16U) { - outfn (stream, ".%s%d (0x%x)", + outfn (stream, ".%s%d (0x%lx)", (short) cst > 0 ? "+" : "", (short) cst, - addr + (short) cst + len); + (long)(addr + (short) cst + len)); } else { - outfn (stream, ".%s%d (0x%x)", + outfn (stream, ".%s%d (0x%lx)", (char) cst > 0 ? "+" : "", (char) cst, - addr + (char) cst + len); + (long)(addr + (char) cst + len)); } } else if ((x & MODE) == DISP) diff --git a/opcodes/h8500-dis.c b/opcodes/h8500-dis.c index bc56f511f9..c89040ada9 100644 --- a/opcodes/h8500-dis.c +++ b/opcodes/h8500-dis.c @@ -229,7 +229,7 @@ print_insn_h8500 (bfd_vma addr, disassemble_info *info) func (stream, "@(0x%x:8 (%d), r%d)", disp & 0xff, disp, rd); break; case FPIND_D8: - func (stream, "@(0x%x:8 (%d), fp)", disp & 0xff, disp, rn); + func (stream, "@(0x%x:8 (%d), fp)", disp & 0xff, disp); break; case CRB: case CRW: @@ -298,11 +298,11 @@ print_insn_h8500 (bfd_vma addr, disassemble_info *info) break; case PCREL16: func (stream, "0x%0x:16", - (pcrel + addr + opcode->length) & 0xffff); + (int)(pcrel + addr + opcode->length) & 0xffff); break; case PCREL8: func (stream, "#0x%0x:8", - ((char) pcrel + addr + opcode->length) & 0xffff); + (int)((char) pcrel + addr + opcode->length) & 0xffff); break; case QIM: func (stream, "#%d:q", qim); diff --git a/opcodes/i860-dis.c b/opcodes/i860-dis.c index 5d2b9fd03c..9566bad458 100644 --- a/opcodes/i860-dis.c +++ b/opcodes/i860-dis.c @@ -73,7 +73,7 @@ print_br_address (disassemble_info *info, bfd_vma memaddr, long val) long adj = (long)memaddr + 4 + (val << 2); - (*info->fprintf_func) (info->stream, "0x%08x", adj); + (*info->fprintf_func) (info->stream, "0x%08lx", adj); /* Attempt to obtain a symbol for the target address. */ diff --git a/opcodes/ia64-dis.c b/opcodes/ia64-dis.c index 366b6812f1..c40622686f 100644 --- a/opcodes/ia64-dis.c +++ b/opcodes/ia64-dis.c @@ -109,7 +109,7 @@ print_insn_ia64 (bfd_vma memaddr, struct disassemble_info *info) if (slotnum == 0) (*info->fprintf_func) (info->stream, "[%s] ", tname); else - (*info->fprintf_func) (info->stream, " ", tname); + (*info->fprintf_func) (info->stream, " "); unit = ia64_templ_desc[template].exec_unit[slotnum]; @@ -237,11 +237,11 @@ print_insn_ia64 (bfd_vma memaddr, struct disassemble_info *info) if (str) (*info->fprintf_func) (info->stream, "%s", str); else if (odesc->flags & IA64_OPND_FLAG_DECIMAL_SIGNED) - (*info->fprintf_func) (info->stream, "%lld", value); + (*info->fprintf_func) (info->stream, "%lld", (long long) value); else if (odesc->flags & IA64_OPND_FLAG_DECIMAL_UNSIGNED) - (*info->fprintf_func) (info->stream, "%llu", value); + (*info->fprintf_func) (info->stream, "%llu", (long long) value); else - (*info->fprintf_func) (info->stream, "0x%llx", value); + (*info->fprintf_func) (info->stream, "0x%llx", (long long) value); break; case IA64_OPND_CLASS_REL: @@ -268,6 +268,6 @@ print_insn_ia64 (bfd_vma memaddr, struct disassemble_info *info) return retval; decoding_failed: - (*info->fprintf_func) (info->stream, " data8 %#011llx", insn); + (*info->fprintf_func) (info->stream, " data8 %#011llx", (long long) insn); goto failed; } diff --git a/opcodes/ia64-gen.c b/opcodes/ia64-gen.c index 03649d35c4..e12c145bea 100644 --- a/opcodes/ia64-gen.c +++ b/opcodes/ia64-gen.c @@ -239,8 +239,8 @@ static int dlistlen = 0; static int dlisttotlen = 0; -static void fail (const char *, ...); -static void warn (const char *, ...); +static void fail (const char *, ...) ATTRIBUTE_PRINTF_1; +static void warn (const char *, ...) ATTRIBUTE_PRINTF_1; static struct rdep * insert_resource (const char *, enum ia64_dependency_mode); static int deplist_equals (struct deplist *, struct deplist *); static short insert_deplist (int, unsigned short *); diff --git a/opcodes/ip2k-dis.c b/opcodes/ip2k-dis.c index 7b43ccb1b2..f6531baf49 100644 --- a/opcodes/ip2k-dis.c +++ b/opcodes/ip2k-dis.c @@ -89,7 +89,7 @@ print_fr (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, if (offsetvalue == 0) (*info->fprintf_func) (info->stream, "%s","(DP)"); else - (*info->fprintf_func) (info->stream, "$%x%s",offsetvalue, "(DP)"); + (*info->fprintf_func) (info->stream, "$%lx%s",offsetvalue, "(DP)"); return; } @@ -99,7 +99,7 @@ print_fr (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, if (offsetvalue == 0) (*info->fprintf_func) (info->stream, "%s", "(SP)"); else - (*info->fprintf_func) (info->stream, "$%x%s", offsetvalue,"(SP)"); + (*info->fprintf_func) (info->stream, "$%lx%s", offsetvalue,"(SP)"); return; } @@ -110,7 +110,7 @@ print_fr (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, (*info->fprintf_func) (info->stream, "%s", ke->name); else /* Print as an address literal. */ - (*info->fprintf_func) (info->stream, "$%02x", value); + (*info->fprintf_func) (info->stream, "$%02lx", value); } static void @@ -123,7 +123,7 @@ print_dollarhex (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, { disassemble_info *info = (disassemble_info *) dis_info; - (*info->fprintf_func) (info->stream, "$%x", value); + (*info->fprintf_func) (info->stream, "$%lx", value); } static void @@ -136,7 +136,7 @@ print_dollarhex8 (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, { disassemble_info *info = (disassemble_info *) dis_info; - (*info->fprintf_func) (info->stream, "$%02x", value); + (*info->fprintf_func) (info->stream, "$%02lx", value); } static void @@ -153,7 +153,7 @@ print_dollarhex_addr16h (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, by 8 bits so that disassembled code will reassemble properly. */ value = ((value << 8) & 0xFF00); - (*info->fprintf_func) (info->stream, "$%04x", value); + (*info->fprintf_func) (info->stream, "$%04lx", value); } static void @@ -166,7 +166,7 @@ print_dollarhex_addr16l (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, { disassemble_info *info = (disassemble_info *) dis_info; - (*info->fprintf_func) (info->stream, "$%04x", value); + (*info->fprintf_func) (info->stream, "$%04lx", value); } static void @@ -181,7 +181,7 @@ print_dollarhex_p (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, value = ((value << 14) & 0x1C000); ;value = (value & 0x1FFFF); - (*info->fprintf_func) (info->stream, "$%05x", value); + (*info->fprintf_func) (info->stream, "$%05lx", value); } static void @@ -195,7 +195,7 @@ print_dollarhex_cj (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, disassemble_info *info = (disassemble_info *) dis_info; value = ((value << 1) & 0x1FFFF); - (*info->fprintf_func) (info->stream, "$%05x", value); + (*info->fprintf_func) (info->stream, "$%05lx", value); } static void @@ -208,7 +208,7 @@ print_decimal (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, { disassemble_info *info = (disassemble_info *) dis_info; - (*info->fprintf_func) (info->stream, "%d", value); + (*info->fprintf_func) (info->stream, "%ld", value); } diff --git a/opcodes/m10200-dis.c b/opcodes/m10200-dis.c index 92bc2fd84f..beb1bfa67e 100644 --- a/opcodes/m10200-dis.c +++ b/opcodes/m10200-dis.c @@ -108,14 +108,14 @@ disassemble (bfd_vma memaddr, { value = ((insn >> (operand->shift + extra_shift)) & ((1 << operand->bits) - 1)); - (*info->fprintf_func) (info->stream, "d%d", value); + (*info->fprintf_func) (info->stream, "d%ld", value); } else if ((operand->flags & MN10200_OPERAND_AREG) != 0) { value = ((insn >> (operand->shift + extra_shift)) & ((1 << operand->bits) - 1)); - (*info->fprintf_func) (info->stream, "a%d", value); + (*info->fprintf_func) (info->stream, "a%ld", value); } else if ((operand->flags & MN10200_OPERAND_PSW) != 0) @@ -323,7 +323,7 @@ print_insn_mn10200 (bfd_vma memaddr, struct disassemble_info *info) } else { - (*info->fprintf_func) (info->stream, _("unknown\t0x%02x"), insn); + (*info->fprintf_func) (info->stream, _("unknown\t0x%02lx"), insn); return 1; } diff --git a/opcodes/m10300-dis.c b/opcodes/m10300-dis.c index 158490edea..3b0617b061 100644 --- a/opcodes/m10300-dis.c +++ b/opcodes/m10300-dis.c @@ -449,7 +449,7 @@ disassemble (bfd_vma memaddr, value = ((insn >> (operand->shift + extra_shift)) & ((1 << operand->bits) - 1)); if (value == 0) - (*info->fprintf_func) (info->stream, "sp", value); + (*info->fprintf_func) (info->stream, "sp"); else (*info->fprintf_func) (info->stream, "xr%d", (int) value); } @@ -577,7 +577,7 @@ disassemble (bfd_vma memaddr, if (!match) /* xgettext:c-format */ - (*info->fprintf_func) (info->stream, _("unknown\t0x%04x"), insn); + (*info->fprintf_func) (info->stream, _("unknown\t0x%04lx"), insn); } int diff --git a/opcodes/m88k-dis.c b/opcodes/m88k-dis.c index b60462e89f..654d33a2c7 100644 --- a/opcodes/m88k-dis.c +++ b/opcodes/m88k-dis.c @@ -676,7 +676,7 @@ printop (struct disassemble_info *info, default: /* xgettext:c-format */ - (*info->fprintf_func) (info->stream, _("# "), inst); + (*info->fprintf_func) (info->stream, _("# "), inst); } } @@ -729,7 +729,7 @@ m88kdis (bfd_vma pc, ; if (entry_ptr == NULL) - (*info->fprintf_func) (info->stream, "word\t%08x", instruction); + (*info->fprintf_func) (info->stream, "word\t%08lx", instruction); else { (*info->fprintf_func) (info->stream, "%s", entry_ptr->instr->mnemonic); diff --git a/opcodes/mcore-dis.c b/opcodes/mcore-dis.c index 1d53c7dadd..24bbff4c5c 100644 --- a/opcodes/mcore-dis.c +++ b/opcodes/mcore-dis.c @@ -198,7 +198,7 @@ print_insn_mcore (memaddr, info) if (inst & 0x400) val |= 0xFFFFFC00; - fprintf (stream, "\t0x%x", memaddr + 2 + (val << 1)); + fprintf (stream, "\t0x%lx", (long)(memaddr + 2 + (val << 1))); if (strcmp (op->name, "bsr") == 0) { @@ -218,8 +218,8 @@ print_insn_mcore (memaddr, info) { long val; val = (inst & 0x000F); - fprintf (stream, "\t%s, 0x%x", - grname[(inst >> 4) & 0xF], memaddr - (val << 1)); + fprintf (stream, "\t%s, 0x%lx", + grname[(inst >> 4) & 0xF], (long)(memaddr - (val << 1))); } break; @@ -244,11 +244,11 @@ print_insn_mcore (memaddr, info) | (ibytes[2] << 8) | (ibytes[3]); /* Removed [] around literal value to match ABI syntax 12/95. */ - fprintf (stream, "\t%s, 0x%X", grname[(inst >> 8) & 0xF], val); + fprintf (stream, "\t%s, 0x%lX", grname[(inst >> 8) & 0xF], val); if (val == 0) - fprintf (stream, "\t// from address pool at 0x%x", - (memaddr + 2 + ((inst & 0xFF) << 2)) & 0xFFFFFFFC); + fprintf (stream, "\t// from address pool at 0x%lx", + (long)(memaddr + 2 + ((inst & 0xFF) << 2)) & 0xFFFFFFFC); } break; @@ -273,7 +273,7 @@ print_insn_mcore (memaddr, info) | (ibytes[2] << 8) | (ibytes[3]); /* Removed [] around literal value to match ABI syntax 12/95. */ - fprintf (stream, "\t0x%X", val); + fprintf (stream, "\t0x%lX", val); /* For jmpi/jsri, we'll try to get a symbol for the target. */ if (info->print_address_func && val != 0) { @@ -282,8 +282,8 @@ print_insn_mcore (memaddr, info) } else { - fprintf (stream, "\t// from address pool at 0x%x", - (memaddr + 2 + ((inst & 0xFF) << 2)) & 0xFFFFFFFC); + fprintf (stream, "\t// from address pool at 0x%lx", + (long)(memaddr + 2 + ((inst & 0xFF) << 2)) & 0xFFFFFFFC); } } break; diff --git a/opcodes/mips-dis.c b/opcodes/mips-dis.c index bc3a03b88b..2dcc861dd1 100644 --- a/opcodes/mips-dis.c +++ b/opcodes/mips-dis.c @@ -796,7 +796,7 @@ print_insn_args (const char *d, case 'i': case 'u': - (*info->fprintf_func) (info->stream, "0x%x", + (*info->fprintf_func) (info->stream, "0x%lx", (l >> OP_SH_IMMEDIATE) & OP_MASK_IMMEDIATE); break; @@ -870,32 +870,33 @@ print_insn_args (const char *d, break; case '<': - (*info->fprintf_func) (info->stream, "0x%x", + (*info->fprintf_func) (info->stream, "0x%lx", (l >> OP_SH_SHAMT) & OP_MASK_SHAMT); break; case 'c': - (*info->fprintf_func) (info->stream, "0x%x", + (*info->fprintf_func) (info->stream, "0x%lx", (l >> OP_SH_CODE) & OP_MASK_CODE); break; case 'q': - (*info->fprintf_func) (info->stream, "0x%x", + (*info->fprintf_func) (info->stream, "0x%lx", (l >> OP_SH_CODE2) & OP_MASK_CODE2); break; case 'C': - (*info->fprintf_func) (info->stream, "0x%x", + (*info->fprintf_func) (info->stream, "0x%lx", (l >> OP_SH_COPZ) & OP_MASK_COPZ); break; case 'B': - (*info->fprintf_func) (info->stream, "0x%x", + (*info->fprintf_func) (info->stream, "0x%lx", + (l >> OP_SH_CODE20) & OP_MASK_CODE20); break; case 'J': - (*info->fprintf_func) (info->stream, "0x%x", + (*info->fprintf_func) (info->stream, "0x%lx", (l >> OP_SH_CODE19) & OP_MASK_CODE19); break; @@ -929,7 +930,7 @@ print_insn_args (const char *d, 'T' format. Therefore, until we gain understanding of cp2 register names, we can simply print the register numbers. */ - (*info->fprintf_func) (info->stream, "$%d", + (*info->fprintf_func) (info->stream, "$%ld", (l >> OP_SH_RT) & OP_MASK_RT); break; @@ -943,7 +944,7 @@ print_insn_args (const char *d, (*info->fprintf_func) (info->stream, "%s", mips_cp0_names[(l >> OP_SH_RD) & OP_MASK_RD]); else - (*info->fprintf_func) (info->stream, "$%d", + (*info->fprintf_func) (info->stream, "$%ld", (l >> OP_SH_RD) & OP_MASK_RD); break; @@ -953,37 +954,37 @@ print_insn_args (const char *d, break; case 'N': - (*info->fprintf_func) (info->stream, "$fcc%d", + (*info->fprintf_func) (info->stream, "$fcc%ld", (l >> OP_SH_BCC) & OP_MASK_BCC); break; case 'M': - (*info->fprintf_func) (info->stream, "$fcc%d", + (*info->fprintf_func) (info->stream, "$fcc%ld", (l >> OP_SH_CCC) & OP_MASK_CCC); break; case 'P': - (*info->fprintf_func) (info->stream, "%d", + (*info->fprintf_func) (info->stream, "%ld", (l >> OP_SH_PERFREG) & OP_MASK_PERFREG); break; case 'e': - (*info->fprintf_func) (info->stream, "%d", + (*info->fprintf_func) (info->stream, "%ld", (l >> OP_SH_VECBYTE) & OP_MASK_VECBYTE); break; case '%': - (*info->fprintf_func) (info->stream, "%d", + (*info->fprintf_func) (info->stream, "%ld", (l >> OP_SH_VECALIGN) & OP_MASK_VECALIGN); break; case 'H': - (*info->fprintf_func) (info->stream, "%d", + (*info->fprintf_func) (info->stream, "%ld", (l >> OP_SH_SEL) & OP_MASK_SEL); break; case 'O': - (*info->fprintf_func) (info->stream, "%d", + (*info->fprintf_func) (info->stream, "%ld", (l >> OP_SH_ALN) & OP_MASK_ALN); break; @@ -999,35 +1000,35 @@ print_insn_args (const char *d, for (fmt = 0; fmt < 3; fmt++, vsel >>= 1) if ((vsel & 1) == 0) break; - (*info->fprintf_func) (info->stream, "$v%d[%d]", + (*info->fprintf_func) (info->stream, "$v%ld[%d]", (l >> OP_SH_FT) & OP_MASK_FT, vsel >> 1); } else if ((vsel & 0x08) == 0) { - (*info->fprintf_func) (info->stream, "$v%d", + (*info->fprintf_func) (info->stream, "$v%ld", (l >> OP_SH_FT) & OP_MASK_FT); } else { - (*info->fprintf_func) (info->stream, "0x%x", + (*info->fprintf_func) (info->stream, "0x%lx", (l >> OP_SH_FT) & OP_MASK_FT); } } break; case 'X': - (*info->fprintf_func) (info->stream, "$v%d", + (*info->fprintf_func) (info->stream, "$v%ld", (l >> OP_SH_FD) & OP_MASK_FD); break; case 'Y': - (*info->fprintf_func) (info->stream, "$v%d", + (*info->fprintf_func) (info->stream, "$v%ld", (l >> OP_SH_FS) & OP_MASK_FS); break; case 'Z': - (*info->fprintf_func) (info->stream, "$v%d", + (*info->fprintf_func) (info->stream, "$v%ld", (l >> OP_SH_FT) & OP_MASK_FT); break; @@ -1141,7 +1142,7 @@ print_insn_mips (bfd_vma memaddr, /* Handle undefined instructions. */ info->insn_type = dis_noninsn; - (*info->fprintf_func) (info->stream, "0x%x", word); + (*info->fprintf_func) (info->stream, "0x%lx", word); return INSNLEN; } diff --git a/opcodes/ms1-dis.c b/opcodes/ms1-dis.c index ba8fde2836..980e8e0963 100644 --- a/opcodes/ms1-dis.c +++ b/opcodes/ms1-dis.c @@ -71,7 +71,7 @@ print_dollarhex (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, { disassemble_info *info = (disassemble_info *) dis_info; - info->fprintf_func (info->stream, "$%x", value); + info->fprintf_func (info->stream, "$%lx", value); if (0) print_normal (cd, dis_info, value, attrs, pc, length); diff --git a/opcodes/or32-dis.c b/opcodes/or32-dis.c index 2555e872dd..d390c4b626 100644 --- a/opcodes/or32-dis.c +++ b/opcodes/or32-dis.c @@ -300,7 +300,7 @@ print_insn (bfd_vma memaddr, struct disassemble_info *info) /* This used to be %8x for binutils. */ (*info->fprintf_func) - (info->stream, ".word 0x%08x", insn); + (info->stream, ".word 0x%08lx", insn); return 4; } diff --git a/opcodes/or32-opc.c b/opcodes/or32-opc.c index ae4a03ccb0..059bf20bb5 100644 --- a/opcodes/or32-opc.c +++ b/opcodes/or32-opc.c @@ -334,7 +334,7 @@ const struct or32_opcode or32_opcodes[] = /* Define dummy, if debug is not defined. */ #if !defined HAS_DEBUG -static void +static void ATTRIBUTE_PRINTF_2 debug (int level ATTRIBUTE_UNUSED, const char *format ATTRIBUTE_UNUSED, ...) { } @@ -502,7 +502,7 @@ cover_insn (unsigned long * cur, int pass, unsigned int mask) last_match = i; } - debug (8, "%08X %08X\n", mask, cur_mask); + debug (8, "%08X %08lX\n", mask, cur_mask); if (ninstr == 0) return 0; @@ -510,8 +510,8 @@ cover_insn (unsigned long * cur, int pass, unsigned int mask) if (ninstr == 1) { /* Leaf holds instruction index. */ - debug (8, "%i>I%i %s\n", - cur - automata, last_match, or32_opcodes[last_match].name); + debug (8, "%li>I%i %s\n", + (long)(cur - automata), last_match, or32_opcodes[last_match].name); *cur = LEAF_FLAG | last_match; cur++; @@ -528,7 +528,7 @@ cover_insn (unsigned long * cur, int pass, unsigned int mask) { unsigned long m = (1UL << ((unsigned long) len)) - 1; - debug (9, " (%i(%08X & %08X>>%i = %08X, %08X)", + debug (9, " (%i(%08lX & %08lX>>%i = %08lX, %08lX)", len,m, cur_mask, i, (cur_mask >> (unsigned)i), (cur_mask >> (unsigned) i) & m); @@ -557,8 +557,8 @@ cover_insn (unsigned long * cur, int pass, unsigned int mask) exit (1); } - debug (8, "%i> #### %i << %i (%i) ####\n", - cur - automata, best_len, best_first, ninstr); + debug (8, "%li> #### %i << %i (%i) ####\n", + (long)(cur - automata), best_len, best_first, ninstr); *cur = best_first; cur++; @@ -582,17 +582,17 @@ cover_insn (unsigned long * cur, int pass, unsigned int mask) && ((ti[j].insn_mask >> best_first) & cur_mask) == cur_mask) ti[j].in_pass = curpass; - debug (9, "%08X %08X %i\n", mask, cur_mask, best_first); + debug (9, "%08X %08lX %i\n", mask, cur_mask, best_first); c = cover_insn (cur, curpass, mask & (~(cur_mask << best_first))); if (c) { - debug (8, "%i> #%X -> %u\n", next - automata, i, cur - automata); + debug (8, "%li> #%X -> %lu\n", (long)(next - automata), i, (long)(cur - automata)); *next = cur - automata; cur = c; } else { - debug (8, "%i> N/A\n", next - automata); + debug (8, "%li> N/A\n", (long)(next - automata)); *next = 0; } next++; @@ -635,7 +635,7 @@ parse_params (const struct or32_opcode * opcode, { cur->type = OPTYPE_REG | OPTYPE_OP | OPTYPE_LAST; cur->data = 0; - debug (9, "#%08X %08X\n", cur->type, cur->data); + debug (9, "#%08lX %08lX\n", cur->type, cur->data); cur++; return cur; } @@ -652,7 +652,7 @@ parse_params (const struct or32_opcode * opcode, unsigned long arg; arg = insn_extract (*args, opcode->encoding); - debug (9, "%s : %08X ------\n", opcode->name, arg); + debug (9, "%s : %08lX ------\n", opcode->name, arg); if (letter_signed (*args)) { type |= OPTYPE_SIG; @@ -678,7 +678,7 @@ parse_params (const struct or32_opcode * opcode, cur->type = type | shr; cur->data = mask; arg &= ~(((1 << mask) - 1) << shr); - debug (6, "|%08X %08X\n", cur->type, cur->data); + debug (6, "|%08lX %08lX\n", cur->type, cur->data); cur++; } args++; @@ -689,7 +689,7 @@ parse_params (const struct or32_opcode * opcode, Later we will treat them as one operand. */ cur--; cur->type = type | cur->type | OPTYPE_DIS | OPTYPE_OP; - debug (9, ">%08X %08X\n", cur->type, cur->data); + debug (9, ">%08lX %08lX\n", cur->type, cur->data); cur++; type = 0; i++; @@ -699,7 +699,7 @@ parse_params (const struct or32_opcode * opcode, { cur--; cur->type = type | cur->type | OPTYPE_OP; - debug (9, ">%08X %08X\n", cur->type, cur->data); + debug (9, ">%08lX %08lX\n", cur->type, cur->data); cur++; type = 0; i++; @@ -709,7 +709,7 @@ parse_params (const struct or32_opcode * opcode, { cur->type = type; cur->data = 0; - debug (9, ">%08X %08X\n", cur->type, cur->data); + debug (9, ">%08lX %08lX\n", cur->type, cur->data); cur++; type = 0; i++; @@ -726,7 +726,7 @@ parse_params (const struct or32_opcode * opcode, cur--; cur->type = type | cur->type | OPTYPE_OP | OPTYPE_LAST; - debug (9, "#%08X %08X\n", cur->type, cur->data); + debug (9, "#%08lX %08lX\n", cur->type, cur->data); cur++; return cur; @@ -814,7 +814,7 @@ insn_decode (unsigned int insn) { unsigned int first = *a; - debug (9, "%i ", a - automata); + debug (9, "%li ", (long)(a - automata)); a++; i = (insn >> first) & *a; @@ -822,7 +822,7 @@ insn_decode (unsigned int insn) if (!*(a + i)) { /* Invalid instruction found? */ - debug (9, "XXX\n", i); + debug (9, "XXX\n"); return -1; } a = automata + *(a + i); diff --git a/opcodes/ppc-dis.c b/opcodes/ppc-dis.c index 7876f75edc..03a008530b 100644 --- a/opcodes/ppc-dis.c +++ b/opcodes/ppc-dis.c @@ -249,7 +249,7 @@ print_insn_powerpc (bfd_vma memaddr, else { if (operand->bits == 3) - (*info->fprintf_func) (info->stream, "cr%d", value); + (*info->fprintf_func) (info->stream, "cr%ld", value); else { static const char *cbnames[4] = { "lt", "gt", "eq", "so" }; diff --git a/opcodes/sh64-dis.c b/opcodes/sh64-dis.c index 0227ab6e17..9bd21afa33 100644 --- a/opcodes/sh64-dis.c +++ b/opcodes/sh64-dis.c @@ -224,7 +224,7 @@ print_insn_shmedia (bfd_vma memaddr, struct disassemble_info *info) /* FIXME: We should also check register number constraints. */ if (op->name == NULL) { - fprintf_fn (stream, ".long 0x%08x", instruction); + fprintf_fn (stream, ".long 0x%08lx", instruction); return 4; } @@ -312,7 +312,7 @@ print_insn_shmedia (bfd_vma memaddr, struct disassemble_info *info) imm = temp & 0x3f; if (imm & (unsigned long) 0x20) imm |= ~(unsigned long) 0x3f; - fprintf_fn (stream, "%d", imm); + fprintf_fn (stream, "%ld", imm); break; /* A signed 6-bit number, multiplied by 32 when used. */ @@ -320,7 +320,7 @@ print_insn_shmedia (bfd_vma memaddr, struct disassemble_info *info) imm = temp & 0x3f; if (imm & (unsigned long) 0x20) imm |= ~(unsigned long) 0x3f; - fprintf_fn (stream, "%d", imm * 32); + fprintf_fn (stream, "%ld", imm * 32); break; /* A signed 10-bit number, multiplied by 8 when used. */ @@ -345,7 +345,7 @@ print_insn_shmedia (bfd_vma memaddr, struct disassemble_info *info) if (imm & (unsigned long) 0x200) imm |= ~(unsigned long) 0x3ff; imm <<= by_number; - fprintf_fn (stream, "%d", imm); + fprintf_fn (stream, "%ld", imm); break; /* A signed 16-bit number. */ @@ -353,7 +353,7 @@ print_insn_shmedia (bfd_vma memaddr, struct disassemble_info *info) imm = temp & 0xffff; if (imm & (unsigned long) 0x8000) imm |= ~((unsigned long) 0xffff); - fprintf_fn (stream, "%d", imm); + fprintf_fn (stream, "%ld", imm); break; /* A PC-relative signed 16-bit number, multiplied by 4 when @@ -370,19 +370,19 @@ print_insn_shmedia (bfd_vma memaddr, struct disassemble_info *info) /* An unsigned 5-bit number. */ case A_IMMU5: imm = temp & 0x1f; - fprintf_fn (stream, "%d", imm); + fprintf_fn (stream, "%ld", imm); break; /* An unsigned 6-bit number. */ case A_IMMU6: imm = temp & 0x3f; - fprintf_fn (stream, "%d", imm); + fprintf_fn (stream, "%ld", imm); break; /* An unsigned 16-bit number. */ case A_IMMU16: imm = temp & 0xffff; - fprintf_fn (stream, "%d", imm); + fprintf_fn (stream, "%ld", imm); break; default: diff --git a/opcodes/sparc-dis.c b/opcodes/sparc-dis.c index 1b1748ce0f..cbc6d60587 100644 --- a/opcodes/sparc-dis.c +++ b/opcodes/sparc-dis.c @@ -693,7 +693,7 @@ print_insn_sparc (bfd_vma memaddr, disassemble_info *info) break; case '3': - (info->fprintf_func) (stream, "%d", X_IMM (insn, 3)); + (info->fprintf_func) (stream, "%ld", X_IMM (insn, 3)); break; case 'K': @@ -806,16 +806,16 @@ print_insn_sparc (bfd_vma memaddr, disassemble_info *info) if (name) (*info->fprintf_func) (stream, "%s", name); else - (*info->fprintf_func) (stream, "%d", X_RD (insn)); + (*info->fprintf_func) (stream, "%ld", X_RD (insn)); break; } case 'M': - (*info->fprintf_func) (stream, "%%asr%d", X_RS1 (insn)); + (*info->fprintf_func) (stream, "%%asr%ld", X_RS1 (insn)); break; case 'm': - (*info->fprintf_func) (stream, "%%asr%d", X_RD (insn)); + (*info->fprintf_func) (stream, "%%asr%ld", X_RD (insn)); break; case 'L': @@ -840,7 +840,7 @@ print_insn_sparc (bfd_vma memaddr, disassemble_info *info) if (name) (*info->fprintf_func) (stream, "%s", name); else - (*info->fprintf_func) (stream, "(%d)", X_ASI (insn)); + (*info->fprintf_func) (stream, "(%ld)", X_ASI (insn)); break; } @@ -873,7 +873,7 @@ print_insn_sparc (bfd_vma memaddr, disassemble_info *info) break; case 'x': - (*info->fprintf_func) (stream, "%d", + (*info->fprintf_func) (stream, "%ld", ((X_LDST_I (insn) << 8) + X_ASI (insn))); break; diff --git a/opcodes/tic4x-dis.c b/opcodes/tic4x-dis.c index c0f6152bef..ec56cb3c5b 100644 --- a/opcodes/tic4x-dis.c +++ b/opcodes/tic4x-dis.c @@ -222,12 +222,12 @@ tic4x_print_immed (struct disassemble_info *info, { case IMMED_SINT: case IMMED_INT: - (*info->fprintf_func) (info->stream, "%d", (long) arg); + (*info->fprintf_func) (info->stream, "%ld", (long) arg); break; case IMMED_SUINT: case IMMED_UINT: - (*info->fprintf_func) (info->stream, "%u", arg); + (*info->fprintf_func) (info->stream, "%lu", arg); break; case IMMED_SFLOAT: @@ -724,7 +724,7 @@ tic4x_disassemble (unsigned long pc, && tic4x_print_op (NULL, instruction, p, pc)) tic4x_print_op (info, instruction, p, pc); else - (*info->fprintf_func) (info->stream, "%08x", instruction); + (*info->fprintf_func) (info->stream, "%08lx", instruction); } else { @@ -736,7 +736,7 @@ tic4x_disassemble (unsigned long pc, break; } if (i == TIC4X_SPESOP_SIZE) - (*info->fprintf_func) (info->stream, "%08x", instruction); + (*info->fprintf_func) (info->stream, "%08lx", instruction); } /* Return size of insn in words. */ diff --git a/opcodes/tic80-dis.c b/opcodes/tic80-dis.c index 09df146031..ab3a086c0c 100644 --- a/opcodes/tic80-dis.c +++ b/opcodes/tic80-dis.c @@ -87,7 +87,7 @@ print_operand_bitnum (struct disassemble_info *info, long value) if (tmp != NULL) (*info->fprintf_func) (info->stream, "%s", tmp); else - (*info->fprintf_func) (info->stream, "%ld", bitnum); + (*info->fprintf_func) (info->stream, "%d", bitnum); } /* Print the operand as directed by the flags. */ diff --git a/opcodes/v850-dis.c b/opcodes/v850-dis.c index 1bfc7b4c97..6c2f995ba4 100644 --- a/opcodes/v850-dis.c +++ b/opcodes/v850-dis.c @@ -187,7 +187,7 @@ disassemble (bfd_vma memaddr, info->fprintf_func (info->stream, "ep"); break; default: - info->fprintf_func (info->stream, "%d", value); + info->fprintf_func (info->stream, "%ld", value); break; case V850_OPERAND_DISP: { @@ -314,7 +314,7 @@ disassemble (bfd_vma memaddr, if ((insn & 0x001fffc0) == 0x00130780) value <<= 16; - info->fprintf_func (info->stream, "0x%x", value); + info->fprintf_func (info->stream, "0x%lx", value); } else info->memory_error_func (status, memaddr + bytes_read, @@ -355,9 +355,9 @@ disassemble (bfd_vma memaddr, if (!match) { if (short_op) - info->fprintf_func (info->stream, ".short\t0x%04x", insn); + info->fprintf_func (info->stream, ".short\t0x%04lx", insn); else - info->fprintf_func (info->stream, ".long\t0x%08x", insn); + info->fprintf_func (info->stream, ".long\t0x%08lx", insn); } return bytes_read; -- 2.11.0