From 2c8b0c5a99054ba909036d7f9c7bb7391b48b6f5 Mon Sep 17 00:00:00 2001 From: Christian Gmeiner Date: Sun, 24 Sep 2017 15:15:39 +0200 Subject: [PATCH] drm/etnaviv: need to disable clock gating when doing profiling As done by Vivante kernel driver. Signed-off-by: Christian Gmeiner Reviewed-by: Lucas Stach Signed-off-by: Lucas Stach --- drivers/gpu/drm/etnaviv/etnaviv_gpu.c | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/drivers/gpu/drm/etnaviv/etnaviv_gpu.c b/drivers/gpu/drm/etnaviv/etnaviv_gpu.c index 56764b4b94aa..c00086d75580 100644 --- a/drivers/gpu/drm/etnaviv/etnaviv_gpu.c +++ b/drivers/gpu/drm/etnaviv/etnaviv_gpu.c @@ -1346,6 +1346,13 @@ static void sync_point_perfmon_sample(struct etnaviv_gpu *gpu, static void sync_point_perfmon_sample_pre(struct etnaviv_gpu *gpu, struct etnaviv_event *event) { + u32 val; + + /* disable clock gating */ + val = gpu_read(gpu, VIVS_PM_POWER_CONTROLS); + val &= ~VIVS_PM_POWER_CONTROLS_ENABLE_MODULE_CLOCK_GATING; + gpu_write(gpu, VIVS_PM_POWER_CONTROLS, val); + sync_point_perfmon_sample(gpu, event, ETNA_PM_PROCESS_PRE); } @@ -1354,6 +1361,7 @@ static void sync_point_perfmon_sample_post(struct etnaviv_gpu *gpu, { const struct etnaviv_cmdbuf *cmdbuf = event->cmdbuf; unsigned int i; + u32 val; sync_point_perfmon_sample(gpu, event, ETNA_PM_PROCESS_POST); @@ -1362,6 +1370,11 @@ static void sync_point_perfmon_sample_post(struct etnaviv_gpu *gpu, *pmr->bo_vma = pmr->sequence; } + + /* enable clock gating */ + val = gpu_read(gpu, VIVS_PM_POWER_CONTROLS); + val |= VIVS_PM_POWER_CONTROLS_ENABLE_MODULE_CLOCK_GATING; + gpu_write(gpu, VIVS_PM_POWER_CONTROLS, val); } -- 2.11.0