From 2f87c60799042f6c9936040cedf6ea8dc690ca22 Mon Sep 17 00:00:00 2001 From: bellard Date: Mon, 2 Jun 2003 20:38:09 +0000 Subject: [PATCH] Alpha update (Falk Hueffner) git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@203 c046a42c-6fe2-441c-8c8c-71466251a162 --- dyngen.c | 2 +- exec-i386.c | 28 ++++++++++++++++++++++++++++ exec-i386.h | 2 ++ exec.h | 2 +- op-i386.c | 10 +++++----- 5 files changed, 37 insertions(+), 7 deletions(-) diff --git a/dyngen.c b/dyngen.c index bfc1540c3a..225d2bab86 100644 --- a/dyngen.c +++ b/dyngen.c @@ -691,7 +691,7 @@ void gen_code(const char *name, host_ulong offset, host_ulong size, case R_ALPHA_BRSGP: /* PC-relative jump. Tweak offset to skip the two instructions that try to set up the gp from the pv. */ - fprintf(outfile, " fix_bsr(gen_code_ptr + %ld, (uint8_t *) &%s - (gen_code_ptr + %ld) + 4);\n", + fprintf(outfile, " fix_bsr(gen_code_ptr + %ld, (uint8_t *) &%s - (gen_code_ptr + %ld + 4) + 8);\n", rel->r_offset - start_offset, sym_name, rel->r_offset - start_offset); break; default: diff --git a/exec-i386.c b/exec-i386.c index 2114d656d2..5bd69d4a52 100644 --- a/exec-i386.c +++ b/exec-i386.c @@ -447,6 +447,34 @@ int cpu_x86_signal_handler(int host_signum, struct siginfo *info, is_write, &uc->uc_sigmask); } +#elif defined(__alpha__) + +int cpu_x86_signal_handler(int host_signum, struct siginfo *info, + void *puc) +{ + struct ucontext *uc = puc; + uint32_t *pc = uc->uc_mcontext.sc_pc; + uint32_t insn = *pc; + int is_write = 0; + + switch (insn >> 26) { + case 0x0d: // stw + case 0x0e: // stb + case 0x0f: // stq_u + case 0x24: // stf + case 0x25: // stg + case 0x26: // sts + case 0x27: // stt + case 0x2c: // stl + case 0x2d: // stq + case 0x2e: // stl_c + case 0x2f: // stq_c + is_write = 1; + } + + return handle_cpu_signal(pc, (unsigned long)info->si_addr, + is_write, &uc->uc_sigmask); +} #else #error CPU specific signal handler needed diff --git a/exec-i386.h b/exec-i386.h index 00da9b8a3d..af82370032 100644 --- a/exec-i386.h +++ b/exec-i386.h @@ -124,6 +124,8 @@ register unsigned int A0 asm("$11"); register unsigned int EAX asm("$12"); register unsigned int ESP asm("$13"); register unsigned int EBP asm("$14"); +/* Note $15 is the frame pointer, so anything in op-i386.c that would + require a frame pointer, like alloca, would probably loose. */ register struct CPUX86State *env asm("$15"); #define reg_EAX #define reg_ESP diff --git a/exec.h b/exec.h index 18e75e67b0..0098ad83ac 100644 --- a/exec.h +++ b/exec.h @@ -214,7 +214,7 @@ static inline int testandset (int *p) #endif #ifdef __alpha__ -int testandset (int *p) +static inline int testandset (int *p) { int ret; unsigned long one; diff --git a/op-i386.c b/op-i386.c index befa39f4df..df841cec67 100644 --- a/op-i386.c +++ b/op-i386.c @@ -1762,16 +1762,16 @@ typedef union { double d; #ifndef WORDS_BIGENDIAN struct { - unsigned long lower; - long upper; + uint32_t lower; + int32_t upper; } l; #else struct { - long upper; - unsigned long lower; + int32_t upper; + uint32_t lower; } l; #endif - long long ll; + int64_t ll; } CPU86_LDoubleU; /* the following deal with IEEE double-precision numbers */ -- 2.11.0