From 30aeee6728abf29b29d625061782519a15be88db Mon Sep 17 00:00:00 2001 From: Deepak Rawat Date: Wed, 20 Jun 2018 13:52:32 -0700 Subject: [PATCH] drm/vmwgfx: Add SM4_1 flag A boolean flag in device private structure to specify if the device support SM4_1. Signed-off-by: Deepak Rawat Reviewed-by: Sinclair Yeh Reviewed-by: Brian Paul Reviewed-by: Thomas Hellstrom Signed-off-by: Thomas Hellstrom --- drivers/gpu/drm/vmwgfx/vmwgfx_drv.c | 18 ++++++++++++++++-- drivers/gpu/drm/vmwgfx/vmwgfx_drv.h | 1 + 2 files changed, 17 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c b/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c index f2fad88e4c54..6cf81e19182f 100644 --- a/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c +++ b/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c @@ -916,9 +916,23 @@ static int vmw_driver_load(struct drm_device *dev, unsigned long chipset) if (ret) goto out_no_fifo; + if (dev_priv->has_dx) { + /* + * SVGA_CAP2_DX2 (DefineGBSurface_v3) is needed for SM4_1 + * support + */ + if ((dev_priv->capabilities2 & SVGA_CAP2_DX2) != 0) { + vmw_write(dev_priv, SVGA_REG_DEV_CAP, + SVGA3D_DEVCAP_SM41); + dev_priv->has_sm4_1 = vmw_read(dev_priv, + SVGA_REG_DEV_CAP); + } + } + DRM_INFO("DX: %s\n", dev_priv->has_dx ? "yes." : "no."); - DRM_INFO("Atomic: %s\n", - (dev->driver->driver_features & DRIVER_ATOMIC) ? "yes" : "no"); + DRM_INFO("Atomic: %s\n", (dev->driver->driver_features & DRIVER_ATOMIC) + ? "yes." : "no."); + DRM_INFO("SM4_1: %s\n", dev_priv->has_sm4_1 ? "yes." : "no."); snprintf(host_log, sizeof(host_log), "vmwgfx: %s-%s", VMWGFX_REPO, VMWGFX_GIT_VERSION); diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_drv.h b/drivers/gpu/drm/vmwgfx/vmwgfx_drv.h index 920365c0e9ab..7bb08bac728e 100644 --- a/drivers/gpu/drm/vmwgfx/vmwgfx_drv.h +++ b/drivers/gpu/drm/vmwgfx/vmwgfx_drv.h @@ -398,6 +398,7 @@ struct vmw_private { spinlock_t cap_lock; bool has_dx; bool assume_16bpp; + bool has_sm4_1; /* * VGA registers. -- 2.11.0