From 35c7f5254b608c0694b11fc9f0d2c1a4ffb216b4 Mon Sep 17 00:00:00 2001 From: Thomas Huth Date: Mon, 3 Aug 2020 19:54:36 +0200 Subject: [PATCH] target/riscv/vector_helper: Fix build on 32-bit big endian hosts MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit The code currently fails to compile on 32-bit big endian hosts: target/riscv/vector_helper.c: In function 'vext_clear': target/riscv/vector_helper.c:154:16: error: cast to pointer from integer of different size [-Werror=int-to-pointer-cast] memset((void *)((uintptr_t)tail & ~(7ULL)), 0, part1); ^ target/riscv/vector_helper.c:155:16: error: cast to pointer from integer of different size [-Werror=int-to-pointer-cast] memset((void *)(((uintptr_t)tail + 8) & ~(7ULL)), 0, part2); ^ cc1: all warnings being treated as errors We should not use "long long" (i.e. 64-bit) values here to avoid the problem. Switch to our QEMU_ALIGN_PTR_DOWN/UP macros instead. Fixes: 751538d5da ("add vector stride load and store instructions") Suggested-by: Philippe Mathieu-Daudé Message-Id: <20200804170055.2851-3-thuth@redhat.com> Reviewed-by: Richard Henderson Signed-off-by: Thomas Huth --- target/riscv/vector_helper.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/target/riscv/vector_helper.c b/target/riscv/vector_helper.c index 39f44d1029..793af99067 100644 --- a/target/riscv/vector_helper.c +++ b/target/riscv/vector_helper.c @@ -151,8 +151,8 @@ static void vext_clear(void *tail, uint32_t cnt, uint32_t tot) if (cnt % 8) { part1 = 8 - (cnt % 8); part2 = tot - cnt - part1; - memset((void *)((uintptr_t)tail & ~(7ULL)), 0, part1); - memset((void *)(((uintptr_t)tail + 8) & ~(7ULL)), 0, part2); + memset(QEMU_ALIGN_PTR_DOWN(tail, 8), 0, part1); + memset(QEMU_ALIGN_PTR_UP(tail, 8), 0, part2); } else { memset(tail, 0, part2); } -- 2.11.0