From 38fbc32e83d6c09fe2f89cd1007f1a710393a7be Mon Sep 17 00:00:00 2001 From: Martin Kaiser Date: Mon, 4 Jul 2022 16:52:19 +0200 Subject: [PATCH] staging: r8188eu: read pwr seq length, remove PWR_CMD_END The definitions of the power sequences are in the same file as the function which processes them. We can simply read the number of entries in a power sequence. There's no need for a PWR_CMD_END command to indicate the end of a sequence. Tested-by: Philipp Hortmann # Edimax N150 Signed-off-by: Martin Kaiser Link: https://lore.kernel.org/r/20220704145221.159949-4-martin@kaiser.cx Signed-off-by: Greg Kroah-Hartman --- drivers/staging/r8188eu/hal/HalPwrSeqCmd.c | 25 +++++++------------------ 1 file changed, 7 insertions(+), 18 deletions(-) diff --git a/drivers/staging/r8188eu/hal/HalPwrSeqCmd.c b/drivers/staging/r8188eu/hal/HalPwrSeqCmd.c index 273f134d0a40..6c0b1368383d 100644 --- a/drivers/staging/r8188eu/hal/HalPwrSeqCmd.c +++ b/drivers/staging/r8188eu/hal/HalPwrSeqCmd.c @@ -24,11 +24,6 @@ /* msk: N/A */ /* value: N/A */ -#define PWR_CMD_END 0x04 - /* offset: N/A */ - /* msk: N/A */ - /* value: N/A */ - struct wl_pwr_cfg { u16 offset; u8 cmd:4; @@ -50,7 +45,6 @@ static struct wl_pwr_cfg rtl8188E_power_on_flow[] = { { 0x0005, PWR_CMD_WRITE, BIT(0), BIT(0) }, { 0x0005, PWR_CMD_POLLING, BIT(0), 0 }, { 0x0023, PWR_CMD_WRITE, BIT(4), 0 }, - { 0xFFFF, PWR_CMD_END, 0, 0 }, }; static struct wl_pwr_cfg rtl8188E_card_disable_flow[] = { @@ -63,7 +57,6 @@ static struct wl_pwr_cfg rtl8188E_card_disable_flow[] = { { 0x0007, PWR_CMD_WRITE, 0xFF, 0 }, /* enable bandgap mbias in suspend */ { 0x0041, PWR_CMD_WRITE, BIT(4), 0 }, /* Clear SIC_EN register */ { 0xfe10, PWR_CMD_WRITE, BIT(4), BIT(4) }, /* Set USB suspend enable local register */ - { 0xFFFF, PWR_CMD_END, 0, 0 }, }; /* This is used by driver for LPSRadioOff Procedure, not for FW LPS Step */ @@ -78,7 +71,6 @@ static struct wl_pwr_cfg rtl8188E_enter_lps_flow[] = { { 0x0100, PWR_CMD_WRITE, 0xFF, 0x3F }, /* Reset MAC TRX */ { 0x0101, PWR_CMD_WRITE, BIT(1), 0 }, /* check if removed later */ { 0x0553, PWR_CMD_WRITE, BIT(5), BIT(5) }, /* Respond TxOK to scheduler */ - { 0xFFFF, PWR_CMD_END, 0, 0 }, }; u8 HalPwrSeqCmdParsing(struct adapter *padapter, enum r8188eu_pwr_seq seq) @@ -86,7 +78,7 @@ u8 HalPwrSeqCmdParsing(struct adapter *padapter, enum r8188eu_pwr_seq seq) struct wl_pwr_cfg pwrcfgcmd = {0}; struct wl_pwr_cfg *pwrseqcmd; u8 poll_bit = false; - u32 aryidx = 0; + u8 idx, num_steps; u8 value = 0; u32 offset = 0; u32 poll_count = 0; /* polling autoload done. */ @@ -96,19 +88,22 @@ u8 HalPwrSeqCmdParsing(struct adapter *padapter, enum r8188eu_pwr_seq seq) switch (seq) { case PWR_ON_FLOW: pwrseqcmd = rtl8188E_power_on_flow; + num_steps = ARRAY_SIZE(rtl8188E_power_on_flow); break; case DISABLE_FLOW: pwrseqcmd = rtl8188E_card_disable_flow; + num_steps = ARRAY_SIZE(rtl8188E_card_disable_flow); break; case LPS_ENTER_FLOW: pwrseqcmd = rtl8188E_enter_lps_flow; + num_steps = ARRAY_SIZE(rtl8188E_enter_lps_flow); break; default: return false; } - do { - pwrcfgcmd = pwrseqcmd[aryidx]; + for (idx = 0; idx < num_steps; idx++) { + pwrcfgcmd = pwrseqcmd[idx]; switch (GET_PWR_CFG_CMD(pwrcfgcmd)) { case PWR_CMD_WRITE: @@ -146,15 +141,9 @@ u8 HalPwrSeqCmdParsing(struct adapter *padapter, enum r8188eu_pwr_seq seq) case PWR_CMD_DELAY: udelay(GET_PWR_CFG_OFFSET(pwrcfgcmd)); break; - case PWR_CMD_END: - /* When this command is parsed, end the process */ - return true; - break; default: break; } - - aryidx++;/* Add Array Index */ - } while (1); + } return true; } -- 2.11.0