From 39bd6920174f249545bdae2b66b8d8198ffa893a Mon Sep 17 00:00:00 2001 From: Mitchel Humpherys Date: Mon, 17 Aug 2015 14:26:26 -0700 Subject: [PATCH] iommu/io-pgtable-arm: Generate a fault on TTBR1 usage TTBR1 shouldn't currently be used at all. Any such usage is the result of a bug. Configure TCR such that any usage of TTBR1 will generate a fault, which will help catch such bugs earlier. Change-Id: I74f2dc9580e5aed5d391debe23c7f5cc9fc1f672 Signed-off-by: Mitchel Humpherys --- drivers/iommu/io-pgtable-arm.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/iommu/io-pgtable-arm.c b/drivers/iommu/io-pgtable-arm.c index b78d8caad492..d522aee546bd 100644 --- a/drivers/iommu/io-pgtable-arm.c +++ b/drivers/iommu/io-pgtable-arm.c @@ -153,6 +153,9 @@ #define ARM_LPAE_TCR_PS_44_BIT 0x4ULL #define ARM_LPAE_TCR_PS_48_BIT 0x5ULL +#define ARM_LPAE_TCR_EPD1_SHIFT 23 +#define ARM_LPAE_TCR_EPD1_FAULT 1 + #define ARM_LPAE_MAIR_ATTR_SHIFT(n) ((n) << 3) #define ARM_LPAE_MAIR_ATTR_MASK 0xff #define ARM_LPAE_MAIR_ATTR_DEVICE 0x04 @@ -812,6 +815,7 @@ arm_64_lpae_alloc_pgtable_s1(struct io_pgtable_cfg *cfg, void *cookie) } reg |= (64ULL - cfg->ias) << ARM_LPAE_TCR_T0SZ_SHIFT; + reg |= ARM_LPAE_TCR_EPD1_FAULT << ARM_LPAE_TCR_EPD1_SHIFT; cfg->arm_lpae_s1_cfg.tcr = reg; /* MAIRs */ -- 2.11.0