From 39d0be5ea2f6083f18874868f8f1de911dc066bd Mon Sep 17 00:00:00 2001 From: Dmitri Gribenko Date: Sat, 29 Mar 2014 19:40:32 +0000 Subject: [PATCH] Fix a few -Wdocumentation warnings git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205116 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/ARM64/ARM64CollectLOH.cpp | 6 +++--- lib/Target/ARM64/ARM64ISelLowering.cpp | 6 +++--- lib/Target/ARM64/ARM64PromoteConstant.cpp | 12 ++++++------ lib/Target/ARM64/AsmParser/ARM64AsmParser.cpp | 2 +- 4 files changed, 13 insertions(+), 13 deletions(-) diff --git a/lib/Target/ARM64/ARM64CollectLOH.cpp b/lib/Target/ARM64/ARM64CollectLOH.cpp index a8311051311..010171ce78a 100644 --- a/lib/Target/ARM64/ARM64CollectLOH.cpp +++ b/lib/Target/ARM64/ARM64CollectLOH.cpp @@ -222,7 +222,7 @@ static const SetOfMachineInstr *getUses(const InstrToInstrs *sets, unsigned reg, /// - its kill set. /// - its reachable uses (uses that are exposed to BB's predecessors). /// - its the generated definitions. -/// \param DummyOp, if not NULL, specifies a Dummy Operation to be added to +/// \param DummyOp if not NULL, specifies a Dummy Operation to be added to /// the list of uses of exposed defintions. /// \param ADRPMode specifies to only consider ADRP instructions for generated /// definition. It also consider definitions of ADRP instructions as uses and @@ -417,11 +417,11 @@ static void finitReachingDef(BlockToSetOfInstrsPerColor &In, /// Reaching definiton algorithm. /// \param MF function on which the algorithm will operate. -/// \param ColorOpToReachedUses[out] will contain the result of the reaching +/// \param[out] ColorOpToReachedUses will contain the result of the reaching /// def algorithm. /// \param ADRPMode specify whether the reaching def algorithm should be tuned /// for ADRP optimization. \see initReachingDef for more details. -/// \param DummyOp, if not NULL, the algorithm will work at +/// \param DummyOp if not NULL, the algorithm will work at /// basic block scope and will set for every exposed defintion a use to /// @p DummyOp. /// \pre ColorOpToReachedUses is an array of at least number of registers of diff --git a/lib/Target/ARM64/ARM64ISelLowering.cpp b/lib/Target/ARM64/ARM64ISelLowering.cpp index d8c51691d08..ee48c5902d7 100644 --- a/lib/Target/ARM64/ARM64ISelLowering.cpp +++ b/lib/Target/ARM64/ARM64ISelLowering.cpp @@ -1740,9 +1740,9 @@ static SDValue LowerPREFETCH(SDValue Op, SelectionDAG &DAG) { } // built the mask value encoding the expected behavior. - unsigned PrfOp = (IsWrite << 4) | //< Load/Store bit - (Locality << 1) | //< Cache level bits - IsStream; //< Stream bit + unsigned PrfOp = (IsWrite << 4) | // Load/Store bit + (Locality << 1) | // Cache level bits + IsStream; // Stream bit return DAG.getNode(ARM64ISD::PREFETCH, DL, MVT::Other, Op.getOperand(0), DAG.getConstant(PrfOp, MVT::i32), Op.getOperand(1)); } diff --git a/lib/Target/ARM64/ARM64PromoteConstant.cpp b/lib/Target/ARM64/ARM64PromoteConstant.cpp index 73ba8386f44..bbc893fdab7 100644 --- a/lib/Target/ARM64/ARM64PromoteConstant.cpp +++ b/lib/Target/ARM64/ARM64PromoteConstant.cpp @@ -132,8 +132,8 @@ private: /// \param UseIt the use to be added into the list of dominated uses /// \param InsertPts existing insertion points /// \pre NewPt and all instruction in InsertPts belong to the same function - /// \retun true if one of the insertion point in InsertPts dominates NewPt, - /// false otherwise + /// \return true if one of the insertion point in InsertPts dominates NewPt, + /// false otherwise bool isDominated(Instruction *NewPt, Value::user_iterator &UseIt, InsertionPoints &InsertPts); @@ -146,9 +146,9 @@ private: /// \param InsertPts existing insertion points /// \pre NewPt and all instruction in InsertPts belong to the same function /// \pre isDominated returns false for the exact same parameters. - /// \retun true if it exists an insertion point in InsertPts that could - /// have been merged with NewPt in a common dominator, - /// false otherwise + /// \return true if it exists an insertion point in InsertPts that could + /// have been merged with NewPt in a common dominator, + /// false otherwise bool tryAndMerge(Instruction *NewPt, Value::user_iterator &UseIt, InsertionPoints &InsertPts); @@ -157,7 +157,7 @@ private: /// Insertion points are group per function and each insertion point /// contains a list of all the uses it dominates within the related function /// \param Val constant to be examined - /// \param InsPtsPerFunc[out] output storage of the analysis + /// \param[out] InsPtsPerFunc output storage of the analysis void computeInsertionPoints(Constant *Val, InsertionPointsPerFunc &InsPtsPerFunc); diff --git a/lib/Target/ARM64/AsmParser/ARM64AsmParser.cpp b/lib/Target/ARM64/AsmParser/ARM64AsmParser.cpp index d2d6f20d22e..e72189e766a 100644 --- a/lib/Target/ARM64/AsmParser/ARM64AsmParser.cpp +++ b/lib/Target/ARM64/AsmParser/ARM64AsmParser.cpp @@ -42,7 +42,7 @@ public: typedef SmallVectorImpl OperandVector; private: - StringRef Mnemonic; //< Instruction mnemonic. + StringRef Mnemonic; ///< Instruction mnemonic. MCSubtargetInfo &STI; MCAsmParser &Parser; -- 2.11.0