From 39e3cf3d167b7b607e7490409984809a36649f38 Mon Sep 17 00:00:00 2001
From: Simon Pilgrim <llvm-dev@redking.me.uk>
Date: Fri, 12 Oct 2018 10:20:16 +0000
Subject: [PATCH] [X86] Ignore float/double non-temporal loads (PR39256)

Scalar non-temporal loads were asserting instead of just being ignored.

Reduced from https://bugs.chromium.org/p/oss-fuzz/issues/detail?id=10895

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@344331 91177308-0d34-0410-b5e6-96231b3b80d8
---
 lib/Target/X86/X86ISelDAGToDAG.cpp    |  3 +++
 test/CodeGen/X86/nontemporal-loads.ll | 32 ++++++++++++++++++++++++++++++++
 2 files changed, 35 insertions(+)

diff --git a/lib/Target/X86/X86ISelDAGToDAG.cpp b/lib/Target/X86/X86ISelDAGToDAG.cpp
index f8ec4a2bcfc..ede1c0bd7df 100644
--- a/lib/Target/X86/X86ISelDAGToDAG.cpp
+++ b/lib/Target/X86/X86ISelDAGToDAG.cpp
@@ -441,6 +441,9 @@ namespace {
 
       switch (StoreSize) {
       default: llvm_unreachable("Unsupported store size");
+      case 4:
+      case 8:
+        return false;
       case 16:
         return Subtarget->hasSSE41();
       case 32:
diff --git a/test/CodeGen/X86/nontemporal-loads.ll b/test/CodeGen/X86/nontemporal-loads.ll
index 37ff7115ac9..56428979568 100644
--- a/test/CodeGen/X86/nontemporal-loads.ll
+++ b/test/CodeGen/X86/nontemporal-loads.ll
@@ -1911,4 +1911,36 @@ define <16 x i32> @test_masked_v16i32(i8 * %addr, <16 x i32> %old, <16 x i32> %m
   ret <16 x i32>%res
 }
 
+; Reduced from https://bugs.chromium.org/p/oss-fuzz/issues/detail?id=10895
+define i32 @PR39256(float* %ptr) {
+; SSE-LABEL: PR39256:
+; SSE:       # %bb.0: # %entry
+; SSE-NEXT:    movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
+; SSE-NEXT:    ucomiss {{.*}}(%rip), %xmm0
+; SSE-NEXT:    setb (%rax)
+; SSE-NEXT:    movl $-2147483648, %eax # imm = 0x80000000
+; SSE-NEXT:    retq
+;
+; AVX-LABEL: PR39256:
+; AVX:       # %bb.0: # %entry
+; AVX-NEXT:    vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero
+; AVX-NEXT:    vucomiss {{.*}}(%rip), %xmm0
+; AVX-NEXT:    setb (%rax)
+; AVX-NEXT:    movl $-2147483648, %eax # imm = 0x80000000
+; AVX-NEXT:    retq
+;
+; AVX512-LABEL: PR39256:
+; AVX512:       # %bb.0: # %entry
+; AVX512-NEXT:    vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero
+; AVX512-NEXT:    vucomiss {{.*}}(%rip), %xmm0
+; AVX512-NEXT:    setb (%rax)
+; AVX512-NEXT:    movl $-2147483648, %eax # imm = 0x80000000
+; AVX512-NEXT:    retq
+entry:
+  %l = load float, float* %ptr, !nontemporal !1
+  %C = fcmp ult float %l, 0x36A0000000000000
+  store i1 %C, i1* undef
+  ret i32 -2147483648
+}
+
 !1 = !{i32 1}
-- 
2.11.0