From 3e15f623bbdf09c88763dfc3bb47fc5d7d13a62c Mon Sep 17 00:00:00 2001 From: Richard Zhu Date: Thu, 2 Dec 2021 16:02:33 +0800 Subject: [PATCH] dt-bindings: imx6q-pcie: Add PHY phandles and name properties i.MX8MM PCIe has the PHY. Add a PHY phandle and name properties in the binding document. Link: https://lore.kernel.org/r/1638432158-4119-4-git-send-email-hongxing.zhu@nxp.com Tested-by: Marcel Ziswiler Tested-by: Tim Harvey Signed-off-by: Richard Zhu Signed-off-by: Lorenzo Pieralisi Reviewed-by: Tim Harvey Reviewed-by: Rob Herring --- Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml index acea1cd444fd..643a6333b07b 100644 --- a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml +++ b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml @@ -127,6 +127,12 @@ properties: enum: [1, 2, 3, 4] default: 1 + phys: + maxItems: 1 + + phy-names: + const: pcie-phy + reset-gpio: description: Should specify the GPIO for controlling the PCI bus device reset signal. It's not polarity aware and defaults to active-low reset -- 2.11.0