From 3ee15e807407defcd774586549a00674d58be970 Mon Sep 17 00:00:00 2001 From: Bernhard Beschow Date: Sat, 22 Oct 2022 17:04:29 +0200 Subject: [PATCH] hw/isa/piix3: Add size constraints to rcr_ops MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit According to the PIIX3 datasheet, the reset control register is one byte in size. Moreover, PIIX4 has it, so add it to PIIX3 as well. Signed-off-by: Bernhard Beschow Reviewed-by: Philippe Mathieu-Daudé Message-Id: <20221022150508.26830-5-shentey@gmail.com> Signed-off-by: Philippe Mathieu-Daudé --- hw/isa/piix3.c | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/hw/isa/piix3.c b/hw/isa/piix3.c index 04895ce2e5..72dbf688d9 100644 --- a/hw/isa/piix3.c +++ b/hw/isa/piix3.c @@ -290,7 +290,11 @@ static uint64_t rcr_read(void *opaque, hwaddr addr, unsigned len) static const MemoryRegionOps rcr_ops = { .read = rcr_read, .write = rcr_write, - .endianness = DEVICE_LITTLE_ENDIAN + .endianness = DEVICE_LITTLE_ENDIAN, + .impl = { + .min_access_size = 1, + .max_access_size = 1, + }, }; static void pci_piix3_realize(PCIDevice *dev, Error **errp) -- 2.11.0