From 415b2015a4d001f11b199db2746c41e9c90a1547 Mon Sep 17 00:00:00 2001 From: Tim Northover Date: Thu, 7 Jul 2016 17:51:42 +0000 Subject: [PATCH] tests: accept different TargetOpcode values. These tests don't actually care about the internal opcode number, but have to be updated whenever we add a new one for GlobalISel. That's bad. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274774 91177308-0d34-0410-b5e6-96231b3b80d8 --- test/CodeGen/X86/implicit-null-checks.mir | 2 +- test/TableGen/trydecode-emission.td | 4 ++-- test/TableGen/trydecode-emission2.td | 4 ++-- test/TableGen/trydecode-emission3.td | 4 ++-- 4 files changed, 7 insertions(+), 7 deletions(-) diff --git a/test/CodeGen/X86/implicit-null-checks.mir b/test/CodeGen/X86/implicit-null-checks.mir index ee8dc7d7629..81f51edd6a4 100644 --- a/test/CodeGen/X86/implicit-null-checks.mir +++ b/test/CodeGen/X86/implicit-null-checks.mir @@ -93,7 +93,7 @@ liveins: - { reg: '%esi' } # CHECK: bb.0.entry: # CHECK: %eax = MOV32ri 2200000 -# CHECK-NEXT: %eax = FAULTING_LOAD_OP %bb.3.is_null, 196, killed %eax, killed %rdi, 1, _, 0, _, implicit-def dead %eflags :: (load 4 from %ir.x) +# CHECK-NEXT: %eax = FAULTING_LOAD_OP %bb.3.is_null, {{[0-9]+}}, killed %eax, killed %rdi, 1, _, 0, _, implicit-def dead %eflags :: (load 4 from %ir.x) # CHECK-NEXT: JMP_1 %bb.1.not_null body: | diff --git a/test/TableGen/trydecode-emission.td b/test/TableGen/trydecode-emission.td index 5a6591e2ee4..9fcd3436ae7 100644 --- a/test/TableGen/trydecode-emission.td +++ b/test/TableGen/trydecode-emission.td @@ -36,8 +36,8 @@ def InstB : TestInstruction { // CHECK: /* 0 */ MCD::OPC_ExtractField, 4, 4, // Inst{7-4} ... // CHECK-NEXT: /* 3 */ MCD::OPC_FilterValue, 0, 14, 0, // Skip to: 21 // CHECK-NEXT: /* 7 */ MCD::OPC_CheckField, 2, 2, 0, 5, 0, // Skip to: 18 -// CHECK-NEXT: /* 13 */ MCD::OPC_TryDecode, 28, 0, 0, 0, // Opcode: InstB, skip to: 18 -// CHECK-NEXT: /* 18 */ MCD::OPC_Decode, 27, 1, // Opcode: InstA +// CHECK-NEXT: /* 13 */ MCD::OPC_TryDecode, {{[0-9]+}}, 0, 0, 0, // Opcode: InstB, skip to: 18 +// CHECK-NEXT: /* 18 */ MCD::OPC_Decode, {{[0-9]+}}, 1, // Opcode: InstA // CHECK-NEXT: /* 21 */ MCD::OPC_Fail, // CHECK: if (DecodeInstB(MI, insn, Address, Decoder) == MCDisassembler::Fail) { DecodeComplete = false; return MCDisassembler::Fail; } diff --git a/test/TableGen/trydecode-emission2.td b/test/TableGen/trydecode-emission2.td index 44eed80ae5e..8f57341a968 100644 --- a/test/TableGen/trydecode-emission2.td +++ b/test/TableGen/trydecode-emission2.td @@ -35,9 +35,9 @@ def InstB : TestInstruction { // CHECK-NEXT: /* 7 */ MCD::OPC_ExtractField, 5, 3, // Inst{7-5} ... // CHECK-NEXT: /* 10 */ MCD::OPC_FilterValue, 0, 22, 0, // Skip to: 36 // CHECK-NEXT: /* 14 */ MCD::OPC_CheckField, 0, 2, 3, 5, 0, // Skip to: 25 -// CHECK-NEXT: /* 20 */ MCD::OPC_TryDecode, 28, 0, 0, 0, // Opcode: InstB, skip to: 25 +// CHECK-NEXT: /* 20 */ MCD::OPC_TryDecode, {{[0-9]+}}, 0, 0, 0, // Opcode: InstB, skip to: 25 // CHECK-NEXT: /* 25 */ MCD::OPC_CheckField, 3, 2, 0, 5, 0, // Skip to: 36 -// CHECK-NEXT: /* 31 */ MCD::OPC_TryDecode, 27, 1, 0, 0, // Opcode: InstA, skip to: 36 +// CHECK-NEXT: /* 31 */ MCD::OPC_TryDecode, {{[0-9]+}}, 1, 0, 0, // Opcode: InstA, skip to: 36 // CHECK-NEXT: /* 36 */ MCD::OPC_Fail, // CHECK: if (DecodeInstB(MI, insn, Address, Decoder) == MCDisassembler::Fail) { DecodeComplete = false; return MCDisassembler::Fail; } diff --git a/test/TableGen/trydecode-emission3.td b/test/TableGen/trydecode-emission3.td index d84edb065bd..7f7e91794e6 100644 --- a/test/TableGen/trydecode-emission3.td +++ b/test/TableGen/trydecode-emission3.td @@ -37,8 +37,8 @@ def InstB : TestInstruction { // CHECK: /* 0 */ MCD::OPC_ExtractField, 4, 4, // Inst{7-4} ... // CHECK-NEXT: /* 3 */ MCD::OPC_FilterValue, 0, 14, 0, // Skip to: 21 // CHECK-NEXT: /* 7 */ MCD::OPC_CheckField, 2, 2, 0, 5, 0, // Skip to: 18 -// CHECK-NEXT: /* 13 */ MCD::OPC_TryDecode, 28, 0, 0, 0, // Opcode: InstB, skip to: 18 -// CHECK-NEXT: /* 18 */ MCD::OPC_Decode, 27, 1, // Opcode: InstA +// CHECK-NEXT: /* 13 */ MCD::OPC_TryDecode, {{[0-9]+}}, 0, 0, 0, // Opcode: InstB, skip to: 18 +// CHECK-NEXT: /* 18 */ MCD::OPC_Decode, {{[0-9]+}}, 1, // Opcode: InstA // CHECK-NEXT: /* 21 */ MCD::OPC_Fail, // CHECK: if (DecodeInstBOp(MI, tmp, Address, Decoder) == MCDisassembler::Fail) { DecodeComplete = false; return MCDisassembler::Fail; } -- 2.11.0