From 4228b1201f22b926cdcbf599e93bef104ce295d2 Mon Sep 17 00:00:00 2001 From: Craig Topper Date: Tue, 21 Feb 2017 07:32:11 +0000 Subject: [PATCH] [X86] Remove sse2 intrinsic tests from the avx intrinsics test file. They are all covered by the SSE2 intrinsics test with SSE2, AVX, and AVX512 command lines. Also remove an unneeded lfence intrinsic test since it was already covered. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@295700 91177308-0d34-0410-b5e6-96231b3b80d8 --- test/CodeGen/X86/avx-intrinsics-x86.ll | 1186 +--------------------------- test/CodeGen/X86/avx-intrinsics-x86_64.ll | 33 - test/CodeGen/X86/lfence.ll | 8 - test/CodeGen/X86/sse2-intrinsics-x86.ll | 31 + test/CodeGen/X86/sse2-intrinsics-x86_64.ll | 78 ++ 5 files changed, 113 insertions(+), 1223 deletions(-) delete mode 100644 test/CodeGen/X86/lfence.ll create mode 100644 test/CodeGen/X86/sse2-intrinsics-x86_64.ll diff --git a/test/CodeGen/X86/avx-intrinsics-x86.ll b/test/CodeGen/X86/avx-intrinsics-x86.ll index 129afadefcf..bae7d04a1a4 100644 --- a/test/CodeGen/X86/avx-intrinsics-x86.ll +++ b/test/CodeGen/X86/avx-intrinsics-x86.ll @@ -68,1153 +68,6 @@ define <2 x i64> @test_x86_aesni_aeskeygenassist(<2 x i64> %a0) { declare <2 x i64> @llvm.x86.aesni.aeskeygenassist(<2 x i64>, i8) nounwind readnone -define <2 x double> @test_x86_sse2_cmp_pd(<2 x double> %a0, <2 x double> %a1) { -; CHECK-LABEL: test_x86_sse2_cmp_pd: -; CHECK: ## BB#0: -; CHECK-NEXT: vcmpordpd %xmm1, %xmm0, %xmm0 ## encoding: [0xc5,0xf9,0xc2,0xc1,0x07] -; CHECK-NEXT: retl ## encoding: [0xc3] - %res = call <2 x double> @llvm.x86.sse2.cmp.pd(<2 x double> %a0, <2 x double> %a1, i8 7) ; <<2 x double>> [#uses=1] - ret <2 x double> %res -} -declare <2 x double> @llvm.x86.sse2.cmp.pd(<2 x double>, <2 x double>, i8) nounwind readnone - - -define <2 x double> @test_x86_sse2_cmp_sd(<2 x double> %a0, <2 x double> %a1) { -; CHECK-LABEL: test_x86_sse2_cmp_sd: -; CHECK: ## BB#0: -; CHECK-NEXT: vcmpordsd %xmm1, %xmm0, %xmm0 ## encoding: [0xc5,0xfb,0xc2,0xc1,0x07] -; CHECK-NEXT: retl ## encoding: [0xc3] - %res = call <2 x double> @llvm.x86.sse2.cmp.sd(<2 x double> %a0, <2 x double> %a1, i8 7) ; <<2 x double>> [#uses=1] - ret <2 x double> %res -} -declare <2 x double> @llvm.x86.sse2.cmp.sd(<2 x double>, <2 x double>, i8) nounwind readnone - - -define i32 @test_x86_sse2_comieq_sd(<2 x double> %a0, <2 x double> %a1) { -; AVX-LABEL: test_x86_sse2_comieq_sd: -; AVX: ## BB#0: -; AVX-NEXT: vcomisd %xmm1, %xmm0 ## encoding: [0xc5,0xf9,0x2f,0xc1] -; AVX-NEXT: setnp %al ## encoding: [0x0f,0x9b,0xc0] -; AVX-NEXT: sete %cl ## encoding: [0x0f,0x94,0xc1] -; AVX-NEXT: andb %al, %cl ## encoding: [0x20,0xc1] -; AVX-NEXT: movzbl %cl, %eax ## encoding: [0x0f,0xb6,0xc1] -; AVX-NEXT: retl ## encoding: [0xc3] -; -; AVX512VL-LABEL: test_x86_sse2_comieq_sd: -; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vcomisd %xmm1, %xmm0 ## EVEX TO VEX Compression encoding: [0xc5,0xf9,0x2f,0xc1] -; AVX512VL-NEXT: setnp %al ## encoding: [0x0f,0x9b,0xc0] -; AVX512VL-NEXT: sete %cl ## encoding: [0x0f,0x94,0xc1] -; AVX512VL-NEXT: andb %al, %cl ## encoding: [0x20,0xc1] -; AVX512VL-NEXT: movzbl %cl, %eax ## encoding: [0x0f,0xb6,0xc1] -; AVX512VL-NEXT: retl ## encoding: [0xc3] - %res = call i32 @llvm.x86.sse2.comieq.sd(<2 x double> %a0, <2 x double> %a1) ; [#uses=1] - ret i32 %res -} -declare i32 @llvm.x86.sse2.comieq.sd(<2 x double>, <2 x double>) nounwind readnone - - -define i32 @test_x86_sse2_comige_sd(<2 x double> %a0, <2 x double> %a1) { -; AVX-LABEL: test_x86_sse2_comige_sd: -; AVX: ## BB#0: -; AVX-NEXT: xorl %eax, %eax ## encoding: [0x31,0xc0] -; AVX-NEXT: vcomisd %xmm1, %xmm0 ## encoding: [0xc5,0xf9,0x2f,0xc1] -; AVX-NEXT: setae %al ## encoding: [0x0f,0x93,0xc0] -; AVX-NEXT: retl ## encoding: [0xc3] -; -; AVX512VL-LABEL: test_x86_sse2_comige_sd: -; AVX512VL: ## BB#0: -; AVX512VL-NEXT: xorl %eax, %eax ## encoding: [0x31,0xc0] -; AVX512VL-NEXT: vcomisd %xmm1, %xmm0 ## EVEX TO VEX Compression encoding: [0xc5,0xf9,0x2f,0xc1] -; AVX512VL-NEXT: setae %al ## encoding: [0x0f,0x93,0xc0] -; AVX512VL-NEXT: retl ## encoding: [0xc3] - %res = call i32 @llvm.x86.sse2.comige.sd(<2 x double> %a0, <2 x double> %a1) ; [#uses=1] - ret i32 %res -} -declare i32 @llvm.x86.sse2.comige.sd(<2 x double>, <2 x double>) nounwind readnone - - -define i32 @test_x86_sse2_comigt_sd(<2 x double> %a0, <2 x double> %a1) { -; AVX-LABEL: test_x86_sse2_comigt_sd: -; AVX: ## BB#0: -; AVX-NEXT: xorl %eax, %eax ## encoding: [0x31,0xc0] -; AVX-NEXT: vcomisd %xmm1, %xmm0 ## encoding: [0xc5,0xf9,0x2f,0xc1] -; AVX-NEXT: seta %al ## encoding: [0x0f,0x97,0xc0] -; AVX-NEXT: retl ## encoding: [0xc3] -; -; AVX512VL-LABEL: test_x86_sse2_comigt_sd: -; AVX512VL: ## BB#0: -; AVX512VL-NEXT: xorl %eax, %eax ## encoding: [0x31,0xc0] -; AVX512VL-NEXT: vcomisd %xmm1, %xmm0 ## EVEX TO VEX Compression encoding: [0xc5,0xf9,0x2f,0xc1] -; AVX512VL-NEXT: seta %al ## encoding: [0x0f,0x97,0xc0] -; AVX512VL-NEXT: retl ## encoding: [0xc3] - %res = call i32 @llvm.x86.sse2.comigt.sd(<2 x double> %a0, <2 x double> %a1) ; [#uses=1] - ret i32 %res -} -declare i32 @llvm.x86.sse2.comigt.sd(<2 x double>, <2 x double>) nounwind readnone - - -define i32 @test_x86_sse2_comile_sd(<2 x double> %a0, <2 x double> %a1) { -; AVX-LABEL: test_x86_sse2_comile_sd: -; AVX: ## BB#0: -; AVX-NEXT: xorl %eax, %eax ## encoding: [0x31,0xc0] -; AVX-NEXT: vcomisd %xmm0, %xmm1 ## encoding: [0xc5,0xf9,0x2f,0xc8] -; AVX-NEXT: setae %al ## encoding: [0x0f,0x93,0xc0] -; AVX-NEXT: retl ## encoding: [0xc3] -; -; AVX512VL-LABEL: test_x86_sse2_comile_sd: -; AVX512VL: ## BB#0: -; AVX512VL-NEXT: xorl %eax, %eax ## encoding: [0x31,0xc0] -; AVX512VL-NEXT: vcomisd %xmm0, %xmm1 ## EVEX TO VEX Compression encoding: [0xc5,0xf9,0x2f,0xc8] -; AVX512VL-NEXT: setae %al ## encoding: [0x0f,0x93,0xc0] -; AVX512VL-NEXT: retl ## encoding: [0xc3] - %res = call i32 @llvm.x86.sse2.comile.sd(<2 x double> %a0, <2 x double> %a1) ; [#uses=1] - ret i32 %res -} -declare i32 @llvm.x86.sse2.comile.sd(<2 x double>, <2 x double>) nounwind readnone - - -define i32 @test_x86_sse2_comilt_sd(<2 x double> %a0, <2 x double> %a1) { -; AVX-LABEL: test_x86_sse2_comilt_sd: -; AVX: ## BB#0: -; AVX-NEXT: xorl %eax, %eax ## encoding: [0x31,0xc0] -; AVX-NEXT: vcomisd %xmm0, %xmm1 ## encoding: [0xc5,0xf9,0x2f,0xc8] -; AVX-NEXT: seta %al ## encoding: [0x0f,0x97,0xc0] -; AVX-NEXT: retl ## encoding: [0xc3] -; -; AVX512VL-LABEL: test_x86_sse2_comilt_sd: -; AVX512VL: ## BB#0: -; AVX512VL-NEXT: xorl %eax, %eax ## encoding: [0x31,0xc0] -; AVX512VL-NEXT: vcomisd %xmm0, %xmm1 ## EVEX TO VEX Compression encoding: [0xc5,0xf9,0x2f,0xc8] -; AVX512VL-NEXT: seta %al ## encoding: [0x0f,0x97,0xc0] -; AVX512VL-NEXT: retl ## encoding: [0xc3] - %res = call i32 @llvm.x86.sse2.comilt.sd(<2 x double> %a0, <2 x double> %a1) ; [#uses=1] - ret i32 %res -} -declare i32 @llvm.x86.sse2.comilt.sd(<2 x double>, <2 x double>) nounwind readnone - - -define i32 @test_x86_sse2_comineq_sd(<2 x double> %a0, <2 x double> %a1) { -; AVX-LABEL: test_x86_sse2_comineq_sd: -; AVX: ## BB#0: -; AVX-NEXT: vcomisd %xmm1, %xmm0 ## encoding: [0xc5,0xf9,0x2f,0xc1] -; AVX-NEXT: setp %al ## encoding: [0x0f,0x9a,0xc0] -; AVX-NEXT: setne %cl ## encoding: [0x0f,0x95,0xc1] -; AVX-NEXT: orb %al, %cl ## encoding: [0x08,0xc1] -; AVX-NEXT: movzbl %cl, %eax ## encoding: [0x0f,0xb6,0xc1] -; AVX-NEXT: retl ## encoding: [0xc3] -; -; AVX512VL-LABEL: test_x86_sse2_comineq_sd: -; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vcomisd %xmm1, %xmm0 ## EVEX TO VEX Compression encoding: [0xc5,0xf9,0x2f,0xc1] -; AVX512VL-NEXT: setp %al ## encoding: [0x0f,0x9a,0xc0] -; AVX512VL-NEXT: setne %cl ## encoding: [0x0f,0x95,0xc1] -; AVX512VL-NEXT: orb %al, %cl ## encoding: [0x08,0xc1] -; AVX512VL-NEXT: movzbl %cl, %eax ## encoding: [0x0f,0xb6,0xc1] -; AVX512VL-NEXT: retl ## encoding: [0xc3] - %res = call i32 @llvm.x86.sse2.comineq.sd(<2 x double> %a0, <2 x double> %a1) ; [#uses=1] - ret i32 %res -} -declare i32 @llvm.x86.sse2.comineq.sd(<2 x double>, <2 x double>) nounwind readnone - - -define <4 x float> @test_x86_sse2_cvtdq2ps(<4 x i32> %a0) { -; AVX-LABEL: test_x86_sse2_cvtdq2ps: -; AVX: ## BB#0: -; AVX-NEXT: vcvtdq2ps %xmm0, %xmm0 ## encoding: [0xc5,0xf8,0x5b,0xc0] -; AVX-NEXT: retl ## encoding: [0xc3] -; -; AVX512VL-LABEL: test_x86_sse2_cvtdq2ps: -; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vcvtdq2ps %xmm0, %xmm0 ## EVEX TO VEX Compression encoding: [0xc5,0xf8,0x5b,0xc0] -; AVX512VL-NEXT: retl ## encoding: [0xc3] - %res = call <4 x float> @llvm.x86.sse2.cvtdq2ps(<4 x i32> %a0) ; <<4 x float>> [#uses=1] - ret <4 x float> %res -} -declare <4 x float> @llvm.x86.sse2.cvtdq2ps(<4 x i32>) nounwind readnone - - -define <4 x i32> @test_x86_sse2_cvtpd2dq(<2 x double> %a0) { -; AVX-LABEL: test_x86_sse2_cvtpd2dq: -; AVX: ## BB#0: -; AVX-NEXT: vcvtpd2dq %xmm0, %xmm0 ## encoding: [0xc5,0xfb,0xe6,0xc0] -; AVX-NEXT: retl ## encoding: [0xc3] -; -; AVX512VL-LABEL: test_x86_sse2_cvtpd2dq: -; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vcvtpd2dq %xmm0, %xmm0 ## EVEX TO VEX Compression encoding: [0xc5,0xfb,0xe6,0xc0] -; AVX512VL-NEXT: retl ## encoding: [0xc3] - %res = call <4 x i32> @llvm.x86.sse2.cvtpd2dq(<2 x double> %a0) ; <<4 x i32>> [#uses=1] - ret <4 x i32> %res -} -declare <4 x i32> @llvm.x86.sse2.cvtpd2dq(<2 x double>) nounwind readnone - - -define <4 x float> @test_x86_sse2_cvtpd2ps(<2 x double> %a0) { -; AVX-LABEL: test_x86_sse2_cvtpd2ps: -; AVX: ## BB#0: -; AVX-NEXT: vcvtpd2ps %xmm0, %xmm0 ## encoding: [0xc5,0xf9,0x5a,0xc0] -; AVX-NEXT: retl ## encoding: [0xc3] -; -; AVX512VL-LABEL: test_x86_sse2_cvtpd2ps: -; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vcvtpd2ps %xmm0, %xmm0 ## EVEX TO VEX Compression encoding: [0xc5,0xf9,0x5a,0xc0] -; AVX512VL-NEXT: retl ## encoding: [0xc3] - %res = call <4 x float> @llvm.x86.sse2.cvtpd2ps(<2 x double> %a0) ; <<4 x float>> [#uses=1] - ret <4 x float> %res -} -declare <4 x float> @llvm.x86.sse2.cvtpd2ps(<2 x double>) nounwind readnone - - -define <4 x i32> @test_x86_sse2_cvtps2dq(<4 x float> %a0) { -; CHECK-LABEL: test_x86_sse2_cvtps2dq: -; CHECK: ## BB#0: -; CHECK-NEXT: vcvtps2dq %xmm0, %xmm0 ## encoding: [0xc5,0xf9,0x5b,0xc0] -; CHECK-NEXT: retl ## encoding: [0xc3] - %res = call <4 x i32> @llvm.x86.sse2.cvtps2dq(<4 x float> %a0) ; <<4 x i32>> [#uses=1] - ret <4 x i32> %res -} -declare <4 x i32> @llvm.x86.sse2.cvtps2dq(<4 x float>) nounwind readnone - - -define i32 @test_x86_sse2_cvtsd2si(<2 x double> %a0) { -; AVX-LABEL: test_x86_sse2_cvtsd2si: -; AVX: ## BB#0: -; AVX-NEXT: vcvtsd2si %xmm0, %eax ## encoding: [0xc5,0xfb,0x2d,0xc0] -; AVX-NEXT: retl ## encoding: [0xc3] -; -; AVX512VL-LABEL: test_x86_sse2_cvtsd2si: -; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vcvtsd2si %xmm0, %eax ## EVEX TO VEX Compression encoding: [0xc5,0xfb,0x2d,0xc0] -; AVX512VL-NEXT: retl ## encoding: [0xc3] - %res = call i32 @llvm.x86.sse2.cvtsd2si(<2 x double> %a0) ; [#uses=1] - ret i32 %res -} -declare i32 @llvm.x86.sse2.cvtsd2si(<2 x double>) nounwind readnone - - -define <4 x float> @test_x86_sse2_cvtsd2ss(<4 x float> %a0, <2 x double> %a1) { -; CHECK-LABEL: test_x86_sse2_cvtsd2ss: -; CHECK: ## BB#0: -; CHECK-NEXT: vcvtsd2ss %xmm1, %xmm0, %xmm0 ## encoding: [0xc5,0xfb,0x5a,0xc1] -; CHECK-NEXT: retl ## encoding: [0xc3] - %res = call <4 x float> @llvm.x86.sse2.cvtsd2ss(<4 x float> %a0, <2 x double> %a1) ; <<4 x float>> [#uses=1] - ret <4 x float> %res -} -declare <4 x float> @llvm.x86.sse2.cvtsd2ss(<4 x float>, <2 x double>) nounwind readnone - - -define <2 x double> @test_x86_sse2_cvtsi2sd(<2 x double> %a0, i32 %a1) { -; AVX-LABEL: test_x86_sse2_cvtsi2sd: -; AVX: ## BB#0: -; AVX-NEXT: vcvtsi2sdl {{[0-9]+}}(%esp), %xmm0, %xmm0 ## encoding: [0xc5,0xfb,0x2a,0x44,0x24,0x04] -; AVX-NEXT: retl ## encoding: [0xc3] -; -; AVX512VL-LABEL: test_x86_sse2_cvtsi2sd: -; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vcvtsi2sdl {{[0-9]+}}(%esp), %xmm0, %xmm0 ## EVEX TO VEX Compression encoding: [0xc5,0xfb,0x2a,0x44,0x24,0x04] -; AVX512VL-NEXT: retl ## encoding: [0xc3] - %res = call <2 x double> @llvm.x86.sse2.cvtsi2sd(<2 x double> %a0, i32 %a1) ; <<2 x double>> [#uses=1] - ret <2 x double> %res -} -declare <2 x double> @llvm.x86.sse2.cvtsi2sd(<2 x double>, i32) nounwind readnone - - -define <2 x double> @test_x86_sse2_cvtss2sd(<2 x double> %a0, <4 x float> %a1) { -; CHECK-LABEL: test_x86_sse2_cvtss2sd: -; CHECK: ## BB#0: -; CHECK-NEXT: vcvtss2sd %xmm1, %xmm0, %xmm0 ## encoding: [0xc5,0xfa,0x5a,0xc1] -; CHECK-NEXT: retl ## encoding: [0xc3] - %res = call <2 x double> @llvm.x86.sse2.cvtss2sd(<2 x double> %a0, <4 x float> %a1) ; <<2 x double>> [#uses=1] - ret <2 x double> %res -} -declare <2 x double> @llvm.x86.sse2.cvtss2sd(<2 x double>, <4 x float>) nounwind readnone - - -define <4 x i32> @test_x86_sse2_cvttpd2dq(<2 x double> %a0) { -; AVX-LABEL: test_x86_sse2_cvttpd2dq: -; AVX: ## BB#0: -; AVX-NEXT: vcvttpd2dq %xmm0, %xmm0 ## encoding: [0xc5,0xf9,0xe6,0xc0] -; AVX-NEXT: retl ## encoding: [0xc3] -; -; AVX512VL-LABEL: test_x86_sse2_cvttpd2dq: -; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vcvttpd2dq %xmm0, %xmm0 ## EVEX TO VEX Compression encoding: [0xc5,0xf9,0xe6,0xc0] -; AVX512VL-NEXT: retl ## encoding: [0xc3] - %res = call <4 x i32> @llvm.x86.sse2.cvttpd2dq(<2 x double> %a0) ; <<4 x i32>> [#uses=1] - ret <4 x i32> %res -} -declare <4 x i32> @llvm.x86.sse2.cvttpd2dq(<2 x double>) nounwind readnone - - -define <4 x i32> @test_x86_sse2_cvttps2dq(<4 x float> %a0) { -; AVX-LABEL: test_x86_sse2_cvttps2dq: -; AVX: ## BB#0: -; AVX-NEXT: vcvttps2dq %xmm0, %xmm0 ## encoding: [0xc5,0xfa,0x5b,0xc0] -; AVX-NEXT: retl ## encoding: [0xc3] -; -; AVX512VL-LABEL: test_x86_sse2_cvttps2dq: -; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vcvttps2dq %xmm0, %xmm0 ## EVEX TO VEX Compression encoding: [0xc5,0xfa,0x5b,0xc0] -; AVX512VL-NEXT: retl ## encoding: [0xc3] - %res = call <4 x i32> @llvm.x86.sse2.cvttps2dq(<4 x float> %a0) ; <<4 x i32>> [#uses=1] - ret <4 x i32> %res -} -declare <4 x i32> @llvm.x86.sse2.cvttps2dq(<4 x float>) nounwind readnone - - -define i32 @test_x86_sse2_cvttsd2si(<2 x double> %a0) { -; AVX-LABEL: test_x86_sse2_cvttsd2si: -; AVX: ## BB#0: -; AVX-NEXT: vcvttsd2si %xmm0, %eax ## encoding: [0xc5,0xfb,0x2c,0xc0] -; AVX-NEXT: retl ## encoding: [0xc3] -; -; AVX512VL-LABEL: test_x86_sse2_cvttsd2si: -; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vcvttsd2si %xmm0, %eax ## EVEX TO VEX Compression encoding: [0xc5,0xfb,0x2c,0xc0] -; AVX512VL-NEXT: retl ## encoding: [0xc3] - %res = call i32 @llvm.x86.sse2.cvttsd2si(<2 x double> %a0) ; [#uses=1] - ret i32 %res -} -declare i32 @llvm.x86.sse2.cvttsd2si(<2 x double>) nounwind readnone - - - -define <2 x double> @test_x86_sse2_max_pd(<2 x double> %a0, <2 x double> %a1) { -; AVX-LABEL: test_x86_sse2_max_pd: -; AVX: ## BB#0: -; AVX-NEXT: vmaxpd %xmm1, %xmm0, %xmm0 ## encoding: [0xc5,0xf9,0x5f,0xc1] -; AVX-NEXT: retl ## encoding: [0xc3] -; -; AVX512VL-LABEL: test_x86_sse2_max_pd: -; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vmaxpd %xmm1, %xmm0, %xmm0 ## EVEX TO VEX Compression encoding: [0xc5,0xf9,0x5f,0xc1] -; AVX512VL-NEXT: retl ## encoding: [0xc3] - %res = call <2 x double> @llvm.x86.sse2.max.pd(<2 x double> %a0, <2 x double> %a1) ; <<2 x double>> [#uses=1] - ret <2 x double> %res -} -declare <2 x double> @llvm.x86.sse2.max.pd(<2 x double>, <2 x double>) nounwind readnone - - -define <2 x double> @test_x86_sse2_max_sd(<2 x double> %a0, <2 x double> %a1) { -; CHECK-LABEL: test_x86_sse2_max_sd: -; CHECK: ## BB#0: -; CHECK-NEXT: vmaxsd %xmm1, %xmm0, %xmm0 ## encoding: [0xc5,0xfb,0x5f,0xc1] -; CHECK-NEXT: retl ## encoding: [0xc3] - %res = call <2 x double> @llvm.x86.sse2.max.sd(<2 x double> %a0, <2 x double> %a1) ; <<2 x double>> [#uses=1] - ret <2 x double> %res -} -declare <2 x double> @llvm.x86.sse2.max.sd(<2 x double>, <2 x double>) nounwind readnone - - -define <2 x double> @test_x86_sse2_min_pd(<2 x double> %a0, <2 x double> %a1) { -; AVX-LABEL: test_x86_sse2_min_pd: -; AVX: ## BB#0: -; AVX-NEXT: vminpd %xmm1, %xmm0, %xmm0 ## encoding: [0xc5,0xf9,0x5d,0xc1] -; AVX-NEXT: retl ## encoding: [0xc3] -; -; AVX512VL-LABEL: test_x86_sse2_min_pd: -; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vminpd %xmm1, %xmm0, %xmm0 ## EVEX TO VEX Compression encoding: [0xc5,0xf9,0x5d,0xc1] -; AVX512VL-NEXT: retl ## encoding: [0xc3] - %res = call <2 x double> @llvm.x86.sse2.min.pd(<2 x double> %a0, <2 x double> %a1) ; <<2 x double>> [#uses=1] - ret <2 x double> %res -} -declare <2 x double> @llvm.x86.sse2.min.pd(<2 x double>, <2 x double>) nounwind readnone - - -define <2 x double> @test_x86_sse2_min_sd(<2 x double> %a0, <2 x double> %a1) { -; CHECK-LABEL: test_x86_sse2_min_sd: -; CHECK: ## BB#0: -; CHECK-NEXT: vminsd %xmm1, %xmm0, %xmm0 ## encoding: [0xc5,0xfb,0x5d,0xc1] -; CHECK-NEXT: retl ## encoding: [0xc3] - %res = call <2 x double> @llvm.x86.sse2.min.sd(<2 x double> %a0, <2 x double> %a1) ; <<2 x double>> [#uses=1] - ret <2 x double> %res -} -declare <2 x double> @llvm.x86.sse2.min.sd(<2 x double>, <2 x double>) nounwind readnone - - -define i32 @test_x86_sse2_movmsk_pd(<2 x double> %a0) { -; CHECK-LABEL: test_x86_sse2_movmsk_pd: -; CHECK: ## BB#0: -; CHECK-NEXT: vmovmskpd %xmm0, %eax ## encoding: [0xc5,0xf9,0x50,0xc0] -; CHECK-NEXT: retl ## encoding: [0xc3] - %res = call i32 @llvm.x86.sse2.movmsk.pd(<2 x double> %a0) ; [#uses=1] - ret i32 %res -} -declare i32 @llvm.x86.sse2.movmsk.pd(<2 x double>) nounwind readnone - - - - -define <8 x i16> @test_x86_sse2_packssdw_128(<4 x i32> %a0, <4 x i32> %a1) { -; AVX-LABEL: test_x86_sse2_packssdw_128: -; AVX: ## BB#0: -; AVX-NEXT: vpackssdw %xmm1, %xmm0, %xmm0 ## encoding: [0xc5,0xf9,0x6b,0xc1] -; AVX-NEXT: retl ## encoding: [0xc3] -; -; AVX512VL-LABEL: test_x86_sse2_packssdw_128: -; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vpackssdw %xmm1, %xmm0, %xmm0 ## EVEX TO VEX Compression encoding: [0xc5,0xf9,0x6b,0xc1] -; AVX512VL-NEXT: retl ## encoding: [0xc3] - %res = call <8 x i16> @llvm.x86.sse2.packssdw.128(<4 x i32> %a0, <4 x i32> %a1) ; <<8 x i16>> [#uses=1] - ret <8 x i16> %res -} -declare <8 x i16> @llvm.x86.sse2.packssdw.128(<4 x i32>, <4 x i32>) nounwind readnone - - -define <16 x i8> @test_x86_sse2_packsswb_128(<8 x i16> %a0, <8 x i16> %a1) { -; AVX-LABEL: test_x86_sse2_packsswb_128: -; AVX: ## BB#0: -; AVX-NEXT: vpacksswb %xmm1, %xmm0, %xmm0 ## encoding: [0xc5,0xf9,0x63,0xc1] -; AVX-NEXT: retl ## encoding: [0xc3] -; -; AVX512VL-LABEL: test_x86_sse2_packsswb_128: -; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vpacksswb %xmm1, %xmm0, %xmm0 ## EVEX TO VEX Compression encoding: [0xc5,0xf9,0x63,0xc1] -; AVX512VL-NEXT: retl ## encoding: [0xc3] - %res = call <16 x i8> @llvm.x86.sse2.packsswb.128(<8 x i16> %a0, <8 x i16> %a1) ; <<16 x i8>> [#uses=1] - ret <16 x i8> %res -} -declare <16 x i8> @llvm.x86.sse2.packsswb.128(<8 x i16>, <8 x i16>) nounwind readnone - - -define <16 x i8> @test_x86_sse2_packuswb_128(<8 x i16> %a0, <8 x i16> %a1) { -; AVX-LABEL: test_x86_sse2_packuswb_128: -; AVX: ## BB#0: -; AVX-NEXT: vpackuswb %xmm1, %xmm0, %xmm0 ## encoding: [0xc5,0xf9,0x67,0xc1] -; AVX-NEXT: retl ## encoding: [0xc3] -; -; AVX512VL-LABEL: test_x86_sse2_packuswb_128: -; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vpackuswb %xmm1, %xmm0, %xmm0 ## EVEX TO VEX Compression encoding: [0xc5,0xf9,0x67,0xc1] -; AVX512VL-NEXT: retl ## encoding: [0xc3] - %res = call <16 x i8> @llvm.x86.sse2.packuswb.128(<8 x i16> %a0, <8 x i16> %a1) ; <<16 x i8>> [#uses=1] - ret <16 x i8> %res -} -declare <16 x i8> @llvm.x86.sse2.packuswb.128(<8 x i16>, <8 x i16>) nounwind readnone - - -define <16 x i8> @test_x86_sse2_padds_b(<16 x i8> %a0, <16 x i8> %a1) { -; AVX-LABEL: test_x86_sse2_padds_b: -; AVX: ## BB#0: -; AVX-NEXT: vpaddsb %xmm1, %xmm0, %xmm0 ## encoding: [0xc5,0xf9,0xec,0xc1] -; AVX-NEXT: retl ## encoding: [0xc3] -; -; AVX512VL-LABEL: test_x86_sse2_padds_b: -; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vpaddsb %xmm1, %xmm0, %xmm0 ## EVEX TO VEX Compression encoding: [0xc5,0xf9,0xec,0xc1] -; AVX512VL-NEXT: retl ## encoding: [0xc3] - %res = call <16 x i8> @llvm.x86.sse2.padds.b(<16 x i8> %a0, <16 x i8> %a1) ; <<16 x i8>> [#uses=1] - ret <16 x i8> %res -} -declare <16 x i8> @llvm.x86.sse2.padds.b(<16 x i8>, <16 x i8>) nounwind readnone - - -define <8 x i16> @test_x86_sse2_padds_w(<8 x i16> %a0, <8 x i16> %a1) { -; AVX-LABEL: test_x86_sse2_padds_w: -; AVX: ## BB#0: -; AVX-NEXT: vpaddsw %xmm1, %xmm0, %xmm0 ## encoding: [0xc5,0xf9,0xed,0xc1] -; AVX-NEXT: retl ## encoding: [0xc3] -; -; AVX512VL-LABEL: test_x86_sse2_padds_w: -; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vpaddsw %xmm1, %xmm0, %xmm0 ## EVEX TO VEX Compression encoding: [0xc5,0xf9,0xed,0xc1] -; AVX512VL-NEXT: retl ## encoding: [0xc3] - %res = call <8 x i16> @llvm.x86.sse2.padds.w(<8 x i16> %a0, <8 x i16> %a1) ; <<8 x i16>> [#uses=1] - ret <8 x i16> %res -} -declare <8 x i16> @llvm.x86.sse2.padds.w(<8 x i16>, <8 x i16>) nounwind readnone - - -define <16 x i8> @test_x86_sse2_paddus_b(<16 x i8> %a0, <16 x i8> %a1) { -; AVX-LABEL: test_x86_sse2_paddus_b: -; AVX: ## BB#0: -; AVX-NEXT: vpaddusb %xmm1, %xmm0, %xmm0 ## encoding: [0xc5,0xf9,0xdc,0xc1] -; AVX-NEXT: retl ## encoding: [0xc3] -; -; AVX512VL-LABEL: test_x86_sse2_paddus_b: -; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vpaddusb %xmm1, %xmm0, %xmm0 ## EVEX TO VEX Compression encoding: [0xc5,0xf9,0xdc,0xc1] -; AVX512VL-NEXT: retl ## encoding: [0xc3] - %res = call <16 x i8> @llvm.x86.sse2.paddus.b(<16 x i8> %a0, <16 x i8> %a1) ; <<16 x i8>> [#uses=1] - ret <16 x i8> %res -} -declare <16 x i8> @llvm.x86.sse2.paddus.b(<16 x i8>, <16 x i8>) nounwind readnone - - -define <8 x i16> @test_x86_sse2_paddus_w(<8 x i16> %a0, <8 x i16> %a1) { -; AVX-LABEL: test_x86_sse2_paddus_w: -; AVX: ## BB#0: -; AVX-NEXT: vpaddusw %xmm1, %xmm0, %xmm0 ## encoding: [0xc5,0xf9,0xdd,0xc1] -; AVX-NEXT: retl ## encoding: [0xc3] -; -; AVX512VL-LABEL: test_x86_sse2_paddus_w: -; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vpaddusw %xmm1, %xmm0, %xmm0 ## EVEX TO VEX Compression encoding: [0xc5,0xf9,0xdd,0xc1] -; AVX512VL-NEXT: retl ## encoding: [0xc3] - %res = call <8 x i16> @llvm.x86.sse2.paddus.w(<8 x i16> %a0, <8 x i16> %a1) ; <<8 x i16>> [#uses=1] - ret <8 x i16> %res -} -declare <8 x i16> @llvm.x86.sse2.paddus.w(<8 x i16>, <8 x i16>) nounwind readnone - - -define <16 x i8> @test_x86_sse2_pavg_b(<16 x i8> %a0, <16 x i8> %a1) { -; AVX-LABEL: test_x86_sse2_pavg_b: -; AVX: ## BB#0: -; AVX-NEXT: vpavgb %xmm1, %xmm0, %xmm0 ## encoding: [0xc5,0xf9,0xe0,0xc1] -; AVX-NEXT: retl ## encoding: [0xc3] -; -; AVX512VL-LABEL: test_x86_sse2_pavg_b: -; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vpavgb %xmm1, %xmm0, %xmm0 ## EVEX TO VEX Compression encoding: [0xc5,0xf9,0xe0,0xc1] -; AVX512VL-NEXT: retl ## encoding: [0xc3] - %res = call <16 x i8> @llvm.x86.sse2.pavg.b(<16 x i8> %a0, <16 x i8> %a1) ; <<16 x i8>> [#uses=1] - ret <16 x i8> %res -} -declare <16 x i8> @llvm.x86.sse2.pavg.b(<16 x i8>, <16 x i8>) nounwind readnone - - -define <8 x i16> @test_x86_sse2_pavg_w(<8 x i16> %a0, <8 x i16> %a1) { -; AVX-LABEL: test_x86_sse2_pavg_w: -; AVX: ## BB#0: -; AVX-NEXT: vpavgw %xmm1, %xmm0, %xmm0 ## encoding: [0xc5,0xf9,0xe3,0xc1] -; AVX-NEXT: retl ## encoding: [0xc3] -; -; AVX512VL-LABEL: test_x86_sse2_pavg_w: -; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vpavgw %xmm1, %xmm0, %xmm0 ## EVEX TO VEX Compression encoding: [0xc5,0xf9,0xe3,0xc1] -; AVX512VL-NEXT: retl ## encoding: [0xc3] - %res = call <8 x i16> @llvm.x86.sse2.pavg.w(<8 x i16> %a0, <8 x i16> %a1) ; <<8 x i16>> [#uses=1] - ret <8 x i16> %res -} -declare <8 x i16> @llvm.x86.sse2.pavg.w(<8 x i16>, <8 x i16>) nounwind readnone - - -define <4 x i32> @test_x86_sse2_pmadd_wd(<8 x i16> %a0, <8 x i16> %a1) { -; AVX-LABEL: test_x86_sse2_pmadd_wd: -; AVX: ## BB#0: -; AVX-NEXT: vpmaddwd %xmm1, %xmm0, %xmm0 ## encoding: [0xc5,0xf9,0xf5,0xc1] -; AVX-NEXT: retl ## encoding: [0xc3] -; -; AVX512VL-LABEL: test_x86_sse2_pmadd_wd: -; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vpmaddwd %xmm1, %xmm0, %xmm0 ## EVEX TO VEX Compression encoding: [0xc5,0xf9,0xf5,0xc1] -; AVX512VL-NEXT: retl ## encoding: [0xc3] - %res = call <4 x i32> @llvm.x86.sse2.pmadd.wd(<8 x i16> %a0, <8 x i16> %a1) ; <<4 x i32>> [#uses=1] - ret <4 x i32> %res -} -declare <4 x i32> @llvm.x86.sse2.pmadd.wd(<8 x i16>, <8 x i16>) nounwind readnone - - -define <8 x i16> @test_x86_sse2_pmaxs_w(<8 x i16> %a0, <8 x i16> %a1) { -; AVX-LABEL: test_x86_sse2_pmaxs_w: -; AVX: ## BB#0: -; AVX-NEXT: vpmaxsw %xmm1, %xmm0, %xmm0 ## encoding: [0xc5,0xf9,0xee,0xc1] -; AVX-NEXT: retl ## encoding: [0xc3] -; -; AVX512VL-LABEL: test_x86_sse2_pmaxs_w: -; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vpmaxsw %xmm1, %xmm0, %xmm0 ## EVEX TO VEX Compression encoding: [0xc5,0xf9,0xee,0xc1] -; AVX512VL-NEXT: retl ## encoding: [0xc3] - %res = call <8 x i16> @llvm.x86.sse2.pmaxs.w(<8 x i16> %a0, <8 x i16> %a1) ; <<8 x i16>> [#uses=1] - ret <8 x i16> %res -} -declare <8 x i16> @llvm.x86.sse2.pmaxs.w(<8 x i16>, <8 x i16>) nounwind readnone - - -define <16 x i8> @test_x86_sse2_pmaxu_b(<16 x i8> %a0, <16 x i8> %a1) { -; AVX-LABEL: test_x86_sse2_pmaxu_b: -; AVX: ## BB#0: -; AVX-NEXT: vpmaxub %xmm1, %xmm0, %xmm0 ## encoding: [0xc5,0xf9,0xde,0xc1] -; AVX-NEXT: retl ## encoding: [0xc3] -; -; AVX512VL-LABEL: test_x86_sse2_pmaxu_b: -; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vpmaxub %xmm1, %xmm0, %xmm0 ## EVEX TO VEX Compression encoding: [0xc5,0xf9,0xde,0xc1] -; AVX512VL-NEXT: retl ## encoding: [0xc3] - %res = call <16 x i8> @llvm.x86.sse2.pmaxu.b(<16 x i8> %a0, <16 x i8> %a1) ; <<16 x i8>> [#uses=1] - ret <16 x i8> %res -} -declare <16 x i8> @llvm.x86.sse2.pmaxu.b(<16 x i8>, <16 x i8>) nounwind readnone - - -define <8 x i16> @test_x86_sse2_pmins_w(<8 x i16> %a0, <8 x i16> %a1) { -; AVX-LABEL: test_x86_sse2_pmins_w: -; AVX: ## BB#0: -; AVX-NEXT: vpminsw %xmm1, %xmm0, %xmm0 ## encoding: [0xc5,0xf9,0xea,0xc1] -; AVX-NEXT: retl ## encoding: [0xc3] -; -; AVX512VL-LABEL: test_x86_sse2_pmins_w: -; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vpminsw %xmm1, %xmm0, %xmm0 ## EVEX TO VEX Compression encoding: [0xc5,0xf9,0xea,0xc1] -; AVX512VL-NEXT: retl ## encoding: [0xc3] - %res = call <8 x i16> @llvm.x86.sse2.pmins.w(<8 x i16> %a0, <8 x i16> %a1) ; <<8 x i16>> [#uses=1] - ret <8 x i16> %res -} -declare <8 x i16> @llvm.x86.sse2.pmins.w(<8 x i16>, <8 x i16>) nounwind readnone - - -define <16 x i8> @test_x86_sse2_pminu_b(<16 x i8> %a0, <16 x i8> %a1) { -; AVX-LABEL: test_x86_sse2_pminu_b: -; AVX: ## BB#0: -; AVX-NEXT: vpminub %xmm1, %xmm0, %xmm0 ## encoding: [0xc5,0xf9,0xda,0xc1] -; AVX-NEXT: retl ## encoding: [0xc3] -; -; AVX512VL-LABEL: test_x86_sse2_pminu_b: -; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vpminub %xmm1, %xmm0, %xmm0 ## EVEX TO VEX Compression encoding: [0xc5,0xf9,0xda,0xc1] -; AVX512VL-NEXT: retl ## encoding: [0xc3] - %res = call <16 x i8> @llvm.x86.sse2.pminu.b(<16 x i8> %a0, <16 x i8> %a1) ; <<16 x i8>> [#uses=1] - ret <16 x i8> %res -} -declare <16 x i8> @llvm.x86.sse2.pminu.b(<16 x i8>, <16 x i8>) nounwind readnone - - -define i32 @test_x86_sse2_pmovmskb_128(<16 x i8> %a0) { -; CHECK-LABEL: test_x86_sse2_pmovmskb_128: -; CHECK: ## BB#0: -; CHECK-NEXT: vpmovmskb %xmm0, %eax ## encoding: [0xc5,0xf9,0xd7,0xc0] -; CHECK-NEXT: retl ## encoding: [0xc3] - %res = call i32 @llvm.x86.sse2.pmovmskb.128(<16 x i8> %a0) ; [#uses=1] - ret i32 %res -} -declare i32 @llvm.x86.sse2.pmovmskb.128(<16 x i8>) nounwind readnone - - -define <8 x i16> @test_x86_sse2_pmulh_w(<8 x i16> %a0, <8 x i16> %a1) { -; AVX-LABEL: test_x86_sse2_pmulh_w: -; AVX: ## BB#0: -; AVX-NEXT: vpmulhw %xmm1, %xmm0, %xmm0 ## encoding: [0xc5,0xf9,0xe5,0xc1] -; AVX-NEXT: retl ## encoding: [0xc3] -; -; AVX512VL-LABEL: test_x86_sse2_pmulh_w: -; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vpmulhw %xmm1, %xmm0, %xmm0 ## EVEX TO VEX Compression encoding: [0xc5,0xf9,0xe5,0xc1] -; AVX512VL-NEXT: retl ## encoding: [0xc3] - %res = call <8 x i16> @llvm.x86.sse2.pmulh.w(<8 x i16> %a0, <8 x i16> %a1) ; <<8 x i16>> [#uses=1] - ret <8 x i16> %res -} -declare <8 x i16> @llvm.x86.sse2.pmulh.w(<8 x i16>, <8 x i16>) nounwind readnone - - -define <8 x i16> @test_x86_sse2_pmulhu_w(<8 x i16> %a0, <8 x i16> %a1) { -; AVX-LABEL: test_x86_sse2_pmulhu_w: -; AVX: ## BB#0: -; AVX-NEXT: vpmulhuw %xmm1, %xmm0, %xmm0 ## encoding: [0xc5,0xf9,0xe4,0xc1] -; AVX-NEXT: retl ## encoding: [0xc3] -; -; AVX512VL-LABEL: test_x86_sse2_pmulhu_w: -; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vpmulhuw %xmm1, %xmm0, %xmm0 ## EVEX TO VEX Compression encoding: [0xc5,0xf9,0xe4,0xc1] -; AVX512VL-NEXT: retl ## encoding: [0xc3] - %res = call <8 x i16> @llvm.x86.sse2.pmulhu.w(<8 x i16> %a0, <8 x i16> %a1) ; <<8 x i16>> [#uses=1] - ret <8 x i16> %res -} -declare <8 x i16> @llvm.x86.sse2.pmulhu.w(<8 x i16>, <8 x i16>) nounwind readnone - - -define <2 x i64> @test_x86_sse2_pmulu_dq(<4 x i32> %a0, <4 x i32> %a1) { -; AVX-LABEL: test_x86_sse2_pmulu_dq: -; AVX: ## BB#0: -; AVX-NEXT: vpmuludq %xmm1, %xmm0, %xmm0 ## encoding: [0xc5,0xf9,0xf4,0xc1] -; AVX-NEXT: retl ## encoding: [0xc3] -; -; AVX512VL-LABEL: test_x86_sse2_pmulu_dq: -; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vpmuludq %xmm1, %xmm0, %xmm0 ## EVEX TO VEX Compression encoding: [0xc5,0xf9,0xf4,0xc1] -; AVX512VL-NEXT: retl ## encoding: [0xc3] - %res = call <2 x i64> @llvm.x86.sse2.pmulu.dq(<4 x i32> %a0, <4 x i32> %a1) ; <<2 x i64>> [#uses=1] - ret <2 x i64> %res -} -declare <2 x i64> @llvm.x86.sse2.pmulu.dq(<4 x i32>, <4 x i32>) nounwind readnone - - -define <2 x i64> @test_x86_sse2_psad_bw(<16 x i8> %a0, <16 x i8> %a1) { -; AVX-LABEL: test_x86_sse2_psad_bw: -; AVX: ## BB#0: -; AVX-NEXT: vpsadbw %xmm1, %xmm0, %xmm0 ## encoding: [0xc5,0xf9,0xf6,0xc1] -; AVX-NEXT: retl ## encoding: [0xc3] -; -; AVX512VL-LABEL: test_x86_sse2_psad_bw: -; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vpsadbw %xmm1, %xmm0, %xmm0 ## EVEX TO VEX Compression encoding: [0xc5,0xf9,0xf6,0xc1] -; AVX512VL-NEXT: retl ## encoding: [0xc3] - %res = call <2 x i64> @llvm.x86.sse2.psad.bw(<16 x i8> %a0, <16 x i8> %a1) ; <<2 x i64>> [#uses=1] - ret <2 x i64> %res -} -declare <2 x i64> @llvm.x86.sse2.psad.bw(<16 x i8>, <16 x i8>) nounwind readnone - - -define <4 x i32> @test_x86_sse2_psll_d(<4 x i32> %a0, <4 x i32> %a1) { -; AVX-LABEL: test_x86_sse2_psll_d: -; AVX: ## BB#0: -; AVX-NEXT: vpslld %xmm1, %xmm0, %xmm0 ## encoding: [0xc5,0xf9,0xf2,0xc1] -; AVX-NEXT: retl ## encoding: [0xc3] -; -; AVX512VL-LABEL: test_x86_sse2_psll_d: -; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vpslld %xmm1, %xmm0, %xmm0 ## EVEX TO VEX Compression encoding: [0xc5,0xf9,0xf2,0xc1] -; AVX512VL-NEXT: retl ## encoding: [0xc3] - %res = call <4 x i32> @llvm.x86.sse2.psll.d(<4 x i32> %a0, <4 x i32> %a1) ; <<4 x i32>> [#uses=1] - ret <4 x i32> %res -} -declare <4 x i32> @llvm.x86.sse2.psll.d(<4 x i32>, <4 x i32>) nounwind readnone - - -define <2 x i64> @test_x86_sse2_psll_q(<2 x i64> %a0, <2 x i64> %a1) { -; AVX-LABEL: test_x86_sse2_psll_q: -; AVX: ## BB#0: -; AVX-NEXT: vpsllq %xmm1, %xmm0, %xmm0 ## encoding: [0xc5,0xf9,0xf3,0xc1] -; AVX-NEXT: retl ## encoding: [0xc3] -; -; AVX512VL-LABEL: test_x86_sse2_psll_q: -; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vpsllq %xmm1, %xmm0, %xmm0 ## EVEX TO VEX Compression encoding: [0xc5,0xf9,0xf3,0xc1] -; AVX512VL-NEXT: retl ## encoding: [0xc3] - %res = call <2 x i64> @llvm.x86.sse2.psll.q(<2 x i64> %a0, <2 x i64> %a1) ; <<2 x i64>> [#uses=1] - ret <2 x i64> %res -} -declare <2 x i64> @llvm.x86.sse2.psll.q(<2 x i64>, <2 x i64>) nounwind readnone - - -define <8 x i16> @test_x86_sse2_psll_w(<8 x i16> %a0, <8 x i16> %a1) { -; AVX-LABEL: test_x86_sse2_psll_w: -; AVX: ## BB#0: -; AVX-NEXT: vpsllw %xmm1, %xmm0, %xmm0 ## encoding: [0xc5,0xf9,0xf1,0xc1] -; AVX-NEXT: retl ## encoding: [0xc3] -; -; AVX512VL-LABEL: test_x86_sse2_psll_w: -; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vpsllw %xmm1, %xmm0, %xmm0 ## EVEX TO VEX Compression encoding: [0xc5,0xf9,0xf1,0xc1] -; AVX512VL-NEXT: retl ## encoding: [0xc3] - %res = call <8 x i16> @llvm.x86.sse2.psll.w(<8 x i16> %a0, <8 x i16> %a1) ; <<8 x i16>> [#uses=1] - ret <8 x i16> %res -} -declare <8 x i16> @llvm.x86.sse2.psll.w(<8 x i16>, <8 x i16>) nounwind readnone - - -define <4 x i32> @test_x86_sse2_pslli_d(<4 x i32> %a0) { -; AVX-LABEL: test_x86_sse2_pslli_d: -; AVX: ## BB#0: -; AVX-NEXT: vpslld $7, %xmm0, %xmm0 ## encoding: [0xc5,0xf9,0x72,0xf0,0x07] -; AVX-NEXT: retl ## encoding: [0xc3] -; -; AVX512VL-LABEL: test_x86_sse2_pslli_d: -; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vpslld $7, %xmm0, %xmm0 ## EVEX TO VEX Compression encoding: [0xc5,0xf9,0x72,0xf0,0x07] -; AVX512VL-NEXT: retl ## encoding: [0xc3] - %res = call <4 x i32> @llvm.x86.sse2.pslli.d(<4 x i32> %a0, i32 7) ; <<4 x i32>> [#uses=1] - ret <4 x i32> %res -} -declare <4 x i32> @llvm.x86.sse2.pslli.d(<4 x i32>, i32) nounwind readnone - - -define <2 x i64> @test_x86_sse2_pslli_q(<2 x i64> %a0) { -; AVX-LABEL: test_x86_sse2_pslli_q: -; AVX: ## BB#0: -; AVX-NEXT: vpsllq $7, %xmm0, %xmm0 ## encoding: [0xc5,0xf9,0x73,0xf0,0x07] -; AVX-NEXT: retl ## encoding: [0xc3] -; -; AVX512VL-LABEL: test_x86_sse2_pslli_q: -; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vpsllq $7, %xmm0, %xmm0 ## EVEX TO VEX Compression encoding: [0xc5,0xf9,0x73,0xf0,0x07] -; AVX512VL-NEXT: retl ## encoding: [0xc3] - %res = call <2 x i64> @llvm.x86.sse2.pslli.q(<2 x i64> %a0, i32 7) ; <<2 x i64>> [#uses=1] - ret <2 x i64> %res -} -declare <2 x i64> @llvm.x86.sse2.pslli.q(<2 x i64>, i32) nounwind readnone - - -define <8 x i16> @test_x86_sse2_pslli_w(<8 x i16> %a0) { -; AVX-LABEL: test_x86_sse2_pslli_w: -; AVX: ## BB#0: -; AVX-NEXT: vpsllw $7, %xmm0, %xmm0 ## encoding: [0xc5,0xf9,0x71,0xf0,0x07] -; AVX-NEXT: retl ## encoding: [0xc3] -; -; AVX512VL-LABEL: test_x86_sse2_pslli_w: -; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vpsllw $7, %xmm0, %xmm0 ## EVEX TO VEX Compression encoding: [0xc5,0xf9,0x71,0xf0,0x07] -; AVX512VL-NEXT: retl ## encoding: [0xc3] - %res = call <8 x i16> @llvm.x86.sse2.pslli.w(<8 x i16> %a0, i32 7) ; <<8 x i16>> [#uses=1] - ret <8 x i16> %res -} -declare <8 x i16> @llvm.x86.sse2.pslli.w(<8 x i16>, i32) nounwind readnone - - -define <4 x i32> @test_x86_sse2_psra_d(<4 x i32> %a0, <4 x i32> %a1) { -; AVX-LABEL: test_x86_sse2_psra_d: -; AVX: ## BB#0: -; AVX-NEXT: vpsrad %xmm1, %xmm0, %xmm0 ## encoding: [0xc5,0xf9,0xe2,0xc1] -; AVX-NEXT: retl ## encoding: [0xc3] -; -; AVX512VL-LABEL: test_x86_sse2_psra_d: -; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vpsrad %xmm1, %xmm0, %xmm0 ## EVEX TO VEX Compression encoding: [0xc5,0xf9,0xe2,0xc1] -; AVX512VL-NEXT: retl ## encoding: [0xc3] - %res = call <4 x i32> @llvm.x86.sse2.psra.d(<4 x i32> %a0, <4 x i32> %a1) ; <<4 x i32>> [#uses=1] - ret <4 x i32> %res -} -declare <4 x i32> @llvm.x86.sse2.psra.d(<4 x i32>, <4 x i32>) nounwind readnone - - -define <8 x i16> @test_x86_sse2_psra_w(<8 x i16> %a0, <8 x i16> %a1) { -; AVX-LABEL: test_x86_sse2_psra_w: -; AVX: ## BB#0: -; AVX-NEXT: vpsraw %xmm1, %xmm0, %xmm0 ## encoding: [0xc5,0xf9,0xe1,0xc1] -; AVX-NEXT: retl ## encoding: [0xc3] -; -; AVX512VL-LABEL: test_x86_sse2_psra_w: -; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vpsraw %xmm1, %xmm0, %xmm0 ## EVEX TO VEX Compression encoding: [0xc5,0xf9,0xe1,0xc1] -; AVX512VL-NEXT: retl ## encoding: [0xc3] - %res = call <8 x i16> @llvm.x86.sse2.psra.w(<8 x i16> %a0, <8 x i16> %a1) ; <<8 x i16>> [#uses=1] - ret <8 x i16> %res -} -declare <8 x i16> @llvm.x86.sse2.psra.w(<8 x i16>, <8 x i16>) nounwind readnone - - -define <4 x i32> @test_x86_sse2_psrai_d(<4 x i32> %a0) { -; AVX-LABEL: test_x86_sse2_psrai_d: -; AVX: ## BB#0: -; AVX-NEXT: vpsrad $7, %xmm0, %xmm0 ## encoding: [0xc5,0xf9,0x72,0xe0,0x07] -; AVX-NEXT: retl ## encoding: [0xc3] -; -; AVX512VL-LABEL: test_x86_sse2_psrai_d: -; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vpsrad $7, %xmm0, %xmm0 ## EVEX TO VEX Compression encoding: [0xc5,0xf9,0x72,0xe0,0x07] -; AVX512VL-NEXT: retl ## encoding: [0xc3] - %res = call <4 x i32> @llvm.x86.sse2.psrai.d(<4 x i32> %a0, i32 7) ; <<4 x i32>> [#uses=1] - ret <4 x i32> %res -} -declare <4 x i32> @llvm.x86.sse2.psrai.d(<4 x i32>, i32) nounwind readnone - - -define <8 x i16> @test_x86_sse2_psrai_w(<8 x i16> %a0) { -; AVX-LABEL: test_x86_sse2_psrai_w: -; AVX: ## BB#0: -; AVX-NEXT: vpsraw $7, %xmm0, %xmm0 ## encoding: [0xc5,0xf9,0x71,0xe0,0x07] -; AVX-NEXT: retl ## encoding: [0xc3] -; -; AVX512VL-LABEL: test_x86_sse2_psrai_w: -; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vpsraw $7, %xmm0, %xmm0 ## EVEX TO VEX Compression encoding: [0xc5,0xf9,0x71,0xe0,0x07] -; AVX512VL-NEXT: retl ## encoding: [0xc3] - %res = call <8 x i16> @llvm.x86.sse2.psrai.w(<8 x i16> %a0, i32 7) ; <<8 x i16>> [#uses=1] - ret <8 x i16> %res -} -declare <8 x i16> @llvm.x86.sse2.psrai.w(<8 x i16>, i32) nounwind readnone - - -define <4 x i32> @test_x86_sse2_psrl_d(<4 x i32> %a0, <4 x i32> %a1) { -; AVX-LABEL: test_x86_sse2_psrl_d: -; AVX: ## BB#0: -; AVX-NEXT: vpsrld %xmm1, %xmm0, %xmm0 ## encoding: [0xc5,0xf9,0xd2,0xc1] -; AVX-NEXT: retl ## encoding: [0xc3] -; -; AVX512VL-LABEL: test_x86_sse2_psrl_d: -; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vpsrld %xmm1, %xmm0, %xmm0 ## EVEX TO VEX Compression encoding: [0xc5,0xf9,0xd2,0xc1] -; AVX512VL-NEXT: retl ## encoding: [0xc3] - %res = call <4 x i32> @llvm.x86.sse2.psrl.d(<4 x i32> %a0, <4 x i32> %a1) ; <<4 x i32>> [#uses=1] - ret <4 x i32> %res -} -declare <4 x i32> @llvm.x86.sse2.psrl.d(<4 x i32>, <4 x i32>) nounwind readnone - - -define <2 x i64> @test_x86_sse2_psrl_q(<2 x i64> %a0, <2 x i64> %a1) { -; AVX-LABEL: test_x86_sse2_psrl_q: -; AVX: ## BB#0: -; AVX-NEXT: vpsrlq %xmm1, %xmm0, %xmm0 ## encoding: [0xc5,0xf9,0xd3,0xc1] -; AVX-NEXT: retl ## encoding: [0xc3] -; -; AVX512VL-LABEL: test_x86_sse2_psrl_q: -; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vpsrlq %xmm1, %xmm0, %xmm0 ## EVEX TO VEX Compression encoding: [0xc5,0xf9,0xd3,0xc1] -; AVX512VL-NEXT: retl ## encoding: [0xc3] - %res = call <2 x i64> @llvm.x86.sse2.psrl.q(<2 x i64> %a0, <2 x i64> %a1) ; <<2 x i64>> [#uses=1] - ret <2 x i64> %res -} -declare <2 x i64> @llvm.x86.sse2.psrl.q(<2 x i64>, <2 x i64>) nounwind readnone - - -define <8 x i16> @test_x86_sse2_psrl_w(<8 x i16> %a0, <8 x i16> %a1) { -; AVX-LABEL: test_x86_sse2_psrl_w: -; AVX: ## BB#0: -; AVX-NEXT: vpsrlw %xmm1, %xmm0, %xmm0 ## encoding: [0xc5,0xf9,0xd1,0xc1] -; AVX-NEXT: retl ## encoding: [0xc3] -; -; AVX512VL-LABEL: test_x86_sse2_psrl_w: -; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vpsrlw %xmm1, %xmm0, %xmm0 ## EVEX TO VEX Compression encoding: [0xc5,0xf9,0xd1,0xc1] -; AVX512VL-NEXT: retl ## encoding: [0xc3] - %res = call <8 x i16> @llvm.x86.sse2.psrl.w(<8 x i16> %a0, <8 x i16> %a1) ; <<8 x i16>> [#uses=1] - ret <8 x i16> %res -} -declare <8 x i16> @llvm.x86.sse2.psrl.w(<8 x i16>, <8 x i16>) nounwind readnone - - -define <4 x i32> @test_x86_sse2_psrli_d(<4 x i32> %a0) { -; AVX-LABEL: test_x86_sse2_psrli_d: -; AVX: ## BB#0: -; AVX-NEXT: vpsrld $7, %xmm0, %xmm0 ## encoding: [0xc5,0xf9,0x72,0xd0,0x07] -; AVX-NEXT: retl ## encoding: [0xc3] -; -; AVX512VL-LABEL: test_x86_sse2_psrli_d: -; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vpsrld $7, %xmm0, %xmm0 ## EVEX TO VEX Compression encoding: [0xc5,0xf9,0x72,0xd0,0x07] -; AVX512VL-NEXT: retl ## encoding: [0xc3] - %res = call <4 x i32> @llvm.x86.sse2.psrli.d(<4 x i32> %a0, i32 7) ; <<4 x i32>> [#uses=1] - ret <4 x i32> %res -} -declare <4 x i32> @llvm.x86.sse2.psrli.d(<4 x i32>, i32) nounwind readnone - - -define <2 x i64> @test_x86_sse2_psrli_q(<2 x i64> %a0) { -; AVX-LABEL: test_x86_sse2_psrli_q: -; AVX: ## BB#0: -; AVX-NEXT: vpsrlq $7, %xmm0, %xmm0 ## encoding: [0xc5,0xf9,0x73,0xd0,0x07] -; AVX-NEXT: retl ## encoding: [0xc3] -; -; AVX512VL-LABEL: test_x86_sse2_psrli_q: -; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vpsrlq $7, %xmm0, %xmm0 ## EVEX TO VEX Compression encoding: [0xc5,0xf9,0x73,0xd0,0x07] -; AVX512VL-NEXT: retl ## encoding: [0xc3] - %res = call <2 x i64> @llvm.x86.sse2.psrli.q(<2 x i64> %a0, i32 7) ; <<2 x i64>> [#uses=1] - ret <2 x i64> %res -} -declare <2 x i64> @llvm.x86.sse2.psrli.q(<2 x i64>, i32) nounwind readnone - - -define <8 x i16> @test_x86_sse2_psrli_w(<8 x i16> %a0) { -; AVX-LABEL: test_x86_sse2_psrli_w: -; AVX: ## BB#0: -; AVX-NEXT: vpsrlw $7, %xmm0, %xmm0 ## encoding: [0xc5,0xf9,0x71,0xd0,0x07] -; AVX-NEXT: retl ## encoding: [0xc3] -; -; AVX512VL-LABEL: test_x86_sse2_psrli_w: -; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vpsrlw $7, %xmm0, %xmm0 ## EVEX TO VEX Compression encoding: [0xc5,0xf9,0x71,0xd0,0x07] -; AVX512VL-NEXT: retl ## encoding: [0xc3] - %res = call <8 x i16> @llvm.x86.sse2.psrli.w(<8 x i16> %a0, i32 7) ; <<8 x i16>> [#uses=1] - ret <8 x i16> %res -} -declare <8 x i16> @llvm.x86.sse2.psrli.w(<8 x i16>, i32) nounwind readnone - - -define <16 x i8> @test_x86_sse2_psubs_b(<16 x i8> %a0, <16 x i8> %a1) { -; AVX-LABEL: test_x86_sse2_psubs_b: -; AVX: ## BB#0: -; AVX-NEXT: vpsubsb %xmm1, %xmm0, %xmm0 ## encoding: [0xc5,0xf9,0xe8,0xc1] -; AVX-NEXT: retl ## encoding: [0xc3] -; -; AVX512VL-LABEL: test_x86_sse2_psubs_b: -; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vpsubsb %xmm1, %xmm0, %xmm0 ## EVEX TO VEX Compression encoding: [0xc5,0xf9,0xe8,0xc1] -; AVX512VL-NEXT: retl ## encoding: [0xc3] - %res = call <16 x i8> @llvm.x86.sse2.psubs.b(<16 x i8> %a0, <16 x i8> %a1) ; <<16 x i8>> [#uses=1] - ret <16 x i8> %res -} -declare <16 x i8> @llvm.x86.sse2.psubs.b(<16 x i8>, <16 x i8>) nounwind readnone - - -define <8 x i16> @test_x86_sse2_psubs_w(<8 x i16> %a0, <8 x i16> %a1) { -; AVX-LABEL: test_x86_sse2_psubs_w: -; AVX: ## BB#0: -; AVX-NEXT: vpsubsw %xmm1, %xmm0, %xmm0 ## encoding: [0xc5,0xf9,0xe9,0xc1] -; AVX-NEXT: retl ## encoding: [0xc3] -; -; AVX512VL-LABEL: test_x86_sse2_psubs_w: -; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vpsubsw %xmm1, %xmm0, %xmm0 ## EVEX TO VEX Compression encoding: [0xc5,0xf9,0xe9,0xc1] -; AVX512VL-NEXT: retl ## encoding: [0xc3] - %res = call <8 x i16> @llvm.x86.sse2.psubs.w(<8 x i16> %a0, <8 x i16> %a1) ; <<8 x i16>> [#uses=1] - ret <8 x i16> %res -} -declare <8 x i16> @llvm.x86.sse2.psubs.w(<8 x i16>, <8 x i16>) nounwind readnone - - -define <16 x i8> @test_x86_sse2_psubus_b(<16 x i8> %a0, <16 x i8> %a1) { -; AVX-LABEL: test_x86_sse2_psubus_b: -; AVX: ## BB#0: -; AVX-NEXT: vpsubusb %xmm1, %xmm0, %xmm0 ## encoding: [0xc5,0xf9,0xd8,0xc1] -; AVX-NEXT: retl ## encoding: [0xc3] -; -; AVX512VL-LABEL: test_x86_sse2_psubus_b: -; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vpsubusb %xmm1, %xmm0, %xmm0 ## EVEX TO VEX Compression encoding: [0xc5,0xf9,0xd8,0xc1] -; AVX512VL-NEXT: retl ## encoding: [0xc3] - %res = call <16 x i8> @llvm.x86.sse2.psubus.b(<16 x i8> %a0, <16 x i8> %a1) ; <<16 x i8>> [#uses=1] - ret <16 x i8> %res -} -declare <16 x i8> @llvm.x86.sse2.psubus.b(<16 x i8>, <16 x i8>) nounwind readnone - - -define <8 x i16> @test_x86_sse2_psubus_w(<8 x i16> %a0, <8 x i16> %a1) { -; AVX-LABEL: test_x86_sse2_psubus_w: -; AVX: ## BB#0: -; AVX-NEXT: vpsubusw %xmm1, %xmm0, %xmm0 ## encoding: [0xc5,0xf9,0xd9,0xc1] -; AVX-NEXT: retl ## encoding: [0xc3] -; -; AVX512VL-LABEL: test_x86_sse2_psubus_w: -; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vpsubusw %xmm1, %xmm0, %xmm0 ## EVEX TO VEX Compression encoding: [0xc5,0xf9,0xd9,0xc1] -; AVX512VL-NEXT: retl ## encoding: [0xc3] - %res = call <8 x i16> @llvm.x86.sse2.psubus.w(<8 x i16> %a0, <8 x i16> %a1) ; <<8 x i16>> [#uses=1] - ret <8 x i16> %res -} -declare <8 x i16> @llvm.x86.sse2.psubus.w(<8 x i16>, <8 x i16>) nounwind readnone - - -define <2 x double> @test_x86_sse2_sqrt_pd(<2 x double> %a0) { -; CHECK-LABEL: test_x86_sse2_sqrt_pd: -; CHECK: ## BB#0: -; CHECK-NEXT: vsqrtpd %xmm0, %xmm0 ## encoding: [0xc5,0xf9,0x51,0xc0] -; CHECK-NEXT: retl ## encoding: [0xc3] - %res = call <2 x double> @llvm.x86.sse2.sqrt.pd(<2 x double> %a0) ; <<2 x double>> [#uses=1] - ret <2 x double> %res -} -declare <2 x double> @llvm.x86.sse2.sqrt.pd(<2 x double>) nounwind readnone - - -define <2 x double> @test_x86_sse2_sqrt_sd(<2 x double> %a0) { -; CHECK-LABEL: test_x86_sse2_sqrt_sd: -; CHECK: ## BB#0: -; CHECK-NEXT: vsqrtsd %xmm0, %xmm0, %xmm0 ## encoding: [0xc5,0xfb,0x51,0xc0] -; CHECK-NEXT: retl ## encoding: [0xc3] - %res = call <2 x double> @llvm.x86.sse2.sqrt.sd(<2 x double> %a0) ; <<2 x double>> [#uses=1] - ret <2 x double> %res -} -declare <2 x double> @llvm.x86.sse2.sqrt.sd(<2 x double>) nounwind readnone - - -define i32 @test_x86_sse2_ucomieq_sd(<2 x double> %a0, <2 x double> %a1) { -; AVX-LABEL: test_x86_sse2_ucomieq_sd: -; AVX: ## BB#0: -; AVX-NEXT: vucomisd %xmm1, %xmm0 ## encoding: [0xc5,0xf9,0x2e,0xc1] -; AVX-NEXT: setnp %al ## encoding: [0x0f,0x9b,0xc0] -; AVX-NEXT: sete %cl ## encoding: [0x0f,0x94,0xc1] -; AVX-NEXT: andb %al, %cl ## encoding: [0x20,0xc1] -; AVX-NEXT: movzbl %cl, %eax ## encoding: [0x0f,0xb6,0xc1] -; AVX-NEXT: retl ## encoding: [0xc3] -; -; AVX512VL-LABEL: test_x86_sse2_ucomieq_sd: -; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vucomisd %xmm1, %xmm0 ## EVEX TO VEX Compression encoding: [0xc5,0xf9,0x2e,0xc1] -; AVX512VL-NEXT: setnp %al ## encoding: [0x0f,0x9b,0xc0] -; AVX512VL-NEXT: sete %cl ## encoding: [0x0f,0x94,0xc1] -; AVX512VL-NEXT: andb %al, %cl ## encoding: [0x20,0xc1] -; AVX512VL-NEXT: movzbl %cl, %eax ## encoding: [0x0f,0xb6,0xc1] -; AVX512VL-NEXT: retl ## encoding: [0xc3] - %res = call i32 @llvm.x86.sse2.ucomieq.sd(<2 x double> %a0, <2 x double> %a1) ; [#uses=1] - ret i32 %res -} -declare i32 @llvm.x86.sse2.ucomieq.sd(<2 x double>, <2 x double>) nounwind readnone - - -define i32 @test_x86_sse2_ucomige_sd(<2 x double> %a0, <2 x double> %a1) { -; AVX-LABEL: test_x86_sse2_ucomige_sd: -; AVX: ## BB#0: -; AVX-NEXT: xorl %eax, %eax ## encoding: [0x31,0xc0] -; AVX-NEXT: vucomisd %xmm1, %xmm0 ## encoding: [0xc5,0xf9,0x2e,0xc1] -; AVX-NEXT: setae %al ## encoding: [0x0f,0x93,0xc0] -; AVX-NEXT: retl ## encoding: [0xc3] -; -; AVX512VL-LABEL: test_x86_sse2_ucomige_sd: -; AVX512VL: ## BB#0: -; AVX512VL-NEXT: xorl %eax, %eax ## encoding: [0x31,0xc0] -; AVX512VL-NEXT: vucomisd %xmm1, %xmm0 ## EVEX TO VEX Compression encoding: [0xc5,0xf9,0x2e,0xc1] -; AVX512VL-NEXT: setae %al ## encoding: [0x0f,0x93,0xc0] -; AVX512VL-NEXT: retl ## encoding: [0xc3] - %res = call i32 @llvm.x86.sse2.ucomige.sd(<2 x double> %a0, <2 x double> %a1) ; [#uses=1] - ret i32 %res -} -declare i32 @llvm.x86.sse2.ucomige.sd(<2 x double>, <2 x double>) nounwind readnone - - -define i32 @test_x86_sse2_ucomigt_sd(<2 x double> %a0, <2 x double> %a1) { -; AVX-LABEL: test_x86_sse2_ucomigt_sd: -; AVX: ## BB#0: -; AVX-NEXT: xorl %eax, %eax ## encoding: [0x31,0xc0] -; AVX-NEXT: vucomisd %xmm1, %xmm0 ## encoding: [0xc5,0xf9,0x2e,0xc1] -; AVX-NEXT: seta %al ## encoding: [0x0f,0x97,0xc0] -; AVX-NEXT: retl ## encoding: [0xc3] -; -; AVX512VL-LABEL: test_x86_sse2_ucomigt_sd: -; AVX512VL: ## BB#0: -; AVX512VL-NEXT: xorl %eax, %eax ## encoding: [0x31,0xc0] -; AVX512VL-NEXT: vucomisd %xmm1, %xmm0 ## EVEX TO VEX Compression encoding: [0xc5,0xf9,0x2e,0xc1] -; AVX512VL-NEXT: seta %al ## encoding: [0x0f,0x97,0xc0] -; AVX512VL-NEXT: retl ## encoding: [0xc3] - %res = call i32 @llvm.x86.sse2.ucomigt.sd(<2 x double> %a0, <2 x double> %a1) ; [#uses=1] - ret i32 %res -} -declare i32 @llvm.x86.sse2.ucomigt.sd(<2 x double>, <2 x double>) nounwind readnone - - -define i32 @test_x86_sse2_ucomile_sd(<2 x double> %a0, <2 x double> %a1) { -; AVX-LABEL: test_x86_sse2_ucomile_sd: -; AVX: ## BB#0: -; AVX-NEXT: xorl %eax, %eax ## encoding: [0x31,0xc0] -; AVX-NEXT: vucomisd %xmm0, %xmm1 ## encoding: [0xc5,0xf9,0x2e,0xc8] -; AVX-NEXT: setae %al ## encoding: [0x0f,0x93,0xc0] -; AVX-NEXT: retl ## encoding: [0xc3] -; -; AVX512VL-LABEL: test_x86_sse2_ucomile_sd: -; AVX512VL: ## BB#0: -; AVX512VL-NEXT: xorl %eax, %eax ## encoding: [0x31,0xc0] -; AVX512VL-NEXT: vucomisd %xmm0, %xmm1 ## EVEX TO VEX Compression encoding: [0xc5,0xf9,0x2e,0xc8] -; AVX512VL-NEXT: setae %al ## encoding: [0x0f,0x93,0xc0] -; AVX512VL-NEXT: retl ## encoding: [0xc3] - %res = call i32 @llvm.x86.sse2.ucomile.sd(<2 x double> %a0, <2 x double> %a1) ; [#uses=1] - ret i32 %res -} -declare i32 @llvm.x86.sse2.ucomile.sd(<2 x double>, <2 x double>) nounwind readnone - - -define i32 @test_x86_sse2_ucomilt_sd(<2 x double> %a0, <2 x double> %a1) { -; AVX-LABEL: test_x86_sse2_ucomilt_sd: -; AVX: ## BB#0: -; AVX-NEXT: xorl %eax, %eax ## encoding: [0x31,0xc0] -; AVX-NEXT: vucomisd %xmm0, %xmm1 ## encoding: [0xc5,0xf9,0x2e,0xc8] -; AVX-NEXT: seta %al ## encoding: [0x0f,0x97,0xc0] -; AVX-NEXT: retl ## encoding: [0xc3] -; -; AVX512VL-LABEL: test_x86_sse2_ucomilt_sd: -; AVX512VL: ## BB#0: -; AVX512VL-NEXT: xorl %eax, %eax ## encoding: [0x31,0xc0] -; AVX512VL-NEXT: vucomisd %xmm0, %xmm1 ## EVEX TO VEX Compression encoding: [0xc5,0xf9,0x2e,0xc8] -; AVX512VL-NEXT: seta %al ## encoding: [0x0f,0x97,0xc0] -; AVX512VL-NEXT: retl ## encoding: [0xc3] - %res = call i32 @llvm.x86.sse2.ucomilt.sd(<2 x double> %a0, <2 x double> %a1) ; [#uses=1] - ret i32 %res -} -declare i32 @llvm.x86.sse2.ucomilt.sd(<2 x double>, <2 x double>) nounwind readnone - - -define i32 @test_x86_sse2_ucomineq_sd(<2 x double> %a0, <2 x double> %a1) { -; AVX-LABEL: test_x86_sse2_ucomineq_sd: -; AVX: ## BB#0: -; AVX-NEXT: vucomisd %xmm1, %xmm0 ## encoding: [0xc5,0xf9,0x2e,0xc1] -; AVX-NEXT: setp %al ## encoding: [0x0f,0x9a,0xc0] -; AVX-NEXT: setne %cl ## encoding: [0x0f,0x95,0xc1] -; AVX-NEXT: orb %al, %cl ## encoding: [0x08,0xc1] -; AVX-NEXT: movzbl %cl, %eax ## encoding: [0x0f,0xb6,0xc1] -; AVX-NEXT: retl ## encoding: [0xc3] -; -; AVX512VL-LABEL: test_x86_sse2_ucomineq_sd: -; AVX512VL: ## BB#0: -; AVX512VL-NEXT: vucomisd %xmm1, %xmm0 ## EVEX TO VEX Compression encoding: [0xc5,0xf9,0x2e,0xc1] -; AVX512VL-NEXT: setp %al ## encoding: [0x0f,0x9a,0xc0] -; AVX512VL-NEXT: setne %cl ## encoding: [0x0f,0x95,0xc1] -; AVX512VL-NEXT: orb %al, %cl ## encoding: [0x08,0xc1] -; AVX512VL-NEXT: movzbl %cl, %eax ## encoding: [0x0f,0xb6,0xc1] -; AVX512VL-NEXT: retl ## encoding: [0xc3] - %res = call i32 @llvm.x86.sse2.ucomineq.sd(<2 x double> %a0, <2 x double> %a1) ; [#uses=1] - ret i32 %res -} -declare i32 @llvm.x86.sse2.ucomineq.sd(<2 x double>, <2 x double>) nounwind readnone - define <2 x double> @test_x86_sse3_addsub_pd(<2 x double> %a0, <2 x double> %a1) { ; CHECK-LABEL: test_x86_sse3_addsub_pd: @@ -3165,37 +2018,6 @@ define void @mwait(i32 %E, i32 %H) nounwind { } declare void @llvm.x86.sse3.mwait(i32, i32) nounwind -define void @lfence() nounwind { -; CHECK-LABEL: lfence: -; CHECK: ## BB#0: -; CHECK-NEXT: lfence ## encoding: [0x0f,0xae,0xe8] -; CHECK-NEXT: retl ## encoding: [0xc3] - tail call void @llvm.x86.sse2.lfence() - ret void -} -declare void @llvm.x86.sse2.lfence() nounwind - -define void @mfence() nounwind { -; CHECK-LABEL: mfence: -; CHECK: ## BB#0: -; CHECK-NEXT: mfence ## encoding: [0x0f,0xae,0xf0] -; CHECK-NEXT: retl ## encoding: [0xc3] - tail call void @llvm.x86.sse2.mfence() - ret void -} -declare void @llvm.x86.sse2.mfence() nounwind - -define void @clflush(i8* %p) nounwind { -; CHECK-LABEL: clflush: -; CHECK: ## BB#0: -; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x04] -; CHECK-NEXT: clflush (%eax) ## encoding: [0x0f,0xae,0x38] -; CHECK-NEXT: retl ## encoding: [0xc3] - tail call void @llvm.x86.sse2.clflush(i8* %p) - ret void -} -declare void @llvm.x86.sse2.clflush(i8*) nounwind - define i32 @crc32_32_8(i32 %a, i8 %b) nounwind { ; CHECK-LABEL: crc32_32_8: ; CHECK: ## BB#0: @@ -3233,8 +2055,8 @@ define void @movnt_dq(i8* %p, <2 x i64> %a1) nounwind { ; AVX-LABEL: movnt_dq: ; AVX: ## BB#0: ; AVX-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x04] -; AVX-NEXT: vpaddq LCPI216_0, %xmm0, %xmm0 ## encoding: [0xc5,0xf9,0xd4,0x05,A,A,A,A] -; AVX-NEXT: ## fixup A - offset: 4, value: LCPI216_0, kind: FK_Data_4 +; AVX-NEXT: vpaddq LCPI142_0, %xmm0, %xmm0 ## encoding: [0xc5,0xf9,0xd4,0x05,A,A,A,A] +; AVX-NEXT: ## fixup A - offset: 4, value: LCPI142_0, kind: FK_Data_4 ; AVX-NEXT: vmovntdq %ymm0, (%eax) ## encoding: [0xc5,0xfd,0xe7,0x00] ; AVX-NEXT: vzeroupper ## encoding: [0xc5,0xf8,0x77] ; AVX-NEXT: retl ## encoding: [0xc3] @@ -3242,8 +2064,8 @@ define void @movnt_dq(i8* %p, <2 x i64> %a1) nounwind { ; AVX512VL-LABEL: movnt_dq: ; AVX512VL: ## BB#0: ; AVX512VL-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x04] -; AVX512VL-NEXT: vpaddq LCPI216_0, %xmm0, %xmm0 ## EVEX TO VEX Compression encoding: [0xc5,0xf9,0xd4,0x05,A,A,A,A] -; AVX512VL-NEXT: ## fixup A - offset: 4, value: LCPI216_0, kind: FK_Data_4 +; AVX512VL-NEXT: vpaddq LCPI142_0, %xmm0, %xmm0 ## EVEX TO VEX Compression encoding: [0xc5,0xf9,0xd4,0x05,A,A,A,A] +; AVX512VL-NEXT: ## fixup A - offset: 4, value: LCPI142_0, kind: FK_Data_4 ; AVX512VL-NEXT: vmovntdq %ymm0, (%eax) ## EVEX TO VEX Compression encoding: [0xc5,0xfd,0xe7,0x00] ; AVX512VL-NEXT: retl ## encoding: [0xc3] %a2 = add <2 x i64> %a1, diff --git a/test/CodeGen/X86/avx-intrinsics-x86_64.ll b/test/CodeGen/X86/avx-intrinsics-x86_64.ll index fca59f371ef..909c69cb9a1 100644 --- a/test/CodeGen/X86/avx-intrinsics-x86_64.ll +++ b/test/CodeGen/X86/avx-intrinsics-x86_64.ll @@ -2,39 +2,6 @@ ; RUN: llc < %s -mtriple=x86_64-apple-darwin -march=x86-64 -mcpu=corei7 -mattr=avx | FileCheck %s --check-prefix=CHECK --check-prefix=AVX ; RUN: llc < %s -mtriple=x86_64-apple-darwin -march=x86-64 -mcpu=corei7 -mattr=avx512vl | FileCheck %s --check-prefix=CHECK --check-prefix=AVX512VL -define i64 @test_x86_sse2_cvtsd2si64(<2 x double> %a0) { -; CHECK-LABEL: test_x86_sse2_cvtsd2si64: -; CHECK: ## BB#0: -; CHECK-NEXT: vcvtsd2si %xmm0, %rax -; CHECK-NEXT: retq - %res = call i64 @llvm.x86.sse2.cvtsd2si64(<2 x double> %a0) ; [#uses=1] - ret i64 %res -} -declare i64 @llvm.x86.sse2.cvtsd2si64(<2 x double>) nounwind readnone - - -define <2 x double> @test_x86_sse2_cvtsi642sd(<2 x double> %a0, i64 %a1) { -; CHECK-LABEL: test_x86_sse2_cvtsi642sd: -; CHECK: ## BB#0: -; CHECK-NEXT: vcvtsi2sdq %rdi, %xmm0, %xmm0 -; CHECK-NEXT: retq - %res = call <2 x double> @llvm.x86.sse2.cvtsi642sd(<2 x double> %a0, i64 %a1) ; <<2 x double>> [#uses=1] - ret <2 x double> %res -} -declare <2 x double> @llvm.x86.sse2.cvtsi642sd(<2 x double>, i64) nounwind readnone - - -define i64 @test_x86_sse2_cvttsd2si64(<2 x double> %a0) { -; CHECK-LABEL: test_x86_sse2_cvttsd2si64: -; CHECK: ## BB#0: -; CHECK-NEXT: vcvttsd2si %xmm0, %rax -; CHECK-NEXT: retq - %res = call i64 @llvm.x86.sse2.cvttsd2si64(<2 x double> %a0) ; [#uses=1] - ret i64 %res -} -declare i64 @llvm.x86.sse2.cvttsd2si64(<2 x double>) nounwind readnone - - define <4 x double> @test_x86_avx_vzeroall(<4 x double> %a, <4 x double> %b) { ; AVX-LABEL: test_x86_avx_vzeroall: ; AVX: ## BB#0: diff --git a/test/CodeGen/X86/lfence.ll b/test/CodeGen/X86/lfence.ll deleted file mode 100644 index 1903a1e31b5..00000000000 --- a/test/CodeGen/X86/lfence.ll +++ /dev/null @@ -1,8 +0,0 @@ -; RUN: llc < %s -march=x86 -mattr=+sse2 | grep lfence - -declare void @llvm.x86.sse2.lfence() nounwind - -define void @test() { - call void @llvm.x86.sse2.lfence() - ret void -} diff --git a/test/CodeGen/X86/sse2-intrinsics-x86.ll b/test/CodeGen/X86/sse2-intrinsics-x86.ll index a93ffc6655b..ec1219a6891 100644 --- a/test/CodeGen/X86/sse2-intrinsics-x86.ll +++ b/test/CodeGen/X86/sse2-intrinsics-x86.ll @@ -1712,3 +1712,34 @@ define void @test_x86_sse2_pause() { ret void } declare void @llvm.x86.sse2.pause() nounwind + +define void @lfence() nounwind { +; CHECK-LABEL: lfence: +; CHECK: ## BB#0: +; CHECK-NEXT: lfence ## encoding: [0x0f,0xae,0xe8] +; CHECK-NEXT: retl ## encoding: [0xc3] + tail call void @llvm.x86.sse2.lfence() + ret void +} +declare void @llvm.x86.sse2.lfence() nounwind + +define void @mfence() nounwind { +; CHECK-LABEL: mfence: +; CHECK: ## BB#0: +; CHECK-NEXT: mfence ## encoding: [0x0f,0xae,0xf0] +; CHECK-NEXT: retl ## encoding: [0xc3] + tail call void @llvm.x86.sse2.mfence() + ret void +} +declare void @llvm.x86.sse2.mfence() nounwind + +define void @clflush(i8* %p) nounwind { +; CHECK-LABEL: clflush: +; CHECK: ## BB#0: +; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax ## encoding: [0x8b,0x44,0x24,0x04] +; CHECK-NEXT: clflush (%eax) ## encoding: [0x0f,0xae,0x38] +; CHECK-NEXT: retl ## encoding: [0xc3] + tail call void @llvm.x86.sse2.clflush(i8* %p) + ret void +} +declare void @llvm.x86.sse2.clflush(i8*) nounwind diff --git a/test/CodeGen/X86/sse2-intrinsics-x86_64.ll b/test/CodeGen/X86/sse2-intrinsics-x86_64.ll new file mode 100644 index 00000000000..8f51506d738 --- /dev/null +++ b/test/CodeGen/X86/sse2-intrinsics-x86_64.ll @@ -0,0 +1,78 @@ +; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py +; RUN: llc < %s -disable-peephole -mtriple=x86_64-apple-darwin -mattr=-avx,+sse2 -show-mc-encoding | FileCheck %s --check-prefix=SSE +; RUN: llc < %s -disable-peephole -mtriple=x86_64-apple-darwin -mattr=+avx2 -show-mc-encoding | FileCheck %s --check-prefix=VCHECK --check-prefix=AVX2 +; RUN: llc < %s -disable-peephole -mtriple=x86_64-apple-darwin -mcpu=skx -show-mc-encoding | FileCheck %s --check-prefix=VCHECK --check-prefix=SKX + +define i64 @test_x86_sse2_cvtsd2si64(<2 x double> %a0) { +; CHECK-LABEL: test_x86_sse2_cvtsd2si64: +; CHECK: ## BB#0: +; CHECK-NEXT: vcvtsd2si %xmm0, %rax +; CHECK-NEXT: retq +; SSE-LABEL: test_x86_sse2_cvtsd2si64: +; SSE: ## BB#0: +; SSE-NEXT: cvtsd2si %xmm0, %rax ## encoding: [0xf2,0x48,0x0f,0x2d,0xc0] +; SSE-NEXT: retq ## encoding: [0xc3] +; +; AVX2-LABEL: test_x86_sse2_cvtsd2si64: +; AVX2: ## BB#0: +; AVX2-NEXT: vcvtsd2si %xmm0, %rax ## encoding: [0xc4,0xe1,0xfb,0x2d,0xc0] +; AVX2-NEXT: retq ## encoding: [0xc3] +; +; SKX-LABEL: test_x86_sse2_cvtsd2si64: +; SKX: ## BB#0: +; SKX-NEXT: vcvtsd2si %xmm0, %rax ## EVEX TO VEX Compression encoding: [0xc4,0xe1,0xfb,0x2d,0xc0] +; SKX-NEXT: retq ## encoding: [0xc3] + %res = call i64 @llvm.x86.sse2.cvtsd2si64(<2 x double> %a0) ; [#uses=1] + ret i64 %res +} +declare i64 @llvm.x86.sse2.cvtsd2si64(<2 x double>) nounwind readnone + + +define <2 x double> @test_x86_sse2_cvtsi642sd(<2 x double> %a0, i64 %a1) { +; CHECK-LABEL: test_x86_sse2_cvtsi642sd: +; CHECK: ## BB#0: +; CHECK-NEXT: vcvtsi2sdq %rdi, %xmm0, %xmm0 +; CHECK-NEXT: retq +; SSE-LABEL: test_x86_sse2_cvtsi642sd: +; SSE: ## BB#0: +; SSE-NEXT: cvtsi2sdq %rdi, %xmm0 ## encoding: [0xf2,0x48,0x0f,0x2a,0xc7] +; SSE-NEXT: retq ## encoding: [0xc3] +; +; AVX2-LABEL: test_x86_sse2_cvtsi642sd: +; AVX2: ## BB#0: +; AVX2-NEXT: vcvtsi2sdq %rdi, %xmm0, %xmm0 ## encoding: [0xc4,0xe1,0xfb,0x2a,0xc7] +; AVX2-NEXT: retq ## encoding: [0xc3] +; +; SKX-LABEL: test_x86_sse2_cvtsi642sd: +; SKX: ## BB#0: +; SKX-NEXT: vcvtsi2sdq %rdi, %xmm0, %xmm0 ## encoding: [0x62,0xf1,0xff,0x08,0x2a,0xc7] +; SKX-NEXT: retq ## encoding: [0xc3] + %res = call <2 x double> @llvm.x86.sse2.cvtsi642sd(<2 x double> %a0, i64 %a1) ; <<2 x double>> [#uses=1] + ret <2 x double> %res +} +declare <2 x double> @llvm.x86.sse2.cvtsi642sd(<2 x double>, i64) nounwind readnone + + +define i64 @test_x86_sse2_cvttsd2si64(<2 x double> %a0) { +; CHECK-LABEL: test_x86_sse2_cvttsd2si64: +; CHECK: ## BB#0: +; CHECK-NEXT: vcvttsd2si %xmm0, %rax +; CHECK-NEXT: retq +; SSE-LABEL: test_x86_sse2_cvttsd2si64: +; SSE: ## BB#0: +; SSE-NEXT: cvttsd2si %xmm0, %rax ## encoding: [0xf2,0x48,0x0f,0x2c,0xc0] +; SSE-NEXT: retq ## encoding: [0xc3] +; +; AVX2-LABEL: test_x86_sse2_cvttsd2si64: +; AVX2: ## BB#0: +; AVX2-NEXT: vcvttsd2si %xmm0, %rax ## encoding: [0xc4,0xe1,0xfb,0x2c,0xc0] +; AVX2-NEXT: retq ## encoding: [0xc3] +; +; SKX-LABEL: test_x86_sse2_cvttsd2si64: +; SKX: ## BB#0: +; SKX-NEXT: vcvttsd2si %xmm0, %rax ## EVEX TO VEX Compression encoding: [0xc4,0xe1,0xfb,0x2c,0xc0] +; SKX-NEXT: retq ## encoding: [0xc3] + %res = call i64 @llvm.x86.sse2.cvttsd2si64(<2 x double> %a0) ; [#uses=1] + ret i64 %res +} +declare i64 @llvm.x86.sse2.cvttsd2si64(<2 x double>) nounwind readnone -- 2.11.0