From 4509ec42b88e9220f61bca5654411e65368ac53a Mon Sep 17 00:00:00 2001 From: Rafael Espindola Date: Sun, 12 Jun 2011 03:20:32 +0000 Subject: [PATCH] AnalyzeBranch doesn't change which successors a bb has, just the order we try to branch to them. Before we were creating successor lists with duplicated entries. Fixing that found a bug in isBlockOnlyReachableByFallthrough that would causes it to return the wrong answer for ----------- ... jne foo jmp bar foo: ---------- git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132882 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/CodeGen/AsmPrinter/AsmPrinter.cpp | 15 +++++++++++---- lib/Target/X86/X86InstrInfo.cpp | 1 - test/CodeGen/Thumb2/machine-licm.ll | 4 ++-- 3 files changed, 13 insertions(+), 7 deletions(-) diff --git a/lib/CodeGen/AsmPrinter/AsmPrinter.cpp b/lib/CodeGen/AsmPrinter/AsmPrinter.cpp index 161afbafb57..1fd724f9ca7 100644 --- a/lib/CodeGen/AsmPrinter/AsmPrinter.cpp +++ b/lib/CodeGen/AsmPrinter/AsmPrinter.cpp @@ -1925,7 +1925,7 @@ isBlockOnlyReachableByFallthrough(const MachineBasicBlock *MBB) const { return false; // The predecessor has to be immediately before this block. - const MachineBasicBlock *Pred = *PI; + MachineBasicBlock *Pred = *PI; if (!Pred->isLayoutSuccessor(MBB)) return false; @@ -1934,9 +1934,16 @@ isBlockOnlyReachableByFallthrough(const MachineBasicBlock *MBB) const { if (Pred->empty()) return true; - // Otherwise, check the last instruction. - const MachineInstr &LastInst = Pred->back(); - return !LastInst.getDesc().isBarrier(); + // Otherwise, ask the backend. + const TargetInstrInfo *TII = MF->getTarget().getInstrInfo(); + MachineBasicBlock *PredTBB = NULL, *PredFBB = NULL; + SmallVector PredCond; + if (TII->AnalyzeBranch(*Pred, PredTBB, PredFBB, PredCond)) + return false; + + if (PredCond.empty()) + return true; + return !PredFBB || PredFBB == MBB; } diff --git a/lib/Target/X86/X86InstrInfo.cpp b/lib/Target/X86/X86InstrInfo.cpp index e2016eb2d6f..b3237d5971f 100644 --- a/lib/Target/X86/X86InstrInfo.cpp +++ b/lib/Target/X86/X86InstrInfo.cpp @@ -1789,7 +1789,6 @@ bool X86InstrInfo::AnalyzeBranch(MachineBasicBlock &MBB, .addMBB(UnCondBrIter->getOperand(0).getMBB()); BuildMI(MBB, UnCondBrIter, MBB.findDebugLoc(I), get(X86::JMP_4)) .addMBB(TargetBB); - MBB.addSuccessor(TargetBB); OldInst->eraseFromParent(); UnCondBrIter->eraseFromParent(); diff --git a/test/CodeGen/Thumb2/machine-licm.ll b/test/CodeGen/Thumb2/machine-licm.ll index ee054a165a0..2468aa6cab8 100644 --- a/test/CodeGen/Thumb2/machine-licm.ll +++ b/test/CodeGen/Thumb2/machine-licm.ll @@ -13,7 +13,7 @@ entry: br i1 %0, label %return, label %bb.nph bb.nph: ; preds = %entry -; CHECK: BB#1 +; CHECK: LBB0_1: ; CHECK: movw r[[R2:[0-9]+]], :lower16:L_GV$non_lazy_ptr ; CHECK: movt r[[R2]], :upper16:L_GV$non_lazy_ptr ; CHECK: ldr{{(.w)?}} r[[R2b:[0-9]+]], [r[[R2]] @@ -21,7 +21,7 @@ bb.nph: ; preds = %entry ; CHECK: LBB0_2 ; CHECK-NOT: LCPI0_0: -; PIC: BB#1 +; PIC: LBB0_1: ; PIC: movw r[[R2:[0-9]+]], :lower16:(L_GV$non_lazy_ptr-(LPC0_0+4)) ; PIC: movt r[[R2]], :upper16:(L_GV$non_lazy_ptr-(LPC0_0+4)) ; PIC: add r[[R2]], pc -- 2.11.0