From 451e99bae63bc3f06e3b01e8d32a7ec1416b3d2f Mon Sep 17 00:00:00 2001 From: Isaac Chen Date: Mon, 26 Jun 2017 20:23:26 +0800 Subject: [PATCH] Build support for 32-bit armv8-a The assembly in arm's generic strlen implementation contains deprecated instruction sequence: it eq ; start of IT block ldreq ... ; 32-bit T32 insruction in IT block deprecated in armv8 This will cause compiler error because of -Winline-asm and -Werror. The fix here is to change the sequence: it eq ldreq ... bne 1f to equivalent sequence: bne 1f ldr ... The resulted sequence is (1 instruction) shorter. See ARM for ARMv8 for details: F6.2 Partial Deprecation of IT ... All uses of IT that apply to instructions other than a single subsequent 16-bit instruction from a restricted set are deprecated, ... Bug: 62895439 Test: "bionic-unit-tests-static --gtest_filter=*strlen*" on Nexus 4 (krait), emulator (armv7), and sailfish (armv8). The test binary for the first 2 is built with armv7-a as its TARGET_CPU_ARCH; The test binary for the last is built with armv8-a as its TARGET_2ND_CPU_ARCH. TARGET(_2ND)_CPU_VARIANTs of both binaries are set to "generic". Change-Id: Ia2208b4e2ba2cad589975bc7b4617688cbb8826a Merged-Id: Ia2208b4e2ba2cad589975bc7b4617688cbb8826a (cherry picked from commit d544fb7da025b805b6e9dd61c4bfabb9272271b2) --- libc/arch-arm/generic/bionic/strlen.c | 29 +++++++++++------------------ 1 file changed, 11 insertions(+), 18 deletions(-) diff --git a/libc/arch-arm/generic/bionic/strlen.c b/libc/arch-arm/generic/bionic/strlen.c index f6b920937..dccd56448 100644 --- a/libc/arch-arm/generic/bionic/strlen.c +++ b/libc/arch-arm/generic/bionic/strlen.c @@ -67,53 +67,46 @@ size_t strlen(const char *s) __overloadable "sub %[t], %[v], %[mask], lsr #7\n" "and %[t], %[t], %[mask] \n" "bics %[t], %[t], %[v] \n" - "it eq \n" - "ldreq %[v], [%[s]], #4 \n" -#if !defined(__OPTIMIZE_SIZE__) "bne 1f \n" + "ldr %[v], [%[s]], #4 \n" +#if !defined(__OPTIMIZE_SIZE__) "sub %[t], %[v], %[mask], lsr #7\n" "and %[t], %[t], %[mask] \n" "bics %[t], %[t], %[v] \n" - "it eq \n" - "ldreq %[v], [%[s]], #4 \n" "bne 1f \n" + "ldr %[v], [%[s]], #4 \n" "sub %[t], %[v], %[mask], lsr #7\n" "and %[t], %[t], %[mask] \n" "bics %[t], %[t], %[v] \n" - "it eq \n" - "ldreq %[v], [%[s]], #4 \n" "bne 1f \n" + "ldr %[v], [%[s]], #4 \n" "sub %[t], %[v], %[mask], lsr #7\n" "and %[t], %[t], %[mask] \n" "bics %[t], %[t], %[v] \n" - "it eq \n" - "ldreq %[v], [%[s]], #4 \n" "bne 1f \n" + "ldr %[v], [%[s]], #4 \n" "sub %[t], %[v], %[mask], lsr #7\n" "and %[t], %[t], %[mask] \n" "bics %[t], %[t], %[v] \n" - "it eq \n" - "ldreq %[v], [%[s]], #4 \n" "bne 1f \n" + "ldr %[v], [%[s]], #4 \n" "sub %[t], %[v], %[mask], lsr #7\n" "and %[t], %[t], %[mask] \n" "bics %[t], %[t], %[v] \n" - "it eq \n" - "ldreq %[v], [%[s]], #4 \n" "bne 1f \n" + "ldr %[v], [%[s]], #4 \n" "sub %[t], %[v], %[mask], lsr #7\n" "and %[t], %[t], %[mask] \n" "bics %[t], %[t], %[v] \n" - "it eq \n" - "ldreq %[v], [%[s]], #4 \n" "bne 1f \n" + "ldr %[v], [%[s]], #4 \n" "sub %[t], %[v], %[mask], lsr #7\n" "and %[t], %[t], %[mask] \n" "bics %[t], %[t], %[v] \n" - "it eq \n" - "ldreq %[v], [%[s]], #4 \n" + "bne 1f \n" + "ldr %[v], [%[s]], #4 \n" #endif - "beq 0b \n" + "b 0b \n" "1: \n" "add %[l], %[l], %[s] \n" "tst %[v], #0xFF \n" -- 2.11.0