From 4ca01b3dd2412cf8ee08cb32c6a55fd6c7722f58 Mon Sep 17 00:00:00 2001 From: "J.T. Conklin" Date: Wed, 3 May 2000 22:19:45 +0000 Subject: [PATCH] * ppc.h (PPC_OPCODE_ALTIVEC): New opcode flag for vector unit. (PPC_OPERAND_VR): New operand flag for vector registers. --- include/opcode/ChangeLog | 5 +++++ include/opcode/ppc.h | 8 ++++++++ 2 files changed, 13 insertions(+) diff --git a/include/opcode/ChangeLog b/include/opcode/ChangeLog index 5b1e41e0fd..c47ded66ad 100644 --- a/include/opcode/ChangeLog +++ b/include/opcode/ChangeLog @@ -1,3 +1,8 @@ +2000-05-03 J.T. Conklin + + * ppc.h (PPC_OPCODE_ALTIVEC): New opcode flag for vector unit. + (PPC_OPERAND_VR): New operand flag for vector registers. + 2000-05-01 Kazu Hirata * h8300.h (EOP): Add missing initializer. diff --git a/include/opcode/ppc.h b/include/opcode/ppc.h index 974f0dfa56..246e3c7768 100644 --- a/include/opcode/ppc.h +++ b/include/opcode/ppc.h @@ -88,6 +88,9 @@ extern const int powerpc_num_opcodes; /* Opcode is supported as part of the 64-bit bridge. */ #define PPC_OPCODE_64_BRIDGE (0400) +/* Opcode is supported by Altivec Vector Unit */ +#define PPC_OPCODE_ALTIVEC (01000) + /* A macro to extract the major opcode from an instruction. */ #define PPC_OP(i) (((i) >> 26) & 0x3f) @@ -221,6 +224,11 @@ extern const struct powerpc_operand powerpc_operands[]; number is allowed). This flag will only be set for a signed operand. */ #define PPC_OPERAND_NEGATIVE (04000) + +/* This operand names a vector unit register. The disassembler + prints these with a leading 'v'. */ +#define PPC_OPERAND_VR (010000) + /* The POWER and PowerPC assemblers use a few macros. We keep them with the operands table for simplicity. The macro table is an -- 2.11.0