From 4d0e05eb2a611eef83609678de27f45a9a3ad806 Mon Sep 17 00:00:00 2001 From: Hawking Zhang Date: Sat, 27 May 2017 14:49:19 +0800 Subject: [PATCH] tests/amdgpu: bypass VCE tests on raven raven doesn't support VCE Signed-off-by: Hawking Zhang Reviewed-by: Xiaojie Yuan Signed-off-by: Alex Deucher --- tests/amdgpu/vce_tests.c | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) diff --git a/tests/amdgpu/vce_tests.c b/tests/amdgpu/vce_tests.c index b03807b2..8d61a3b1 100644 --- a/tests/amdgpu/vce_tests.c +++ b/tests/amdgpu/vce_tests.c @@ -106,6 +106,11 @@ int suite_vce_tests_init(void) family_id = device_handle->info.family_id; vce_harvest_config = device_handle->info.vce_harvest_config; + if (family_id >= AMDGPU_FAMILY_RV) { + printf("\n\nThe ASIC NOT support VCE, all sub-tests will pass\n"); + return CUE_SUCCESS; + } + r = amdgpu_cs_ctx_create(device_handle, &context_handle); if (r) return CUE_SINIT_FAILED; @@ -126,6 +131,9 @@ int suite_vce_tests_clean(void) { int r; + if (family_id >= AMDGPU_FAMILY_RV) + return CUE_SUCCESS; + r = amdgpu_bo_unmap_and_free(ib_handle, ib_va_handle, ib_mc_address, IB_SIZE); if (r) @@ -237,6 +245,9 @@ static void amdgpu_cs_vce_create(void) unsigned align = (family_id >= AMDGPU_FAMILY_AI) ? 256 : 16; int len, r; + if (family_id >= AMDGPU_FAMILY_RV) + return; + enc.width = vce_create[6]; enc.height = vce_create[7]; @@ -430,6 +441,9 @@ static void amdgpu_cs_vce_encode(void) unsigned align = (family_id >= AMDGPU_FAMILY_AI) ? 256 : 16; int i, r; + if (family_id >= AMDGPU_FAMILY_RV) + return; + vbuf_size = ALIGN(enc.width, align) * ALIGN(enc.height, 16) * 1.5; cpb_size = vbuf_size * 10; num_resources = 0; @@ -508,6 +522,9 @@ static void amdgpu_cs_vce_destroy(void) { int len, r; + if (family_id >= AMDGPU_FAMILY_RV) + return; + num_resources = 0; alloc_resource(&enc.fb[0], 4096, AMDGPU_GEM_DOMAIN_GTT); resources[num_resources++] = enc.fb[0].handle; -- 2.11.0