From 4e003d61e79504532babfb1d4e6b0767b32739d1 Mon Sep 17 00:00:00 2001 From: Siddharth Vadapalli Date: Tue, 4 Apr 2023 11:44:58 +0530 Subject: [PATCH] net: ethernet: ti: am65-cpsw: Enable QSGMII for J784S4 CPSW9G TI's J784S4 SoC supports QSGMII mode with the CPSW9G instance of the CPSW Ethernet Switch. Add a new compatible for J784S4 SoC and enable QSGMII support for it by adding QSGMII mode to the extra_modes member of the "j784s4_cpswxg_pdata" SoC data. Signed-off-by: Siddharth Vadapalli Reviewed-by: Roger Quadros Signed-off-by: Jakub Kicinski --- drivers/net/ethernet/ti/am65-cpsw-nuss.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/drivers/net/ethernet/ti/am65-cpsw-nuss.c b/drivers/net/ethernet/ti/am65-cpsw-nuss.c index f08f0e7d00d5..fb458120de43 100644 --- a/drivers/net/ethernet/ti/am65-cpsw-nuss.c +++ b/drivers/net/ethernet/ti/am65-cpsw-nuss.c @@ -2810,12 +2810,20 @@ static const struct am65_cpsw_pdata j721e_cpswxg_pdata = { .extra_modes = BIT(PHY_INTERFACE_MODE_QSGMII) | BIT(PHY_INTERFACE_MODE_SGMII), }; +static const struct am65_cpsw_pdata j784s4_cpswxg_pdata = { + .quirks = 0, + .ale_dev_id = "am64-cpswxg", + .fdqring_mode = K3_RINGACC_RING_MODE_MESSAGE, + .extra_modes = BIT(PHY_INTERFACE_MODE_QSGMII), +}; + static const struct of_device_id am65_cpsw_nuss_of_mtable[] = { { .compatible = "ti,am654-cpsw-nuss", .data = &am65x_sr1_0}, { .compatible = "ti,j721e-cpsw-nuss", .data = &j721e_pdata}, { .compatible = "ti,am642-cpsw-nuss", .data = &am64x_cpswxg_pdata}, { .compatible = "ti,j7200-cpswxg-nuss", .data = &j7200_cpswxg_pdata}, { .compatible = "ti,j721e-cpswxg-nuss", .data = &j721e_cpswxg_pdata}, + { .compatible = "ti,j784s4-cpswxg-nuss", .data = &j784s4_cpswxg_pdata}, { /* sentinel */ }, }; MODULE_DEVICE_TABLE(of, am65_cpsw_nuss_of_mtable); -- 2.11.0