From 516ab96de3eb0c80ac9c4867cc2076ef4749625e Mon Sep 17 00:00:00 2001 From: Bob Wilson Date: Sat, 16 Jan 2010 00:29:50 +0000 Subject: [PATCH] Run the pre-register allocation tail duplication pass by default. Remove the -pre-regalloc-taildup command-line option, and add a new -disable-early-taildup option. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93597 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/CodeGen/LLVMTargetMachine.cpp | 8 +++----- test/CodeGen/ARM/indirectbr.ll | 4 ++++ test/CodeGen/Thumb/2009-12-17-pre-regalloc-taildup.ll | 2 +- test/CodeGen/Thumb2/2010-01-06-TailDuplicateLabels.ll | 2 +- 4 files changed, 9 insertions(+), 7 deletions(-) diff --git a/lib/CodeGen/LLVMTargetMachine.cpp b/lib/CodeGen/LLVMTargetMachine.cpp index 758c81dc593..837e1848aa5 100644 --- a/lib/CodeGen/LLVMTargetMachine.cpp +++ b/lib/CodeGen/LLVMTargetMachine.cpp @@ -39,6 +39,8 @@ static cl::opt DisableBranchFold("disable-branch-fold", cl::Hidden, cl::desc("Disable branch folding")); static cl::opt DisableTailDuplicate("disable-tail-duplicate", cl::Hidden, cl::desc("Disable tail duplication")); +static cl::opt DisableEarlyTailDup("disable-early-taildup", cl::Hidden, + cl::desc("Disable pre-register allocation tail duplication")); static cl::opt DisableCodePlace("disable-code-place", cl::Hidden, cl::desc("Disable code placement")); static cl::opt DisableSSC("disable-ssc", cl::Hidden, @@ -77,9 +79,6 @@ EnableFastISelOption("fast-isel", cl::Hidden, static cl::opt EnableSplitGEPGVN("split-gep-gvn", cl::Hidden, cl::desc("Split GEPs and run no-load GVN")); -static cl::opt PreAllocTailDup("pre-regalloc-taildup", cl::Hidden, - cl::desc("Pre-register allocation tail duplication")); - LLVMTargetMachine::LLVMTargetMachine(const Target &T, const std::string &TargetTriple) : TargetMachine(T) { @@ -351,8 +350,7 @@ bool LLVMTargetMachine::addCommonCodeGenPasses(PassManagerBase &PM, } // Pre-ra tail duplication. - if (OptLevel != CodeGenOpt::None && - !DisableTailDuplicate && PreAllocTailDup) { + if (OptLevel != CodeGenOpt::None && !DisableEarlyTailDup) { PM.add(createTailDuplicatePass(true)); printAndVerify(PM, "After Pre-RegAlloc TailDuplicate", /* allowDoubleDefs= */ true); diff --git a/test/CodeGen/ARM/indirectbr.ll b/test/CodeGen/ARM/indirectbr.ll index cd16084dbdb..5135d036e24 100644 --- a/test/CodeGen/ARM/indirectbr.ll +++ b/test/CodeGen/ARM/indirectbr.ll @@ -12,6 +12,10 @@ define internal arm_apcscc i32 @foo(i32 %i) nounwind { entry: %0 = load i8** @nextaddr, align 4 ; [#uses=2] %1 = icmp eq i8* %0, null ; [#uses=1] +; indirect branch gets duplicated here +; ARM: bx +; THUMB: mov pc, r1 +; THUMB2: mov pc, r1 br i1 %1, label %bb3, label %bb2 bb2: ; preds = %entry, %bb3 diff --git a/test/CodeGen/Thumb/2009-12-17-pre-regalloc-taildup.ll b/test/CodeGen/Thumb/2009-12-17-pre-regalloc-taildup.ll index 3401915eacb..2a5d9d68570 100644 --- a/test/CodeGen/Thumb/2009-12-17-pre-regalloc-taildup.ll +++ b/test/CodeGen/Thumb/2009-12-17-pre-regalloc-taildup.ll @@ -1,4 +1,4 @@ -; RUN: llc -O3 -pre-regalloc-taildup < %s | FileCheck %s +; RUN: llc -O3 < %s | FileCheck %s target datalayout = "e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-i64:32:32-f32:32:32-f64:32:32-v64:64:64-v128:128:128-a0:0:32-n32" target triple = "thumbv7-apple-darwin10" diff --git a/test/CodeGen/Thumb2/2010-01-06-TailDuplicateLabels.ll b/test/CodeGen/Thumb2/2010-01-06-TailDuplicateLabels.ll index 6a05df11147..07a35277b81 100644 --- a/test/CodeGen/Thumb2/2010-01-06-TailDuplicateLabels.ll +++ b/test/CodeGen/Thumb2/2010-01-06-TailDuplicateLabels.ll @@ -1,4 +1,4 @@ -; RUN: llc -relocation-model=pic -pre-regalloc-taildup < %s | grep {:$} | sort | uniq -d | count 0 +; RUN: llc -relocation-model=pic < %s | grep {:$} | sort | uniq -d | count 0 target datalayout = "e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-i64:32:32-f32:32:32-f64:32:32-v64:64:64-v128:128:128-a0:0:32-n32" target triple = "thumbv7-apple-darwin10" -- 2.11.0