From 51c00ba1de08ba12e87f8bd431747f93e0c9e039 Mon Sep 17 00:00:00 2001
From: Craig Topper <craig.topper@intel.com>
Date: Fri, 26 Jan 2018 20:02:52 +0000
Subject: [PATCH] [X86] Allow any_extend to be combined with setcc on VLX
 targets.

For VLX target getSetccResultType returns vXi1 which prevents the target independent DAG combine from doing this tranform itself.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323555 91177308-0d34-0410-b5e6-96231b3b80d8
---
 lib/Target/X86/X86ISelLowering.cpp      |  8 ++++++++
 test/CodeGen/X86/avx512-calling-conv.ll | 32 ++++++++++----------------------
 2 files changed, 18 insertions(+), 22 deletions(-)

diff --git a/lib/Target/X86/X86ISelLowering.cpp b/lib/Target/X86/X86ISelLowering.cpp
index 5f08c9dd120..18f14316636 100644
--- a/lib/Target/X86/X86ISelLowering.cpp
+++ b/lib/Target/X86/X86ISelLowering.cpp
@@ -36221,6 +36221,10 @@ static SDValue combineExtSetcc(SDNode *N, SelectionDAG &DAG,
   EVT VT = N->getValueType(0);
   SDLoc dl(N);
 
+  // Only handle sext/aext for now.
+  if (N->getOpcode() != ISD::SIGN_EXTEND && N->getOpcode() != ISD::ANY_EXTEND)
+    return SDValue();
+
   // Only do this combine with AVX512 for vector extends.
   if (!Subtarget.hasAVX512() || !VT.isVector() || N0->getOpcode() != ISD::SETCC)
     return SDValue();
@@ -36474,6 +36478,10 @@ static SDValue combineZext(SDNode *N, SelectionDAG &DAG,
   if (SDValue NewCMov = combineToExtendCMOV(N, DAG))
     return NewCMov;
 
+  if (DCI.isBeforeLegalizeOps())
+    if (SDValue V = combineExtSetcc(N, DAG, Subtarget))
+      return V;
+
   if (SDValue V = combineToExtendVectorInReg(N, DAG, DCI, Subtarget))
     return V;
 
diff --git a/test/CodeGen/X86/avx512-calling-conv.ll b/test/CodeGen/X86/avx512-calling-conv.ll
index fd63265168a..27c218cad98 100644
--- a/test/CodeGen/X86/avx512-calling-conv.ll
+++ b/test/CodeGen/X86/avx512-calling-conv.ll
@@ -161,28 +161,16 @@ define <16 x i32> @test6(<16 x i32>%a, <16 x i32>%b) {
 declare <4 x i1> @func4xi1(<4 x i1> %a)
 
 define <4 x i32> @test7(<4 x i32>%a, <4 x i32>%b) {
-; KNL-LABEL: test7:
-; KNL:       ## %bb.0:
-; KNL-NEXT:    pushq %rax
-; KNL-NEXT:    .cfi_def_cfa_offset 16
-; KNL-NEXT:    vpcmpgtd %xmm1, %xmm0, %xmm0
-; KNL-NEXT:    callq _func4xi1
-; KNL-NEXT:    vpslld $31, %xmm0, %xmm0
-; KNL-NEXT:    vpsrad $31, %xmm0, %xmm0
-; KNL-NEXT:    popq %rax
-; KNL-NEXT:    retq
-;
-; SKX-LABEL: test7:
-; SKX:       ## %bb.0:
-; SKX-NEXT:    pushq %rax
-; SKX-NEXT:    .cfi_def_cfa_offset 16
-; SKX-NEXT:    vpcmpgtd %xmm1, %xmm0, %k0
-; SKX-NEXT:    vpmovm2d %k0, %xmm0
-; SKX-NEXT:    callq _func4xi1
-; SKX-NEXT:    vpslld $31, %xmm0, %xmm0
-; SKX-NEXT:    vpsrad $31, %xmm0, %xmm0
-; SKX-NEXT:    popq %rax
-; SKX-NEXT:    retq
+; ALL_X64-LABEL: test7:
+; ALL_X64:       ## %bb.0:
+; ALL_X64-NEXT:    pushq %rax
+; ALL_X64-NEXT:    .cfi_def_cfa_offset 16
+; ALL_X64-NEXT:    vpcmpgtd %xmm1, %xmm0, %xmm0
+; ALL_X64-NEXT:    callq _func4xi1
+; ALL_X64-NEXT:    vpslld $31, %xmm0, %xmm0
+; ALL_X64-NEXT:    vpsrad $31, %xmm0, %xmm0
+; ALL_X64-NEXT:    popq %rax
+; ALL_X64-NEXT:    retq
 ;
 ; KNL_X32-LABEL: test7:
 ; KNL_X32:       ## %bb.0:
-- 
2.11.0