From 51db57f7e8ef46743cb3380bfd430d3ee1877866 Mon Sep 17 00:00:00 2001 From: Juan Quintela Date: Fri, 3 Dec 2010 01:39:22 +0100 Subject: [PATCH] nand: pin values are uint8_t Signed-off-by: Juan Quintela --- hw/flash.h | 4 ++-- hw/nand.c | 6 +++--- 2 files changed, 5 insertions(+), 5 deletions(-) diff --git a/hw/flash.h b/hw/flash.h index d7d103e66f..c22e1a922c 100644 --- a/hw/flash.h +++ b/hw/flash.h @@ -21,8 +21,8 @@ pflash_t *pflash_cfi02_register(target_phys_addr_t base, ram_addr_t off, typedef struct NANDFlashState NANDFlashState; NANDFlashState *nand_init(int manf_id, int chip_id); void nand_done(NANDFlashState *s); -void nand_setpins(NANDFlashState *s, - int cle, int ale, int ce, int wp, int gnd); +void nand_setpins(NANDFlashState *s, uint8_t cle, uint8_t ale, + uint8_t ce, uint8_t wp, uint8_t gnd); void nand_getpins(NANDFlashState *s, int *rb); void nand_setio(NANDFlashState *s, uint8_t value); uint8_t nand_getio(NANDFlashState *s); diff --git a/hw/nand.c b/hw/nand.c index f414aa139b..9f978d875a 100644 --- a/hw/nand.c +++ b/hw/nand.c @@ -52,7 +52,7 @@ struct NANDFlashState { BlockDriverState *bdrv; int mem_oob; - int cle, ale, ce, wp, gnd; + uint8_t cle, ale, ce, wp, gnd; uint8_t io[MAX_PAGE + MAX_OOB + 0x400]; uint8_t *ioaddr; @@ -329,8 +329,8 @@ static int nand_load(QEMUFile *f, void *opaque, int version_id) * * CE, WP and R/B are active low. */ -void nand_setpins(NANDFlashState *s, - int cle, int ale, int ce, int wp, int gnd) +void nand_setpins(NANDFlashState *s, uint8_t cle, uint8_t ale, + uint8_t ce, uint8_t wp, uint8_t gnd) { s->cle = cle; s->ale = ale; -- 2.11.0