From 520128bde824d208c0309bcfcdd6ffc4eb450099 Mon Sep 17 00:00:00 2001 From: Isaku Yamahata Date: Wed, 23 Jun 2010 16:15:25 +0900 Subject: [PATCH] pci: use PCI_DEVFN() where appropriate. Use PCI_DEVFN() and PCI_FUNC_MAX where appropriate. This patch make it clear that func = 0. test: The following object files with/without this patch are stripped and compared. They remains same. arm-softmmu/versatile_pci.o libhw32/ppce500_pci.o libhw32/unin_pci.o libhw64/ppce500_pci.o libhw64/unin_pci.o mips-softmmu/gt64xxx.o mips64-softmmu/gt64xxx.o mips64el-softmmu/gt64xxx.o mipsel-softmmu/gt64xxx.o Cc: Aurelien Jarno Cc: Yu Liu Cc: Paul Brook Signed-off-by: Isaku Yamahata Signed-off-by: Blue Swirl --- hw/gt64xxx.c | 2 +- hw/ppce500_pci.c | 3 ++- hw/unin_pci.c | 12 ++++++------ hw/versatile_pci.c | 2 +- 4 files changed, 10 insertions(+), 9 deletions(-) diff --git a/hw/gt64xxx.c b/hw/gt64xxx.c index 313c080450..cabf7ea0bf 100644 --- a/hw/gt64xxx.c +++ b/hw/gt64xxx.c @@ -1115,7 +1115,7 @@ PCIBus *pci_gt64120_init(qemu_irq *pic) s->pci->bus = pci_register_bus(NULL, "pci", pci_gt64120_set_irq, pci_gt64120_map_irq, - pic, 144, 4); + pic, PCI_DEVFN(18, 0), 4); s->ISD_handle = cpu_register_io_memory(gt64120_read, gt64120_write, s); d = pci_register_device(s->pci->bus, "GT64120 PCI Bus", sizeof(PCIDevice), 0, NULL, NULL); diff --git a/hw/ppce500_pci.c b/hw/ppce500_pci.c index 5358f82b0a..8ac99f2817 100644 --- a/hw/ppce500_pci.c +++ b/hw/ppce500_pci.c @@ -279,7 +279,8 @@ PCIBus *ppce500_pci_init(qemu_irq pci_irqs[4], target_phys_addr_t registers) controller->pci_state.bus = pci_register_bus(NULL, "pci", mpc85xx_pci_set_irq, mpc85xx_pci_map_irq, - pci_irqs, 0x88, 4); + pci_irqs, PCI_DEVFN(0x11, 0), + 4); d = pci_register_device(controller->pci_state.bus, "host bridge", sizeof(PCIDevice), 0, NULL, NULL); diff --git a/hw/unin_pci.c b/hw/unin_pci.c index 362fb7762d..d8d1721a66 100644 --- a/hw/unin_pci.c +++ b/hw/unin_pci.c @@ -230,10 +230,10 @@ PCIBus *pci_pmac_init(qemu_irq *pic) d = FROM_SYSBUS(UNINState, s); d->host_state.bus = pci_register_bus(&d->busdev.qdev, "pci", pci_unin_set_irq, pci_unin_map_irq, - pic, 11 << 3, 4); + pic, PCI_DEVFN(11, 0), 4); #if 0 - pci_create_simple(d->host_state.bus, 11 << 3, "uni-north"); + pci_create_simple(d->host_state.bus, PCI_DEVFN(11, 0), "uni-north"); #endif sysbus_mmio_map(s, 0, 0xf2800000); @@ -242,11 +242,11 @@ PCIBus *pci_pmac_init(qemu_irq *pic) /* DEC 21154 bridge */ #if 0 /* XXX: not activated as PPC BIOS doesn't handle multiple buses properly */ - pci_create_simple(d->host_state.bus, 12 << 3, "dec-21154"); + pci_create_simple(d->host_state.bus, PCI_DEVFN(12, 0), "dec-21154"); #endif /* Uninorth AGP bus */ - pci_create_simple(d->host_state.bus, 11 << 3, "uni-north-agp"); + pci_create_simple(d->host_state.bus, PCI_DEVFN(11, 0), "uni-north-agp"); dev = qdev_create(NULL, "uni-north-agp"); qdev_init_nofail(dev); s = sysbus_from_qdev(dev); @@ -256,7 +256,7 @@ PCIBus *pci_pmac_init(qemu_irq *pic) /* Uninorth internal bus */ #if 0 /* XXX: not needed for now */ - pci_create_simple(d->host_state.bus, 14 << 3, "uni-north-pci"); + pci_create_simple(d->host_state.bus, PCI_DEVFN(14, 0), "uni-north-pci"); dev = qdev_create(NULL, "uni-north-pci"); qdev_init_nofail(dev); s = sysbus_from_qdev(dev); @@ -282,7 +282,7 @@ PCIBus *pci_pmac_u3_init(qemu_irq *pic) d->host_state.bus = pci_register_bus(&d->busdev.qdev, "pci", pci_unin_set_irq, pci_unin_map_irq, - pic, 11 << 3, 4); + pic, PCI_DEVFN(11, 0), 4); sysbus_mmio_map(s, 0, 0xf0800000); sysbus_mmio_map(s, 1, 0xf0c00000); diff --git a/hw/versatile_pci.c b/hw/versatile_pci.c index 199bc1936e..a76bdfad61 100644 --- a/hw/versatile_pci.c +++ b/hw/versatile_pci.c @@ -127,7 +127,7 @@ static int pci_vpb_init(SysBusDevice *dev) } bus = pci_register_bus(&dev->qdev, "pci", pci_vpb_set_irq, pci_vpb_map_irq, s->irq, - 11 << 3, 4); + PCI_DEVFN(11, 0), 4); /* ??? Register memory space. */ -- 2.11.0