From 53ac650b7c0836658c22db37b77cd7b30ba4ca74 Mon Sep 17 00:00:00 2001 From: dj Date: Thu, 30 Apr 2009 21:18:37 +0000 Subject: [PATCH] Index: sid/component/cgen-cpu/mep * Makefile.am: Regenerate. * Makefile.in: Regenerate. * common_model.cxx: Regenerate. * mep-core1-decode.cxx: Regenerate. * mep-core1-sem: Regenerate. * mep-cpu.h: Regenerate. * mep-decode.cxx: Regenerate. * mep-desc.h: Regenerate. * mep-sem.cxx: Regenerate. * mep_ext1.h: Regenerate. * ivc2-cop.cxx: New. * ivc2-cpu.h: New. * ivc2.h: New. * mep-cop1-16-decode.cxx: New. * mep-cop1-16-decode.h: New. * mep-cop1-16-defs.h: New. * mep-cop1-16-model.cxx: New. * mep-cop1-16-model.h: New. * mep-cop1-16-sem.cxx: New. * mep-cop1-32-decode.cxx: New. * mep-cop1-32-decode.h: New. * mep-cop1-32-defs.h: New. * mep-cop1-32-model.cxx: New. * mep-cop1-32-model.h: New. * mep-cop1-32-sem.cxx: New. * mep-cop1-48-decode.cxx: New. * mep-cop1-48-decode.h: New. * mep-cop1-48-defs.h: New. * mep-cop1-48-model.cxx: New. * mep-cop1-48-model.h: New. * mep-cop1-48-sem.cxx: New. * mep-cop1-64-decode.cxx: New. * mep-cop1-64-decode.h: New. * mep-cop1-64-defs.h: New. * mep-cop1-64-model.cxx: New. * mep-cop1-64-model.h: New. * mep-cop1-64-sem.cxx: New. * mep.cxx (mep_cpu::mep_cpu): Add ivc2-decode? pin. (mep_cpu::step_insns): Flush register write queu before looping, and after each insn bundle. * mep.h: Regenerate. (mep_print_insn_set_ivc2_mode): Declare. (mep_cpu): Add register write queues. Add IVC2 support. (decode_bundling): Likewise. (step_one_insn): Likewise. Index: sid/main/dynamic * mainDynamic: Regenerate. * mepCfg.cxx (MepBoardCfg::set_ivc2_decode): New. * mepCfg.h (MepBoardCfg::set_ivc2_decode): Add. --- sid/component/cgen-cpu/mep/ChangeLog | 50 + sid/component/cgen-cpu/mep/Makefile.am | 26 +- sid/component/cgen-cpu/mep/Makefile.in | 46 +- sid/component/cgen-cpu/mep/common_model.cxx | 52 + sid/component/cgen-cpu/mep/ivc2-cop.cxx | 6567 ++++++++++++++ sid/component/cgen-cpu/mep/ivc2-cpu.h | 404 + sid/component/cgen-cpu/mep/ivc2.h | 8 + sid/component/cgen-cpu/mep/mep-cop1-16-decode.cxx | 2213 +++++ sid/component/cgen-cpu/mep/mep-cop1-16-decode.h | 280 + sid/component/cgen-cpu/mep/mep-cop1-16-defs.h | 16 + sid/component/cgen-cpu/mep/mep-cop1-16-model.cxx | 4192 +++++++++ sid/component/cgen-cpu/mep/mep-cop1-16-model.h | 440 + sid/component/cgen-cpu/mep/mep-cop1-16-sem.cxx | 3297 +++++++ sid/component/cgen-cpu/mep/mep-cop1-32-decode.cxx | 2940 ++++++ sid/component/cgen-cpu/mep/mep-cop1-32-decode.h | 527 ++ sid/component/cgen-cpu/mep/mep-cop1-32-defs.h | 16 + sid/component/cgen-cpu/mep/mep-cop1-32-model.cxx | 9121 +++++++++++++++++++ sid/component/cgen-cpu/mep/mep-cop1-32-model.h | 758 ++ sid/component/cgen-cpu/mep/mep-cop1-32-sem.cxx | 7277 +++++++++++++++ sid/component/cgen-cpu/mep/mep-cop1-48-decode.cxx | 1951 ++++ sid/component/cgen-cpu/mep/mep-cop1-48-decode.h | 324 + sid/component/cgen-cpu/mep/mep-cop1-48-defs.h | 16 + sid/component/cgen-cpu/mep/mep-cop1-48-model.cxx | 4099 +++++++++ sid/component/cgen-cpu/mep/mep-cop1-48-model.h | 434 + sid/component/cgen-cpu/mep/mep-cop1-48-sem.cxx | 3398 +++++++ sid/component/cgen-cpu/mep/mep-cop1-64-decode.cxx | 4414 +++++++++ sid/component/cgen-cpu/mep/mep-cop1-64-decode.h | 544 ++ sid/component/cgen-cpu/mep/mep-cop1-64-defs.h | 16 + sid/component/cgen-cpu/mep/mep-cop1-64-model.cxx | 9989 +++++++++++++++++++++ sid/component/cgen-cpu/mep/mep-cop1-64-model.h | 814 ++ sid/component/cgen-cpu/mep/mep-cop1-64-sem.cxx | 7871 ++++++++++++++++ sid/component/cgen-cpu/mep/mep-core1-decode.cxx | 448 +- sid/component/cgen-cpu/mep/mep-core1-sem.cxx | 14 +- sid/component/cgen-cpu/mep/mep-cpu.h | 31 +- sid/component/cgen-cpu/mep/mep-decode.cxx | 448 +- sid/component/cgen-cpu/mep/mep-desc.h | 13 +- sid/component/cgen-cpu/mep/mep-sem.cxx | 14 +- sid/component/cgen-cpu/mep/mep.cxx | 7 + sid/component/cgen-cpu/mep/mep.h | 215 +- sid/component/cgen-cpu/mep/mep_ext1.h | 37 +- sid/main/dynamic/ChangeLog | 6 + sid/main/dynamic/mainDynamic.cxx | 6 + sid/main/dynamic/mepCfg.cxx | 6 + sid/main/dynamic/mepCfg.h | 1 + 44 files changed, 72856 insertions(+), 490 deletions(-) create mode 100644 sid/component/cgen-cpu/mep/ivc2-cop.cxx create mode 100644 sid/component/cgen-cpu/mep/ivc2-cpu.h create mode 100644 sid/component/cgen-cpu/mep/ivc2.h create mode 100644 sid/component/cgen-cpu/mep/mep-cop1-16-decode.cxx create mode 100644 sid/component/cgen-cpu/mep/mep-cop1-16-decode.h create mode 100644 sid/component/cgen-cpu/mep/mep-cop1-16-defs.h create mode 100644 sid/component/cgen-cpu/mep/mep-cop1-16-model.cxx create mode 100644 sid/component/cgen-cpu/mep/mep-cop1-16-model.h create mode 100644 sid/component/cgen-cpu/mep/mep-cop1-16-sem.cxx create mode 100644 sid/component/cgen-cpu/mep/mep-cop1-32-decode.cxx create mode 100644 sid/component/cgen-cpu/mep/mep-cop1-32-decode.h create mode 100644 sid/component/cgen-cpu/mep/mep-cop1-32-defs.h create mode 100644 sid/component/cgen-cpu/mep/mep-cop1-32-model.cxx create mode 100644 sid/component/cgen-cpu/mep/mep-cop1-32-model.h create mode 100644 sid/component/cgen-cpu/mep/mep-cop1-32-sem.cxx create mode 100644 sid/component/cgen-cpu/mep/mep-cop1-48-decode.cxx create mode 100644 sid/component/cgen-cpu/mep/mep-cop1-48-decode.h create mode 100644 sid/component/cgen-cpu/mep/mep-cop1-48-defs.h create mode 100644 sid/component/cgen-cpu/mep/mep-cop1-48-model.cxx create mode 100644 sid/component/cgen-cpu/mep/mep-cop1-48-model.h create mode 100644 sid/component/cgen-cpu/mep/mep-cop1-48-sem.cxx create mode 100644 sid/component/cgen-cpu/mep/mep-cop1-64-decode.cxx create mode 100644 sid/component/cgen-cpu/mep/mep-cop1-64-decode.h create mode 100644 sid/component/cgen-cpu/mep/mep-cop1-64-defs.h create mode 100644 sid/component/cgen-cpu/mep/mep-cop1-64-model.cxx create mode 100644 sid/component/cgen-cpu/mep/mep-cop1-64-model.h create mode 100644 sid/component/cgen-cpu/mep/mep-cop1-64-sem.cxx diff --git a/sid/component/cgen-cpu/mep/ChangeLog b/sid/component/cgen-cpu/mep/ChangeLog index 31f662b3a4..59d972247e 100644 --- a/sid/component/cgen-cpu/mep/ChangeLog +++ b/sid/component/cgen-cpu/mep/ChangeLog @@ -1,3 +1,53 @@ +2009-04-30 DJ Delorie + + * Makefile.am: Regenerate. + * Makefile.in: Regenerate. + * common_model.cxx: Regenerate. + * mep-core1-decode.cxx: Regenerate. + * mep-core1-sem: Regenerate. + * mep-cpu.h: Regenerate. + * mep-decode.cxx: Regenerate. + * mep-desc.h: Regenerate. + * mep-sem.cxx: Regenerate. + * mep_ext1.h: Regenerate. + * ivc2-cop.cxx: New. + * ivc2-cpu.h: New. + * ivc2.h: New. + * mep-cop1-16-decode.cxx: New. + * mep-cop1-16-decode.h: New. + * mep-cop1-16-defs.h: New. + * mep-cop1-16-model.cxx: New. + * mep-cop1-16-model.h: New. + * mep-cop1-16-sem.cxx: New. + * mep-cop1-32-decode.cxx: New. + * mep-cop1-32-decode.h: New. + * mep-cop1-32-defs.h: New. + * mep-cop1-32-model.cxx: New. + * mep-cop1-32-model.h: New. + * mep-cop1-32-sem.cxx: New. + * mep-cop1-48-decode.cxx: New. + * mep-cop1-48-decode.h: New. + * mep-cop1-48-defs.h: New. + * mep-cop1-48-model.cxx: New. + * mep-cop1-48-model.h: New. + * mep-cop1-48-sem.cxx: New. + * mep-cop1-64-decode.cxx: New. + * mep-cop1-64-decode.h: New. + * mep-cop1-64-defs.h: New. + * mep-cop1-64-model.cxx: New. + * mep-cop1-64-model.h: New. + * mep-cop1-64-sem.cxx: New. + + * mep.cxx (mep_cpu::mep_cpu): Add ivc2-decode? pin. + (mep_cpu::step_insns): Flush register write queu before looping, + and after each insn bundle. + + * mep.h: Regenerate. + (mep_print_insn_set_ivc2_mode): Declare. + (mep_cpu): Add register write queues. Add IVC2 support. + (decode_bundling): Likewise. + (step_one_insn): Likewise. + 2009-04-17 DJ Delorie * mep-core1-decode.cxx: Regenerate. diff --git a/sid/component/cgen-cpu/mep/Makefile.am b/sid/component/cgen-cpu/mep/Makefile.am index e50c1ae8a3..54741c68a2 100644 --- a/sid/component/cgen-cpu/mep/Makefile.am +++ b/sid/component/cgen-cpu/mep/Makefile.am @@ -11,7 +11,7 @@ CXXFLAGS = $(TOP_CXXFLAGS) -DHAVE_CONFIG_H pkgdata_DATA = hw-cpu-mep.txt -CPU_SOURCES = mep-core1-decode.cxx mep-core1-sem.cxx mep-core1-model.cxx +CPU_SOURCES = mep-core1-decode.cxx mep-core1-sem.cxx mep-core1-model.cxx mep-cop1-16-decode.cxx mep-cop1-16-sem.cxx mep-cop1-16-model.cxx mep-cop1-32-decode.cxx mep-cop1-32-sem.cxx mep-cop1-32-model.cxx mep-cop1-48-decode.cxx mep-cop1-48-sem.cxx mep-cop1-48-model.cxx mep-cop1-64-decode.cxx mep-cop1-64-sem.cxx mep-cop1-64-model.cxx mep-ivc2.cxx libmep_la_SOURCES = mep.cxx common_model.cxx mep-decode.cxx mep-sem.cxx mep-model.cxx $(CPU_SOURCES) libmep_la_LDFLAGS = @@ -57,9 +57,9 @@ CGENDEPS = ../../../../cgen/stamp-cgen \ $(cgendir)/sim-test.scm $(cgendir)/sim-cpu.scm \ $(cgendir)/sim-model.scm $(cgendir)/sim.scm -CPU_TARGETS = mep-core1 +CPU_TARGETS = mep-core1 mep-cop1-16 mep-cop1-32 mep-cop1-48 mep-cop1-64 -CPU_LIST = mep,ext_core1 +CPU_LIST = mep,ext_core1,ext_cop1_16,ext_cop1_32,ext_cop1_48,ext_cop1_64 CGEN_TARGETS = mep-cpudesc mep-decsemdefs $(CPU_TARGETS) .PHONY: $(CGEN_TARGETS) @@ -73,6 +73,26 @@ mep-core1: mep "with-multiple-isa with-scache with-profile=fn" mep_ext1 ext_core1 $(CGEN_MACH) mepcore1 "mep-core1-" \ $(cgendir)/cpu/mep.cpu \ "decode.h decode.cxx model.h model.cxx semantics.cxx defs.h" +mep-cop1-16: + $(SHELL) ../CGEN.sh cpu-decode $(srcdir) $(cgendir) "$(CGENFLAGS)" \ + mep "with-multiple-isa with-scache with-profile=fn" mep_ext1 ext_cop1_16 $(CGEN_MACH) mepcop1_16 "mep-cop1-16-" \ + $(cgendir)/cpu/mep.cpu \ + "decode.h decode.cxx model.h model.cxx semantics.cxx defs.h" +mep-cop1-32: + $(SHELL) ../CGEN.sh cpu-decode $(srcdir) $(cgendir) "$(CGENFLAGS)" \ + mep "with-multiple-isa with-scache with-profile=fn" mep_ext1 ext_cop1_32 $(CGEN_MACH) mepcop1_32 "mep-cop1-32-" \ + $(cgendir)/cpu/mep.cpu \ + "decode.h decode.cxx model.h model.cxx semantics.cxx defs.h" +mep-cop1-48: + $(SHELL) ../CGEN.sh cpu-decode $(srcdir) $(cgendir) "$(CGENFLAGS)" \ + mep "with-multiple-isa with-scache with-profile=fn" mep_ext1 ext_cop1_48 $(CGEN_MACH) mepcop1_48 "mep-cop1-48-" \ + $(cgendir)/cpu/mep.cpu \ + "decode.h decode.cxx model.h model.cxx semantics.cxx defs.h" +mep-cop1-64: + $(SHELL) ../CGEN.sh cpu-decode $(srcdir) $(cgendir) "$(CGENFLAGS)" \ + mep "with-multiple-isa with-scache with-profile=fn" mep_ext1 ext_cop1_64 $(CGEN_MACH) mepcop1_64 "mep-cop1-64-" \ + $(cgendir)/cpu/mep.cpu \ + "decode.h decode.cxx model.h model.cxx semantics.cxx defs.h" # end-cpus mep-cpudesc: $(SHELL) ../CGEN.sh cpu-decode $(srcdir) $(cgendir) "$(CGENFLAGS)" \ diff --git a/sid/component/cgen-cpu/mep/Makefile.in b/sid/component/cgen-cpu/mep/Makefile.in index 9f5d49e68a..098a8f3cbe 100644 --- a/sid/component/cgen-cpu/mep/Makefile.in +++ b/sid/component/cgen-cpu/mep/Makefile.in @@ -75,7 +75,12 @@ LTLIBRARIES = $(noinst_LTLIBRARIES) libmep_la_DEPENDENCIES = mep-asm.lo mep-dis.lo mep-opc.lo mep-ibld.lo \ mep-desc.lo am__objects_1 = \ -mep-core1-decode.lo mep-core1-sem.lo mep-core1-model.lo +mep-core1-decode.lo mep-core1-sem.lo mep-core1-model.lo \ +mep-cop1-16-decode.lo mep-cop1-16-sem.lo mep-cop1-16-model.lo \ +mep-cop1-32-decode.lo mep-cop1-32-sem.lo mep-cop1-32-model.lo \ +mep-cop1-48-decode.lo mep-cop1-48-sem.lo mep-cop1-48-model.lo \ +mep-cop1-64-decode.lo mep-cop1-64-sem.lo mep-cop1-64-model.lo \ +ivc2-cop.lo am_libmep_la_OBJECTS = mep.lo common_model.lo mep-decode.lo mep-sem.lo \ mep-model.lo $(am__objects_1) libmep_la_OBJECTS = $(am_libmep_la_OBJECTS) @@ -236,7 +241,7 @@ noinst_LTLIBRARIES = libmep.la BFDINCLUDES = -I../../../../bfd -I$(srcdir)/../../../../include INCLUDES = -I$(srcdir) -I$(srcdir)/.. -I.. -I../../../include -I$(srcdir)/../../../include $(BFDINCLUDES) pkgdata_DATA = hw-cpu-mep.txt -CPU_SOURCES = mep-core1-decode.cxx mep-core1-sem.cxx mep-core1-model.cxx +CPU_SOURCES = mep-core1-decode.cxx mep-core1-sem.cxx mep-core1-model.cxx mep-cop1-16-decode.cxx mep-cop1-16-sem.cxx mep-cop1-16-model.cxx mep-cop1-32-decode.cxx mep-cop1-32-sem.cxx mep-cop1-32-model.cxx mep-cop1-48-decode.cxx mep-cop1-48-sem.cxx mep-cop1-48-model.cxx mep-cop1-64-decode.cxx mep-cop1-64-sem.cxx mep-cop1-64-model.cxx mep-ivc2.cxx libmep_la_SOURCES = mep.cxx common_model.cxx mep-decode.cxx mep-sem.cxx mep-model.cxx $(CPU_SOURCES) libmep_la_LDFLAGS = libmep_la_LIBADD = mep-asm.lo mep-dis.lo mep-opc.lo mep-ibld.lo mep-desc.lo @@ -259,8 +264,8 @@ CGENDEPS = ../../../../cgen/stamp-cgen \ $(cgendir)/sim-test.scm $(cgendir)/sim-cpu.scm \ $(cgendir)/sim-model.scm $(cgendir)/sim.scm -CPU_TARGETS = mep-core1 -CPU_LIST = mep,ext_core1 +CPU_TARGETS = mep-core1 mep-cop1-16 mep-cop1-32 mep-cop1-48 mep-cop1-64 +CPU_LIST = mep,ext_core1,ext_cop1_16,ext_cop1_32,ext_cop1_48,ext_cop1_64 CGEN_TARGETS = mep-cpudesc mep-decsemdefs $(CPU_TARGETS) html_stylesheet = $(srcdir)/../../component_html.xsl SUFFIXES = .xml .txt .html @@ -320,9 +325,22 @@ distclean-compile: -rm -f *.tab.c @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/common_model.Plo@am__quote@ +@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/mep-cop1-16-decode.Plo@am__quote@ +@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/mep-cop1-16-model.Plo@am__quote@ +@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/mep-cop1-16-sem.Plo@am__quote@ +@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/mep-cop1-32-decode.Plo@am__quote@ +@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/mep-cop1-32-model.Plo@am__quote@ +@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/mep-cop1-32-sem.Plo@am__quote@ +@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/mep-cop1-48-decode.Plo@am__quote@ +@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/mep-cop1-48-model.Plo@am__quote@ +@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/mep-cop1-48-sem.Plo@am__quote@ +@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/mep-cop1-64-decode.Plo@am__quote@ +@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/mep-cop1-64-model.Plo@am__quote@ +@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/mep-cop1-64-sem.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/mep-core1-decode.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/mep-core1-model.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/mep-core1-sem.Plo@am__quote@ +@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/ivc2-cop.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/mep-decode.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/mep-model.Plo@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/mep-sem.Plo@am__quote@ @@ -681,6 +699,26 @@ mep-core1: mep "with-multiple-isa with-scache with-profile=fn" mep_ext1 ext_core1 $(CGEN_MACH) mepcore1 "mep-core1-" \ $(cgendir)/cpu/mep.cpu \ "decode.h decode.cxx model.h model.cxx semantics.cxx defs.h" +mep-cop1-16: + $(SHELL) ../CGEN.sh cpu-decode $(srcdir) $(cgendir) "$(CGENFLAGS)" \ + mep "with-multiple-isa with-scache with-profile=fn" mep_ext1 ext_cop1_16 $(CGEN_MACH) mepcop1_16 "mep-cop1-16-" \ + $(cgendir)/cpu/mep.cpu \ + "decode.h decode.cxx model.h model.cxx semantics.cxx defs.h" +mep-cop1-32: + $(SHELL) ../CGEN.sh cpu-decode $(srcdir) $(cgendir) "$(CGENFLAGS)" \ + mep "with-multiple-isa with-scache with-profile=fn" mep_ext1 ext_cop1_32 $(CGEN_MACH) mepcop1_32 "mep-cop1-32-" \ + $(cgendir)/cpu/mep.cpu \ + "decode.h decode.cxx model.h model.cxx semantics.cxx defs.h" +mep-cop1-48: + $(SHELL) ../CGEN.sh cpu-decode $(srcdir) $(cgendir) "$(CGENFLAGS)" \ + mep "with-multiple-isa with-scache with-profile=fn" mep_ext1 ext_cop1_48 $(CGEN_MACH) mepcop1_48 "mep-cop1-48-" \ + $(cgendir)/cpu/mep.cpu \ + "decode.h decode.cxx model.h model.cxx semantics.cxx defs.h" +mep-cop1-64: + $(SHELL) ../CGEN.sh cpu-decode $(srcdir) $(cgendir) "$(CGENFLAGS)" \ + mep "with-multiple-isa with-scache with-profile=fn" mep_ext1 ext_cop1_64 $(CGEN_MACH) mepcop1_64 "mep-cop1-64-" \ + $(cgendir)/cpu/mep.cpu \ + "decode.h decode.cxx model.h model.cxx semantics.cxx defs.h" # end-cpus mep-cpudesc: $(SHELL) ../CGEN.sh cpu-decode $(srcdir) $(cgendir) "$(CGENFLAGS)" \ diff --git a/sid/component/cgen-cpu/mep/common_model.cxx b/sid/component/cgen-cpu/mep/common_model.cxx index 8d4f3792bf..667254253a 100644 --- a/sid/component/cgen-cpu/mep/common_model.cxx +++ b/sid/component/cgen-cpu/mep/common_model.cxx @@ -38,6 +38,10 @@ mep_common_model::model_u_ldcb_before (CPU *cpu, const // begin-generated-instantiations template UINT mep_common_model::model_u_ldcb_before (mep_basic_cpu *, const mep_idesc *, int unit_num); template UINT mep_common_model::model_u_ldcb_before (mep_ext1_cpu *, const mepcore1_idesc *, int unit_num); +template UINT mep_common_model::model_u_ldcb_before (mep_ext1_cpu *, const mepcop1_16_idesc *, int unit_num); +template UINT mep_common_model::model_u_ldcb_before (mep_ext1_cpu *, const mepcop1_32_idesc *, int unit_num); +template UINT mep_common_model::model_u_ldcb_before (mep_ext1_cpu *, const mepcop1_48_idesc *, int unit_num); +template UINT mep_common_model::model_u_ldcb_before (mep_ext1_cpu *, const mepcop1_64_idesc *, int unit_num); // end-generated-instantiations template @@ -52,6 +56,10 @@ mep_common_model::model_u_divide_before (CPU *cpu, con // begin-generated-instantiations template UINT mep_common_model::model_u_divide_before (mep_basic_cpu *, const mep_idesc *, int unit_num); template UINT mep_common_model::model_u_divide_before (mep_ext1_cpu *, const mepcore1_idesc *, int unit_num); +template UINT mep_common_model::model_u_divide_before (mep_ext1_cpu *, const mepcop1_16_idesc *, int unit_num); +template UINT mep_common_model::model_u_divide_before (mep_ext1_cpu *, const mepcop1_32_idesc *, int unit_num); +template UINT mep_common_model::model_u_divide_before (mep_ext1_cpu *, const mepcop1_48_idesc *, int unit_num); +template UINT mep_common_model::model_u_divide_before (mep_ext1_cpu *, const mepcop1_64_idesc *, int unit_num); // end-generated-instantiations template @@ -66,6 +74,10 @@ mep_common_model::model_u_multiply_before (CPU *cpu, c // begin-generated-instantiations template UINT mep_common_model::model_u_multiply_before (mep_basic_cpu *, const mep_idesc *, int unit_num); template UINT mep_common_model::model_u_multiply_before (mep_ext1_cpu *, const mepcore1_idesc *, int unit_num); +template UINT mep_common_model::model_u_multiply_before (mep_ext1_cpu *, const mepcop1_16_idesc *, int unit_num); +template UINT mep_common_model::model_u_multiply_before (mep_ext1_cpu *, const mepcop1_32_idesc *, int unit_num); +template UINT mep_common_model::model_u_multiply_before (mep_ext1_cpu *, const mepcop1_48_idesc *, int unit_num); +template UINT mep_common_model::model_u_multiply_before (mep_ext1_cpu *, const mepcop1_64_idesc *, int unit_num); // end-generated-instantiations template @@ -80,6 +92,10 @@ mep_common_model::model_u_use_ctrl_reg_before (CPU *cp // begin-generated-instantiations template UINT mep_common_model::model_u_use_ctrl_reg_before (mep_basic_cpu *, const mep_idesc *, int unit_num, INT usereg); template UINT mep_common_model::model_u_use_ctrl_reg_before (mep_ext1_cpu *, const mepcore1_idesc *, int unit_num, INT usereg); +template UINT mep_common_model::model_u_use_ctrl_reg_before (mep_ext1_cpu *, const mepcop1_16_idesc *, int unit_num, INT usereg); +template UINT mep_common_model::model_u_use_ctrl_reg_before (mep_ext1_cpu *, const mepcop1_32_idesc *, int unit_num, INT usereg); +template UINT mep_common_model::model_u_use_ctrl_reg_before (mep_ext1_cpu *, const mepcop1_48_idesc *, int unit_num, INT usereg); +template UINT mep_common_model::model_u_use_ctrl_reg_before (mep_ext1_cpu *, const mepcop1_64_idesc *, int unit_num, INT usereg); // end-generated-instantiations template @@ -95,6 +111,10 @@ mep_common_model::model_u_use_gpr_before (CPU *cpu, co // begin-generated-instantiations template UINT mep_common_model::model_u_use_gpr_before (mep_basic_cpu *, const mep_idesc *, int unit_num, INT usereg); template UINT mep_common_model::model_u_use_gpr_before (mep_ext1_cpu *, const mepcore1_idesc *, int unit_num, INT usereg); +template UINT mep_common_model::model_u_use_gpr_before (mep_ext1_cpu *, const mepcop1_16_idesc *, int unit_num, INT usereg); +template UINT mep_common_model::model_u_use_gpr_before (mep_ext1_cpu *, const mepcop1_32_idesc *, int unit_num, INT usereg); +template UINT mep_common_model::model_u_use_gpr_before (mep_ext1_cpu *, const mepcop1_48_idesc *, int unit_num, INT usereg); +template UINT mep_common_model::model_u_use_gpr_before (mep_ext1_cpu *, const mepcop1_64_idesc *, int unit_num, INT usereg); // end-generated-instantiations template @@ -117,6 +137,10 @@ mep_common_model::model_u_branch_after (CPU *cpu, cons // begin-generated-instantiations template UINT mep_common_model::model_u_branch_after (mep_basic_cpu *, const mep_idesc *, int unit_num, unsigned long long referenced); template UINT mep_common_model::model_u_branch_after (mep_ext1_cpu *, const mepcore1_idesc *, int unit_num, unsigned long long referenced); +template UINT mep_common_model::model_u_branch_after (mep_ext1_cpu *, const mepcop1_16_idesc *, int unit_num, unsigned long long referenced); +template UINT mep_common_model::model_u_branch_after (mep_ext1_cpu *, const mepcop1_32_idesc *, int unit_num, unsigned long long referenced); +template UINT mep_common_model::model_u_branch_after (mep_ext1_cpu *, const mepcop1_48_idesc *, int unit_num, unsigned long long referenced); +template UINT mep_common_model::model_u_branch_after (mep_ext1_cpu *, const mepcop1_64_idesc *, int unit_num, unsigned long long referenced); // end-generated-instantiations template @@ -134,6 +158,10 @@ mep_common_model::model_u_multiply_after (CPU *cpu, co // begin-generated-instantiations template UINT mep_common_model::model_u_multiply_after (mep_basic_cpu *, const mep_idesc *, int unit_num, unsigned long long referenced); template UINT mep_common_model::model_u_multiply_after (mep_ext1_cpu *, const mepcore1_idesc *, int unit_num, unsigned long long referenced); +template UINT mep_common_model::model_u_multiply_after (mep_ext1_cpu *, const mepcop1_16_idesc *, int unit_num, unsigned long long referenced); +template UINT mep_common_model::model_u_multiply_after (mep_ext1_cpu *, const mepcop1_32_idesc *, int unit_num, unsigned long long referenced); +template UINT mep_common_model::model_u_multiply_after (mep_ext1_cpu *, const mepcop1_48_idesc *, int unit_num, unsigned long long referenced); +template UINT mep_common_model::model_u_multiply_after (mep_ext1_cpu *, const mepcop1_64_idesc *, int unit_num, unsigned long long referenced); // end-generated-instantiations template @@ -151,6 +179,10 @@ mep_common_model::model_u_stcb_after (CPU *cpu, const // begin-generated-instantiations template UINT mep_common_model::model_u_stcb_after (mep_basic_cpu *, const mep_idesc *, int unit_num, unsigned long long referenced); template UINT mep_common_model::model_u_stcb_after (mep_ext1_cpu *, const mepcore1_idesc *, int unit_num, unsigned long long referenced); +template UINT mep_common_model::model_u_stcb_after (mep_ext1_cpu *, const mepcop1_16_idesc *, int unit_num, unsigned long long referenced); +template UINT mep_common_model::model_u_stcb_after (mep_ext1_cpu *, const mepcop1_32_idesc *, int unit_num, unsigned long long referenced); +template UINT mep_common_model::model_u_stcb_after (mep_ext1_cpu *, const mepcop1_48_idesc *, int unit_num, unsigned long long referenced); +template UINT mep_common_model::model_u_stcb_after (mep_ext1_cpu *, const mepcop1_64_idesc *, int unit_num, unsigned long long referenced); // end-generated-instantiations template @@ -175,6 +207,10 @@ mep_common_model::model_u_divide_after (CPU *cpu, cons // begin-generated-instantiations template UINT mep_common_model::model_u_divide_after (mep_basic_cpu *, const mep_idesc *, int unit_num, unsigned long long referenced); template UINT mep_common_model::model_u_divide_after (mep_ext1_cpu *, const mepcore1_idesc *, int unit_num, unsigned long long referenced); +template UINT mep_common_model::model_u_divide_after (mep_ext1_cpu *, const mepcop1_16_idesc *, int unit_num, unsigned long long referenced); +template UINT mep_common_model::model_u_divide_after (mep_ext1_cpu *, const mepcop1_32_idesc *, int unit_num, unsigned long long referenced); +template UINT mep_common_model::model_u_divide_after (mep_ext1_cpu *, const mepcop1_48_idesc *, int unit_num, unsigned long long referenced); +template UINT mep_common_model::model_u_divide_after (mep_ext1_cpu *, const mepcop1_64_idesc *, int unit_num, unsigned long long referenced); // end-generated-instantiations template @@ -194,6 +230,10 @@ mep_common_model::model_u_load_gpr_after (CPU *cpu, co // begin-generated-instantiations template UINT mep_common_model::model_u_load_gpr_after (mep_basic_cpu *, const mep_idesc *, int unit_num, unsigned long long referenced, INT loadreg); template UINT mep_common_model::model_u_load_gpr_after (mep_ext1_cpu *, const mepcore1_idesc *, int unit_num, unsigned long long referenced, INT loadreg); +template UINT mep_common_model::model_u_load_gpr_after (mep_ext1_cpu *, const mepcop1_16_idesc *, int unit_num, unsigned long long referenced, INT loadreg); +template UINT mep_common_model::model_u_load_gpr_after (mep_ext1_cpu *, const mepcop1_32_idesc *, int unit_num, unsigned long long referenced, INT loadreg); +template UINT mep_common_model::model_u_load_gpr_after (mep_ext1_cpu *, const mepcop1_48_idesc *, int unit_num, unsigned long long referenced, INT loadreg); +template UINT mep_common_model::model_u_load_gpr_after (mep_ext1_cpu *, const mepcop1_64_idesc *, int unit_num, unsigned long long referenced, INT loadreg); // end-generated-instantiations template @@ -213,6 +253,10 @@ mep_common_model::model_u_ldcb_gpr_after (CPU *cpu, co // begin-generated-instantiations template UINT mep_common_model::model_u_ldcb_gpr_after (mep_basic_cpu *, const mep_idesc *, int unit_num, unsigned long long referenced, INT loadreg); template UINT mep_common_model::model_u_ldcb_gpr_after (mep_ext1_cpu *, const mepcore1_idesc *, int unit_num, unsigned long long referenced, INT loadreg); +template UINT mep_common_model::model_u_ldcb_gpr_after (mep_ext1_cpu *, const mepcop1_16_idesc *, int unit_num, unsigned long long referenced, INT loadreg); +template UINT mep_common_model::model_u_ldcb_gpr_after (mep_ext1_cpu *, const mepcop1_32_idesc *, int unit_num, unsigned long long referenced, INT loadreg); +template UINT mep_common_model::model_u_ldcb_gpr_after (mep_ext1_cpu *, const mepcop1_48_idesc *, int unit_num, unsigned long long referenced, INT loadreg); +template UINT mep_common_model::model_u_ldcb_gpr_after (mep_ext1_cpu *, const mepcop1_64_idesc *, int unit_num, unsigned long long referenced, INT loadreg); // end-generated-instantiations template @@ -232,6 +276,10 @@ mep_common_model::model_u_mul_gpr_after (CPU *cpu, con // begin-generated-instantiations template UINT mep_common_model::model_u_mul_gpr_after (mep_basic_cpu *, const mep_idesc *, int unit_num, unsigned long long referenced, INT resultreg); template UINT mep_common_model::model_u_mul_gpr_after (mep_ext1_cpu *, const mepcore1_idesc *, int unit_num, unsigned long long referenced, INT resultreg); +template UINT mep_common_model::model_u_mul_gpr_after (mep_ext1_cpu *, const mepcop1_16_idesc *, int unit_num, unsigned long long referenced, INT resultreg); +template UINT mep_common_model::model_u_mul_gpr_after (mep_ext1_cpu *, const mepcop1_32_idesc *, int unit_num, unsigned long long referenced, INT resultreg); +template UINT mep_common_model::model_u_mul_gpr_after (mep_ext1_cpu *, const mepcop1_48_idesc *, int unit_num, unsigned long long referenced, INT resultreg); +template UINT mep_common_model::model_u_mul_gpr_after (mep_ext1_cpu *, const mepcop1_64_idesc *, int unit_num, unsigned long long referenced, INT resultreg); // end-generated-instantiations template @@ -268,4 +316,8 @@ mep_common_model::step_latency (sid::host_int_4 cycles // begin-generated-instantiations template void mep_common_model::step_latency (sid::host_int_4 cycles); template void mep_common_model::step_latency (sid::host_int_4 cycles); +template void mep_common_model::step_latency (sid::host_int_4 cycles); +template void mep_common_model::step_latency (sid::host_int_4 cycles); +template void mep_common_model::step_latency (sid::host_int_4 cycles); +template void mep_common_model::step_latency (sid::host_int_4 cycles); // end-generated-instantiations diff --git a/sid/component/cgen-cpu/mep/ivc2-cop.cxx b/sid/component/cgen-cpu/mep/ivc2-cop.cxx new file mode 100644 index 0000000000..6fc3c715e5 --- /dev/null +++ b/sid/component/cgen-cpu/mep/ivc2-cop.cxx @@ -0,0 +1,6567 @@ +// ivc2-cop.cxx - CPU components. -*- C++ -*- +// CGEN cop support for the MeP IVC2 coprocessor for SID +// +// Copyright (C) 2009 Red Hat. +// This file is part of SID and is licensed under the GPL. +// See the file COPYING.SID for conditions for redistribution. + +#include "config.h" +#include "mep.h" + +extern "C" { +#include "bfd.h" +#include "dis-asm.h" +} + +#define cr(x) h_cr_ivc2_get ((x)) +#define cw(x,v) h_cr_ivc2_set ((x), (v)) +#define ccr(x) h_ccr_ivc2_get ((x)) +#define ccw(x,v) h_ccr_ivc2_set ((x), (v)) + +template +static void unpack (DI val, TY ptr[]) +{ + int i; + for (i=0; i> (i*sizeof(TY)*8); +} + +template +static DI pack (TY ptr[]) +{ + DI rv = 0; + int i; + for (i=0; i> 61) & 4; + rv |= (b >> 62) & 2; + rv |= (c >> 63) & 1; + return rv; +} + +static const char * +di(DI op) +{ + static char buf[4][40]; + static int bi = 0; + static const char hex[] = "0123456789abcdef"; + int i; + char *bp; + + bi = (bi+1) % 4; + bp = buf[bi]; + for (i=0; i<16; i++) + { + if (i && (i%4==0)) + *bp++ = '_'; + *bp++ = hex[(op >> ((15-i)*4)) & 0x0f]; + } + *bp = 0; + return buf[bi]; +} +static const char * +si(SI op) +{ + static char buf[4][40]; + static int bi = 0; + static const char hex[] = "0123456789abcdef"; + int i; + char *bp; + + bi = (bi+1) % 4; + bp = buf[bi]; + for (i=0; i<8; i++) + { + if (i && (i%4==0)) + *bp++ = '_'; + *bp++ = hex[(op >> ((7-i)*4)) & 0x0f]; + } + *bp = 0; + return buf[bi]; +} + + +// 1111 000 ooooo 0111 00000 qqqqq ppppp 0 cpadd3.b =croc,crqc,crpc (c3_1) +DI mep::mep_cpu_cgen::ivc2_cpadd3_b (PCADDR &pc, DI crqc, DI crpc) +{ + int i; + QI q[8], p[8], o[8]; + + unpack (crqc, q); + unpack (crpc, p); + + for (i=0; i<8; i++) + o[i] = q[i] + p[i]; + + return pack(o); +} + +// 1111 001 ooooo 0111 00000 qqqqq ppppp 0 cpadd3.h =croc,crqc,crpc (c3_1) +DI mep::mep_cpu_cgen::ivc2_cpadd3_h (PCADDR &pc, DI crqc, DI crpc) +{ + int i; + HI q[4], p[4], o[4]; + + unpack (crqc, q); + unpack (crpc, p); + + for (i=0; i<4; i++) + o[i] = q[i] + p[i]; + + return pack(o); +} + +// 1111 010 ooooo 0111 00000 qqqqq ppppp 0 cpadd3.w =croc,crqc,crpc (c3_1) +DI mep::mep_cpu_cgen::ivc2_cpadd3_w (PCADDR &pc, DI crqc, DI crpc) +{ + int i; + SI q[2], p[2], o[2]; + + unpack (crqc, q); + unpack (crpc, p); + + for (i=0; i<2; i++) + o[i] = q[i] + p[i]; + + return pack(o); +} + +// 1111 011 ooooo 0111 00000 qqqqq ppppp 0 cdadd3 =croc,crqc,crpc (c3_1) +DI mep::mep_cpu_cgen::ivc2_cdadd3 (PCADDR &pc, DI crqc, DI crpc) +{ + return crqc + crpc; +} + +// 1111 100 ooooo 0111 00000 qqqqq ppppp 0 cpsub3.b =croc,crqc,crpc (c3_1) +DI mep::mep_cpu_cgen::ivc2_cpsub3_b (PCADDR &pc, DI crqc, DI crpc) +{ + int i; + QI q[8], p[8], o[8]; + + unpack (crqc, q); + unpack (crpc, p); + + for (i=0; i<8; i++) + o[i] = q[i] - p[i]; + + return pack(o); +} + +// 1111 101 ooooo 0111 00000 qqqqq ppppp 0 cpsub3.h =croc,crqc,crpc (c3_1) +DI mep::mep_cpu_cgen::ivc2_cpsub3_h (PCADDR &pc, DI crqc, DI crpc) +{ + int i; + HI q[4], p[4], o[4]; + + unpack (crqc, q); + unpack (crpc, p); + + for (i=0; i<4; i++) + o[i] = q[i] - p[i]; + + return pack(o); +} + +// 1111 110 ooooo 0111 00000 qqqqq ppppp 0 cpsub3.w =croc,crqc,crpc (c3_1) +DI mep::mep_cpu_cgen::ivc2_cpsub3_w (PCADDR &pc, DI crqc, DI crpc) +{ + int i; + SI q[2], p[2], o[2]; + + unpack (crqc, q); + unpack (crpc, p); + + for (i=0; i<2; i++) + o[i] = q[i] - p[i]; + + return pack(o); +} + +// 1111 111 ooooo 0111 00000 qqqqq ppppp 0 cdsub3 =croc,crqc,crpc (c3_1) +DI mep::mep_cpu_cgen::ivc2_cdsub3 (PCADDR &pc, DI crqc, DI crpc) +{ + return crqc - crpc; +} + +// 1111 000 ooooo 0111 00001 qqqqq ppppp 0 cpand3 =croc,crqc,crpc (c3_1) +DI mep::mep_cpu_cgen::ivc2_cpand3 (PCADDR &pc, DI crqc, DI crpc) +{ + return crqc & crpc; +} + +// 1111 001 ooooo 0111 00001 qqqqq ppppp 0 cpor3 =croc,crqc,crpc (c3_1) +DI mep::mep_cpu_cgen::ivc2_cpor3 (PCADDR &pc, DI crqc, DI crpc) +{ + return crqc | crpc; +} + +// 1111 010 ooooo 0111 00001 qqqqq ppppp 0 cpnor3 =croc,crqc,crpc (c3_1) +DI mep::mep_cpu_cgen::ivc2_cpnor3 (PCADDR &pc, DI crqc, DI crpc) +{ + return ~ ( crqc | crpc ); +} + +// 1111 011 ooooo 0111 00001 qqqqq ppppp 0 cpxor3 =croc,crqc,crpc (c3_1) +DI mep::mep_cpu_cgen::ivc2_cpxor3 (PCADDR &pc, DI crqc, DI crpc) +{ + return crqc ^ crpc; +} + +// 1111 100 ooooo 0111 00001 qqqqq ppppp 0 cpsel =croc,crqc,crpc (c3_1) +DI mep::mep_cpu_cgen::ivc2_cpsel (PCADDR &pc, DI crqc, DI crpc) +{ + int i; + int cc = ccr(IVC2_CC); + QI q[8], p[8], o[8]; + + unpack (crqc, q); + unpack (crpc, p); + for (i=0; i<8; i++) + o[i] = (cc & (1<> (64-imm3*8)); +} + +// 1111 110 ooooo 0111 00001 qqqqq ppppp 0 cpfsftbs0 =croc,crqc,crpc (c3_1) +DI mep::mep_cpu_cgen::ivc2_cpfsftbs0 (PCADDR &pc, DI crqc, DI crpc) +{ + int shift = ccr (IVC2_CSAR0) * 8; + + return (crqc << (shift)) | (crpc >> (64-shift)); +} + +// 1111 111 ooooo 0111 00001 qqqqq ppppp 0 cpfsftbs1 =croc,crqc,crpc (c3_1) +DI mep::mep_cpu_cgen::ivc2_cpfsftbs1 (PCADDR &pc, DI crqc, DI crpc) +{ + int shift = ccr (IVC2_CSAR1) * 8; + + return (crqc << (shift)) | (crpc >> (64-shift)); +} + +// 1111 000 ooooo 0111 00010 qqqqq ppppp 0 cpunpacku.b =croc,crqc,crpc (c3_1) +DI mep::mep_cpu_cgen::ivc2_cpunpacku_b (PCADDR &pc, DI crqc, DI crpc) +{ + QI q[8], p[8], o[8]; + + unpack (crqc, q); + unpack (crpc, p); + + o[7] = q[7]; o[6] = p[7]; + o[5] = q[6]; o[4] = p[6]; + o[3] = q[5]; o[2] = p[5]; + o[1] = q[4]; o[0] = p[4]; + + return pack (o); +} + +// 1111 001 ooooo 0111 00010 qqqqq ppppp 0 cpunpacku.h =croc,crqc,crpc (c3_1) +DI mep::mep_cpu_cgen::ivc2_cpunpacku_h (PCADDR &pc, DI crqc, DI crpc) +{ + HI q[4], p[4], o[4]; + + unpack (crqc, q); + unpack (crpc, p); + + o[3] = q[3]; o[2] = p[3]; + o[1] = q[2]; o[0] = p[2]; + + return pack (o); +} + +// 1111 010 ooooo 0111 00010 qqqqq ppppp 0 cpunpacku.w =croc,crqc,crpc (c3_1) +DI mep::mep_cpu_cgen::ivc2_cpunpacku_w (PCADDR &pc, DI crqc, DI crpc) +{ + SI q[2], p[2], o[2]; + + unpack (crqc, q); + unpack (crpc, p); + + o[1] = q[1]; o[0] = p[1]; + + return pack (o); +} + +// 1111 100 ooooo 0111 00010 qqqqq ppppp 0 cpunpackl.b =croc,crqc,crpc (c3_1) +DI mep::mep_cpu_cgen::ivc2_cpunpackl_b (PCADDR &pc, DI crqc, DI crpc) +{ + QI q[8], p[8], o[8]; + + unpack (crqc, q); + unpack (crpc, p); + + o[7] = q[3]; o[6] = p[3]; + o[5] = q[2]; o[4] = p[2]; + o[3] = q[1]; o[2] = p[1]; + o[1] = q[0]; o[0] = p[0]; + + return pack (o); +} + +// 1111 101 ooooo 0111 00010 qqqqq ppppp 0 cpunpackl.h =croc,crqc,crpc (c3_1) +DI mep::mep_cpu_cgen::ivc2_cpunpackl_h (PCADDR &pc, DI crqc, DI crpc) +{ + HI q[4], p[4], o[4]; + + unpack (crqc, q); + unpack (crpc, p); + + o[3] = q[1]; o[2] = p[1]; + o[1] = q[0]; o[0] = p[0]; + + return pack (o); +} + +// 1111 110 ooooo 0111 00010 qqqqq ppppp 0 cpunpackl.w =croc,crqc,crpc (c3_1) +DI mep::mep_cpu_cgen::ivc2_cpunpackl_w (PCADDR &pc, DI crqc, DI crpc) +{ + SI q[2], p[2], o[2]; + + unpack (crqc, q); + unpack (crpc, p); + + o[1] = q[0]; o[0] = p[0]; + + return pack (o); +} + +// 1111 100 ooooo 0111 00011 qqqqq ppppp 0 cppacku.b =croc,crqc,crpc (c3_1) +DI mep::mep_cpu_cgen::ivc2_cppacku_b (PCADDR &pc, DI crqc, DI crpc) +{ + int i; + UQI o[8]; + HI q[4], p[4]; + + unpack (crqc, q); + unpack (crpc, p); + + for (i=0; i<4; i++) + { + o[i+4] = (q[i] > 255) ? 255 : (q[i] < 0) ? 0 : q[i]; + o[i] = (p[i] > 255) ? 255 : (p[i] < 0) ? 0 : p[i]; + } + + return pack (o); +} + +// 1111 101 ooooo 0111 00011 qqqqq ppppp 0 cppack.b =croc,crqc,crpc (c3_1) +DI mep::mep_cpu_cgen::ivc2_cppack_b (PCADDR &pc, DI crqc, DI crpc) +{ + int i; + QI o[8]; + HI q[4], p[4]; + + unpack (crqc, q); + unpack (crpc, p); + + for (i=0; i<4; i++) + { + o[i+4] = (q[i] > 127) ? 127 : (q[i] < -128) ? -128 : q[i]; + o[i] = (p[i] > 127) ? 127 : (p[i] < -128) ? -128 : p[i]; + } + + return pack (o); +} + +// 1111 111 ooooo 0111 00011 qqqqq ppppp 0 cppack.h =croc,crqc,crpc (c3_1) +DI mep::mep_cpu_cgen::ivc2_cppack_h (PCADDR &pc, DI crqc, DI crpc) +{ + int i; + HI o[4]; + SI q[2], p[2]; + + unpack (crqc, q); + unpack (crpc, p); + + for (i=0; i<2; i++) + { + o[i+2] = (q[i] > 32767) ? 32767 : (q[i] < -32768) ? -32768 : q[i]; + o[i] = (p[i] > 32767) ? 32767 : (p[i] < -32768) ? -32768 : p[i]; + } + + return pack (o); +} + +// 1111 000 ooooo 0111 00100 qqqqq ppppp 0 cpsrl3.b =croc,crqc,crpc (c3_1) +DI mep::mep_cpu_cgen::ivc2_cpsrl3_b (PCADDR &pc, DI crqc, DI crpc) +{ + int i; + UQI q[8], o[8]; + + unpack (crqc, q); + + for (i=0; i<8; i++) + o[i] = q[i] >> (crpc & 7); + + return pack (o); +} + +// 1111 001 ooooo 0111 00100 qqqqq ppppp 0 cpssrl3.b =croc,crqc,crpc (c3_1) +DI mep::mep_cpu_cgen::ivc2_cpssrl3_b (PCADDR &pc, DI crqc, DI crpc) +{ + int i; + UQI q[8], p[8], o[8]; + + unpack (crqc, q); + unpack (crpc, p); + + for (i=0; i<8; i++) + o[i] = q[i] >> (p[i] & 7); + + return pack (o); +} + +// 1111 010 ooooo 0111 00100 qqqqq ppppp 0 cpsrl3.h =croc,crqc,crpc (c3_1) +DI mep::mep_cpu_cgen::ivc2_cpsrl3_h (PCADDR &pc, DI crqc, DI crpc) +{ + int i; + UHI q[4], o[4]; + + unpack (crqc, q); + + for (i=0; i<4; i++) + o[i] = q[i] >> (crpc & 15); + + return pack (o); +} + +// 1111 011 ooooo 0111 00100 qqqqq ppppp 0 cpssrl3.h =croc,crqc,crpc (c3_1) +DI mep::mep_cpu_cgen::ivc2_cpssrl3_h (PCADDR &pc, DI crqc, DI crpc) +{ + int i; + UHI q[4], p[4], o[4]; + + unpack (crqc, q); + unpack (crpc, p); + + for (i=0; i<4; i++) + o[i] = q[i] >> (p[i] & 15); + + return pack (o); +} + +// 1111 100 ooooo 0111 00100 qqqqq ppppp 0 cpsrl3.w =croc,crqc,crpc (c3_1) +DI mep::mep_cpu_cgen::ivc2_cpsrl3_w (PCADDR &pc, DI crqc, DI crpc) +{ + int i; + USI q[2], o[2]; + + unpack (crqc, q); + + for (i=0; i<2; i++) + o[i] = q[i] >> (crpc & 31); + + return pack (o); +} + +// 1111 101 ooooo 0111 00100 qqqqq ppppp 0 cpssrl3.w =croc,crqc,crpc (c3_1) +DI mep::mep_cpu_cgen::ivc2_cpssrl3_w (PCADDR &pc, DI crqc, DI crpc) +{ + int i; + USI q[2], p[2], o[2]; + + unpack (crqc, q); + unpack (crpc, p); + + for (i=0; i<2; i++) + o[i] = q[i] >> (p[i] & 31); + + return pack (o); +} + +// 1111 110 ooooo 0111 00100 qqqqq ppppp 0 cdsrl3 =croc,crqc,crpc (c3_1) +DI mep::mep_cpu_cgen::ivc2_cdsrl3 (PCADDR &pc, DI crqc, DI crpc) +{ + return (UDI)crqc >> (crpc & 63); +} + +// 1111 000 ooooo 0111 00101 qqqqq ppppp 0 cpsra3.b =croc,crqc,crpc (c3_1) +DI mep::mep_cpu_cgen::ivc2_cpsra3_b (PCADDR &pc, DI crqc, DI crpc) +{ + int i; + QI q[8], o[8]; + + unpack (crqc, q); + + for (i=0; i<8; i++) + o[i] = q[i] >> (crpc & 7); + + return pack (o); +} + +// 1111 001 ooooo 0111 00101 qqqqq ppppp 0 cpssra3.b =croc,crqc,crpc (c3_1) +DI mep::mep_cpu_cgen::ivc2_cpssra3_b (PCADDR &pc, DI crqc, DI crpc) +{ + int i; + QI q[8], p[8], o[8]; + + unpack (crqc, q); + unpack (crpc, p); + + for (i=0; i<8; i++) + o[i] = q[i] >> (p[i] & 7); + + return pack (o); +} + +// 1111 010 ooooo 0111 00101 qqqqq ppppp 0 cpsra3.h =croc,crqc,crpc (c3_1) +DI mep::mep_cpu_cgen::ivc2_cpsra3_h (PCADDR &pc, DI crqc, DI crpc) +{ + int i; + HI q[4], o[4]; + + unpack (crqc, q); + + for (i=0; i<4; i++) + o[i] = q[i] >> (crpc & 15); + + return pack (o); +} + +// 1111 011 ooooo 0111 00101 qqqqq ppppp 0 cpssra3.h =croc,crqc,crpc (c3_1) +DI mep::mep_cpu_cgen::ivc2_cpssra3_h (PCADDR &pc, DI crqc, DI crpc) +{ + int i; + HI q[4], p[4], o[4]; + + unpack (crqc, q); + unpack (crpc, p); + + for (i=0; i<4; i++) + o[i] = q[i] >> (p[i] & 15); + + return pack (o); +} + +// 1111 100 ooooo 0111 00101 qqqqq ppppp 0 cpsra3.w =croc,crqc,crpc (c3_1) +DI mep::mep_cpu_cgen::ivc2_cpsra3_w (PCADDR &pc, DI crqc, DI crpc) +{ + int i; + SI q[2], o[2]; + + unpack (crqc, q); + + for (i=0; i<2; i++) + o[i] = q[i] >> (crpc & 31); + + return pack (o); +} + +// 1111 101 ooooo 0111 00101 qqqqq ppppp 0 cpssra3.w =croc,crqc,crpc (c3_1) +DI mep::mep_cpu_cgen::ivc2_cpssra3_w (PCADDR &pc, DI crqc, DI crpc) +{ + int i; + SI q[2], p[2], o[2]; + + unpack (crqc, q); + unpack (crpc, p); + + for (i=0; i<2; i++) + o[i] = q[i] >> (p[i] & 31); + + return pack (o); +} + +// 1111 110 ooooo 0111 00101 qqqqq ppppp 0 cdsra3 =croc,crqc,crpc (c3_1) +DI mep::mep_cpu_cgen::ivc2_cdsra3 (PCADDR &pc, DI crqc, DI crpc) +{ + return crqc >> (crpc & 63); +} + +// 1111 000 ooooo 0111 00110 qqqqq ppppp 0 cpsll3.b =croc,crqc,crpc (c3_1) +DI mep::mep_cpu_cgen::ivc2_cpsll3_b (PCADDR &pc, DI crqc, DI crpc) +{ + int i; + UQI q[8], o[8]; + + unpack (crqc, q); + + for (i=0; i<8; i++) + o[i] = q[i] << (crpc & 7); + + return pack (o); +} + +// 1111 001 ooooo 0111 00110 qqqqq ppppp 0 cpssll3.b =croc,crqc,crpc (c3_1) +DI mep::mep_cpu_cgen::ivc2_cpssll3_b (PCADDR &pc, DI crqc, DI crpc) +{ + int i; + UQI q[8], p[8], o[8]; + + unpack (crqc, q); + unpack (crpc, p); + + for (i=0; i<8; i++) + o[i] = q[i] << (p[i] & 7); + + return pack (o); +} + +// 1111 010 ooooo 0111 00110 qqqqq ppppp 0 cpsll3.h =croc,crqc,crpc (c3_1) +DI mep::mep_cpu_cgen::ivc2_cpsll3_h (PCADDR &pc, DI crqc, DI crpc) +{ + int i; + UHI q[4], o[4]; + + unpack (crqc, q); + + for (i=0; i<4; i++) + o[i] = q[i] << (crpc & 15); + + return pack (o); +} + +// 1111 011 ooooo 0111 00110 qqqqq ppppp 0 cpssll3.h =croc,crqc,crpc (c3_1) +DI mep::mep_cpu_cgen::ivc2_cpssll3_h (PCADDR &pc, DI crqc, DI crpc) +{ + int i; + UHI q[4], p[4], o[4]; + + unpack (crqc, q); + unpack (crpc, p); + + for (i=0; i<4; i++) + o[i] = q[i] << (p[i] & 15); + + return pack (o); +} + +// 1111 100 ooooo 0111 00110 qqqqq ppppp 0 cpsll3.w =croc,crqc,crpc (c3_1) +DI mep::mep_cpu_cgen::ivc2_cpsll3_w (PCADDR &pc, DI crqc, DI crpc) +{ + int i; + USI q[2], o[2]; + + unpack (crqc, q); + + for (i=0; i<2; i++) + o[i] = q[i] << (crpc & 31); + + return pack (o); +} + +// 1111 101 ooooo 0111 00110 qqqqq ppppp 0 cpssll3.w =croc,crqc,crpc (c3_1) +DI mep::mep_cpu_cgen::ivc2_cpssll3_w (PCADDR &pc, DI crqc, DI crpc) +{ + int i; + USI q[2], p[2], o[2]; + + unpack (crqc, q); + unpack (crpc, p); + + for (i=0; i<2; i++) + o[i] = q[i] << (p[i] & 31); + + return pack (o); +} + +// 1111 110 ooooo 0111 00110 qqqqq ppppp 0 cdsll3 =croc,crqc,crpc (c3_1) +DI mep::mep_cpu_cgen::ivc2_cdsll3 (PCADDR &pc, DI crqc, DI crpc) +{ + return (UDI)crqc << (crpc & 63); +} + +// 1111 010 ooooo 0111 00111 qqqqq ppppp 0 cpsla3.h =croc,crqc,crpc (c3_1) +DI mep::mep_cpu_cgen::ivc2_cpsla3_h (PCADDR &pc, DI crqc, DI crpc) +{ + int i, cofr_idx; + USI cofr; + HI q[4], o[4]; + + if (ivc2_slot == IVC2_P0 || ivc2_slot == IVC2_P0S) + cofr_idx = IVC2_COFR0; + else /* C3 or P1 */ + cofr_idx = IVC2_COFR1; + cofr = ccr (cofr_idx); + + unpack (crqc, q); + + for (i=0; i<4; i++) + { + SI tmp = q[i]; + tmp <<= (crpc & 15); + if (tmp > 0x7fff) + { + o[i] = 0x7fff; + cofr |= (3 << i*2); + } + else if (tmp < -0x8000) + { + o[i] = -0x8000; + cofr |= (3 << i*2); + } + else + o[i] = tmp; + } + ccw (cofr_idx, cofr); + + return pack (o); +} + +// 1111 100 ooooo 0111 00111 qqqqq ppppp 0 cpsla3.w =croc,crqc,crpc (c3_1) +DI mep::mep_cpu_cgen::ivc2_cpsla3_w (PCADDR &pc, DI crqc, DI crpc) +{ + int i, cofr_idx; + USI cofr; + SI q[2], o[2]; + + if (ivc2_slot == IVC2_P0 || ivc2_slot == IVC2_P0S) + cofr_idx = IVC2_COFR0; + else /* C3 or P1 */ + cofr_idx = IVC2_COFR1; + cofr = ccr (cofr_idx); + + unpack (crqc, q); + + for (i=0; i<2; i++) + { + DI tmp = q[i]; + tmp <<= (crpc & 15); + if (tmp > 0x7fffffffLL) + { + o[i] = 0x7fffffffLL; + cofr |= (15 << i*4); + } + else if (tmp < -0x80000000LL) + { + o[i] = -0x80000000LL; + cofr |= (15 << i*4); + } + else + o[i] = tmp; + } + ccw (cofr_idx, cofr); + + return pack (o); +} + +// 1111 010 ooooo 0111 01000 qqqqq ppppp 0 cpsadd3.h =croc,crqc,crpc (c3_1) +DI mep::mep_cpu_cgen::ivc2_cpsadd3_h (PCADDR &pc, DI crqc, DI crpc) +{ + int i, cofr_idx; + USI cofr; + HI q[4], p[4], o[4]; + + if (ivc2_slot == IVC2_P0 || ivc2_slot == IVC2_P0S) + cofr_idx = IVC2_COFR0; + else /* C3 or P1 */ + cofr_idx = IVC2_COFR1; + cofr = ccr (cofr_idx); + + unpack (crqc, q); + unpack (crpc, p); + + for (i=0; i<4; i++) + { + SI tmp = (SI)q[i] + (SI)p[i]; + if (tmp > 0x7fff) + { + o[i] = 0x7fff; + cofr |= (3 << i*2); + } + else if (tmp < -0x8000) + { + o[i] = -0x8000; + cofr |= (3 << i*2); + } + else + o[i] = tmp; + } + ccw (cofr_idx, cofr); + + return pack(o); +} + +// 1111 011 ooooo 0111 01000 qqqqq ppppp 0 cpsadd3.w =croc,crqc,crpc (c3_1) +DI mep::mep_cpu_cgen::ivc2_cpsadd3_w (PCADDR &pc, DI crqc, DI crpc) +{ + int i, cofr_idx; + USI cofr; + SI q[2], p[2], o[2]; + + if (ivc2_slot == IVC2_P0 || ivc2_slot == IVC2_P0S) + cofr_idx = IVC2_COFR0; + else /* C3 or P1 */ + cofr_idx = IVC2_COFR1; + cofr = ccr (cofr_idx); + + unpack (crqc, q); + unpack (crpc, p); + + for (i=0; i<4; i++) + { + DI tmp = (DI)q[i] + (DI)p[i]; + if (tmp > 0x7fffffffLL) + { + o[i] = 0x7fffffffLL; + cofr |= (15 << i*4); + } + else if (tmp < -0x80000000LL) + { + o[i] = -0x80000000LL; + cofr |= (15 << i*4); + } + else + o[i] = tmp; + } + ccw (cofr_idx, cofr); + + return pack(o); +} + +// 1111 110 ooooo 0111 01000 qqqqq ppppp 0 cpssub3.h =croc,crqc,crpc (c3_1) +DI mep::mep_cpu_cgen::ivc2_cpssub3_h (PCADDR &pc, DI crqc, DI crpc) +{ + int i, cofr_idx; + USI cofr; + HI q[4], p[4], o[4]; + + if (ivc2_slot == IVC2_P0 || ivc2_slot == IVC2_P0S) + cofr_idx = IVC2_COFR0; + else /* C3 or P1 */ + cofr_idx = IVC2_COFR1; + cofr = ccr (cofr_idx); + + unpack (crqc, q); + unpack (crpc, p); + + for (i=0; i<4; i++) + { + SI tmp = (SI)q[i] - (SI)p[i]; + if (tmp > 0x7fff) + { + o[i] = 0x7fff; + cofr |= (3 << i*2); + } + else if (tmp < -0x8000) + { + o[i] = -0x8000; + cofr |= (3 << i*2); + } + else + o[i] = tmp; + } + ccw (cofr_idx, cofr); + + return pack(o); +} + +// 1111 111 ooooo 0111 01000 qqqqq ppppp 0 cpssub3.w =croc,crqc,crpc (c3_1) +DI mep::mep_cpu_cgen::ivc2_cpssub3_w (PCADDR &pc, DI crqc, DI crpc) +{ + int i, cofr_idx; + USI cofr; + SI q[2], p[2], o[2]; + + if (ivc2_slot == IVC2_P0 || ivc2_slot == IVC2_P0S) + cofr_idx = IVC2_COFR0; + else /* C3 or P1 */ + cofr_idx = IVC2_COFR1; + cofr = ccr (cofr_idx); + + unpack (crqc, q); + unpack (crpc, p); + + for (i=0; i<4; i++) + { + DI tmp = (DI)q[i] - (DI)p[i]; + if (tmp > 0x7fffffffLL) + { + o[i] = 0x7fffffffLL; + cofr |= (15 << i*4); + } + else if (tmp < -0x80000000LL) + { + o[i] = -0x80000000LL; + cofr |= (15 << i*4); + } + else + o[i] = tmp; + } + ccw (cofr_idx, cofr); + + return pack(o); +} + +// 1111 000 ooooo 0111 01001 qqqqq ppppp 0 cpextuaddu3.b =croc,crqc,crpc (c3_1) +DI mep::mep_cpu_cgen::ivc2_cpextuaddu3_b (PCADDR &pc, DI crqc, DI crpc) +{ + int i; + UQI q[8], p[8]; + UHI o[4]; + + unpack (crqc, q); + unpack (crpc, p); + + for (i=0; i<4; i++) + o[i] = (UHI) q[i+4] + (UHI) p[i+4]; + + return pack (o); +} + +// 1111 001 ooooo 0111 01001 qqqqq ppppp 0 cpextuadd3.b =croc,crqc,crpc (c3_1) +DI mep::mep_cpu_cgen::ivc2_cpextuadd3_b (PCADDR &pc, DI crqc, DI crpc) +{ + int i; + QI q[8], p[8]; + HI o[4]; + + unpack (crqc, q); + unpack (crpc, p); + + for (i=0; i<4; i++) + o[i] = (HI) q[i+4] + (HI) p[i+4]; + + return pack (o); +} + +// 1111 010 ooooo 0111 01001 qqqqq ppppp 0 cpextladdu3.b =croc,crqc,crpc (c3_1) +DI mep::mep_cpu_cgen::ivc2_cpextladdu3_b (PCADDR &pc, DI crqc, DI crpc) +{ + int i; + UQI q[8], p[8]; + UHI o[4]; + + unpack (crqc, q); + unpack (crpc, p); + + for (i=0; i<4; i++) + o[i] = (UHI) q[i] + (UHI) p[i]; + + return pack (o); +} + +// 1111 011 ooooo 0111 01001 qqqqq ppppp 0 cpextladd3.b =croc,crqc,crpc (c3_1) +DI mep::mep_cpu_cgen::ivc2_cpextladd3_b (PCADDR &pc, DI crqc, DI crpc) +{ + int i; + QI q[8], p[8]; + HI o[4]; + + unpack (crqc, q); + unpack (crpc, p); + + for (i=0; i<4; i++) + o[i] = (HI) q[i] + (HI) p[i]; + + return pack (o); +} + +// 1111 100 ooooo 0111 01001 qqqqq ppppp 0 cpextusubu3.b =croc,crqc,crpc (c3_1) +DI mep::mep_cpu_cgen::ivc2_cpextusubu3_b (PCADDR &pc, DI crqc, DI crpc) +{ + int i; + UQI q[8], p[8]; + HI o[4]; + + unpack (crqc, q); + unpack (crpc, p); + + for (i=0; i<4; i++) + o[i] = (HI) q[i+4] - (HI) p[i+4]; + + return pack (o); +} + +// 1111 101 ooooo 0111 01001 qqqqq ppppp 0 cpextusub3.b =croc,crqc,crpc (c3_1) +DI mep::mep_cpu_cgen::ivc2_cpextusub3_b (PCADDR &pc, DI crqc, DI crpc) +{ + int i; + QI q[8], p[8]; + HI o[4]; + + unpack (crqc, q); + unpack (crpc, p); + + for (i=0; i<4; i++) + o[i] = (HI) q[i+4] - (HI) p[i+4]; + + return pack (o); +} + +// 1111 110 ooooo 0111 01001 qqqqq ppppp 0 cpextlsubu3.b =croc,crqc,crpc (c3_1) +DI mep::mep_cpu_cgen::ivc2_cpextlsubu3_b (PCADDR &pc, DI crqc, DI crpc) +{ + int i; + UQI q[8], p[8]; + HI o[4]; + + unpack (crqc, q); + unpack (crpc, p); + + for (i=0; i<4; i++) + o[i] = (HI) q[i] - (HI) p[i]; + + return pack (o); +} + +// 1111 111 ooooo 0111 01001 qqqqq ppppp 0 cpextlsub3.b =croc,crqc,crpc (c3_1) +DI mep::mep_cpu_cgen::ivc2_cpextlsub3_b (PCADDR &pc, DI crqc, DI crpc) +{ + int i; + QI q[8], p[8]; + HI o[4]; + + unpack (crqc, q); + unpack (crpc, p); + + for (i=0; i<4; i++) + o[i] = (HI) q[i] - (HI) p[i]; + + return pack (o); +} + +// 1111 000 ooooo 0111 01010 qqqqq ppppp 0 cpaveu3.b =croc,crqc,crpc (c3_1) +DI mep::mep_cpu_cgen::ivc2_cpaveu3_b (PCADDR &pc, DI crqc, DI crpc) +{ + int i; + UQI q[8], p[8], o[8]; + + unpack (crqc, q); + unpack (crpc, p); + + for (i=0; i<8; i++) + o[i] = ((UHI)q[i] + (UHI)p[i] + 1) >> 1; + + return pack(o); +} + +// 1111 001 ooooo 0111 01010 qqqqq ppppp 0 cpave3.b =croc,crqc,crpc (c3_1) +DI mep::mep_cpu_cgen::ivc2_cpave3_b (PCADDR &pc, DI crqc, DI crpc) +{ + int i; + QI q[8], p[8], o[8]; + + unpack (crqc, q); + unpack (crpc, p); + + for (i=0; i<8; i++) + o[i] = ((HI)q[i] + (HI)p[i] + 1) >> 1; + + return pack(o); +} + +// 1111 010 ooooo 0111 01010 qqqqq ppppp 0 cpave3.h =croc,crqc,crpc (c3_1) +DI mep::mep_cpu_cgen::ivc2_cpave3_h (PCADDR &pc, DI crqc, DI crpc) +{ + int i; + HI q[4], p[4], o[4]; + + unpack (crqc, q); + unpack (crpc, p); + + for (i=0; i<4; i++) + o[i] = ((SI)q[i] + (SI)p[i] + 1) >> 1; + + return pack(o); +} + +// 1111 011 ooooo 0111 01010 qqqqq ppppp 0 cpave3.w =croc,crqc,crpc (c3_1) +DI mep::mep_cpu_cgen::ivc2_cpave3_w (PCADDR &pc, DI crqc, DI crpc) +{ + int i; + SI q[2], p[2], o[2]; + + unpack (crqc, q); + unpack (crpc, p); + + for (i=0; i<2; i++) + o[i] = ((DI)q[i] + (DI)p[i] + 1) >> 1; + + return pack(o); +} + +// 1111 100 ooooo 0111 01010 qqqqq ppppp 0 cpaddsru3.b =croc,crqc,crpc (c3_1) +DI mep::mep_cpu_cgen::ivc2_cpaddsru3_b (PCADDR &pc, DI crqc, DI crpc) +{ + int i; + UQI q[8], p[8], o[8]; + + unpack (crqc, q); + unpack (crpc, p); + + for (i=0; i<8; i++) + o[i] = ((UHI)q[i] + (UHI)p[i]) >> 1; + + return pack(o); +} + +// 1111 101 ooooo 0111 01010 qqqqq ppppp 0 cpaddsr3.b =croc,crqc,crpc (c3_1) +DI mep::mep_cpu_cgen::ivc2_cpaddsr3_b (PCADDR &pc, DI crqc, DI crpc) +{ + int i; + QI q[8], p[8], o[8]; + + unpack (crqc, q); + unpack (crpc, p); + + for (i=0; i<8; i++) + o[i] = ((HI)q[i] + (HI)p[i]) >> 1; + + return pack(o); +} + +// 1111 110 ooooo 0111 01010 qqqqq ppppp 0 cpaddsr3.h =croc,crqc,crpc (c3_1) +DI mep::mep_cpu_cgen::ivc2_cpaddsr3_h (PCADDR &pc, DI crqc, DI crpc) +{ + int i; + HI q[4], p[4], o[4]; + + unpack (crqc, q); + unpack (crpc, p); + + for (i=0; i<4; i++) + o[i] = ((SI)q[i] + (SI)p[i]) >> 1; + + return pack(o); +} + +// 1111 111 ooooo 0111 01010 qqqqq ppppp 0 cpaddsr3.w =croc,crqc,crpc (c3_1) +DI mep::mep_cpu_cgen::ivc2_cpaddsr3_w (PCADDR &pc, DI crqc, DI crpc) +{ + int i; + SI q[2], p[2], o[2]; + + unpack (crqc, q); + unpack (crpc, p); + + for (i=0; i<2; i++) + o[i] = ((DI)q[i] + (DI)p[i]) >> 1; + + return pack(o); +} + +// 1111 000 ooooo 0111 01011 qqqqq ppppp 0 cpabsu3.b =croc,crqc,crpc (c3_1) +DI mep::mep_cpu_cgen::ivc2_cpabsu3_b (PCADDR &pc, DI crqc, DI crpc) +{ + int i; + UQI q[8], p[8], o[8]; + + unpack (crqc, q); + unpack (crpc, p); + + for (i=0; i<8; i++) + o[i] = abs ((UHI)q[i] - (UHI)p[i]); + + return pack(o); +} + +// 1111 001 ooooo 0111 01011 qqqqq ppppp 0 cpabs3.b =croc,crqc,crpc (c3_1) +DI mep::mep_cpu_cgen::ivc2_cpabs3_b (PCADDR &pc, DI crqc, DI crpc) +{ + int i; + QI q[8], p[8], o[8]; + + unpack (crqc, q); + unpack (crpc, p); + + for (i=0; i<8; i++) + o[i] = abs ((HI)q[i] - (HI)p[i]); + + return pack(o); +} + +// 1111 010 ooooo 0111 01011 qqqqq ppppp 0 cpabs3.h =croc,crqc,crpc (c3_1) +DI mep::mep_cpu_cgen::ivc2_cpabs3_h (PCADDR &pc, DI crqc, DI crpc) +{ + int i; + HI q[4], p[4], o[4]; + + unpack (crqc, q); + unpack (crpc, p); + + for (i=0; i<4; i++) + o[i] = abs ((SI)q[i] - (SI)p[i]); + + return pack(o); +} + +// 1111 000 ooooo 0111 01100 qqqqq ppppp 0 cpmaxu3.b =croc,crqc,crpc (c3_1) +DI mep::mep_cpu_cgen::ivc2_cpmaxu3_b (PCADDR &pc, DI crqc, DI crpc) +{ + int i; + UQI q[8], p[8], o[8]; + + unpack (crqc, q); + unpack (crpc, p); + + for (i=0; i<8; i++) + o[i] = q[i] > p[i] ? q[i] : p[i]; + + return pack(o); +} + +// 1111 001 ooooo 0111 01100 qqqqq ppppp 0 cpmax3.b =croc,crqc,crpc (c3_1) +DI mep::mep_cpu_cgen::ivc2_cpmax3_b (PCADDR &pc, DI crqc, DI crpc) +{ + int i; + QI q[8], p[8], o[8]; + + unpack (crqc, q); + unpack (crpc, p); + + for (i=0; i<8; i++) + o[i] = q[i] > p[i] ? q[i] : p[i]; + + return pack(o); +} + +// 1111 011 ooooo 0111 01100 qqqqq ppppp 0 cpmax3.h =croc,crqc,crpc (c3_1) +DI mep::mep_cpu_cgen::ivc2_cpmax3_h (PCADDR &pc, DI crqc, DI crpc) +{ + int i; + HI q[4], p[4], o[4]; + + unpack (crqc, q); + unpack (crpc, p); + + for (i=0; i<4; i++) + o[i] = q[i] > p[i] ? q[i] : p[i]; + + return pack(o); +} + +// 1111 100 ooooo 0111 01100 qqqqq ppppp 0 cpmaxu3.w =croc,crqc,crpc (c3_1) +DI mep::mep_cpu_cgen::ivc2_cpmaxu3_w (PCADDR &pc, DI crqc, DI crpc) +{ + int i; + USI q[2], p[2], o[2]; + + unpack (crqc, q); + unpack (crpc, p); + + for (i=0; i<2; i++) + o[i] = q[i] > p[i] ? q[i] : p[i]; + + return pack(o); +} + +// 1111 101 ooooo 0111 01100 qqqqq ppppp 0 cpmax3.w =croc,crqc,crpc (c3_1) +DI mep::mep_cpu_cgen::ivc2_cpmax3_w (PCADDR &pc, DI crqc, DI crpc) +{ + int i; + SI q[2], p[2], o[2]; + + unpack (crqc, q); + unpack (crpc, p); + + for (i=0; i<2; i++) + o[i] = q[i] > p[i] ? q[i] : p[i]; + + return pack(o); +} + +// 1111 000 ooooo 0111 01101 qqqqq ppppp 0 cpminu3.b =croc,crqc,crpc (c3_1) +DI mep::mep_cpu_cgen::ivc2_cpminu3_b (PCADDR &pc, DI crqc, DI crpc) +{ + int i; + UQI q[8], p[8], o[8]; + + unpack (crqc, q); + unpack (crpc, p); + + for (i=0; i<8; i++) + o[i] = q[i] < p[i] ? q[i] : p[i]; + + return pack(o); +} + +// 1111 001 ooooo 0111 01101 qqqqq ppppp 0 cpmin3.b =croc,crqc,crpc (c3_1) +DI mep::mep_cpu_cgen::ivc2_cpmin3_b (PCADDR &pc, DI crqc, DI crpc) +{ + int i; + QI q[8], p[8], o[8]; + + unpack (crqc, q); + unpack (crpc, p); + + for (i=0; i<8; i++) + o[i] = q[i] < p[i] ? q[i] : p[i]; + + return pack(o); +} + +// 1111 011 ooooo 0111 01101 qqqqq ppppp 0 cpmin3.h =croc,crqc,crpc (c3_1) +DI mep::mep_cpu_cgen::ivc2_cpmin3_h (PCADDR &pc, DI crqc, DI crpc) +{ + int i; + HI q[4], p[4], o[4]; + + unpack (crqc, q); + unpack (crpc, p); + + for (i=0; i<4; i++) + o[i] = q[i] < p[i] ? q[i] : p[i]; + + return pack(o); +} + +// 1111 100 ooooo 0111 01101 qqqqq ppppp 0 cpminu3.w =croc,crqc,crpc (c3_1) +DI mep::mep_cpu_cgen::ivc2_cpminu3_w (PCADDR &pc, DI crqc, DI crpc) +{ + int i; + USI q[2], p[2], o[2]; + + unpack (crqc, q); + unpack (crpc, p); + + for (i=0; i<2; i++) + o[i] = q[i] < p[i] ? q[i] : p[i]; + + return pack(o); +} + +// 1111 101 ooooo 0111 01101 qqqqq ppppp 0 cpmin3.w =croc,crqc,crpc (c3_1) +DI mep::mep_cpu_cgen::ivc2_cpmin3_w (PCADDR &pc, DI crqc, DI crpc) +{ + int i; + SI q[2], p[2], o[2]; + + unpack (crqc, q); + unpack (crpc, p); + + for (i=0; i<2; i++) + o[i] = q[i] < p[i] ? q[i] : p[i]; + + return pack(o); +} + +// 1111 000 ooooo 0111 10000 00000 00000 0 cpmovfrcsar0 =croc (c3_1) +DI mep::mep_cpu_cgen::ivc2_cpmovfrcsar0 (PCADDR &pc) +{ + return (USI) ccr (IVC2_CSAR0); +} + +// 1111 000 ooooo 0111 10000 00000 01111 0 cpmovfrcsar1 =croc (c3_1) +DI mep::mep_cpu_cgen::ivc2_cpmovfrcsar1 (PCADDR &pc) +{ + return (USI) ccr (IVC2_CSAR1); +} + +// 1111 000 ooooo 0111 10000 00000 00001 0 cpmovfrcc =croc (c3_1) +DI mep::mep_cpu_cgen::ivc2_cpmovfrcc (PCADDR &pc) +{ + return (USI) ccr (IVC2_CC); +} + +// 1111 0000 0000 0111 10000 qqqqq 10000 0 cpmovtocsar0 crqc (c3_1) +void mep::mep_cpu_cgen::ivc2_cpmovtocsar0 (PCADDR &pc, DI crqc) +{ + ccw (IVC2_CSAR0, crqc & 7); +} + +// 1111 0000 0000 0111 10000 qqqqq 11111 0 cpmovtocsar1 crqc (c3_1) +void mep::mep_cpu_cgen::ivc2_cpmovtocsar1 (PCADDR &pc, DI crqc) +{ + ccw (IVC2_CSAR1, crqc & 7); +} + +// 1111 0000 0000 0111 10000 qqqqq 10001 0 cpmovtocc crqc (c3_1) +void mep::mep_cpu_cgen::ivc2_cpmovtocc (PCADDR &pc, DI crqc) +{ + ccw (IVC2_CC, crqc & 0xff); +} + +// 1111 000 ooooo 0111 10001 qqqqq 00000 0 cpmov =croc,crqc (c3_1) +DI mep::mep_cpu_cgen::ivc2_cpmov (PCADDR &pc, DI crqc) +{ + return crqc; +} + +// 1111 000 ooooo 0111 10001 qqqqq 00001 0 cpabsz.b =croc,crqc (c3_1) +DI mep::mep_cpu_cgen::ivc2_cpabsz_b (PCADDR &pc, DI crqc) +{ + int i; + QI o[8], q[8]; + + unpack (crqc, q); + + for (i=0; i<8; i++) + o[i] = abs (q[i]); + + return pack (o); +} + +// 1111 000 ooooo 0111 10001 qqqqq 00010 0 cpabsz.h =croc,crqc (c3_1) +DI mep::mep_cpu_cgen::ivc2_cpabsz_h (PCADDR &pc, DI crqc) +{ + int i; + HI o[4], q[4]; + + unpack (crqc, q); + + for (i=0; i<4; i++) + o[i] = abs (q[i]); + + return pack (o); +} + +// 1111 000 ooooo 0111 10001 qqqqq 00011 0 cpabsz.w =croc,crqc (c3_1) +DI mep::mep_cpu_cgen::ivc2_cpabsz_w (PCADDR &pc, DI crqc) +{ + int i; + SI o[2], q[2]; + + unpack (crqc, q); + + for (i=0; i<2; i++) + o[i] = abs (q[i]); + + return pack (o); +} + +template +static int leading_zeros (TY v) +{ + int b; + + for (b = sizeof (v) * 8 - 1; b >= 0; b --) + if (v & (1 << b)) + return sizeof (v) * 8 - 1 - b; + + return sizeof(v) * 8; +} + +template +static int leading_ones (TY v) +{ + int b; + + for (b = sizeof(v) * 8 - 1; b >= 0; b --) + if ((~v) & (1 << b)) + return sizeof (v) * 8 - 1 - b; + + return sizeof(v) * 8; +} + +// 1111 000 ooooo 0111 10001 qqqqq 00100 0 cpldz.h =croc,crqc (c3_1) +DI mep::mep_cpu_cgen::ivc2_cpldz_h (PCADDR &pc, DI crqc) +{ + int i; + HI q[4], o[4]; + + unpack (crqc, q); + + for (i=0; i<4; i++) + o[i] = leading_zeros (q[i]); + + return pack (o); +} + +// 1111 000 ooooo 0111 10001 qqqqq 00101 0 cpldz.w =croc,crqc (c3_1) +DI mep::mep_cpu_cgen::ivc2_cpldz_w (PCADDR &pc, DI crqc) +{ + int i; + SI q[2], o[2]; + + unpack (crqc, q); + + for (i=0; i<2; i++) + o[i] = leading_zeros (q[i]); + + return pack (o); +} + +// 1111 000 ooooo 0111 10001 qqqqq 00110 0 cpnorm.h =croc,crqc (c3_1) +DI mep::mep_cpu_cgen::ivc2_cpnorm_h (PCADDR &pc, DI crqc) +{ + int i; + HI q[4], o[4]; + + unpack (crqc, q); + + for (i=0; i<4; i++) + if (q[i] >= 0) + o[i] = leading_zeros (q[i]) - 1; + else + o[i] = leading_ones (q[i]) - 1; + + return pack (o); +} + +// 1111 000 ooooo 0111 10001 qqqqq 00111 0 cpnorm.w =croc,crqc (c3_1) +DI mep::mep_cpu_cgen::ivc2_cpnorm_w (PCADDR &pc, DI crqc) +{ + int i; + SI q[2], o[2]; + + unpack (crqc, q); + + for (i=0; i<2; i++) + if (q[i] >= 0) + o[i] = leading_zeros (q[i]) - 1; + else + o[i] = leading_ones (q[i]) - 1; + + return pack (o); +} + +// 1111 000 ooooo 0111 10001 qqqqq 01000 0 cphaddu.b =croc,crqc (c3_1) +DI mep::mep_cpu_cgen::ivc2_cphaddu_b (PCADDR &pc, DI crqc) +{ + int i; + UQI q[8]; + UHI o[4]; + + unpack (crqc, q); + + for (i=0; i<4; i++) + o[i] = q[i*2+1] + q[i*2]; + + return pack (o); +} + +// 1111 000 ooooo 0111 10001 qqqqq 01001 0 cphadd.b =croc,crqc (c3_1) +DI mep::mep_cpu_cgen::ivc2_cphadd_b (PCADDR &pc, DI crqc) +{ + int i; + QI q[8]; + HI o[4]; + + unpack (crqc, q); + + for (i=0; i<4; i++) + o[i] = q[i*2+1] + q[i*2]; + + return pack (o); +} + +// 1111 000 ooooo 0111 10001 qqqqq 01010 0 cphadd.h =croc,crqc (c3_1) +DI mep::mep_cpu_cgen::ivc2_cphadd_h (PCADDR &pc, DI crqc) +{ + int i; + HI q[4]; + HI o[4]; + + unpack (crqc, q); + + o[3] = o[2] = 0; + for (i=0; i<2; i++) + o[i] = q[i*2+1] + q[i*2]; + + return pack (o); +} + +// 1111 000 ooooo 0111 10001 qqqqq 01011 0 cphadd.w =croc,crqc (c3_1) +DI mep::mep_cpu_cgen::ivc2_cphadd_w (PCADDR &pc, DI crqc) +{ + int i; + SI q[2]; + SI o[2]; + + unpack (crqc, q); + + o[1] = 0; + o[0] = q[1] + q[0]; + + return pack (o); +} + +// 1111 000 ooooo 0111 10001 qqqqq 01100 0 cpccadd.b +crqc (c3_1) +void mep::mep_cpu_cgen::ivc2_cpccadd_b (PCADDR &pc, SI crqc) +{ + int i; + int cc = ccr (IVC2_CC); + int q = cr (crqc); + + for (i=0; i<8; i++) + if ((cc >> (i*2)) & 3) + q ++; + + cw (crqc, q); +} + +// 1111 000 ooooo 0111 10001 qqqqq 01101 0 cpbcast.b =croc,crqc (c3_1) +DI mep::mep_cpu_cgen::ivc2_cpbcast_b (PCADDR &pc, DI crqc) +{ + int i; + QI o[8], q[8]; + + unpack (crqc, q); + + for (i=0; i<8; i++) + o[i] = q[0]; + + return pack (o); +} + +// 1111 000 ooooo 0111 10001 qqqqq 01110 0 cpbcast.h =croc,crqc (c3_1) +DI mep::mep_cpu_cgen::ivc2_cpbcast_h (PCADDR &pc, DI crqc) +{ + int i; + HI o[4], q[4]; + + unpack (crqc, q); + + for (i=0; i<4; i++) + o[i] = q[0]; + + return pack (o); +} + +// 1111 000 ooooo 0111 10001 qqqqq 01111 0 cpbcast.w =croc,crqc (c3_1) +DI mep::mep_cpu_cgen::ivc2_cpbcast_w (PCADDR &pc, DI crqc) +{ + int i; + SI o[2], q[2]; + + unpack (crqc, q); + + for (i=0; i<2; i++) + o[i] = q[0]; + + return pack (o); +} + +// 1111 000 ooooo 0111 10001 qqqqq 10000 0 cpextuu.b =croc,crqc (c3_1) +DI mep::mep_cpu_cgen::ivc2_cpextuu_b (PCADDR &pc, DI crqc) +{ + int i; + UQI q[8]; + UHI o[4]; + + unpack (crqc, q); + + for (i=0; i<4; i++) + o[i] = q[i+4]; + + return pack (o); +} + +// 1111 000 ooooo 0111 10001 qqqqq 10001 0 cpextu.b =croc,crqc (c3_1) +DI mep::mep_cpu_cgen::ivc2_cpextu_b (PCADDR &pc, DI crqc) +{ + int i; + QI q[8]; + HI o[4]; + + unpack (crqc, q); + + for (i=0; i<4; i++) + o[i] = q[i+4]; + + return pack (o); +} + +// 1111 000 ooooo 0111 10001 qqqqq 10010 0 cpextuu.h =croc,crqc (c3_1) +DI mep::mep_cpu_cgen::ivc2_cpextuu_h (PCADDR &pc, DI crqc) +{ + int i; + UHI q[4]; + USI o[2]; + + unpack (crqc, q); + + for (i=0; i<2; i++) + o[i] = q[i+2]; + + return pack (o); +} + +// 1111 000 ooooo 0111 10001 qqqqq 10011 0 cpextu.h =croc,crqc (c3_1) +DI mep::mep_cpu_cgen::ivc2_cpextu_h (PCADDR &pc, DI crqc) +{ + int i; + HI q[4]; + SI o[2]; + + unpack (crqc, q); + + for (i=0; i<2; i++) + o[i] = q[i+2]; + + return pack (o); +} + +// 1111 000 ooooo 0111 10001 qqqqq 10100 0 cpextlu.b =croc,crqc (c3_1) +DI mep::mep_cpu_cgen::ivc2_cpextlu_b (PCADDR &pc, DI crqc) +{ + int i; + UQI q[8]; + UHI o[4]; + + unpack (crqc, q); + + for (i=0; i<4; i++) + o[i] = q[i]; + + return pack (o); +} + +// 1111 000 ooooo 0111 10001 qqqqq 10101 0 cpextl.b =croc,crqc (c3_1) +DI mep::mep_cpu_cgen::ivc2_cpextl_b (PCADDR &pc, DI crqc) +{ + int i; + QI q[8]; + HI o[4]; + + unpack (crqc, q); + + for (i=0; i<4; i++) + o[i] = q[i]; + + return pack (o); +} + +// 1111 000 ooooo 0111 10001 qqqqq 10110 0 cpextlu.h =croc,crqc (c3_1) +DI mep::mep_cpu_cgen::ivc2_cpextlu_h (PCADDR &pc, DI crqc) +{ + int i; + UHI q[4]; + USI o[2]; + + unpack (crqc, q); + + for (i=0; i<2; i++) + o[i] = q[i]; + + return pack (o); +} + +// 1111 000 ooooo 0111 10001 qqqqq 10111 0 cpextl.h =croc,crqc (c3_1) +DI mep::mep_cpu_cgen::ivc2_cpextl_h (PCADDR &pc, DI crqc) +{ + int i; + HI q[4]; + SI o[2]; + + unpack (crqc, q); + + for (i=0; i<2; i++) + o[i] = q[i]; + + return pack (o); +} + +// 1111 000 ooooo 0111 10001 qqqqq 11000 0 cpcastub.h =croc,crqc (c3_1) +DI mep::mep_cpu_cgen::ivc2_cpcastub_h (PCADDR &pc, DI crqc) +{ + int i; + UQI q[8]; + UHI o[4]; + + unpack (crqc, q); + + for (i=0; i<4; i++) + o[i] = q[i*2]; + + return pack (o); +} + +// 1111 000 ooooo 0111 10001 qqqqq 11001 0 cpcastb.h =croc,crqc (c3_1) +DI mep::mep_cpu_cgen::ivc2_cpcastb_h (PCADDR &pc, DI crqc) +{ + int i; + QI q[8]; + HI o[4]; + + unpack (crqc, q); + + for (i=0; i<4; i++) + o[i] = q[i*2]; + + return pack (o); +} + +// 1111 000 ooooo 0111 10001 qqqqq 11100 0 cpcastub.w =croc,crqc (c3_1) +DI mep::mep_cpu_cgen::ivc2_cpcastub_w (PCADDR &pc, DI crqc) +{ + int i; + UQI q[8]; + USI o[2]; + + unpack (crqc, q); + + for (i=0; i<2; i++) + o[i] = q[i*4]; + + return pack (o); +} + +// 1111 000 ooooo 0111 10001 qqqqq 11101 0 cpcastb.w =croc,crqc (c3_1) +DI mep::mep_cpu_cgen::ivc2_cpcastb_w (PCADDR &pc, DI crqc) +{ + int i; + QI q[8]; + SI o[2]; + + unpack (crqc, q); + + for (i=0; i<2; i++) + o[i] = q[i*4]; + + return pack (o); +} + +// 1111 000 ooooo 0111 10001 qqqqq 11110 0 cpcastuh.w =croc,crqc (c3_1) +DI mep::mep_cpu_cgen::ivc2_cpcastuh_w (PCADDR &pc, DI crqc) +{ + int i; + UHI q[4]; + USI o[2]; + + unpack (crqc, q); + + for (i=0; i<2; i++) + o[i] = q[i*2]; + + return pack (o); +} + +// 1111 000 ooooo 0111 10001 qqqqq 11111 0 cpcasth.w =croc,crqc (c3_1) +DI mep::mep_cpu_cgen::ivc2_cpcasth_w (PCADDR &pc, DI crqc) +{ + int i; + HI q[4]; + SI o[2]; + + unpack (crqc, q); + + for (i=0; i<2; i++) + o[i] = q[i*2]; + + return pack (o); +} + +// 1111 000 ooooo 0111 10001 qqqqq 11010 0 cdcastuw =croc,crqc (c3_1) +DI mep::mep_cpu_cgen::ivc2_cdcastuw (PCADDR &pc, DI crqc) +{ + int i; + USI q[2]; + + unpack (crqc, q); + + return q[0]; +} + +// 1111 000 ooooo 0111 10001 qqqqq 11011 0 cdcastw =croc,crqc (c3_1) +DI mep::mep_cpu_cgen::ivc2_cdcastw (PCADDR &pc, DI crqc) +{ + int i; + SI q[2]; + + unpack (crqc, q); + + return q[0]; +} + +// 1111 0000 0000 0111 10010 qqqqq ppppp 0 cpcmpeqz.b crqc,crpc (c3_1) +void mep::mep_cpu_cgen::ivc2_cpcmpeqz_b (PCADDR &pc, DI crqc, DI crpc) +{ + int i; + QI q[8], p[8]; + SI cond; + + unpack (crqc, q); + unpack (crpc, p); + + cond = 0xff; + + for (i=0; i<8; i++) + if (q[i] == 0 || p[i] == 0) + cond &= ~(1 << i); + + ccw (IVC2_CC, cond); +} + +#define CMP(TY,OP) \ + int i; \ + TY q[8/sizeof(TY)], p[8/sizeof(TY)]; \ + SI cond; \ + unpack (crqc, q); \ + unpack (crpc, p); \ + cond = 0x00; \ + for (i=0; i<(8/sizeof(TY)); i++) \ + if (q[i] OP p[i]) \ + cond |= ((1<<(8/(8/sizeof(TY))))-1) << (i*8/(8/sizeof(TY))); \ + ccw (IVC2_CC, cond) + +#define CMPO(TY,OP) \ + int i; \ + TY q[8/sizeof(TY)], p[8/sizeof(TY)]; \ + SI cond = ccr (IVC2_CC); \ + unpack (crqc, q); \ + unpack (crpc, p); \ + for (i=0; i<(8/sizeof(TY)); i++) \ + if (q[i] OP p[i]) \ + cond |= ((1<<(8/(8/sizeof(TY))))-1) << (i*8/(8/sizeof(TY))); \ + ccw (IVC2_CC, cond) + +#define CMPA(TY,OP) \ + int i; \ + TY q[8/sizeof(TY)], p[8/sizeof(TY)]; \ + SI cond = ccr (IVC2_CC); \ + unpack (crqc, q); \ + unpack (crpc, p); \ + for (i=0; i<(8/sizeof(TY)); i++) \ + if (!(q[i] OP p[i])) \ + cond &= ~(((1<<(8/(8/sizeof(TY))))-1) << (i*8/(8/sizeof(TY)))); \ + ccw (IVC2_CC, cond) + +// 1111 0000 0001 0111 10010 qqqqq ppppp 0 cpcmpeq.b crqc,crpc (c3_1) +void mep::mep_cpu_cgen::ivc2_cpcmpeq_b (PCADDR &pc, DI crqc, DI crpc) +{ + CMP (QI, ==); +} + +// 1111 0000 0011 0111 10010 qqqqq ppppp 0 cpcmpeq.h crqc,crpc (c3_1) +void mep::mep_cpu_cgen::ivc2_cpcmpeq_h (PCADDR &pc, DI crqc, DI crpc) +{ + CMP (HI, ==); +} + +// 1111 0000 0101 0111 10010 qqqqq ppppp 0 cpcmpeq.w crqc,crpc (c3_1) +void mep::mep_cpu_cgen::ivc2_cpcmpeq_w (PCADDR &pc, DI crqc, DI crpc) +{ + CMP (SI, ==); +} + +// 1111 0000 1001 0111 10010 qqqqq ppppp 0 cpcmpne.b crqc,crpc (c3_1) +void mep::mep_cpu_cgen::ivc2_cpcmpne_b (PCADDR &pc, DI crqc, DI crpc) +{ + CMP (QI, !=); +} + +// 1111 0000 1011 0111 10010 qqqqq ppppp 0 cpcmpne.h crqc,crpc (c3_1) +void mep::mep_cpu_cgen::ivc2_cpcmpne_h (PCADDR &pc, DI crqc, DI crpc) +{ + CMP (HI, !=); +} + +// 1111 0000 1101 0111 10010 qqqqq ppppp 0 cpcmpne.w crqc,crpc (c3_1) +void mep::mep_cpu_cgen::ivc2_cpcmpne_w (PCADDR &pc, DI crqc, DI crpc) +{ + CMP (SI, !=); +} + +// 1111 0001 0000 0111 10010 qqqqq ppppp 0 cpcmpgtu.b crqc,crpc (c3_1) +void mep::mep_cpu_cgen::ivc2_cpcmpgtu_b (PCADDR &pc, DI crqc, DI crpc) +{ + CMP (UQI, >); +} + +// 1111 0001 0001 0111 10010 qqqqq ppppp 0 cpcmpgt.b crqc,crpc (c3_1) +void mep::mep_cpu_cgen::ivc2_cpcmpgt_b (PCADDR &pc, DI crqc, DI crpc) +{ + CMP (QI, >); +} + +// 1111 0001 0011 0111 10010 qqqqq ppppp 0 cpcmpgt.h crqc,crpc (c3_1) +void mep::mep_cpu_cgen::ivc2_cpcmpgt_h (PCADDR &pc, DI crqc, DI crpc) +{ + CMP (HI, >); +} + +// 1111 0001 0100 0111 10010 qqqqq ppppp 0 cpcmpgtu.w crqc,crpc (c3_1) +void mep::mep_cpu_cgen::ivc2_cpcmpgtu_w (PCADDR &pc, DI crqc, DI crpc) +{ + CMP (USI, >); +} + +// 1111 0001 0101 0111 10010 qqqqq ppppp 0 cpcmpgt.w crqc,crpc (c3_1) +void mep::mep_cpu_cgen::ivc2_cpcmpgt_w (PCADDR &pc, DI crqc, DI crpc) +{ + CMP (SI, >); +} + +// 1111 0001 1000 0111 10010 qqqqq ppppp 0 cpcmpgeu.b crqc,crpc (c3_1) +void mep::mep_cpu_cgen::ivc2_cpcmpgeu_b (PCADDR &pc, DI crqc, DI crpc) +{ + CMP (UQI, >=); +} + +// 1111 0001 1001 0111 10010 qqqqq ppppp 0 cpcmpge.b crqc,crpc (c3_1) +void mep::mep_cpu_cgen::ivc2_cpcmpge_b (PCADDR &pc, DI crqc, DI crpc) +{ + CMP (QI, >=); +} + +// 1111 0001 1011 0111 10010 qqqqq ppppp 0 cpcmpge.h crqc,crpc (c3_1) +void mep::mep_cpu_cgen::ivc2_cpcmpge_h (PCADDR &pc, DI crqc, DI crpc) +{ + CMP (HI, >=); +} + +// 1111 0001 1100 0111 10010 qqqqq ppppp 0 cpcmpgeu.w crqc,crpc (c3_1) +void mep::mep_cpu_cgen::ivc2_cpcmpgeu_w (PCADDR &pc, DI crqc, DI crpc) +{ + CMP (USI, >=); +} + +// 1111 0001 1101 0111 10010 qqqqq ppppp 0 cpcmpge.w crqc,crpc (c3_1) +void mep::mep_cpu_cgen::ivc2_cpcmpge_w (PCADDR &pc, DI crqc, DI crpc) +{ + CMP (SI, >=); +} + +// 1111 0010 0001 0111 10010 qqqqq ppppp 0 cpacmpeq.b crqc,crpc (c3_1) +void mep::mep_cpu_cgen::ivc2_cpacmpeq_b (PCADDR &pc, DI crqc, DI crpc) +{ + CMPA (QI, ==); +} + +// 1111 0010 0011 0111 10010 qqqqq ppppp 0 cpacmpeq.h crqc,crpc (c3_1) +void mep::mep_cpu_cgen::ivc2_cpacmpeq_h (PCADDR &pc, DI crqc, DI crpc) +{ + CMPA (HI, ==); +} + +// 1111 0010 0101 0111 10010 qqqqq ppppp 0 cpacmpeq.w crqc,crpc (c3_1) +void mep::mep_cpu_cgen::ivc2_cpacmpeq_w (PCADDR &pc, DI crqc, DI crpc) +{ + CMPA (SI, ==); +} + +// 1111 0010 1001 0111 10010 qqqqq ppppp 0 cpacmpne.b crqc,crpc (c3_1) +void mep::mep_cpu_cgen::ivc2_cpacmpne_b (PCADDR &pc, DI crqc, DI crpc) +{ + CMPA (QI, !=); +} + +// 1111 0010 1011 0111 10010 qqqqq ppppp 0 cpacmpne.h crqc,crpc (c3_1) +void mep::mep_cpu_cgen::ivc2_cpacmpne_h (PCADDR &pc, DI crqc, DI crpc) +{ + CMPA (HI, !=); +} + +// 1111 0010 1101 0111 10010 qqqqq ppppp 0 cpacmpne.w crqc,crpc (c3_1) +void mep::mep_cpu_cgen::ivc2_cpacmpne_w (PCADDR &pc, DI crqc, DI crpc) +{ + CMPA (SI, !=); +} + +// 1111 0011 0000 0111 10010 qqqqq ppppp 0 cpacmpgtu.b crqc,crpc (c3_1) +void mep::mep_cpu_cgen::ivc2_cpacmpgtu_b (PCADDR &pc, DI crqc, DI crpc) +{ + CMPA (UQI, >); +} + +// 1111 0011 0001 0111 10010 qqqqq ppppp 0 cpacmpgt.b crqc,crpc (c3_1) +void mep::mep_cpu_cgen::ivc2_cpacmpgt_b (PCADDR &pc, DI crqc, DI crpc) +{ + CMPA (QI, >); +} + +// 1111 0011 0011 0111 10010 qqqqq ppppp 0 cpacmpgt.h crqc,crpc (c3_1) +void mep::mep_cpu_cgen::ivc2_cpacmpgt_h (PCADDR &pc, DI crqc, DI crpc) +{ + CMPA (HI, >); +} + +// 1111 0011 0100 0111 10010 qqqqq ppppp 0 cpacmpgtu.w crqc,crpc (c3_1) +void mep::mep_cpu_cgen::ivc2_cpacmpgtu_w (PCADDR &pc, DI crqc, DI crpc) +{ + CMPA (USI, >); +} + +// 1111 0011 0101 0111 10010 qqqqq ppppp 0 cpacmpgt.w crqc,crpc (c3_1) +void mep::mep_cpu_cgen::ivc2_cpacmpgt_w (PCADDR &pc, DI crqc, DI crpc) +{ + CMPA (SI, >); +} + +// 1111 0011 1000 0111 10010 qqqqq ppppp 0 cpacmpgeu.b crqc,crpc (c3_1) +void mep::mep_cpu_cgen::ivc2_cpacmpgeu_b (PCADDR &pc, DI crqc, DI crpc) +{ + CMPA (UQI, >=); +} + +// 1111 0011 1001 0111 10010 qqqqq ppppp 0 cpacmpge.b crqc,crpc (c3_1) +void mep::mep_cpu_cgen::ivc2_cpacmpge_b (PCADDR &pc, DI crqc, DI crpc) +{ + CMPA (QI, >=); +} + +// 1111 0011 1011 0111 10010 qqqqq ppppp 0 cpacmpge.h crqc,crpc (c3_1) +void mep::mep_cpu_cgen::ivc2_cpacmpge_h (PCADDR &pc, DI crqc, DI crpc) +{ + CMPA (HI, >=); +} + +// 1111 0011 1100 0111 10010 qqqqq ppppp 0 cpacmpgeu.w crqc,crpc (c3_1) +void mep::mep_cpu_cgen::ivc2_cpacmpgeu_w (PCADDR &pc, DI crqc, DI crpc) +{ + CMPA (USI, >=); +} + +// 1111 0011 1101 0111 10010 qqqqq ppppp 0 cpacmpge.w crqc,crpc (c3_1) +void mep::mep_cpu_cgen::ivc2_cpacmpge_w (PCADDR &pc, DI crqc, DI crpc) +{ + CMPA (SI, >=); +} + +// 1111 0100 0001 0111 10010 qqqqq ppppp 0 cpocmpeq.b crqc,crpc (c3_1) +void mep::mep_cpu_cgen::ivc2_cpocmpeq_b (PCADDR &pc, DI crqc, DI crpc) +{ + CMPO (QI, ==); +} + +// 1111 0100 0011 0111 10010 qqqqq ppppp 0 cpocmpeq.h crqc,crpc (c3_1) +void mep::mep_cpu_cgen::ivc2_cpocmpeq_h (PCADDR &pc, DI crqc, DI crpc) +{ + CMPO (HI, ==); +} + +// 1111 0100 0101 0111 10010 qqqqq ppppp 0 cpocmpeq.w crqc,crpc (c3_1) +void mep::mep_cpu_cgen::ivc2_cpocmpeq_w (PCADDR &pc, DI crqc, DI crpc) +{ + CMPO (SI, ==); +} + +// 1111 0100 1001 0111 10010 qqqqq ppppp 0 cpocmpne.b crqc,crpc (c3_1) +void mep::mep_cpu_cgen::ivc2_cpocmpne_b (PCADDR &pc, DI crqc, DI crpc) +{ + CMPO (QI, !=); +} + +// 1111 0100 1011 0111 10010 qqqqq ppppp 0 cpocmpne.h crqc,crpc (c3_1) +void mep::mep_cpu_cgen::ivc2_cpocmpne_h (PCADDR &pc, DI crqc, DI crpc) +{ + CMPO (HI, !=); +} + +// 1111 0100 1101 0111 10010 qqqqq ppppp 0 cpocmpne.w crqc,crpc (c3_1) +void mep::mep_cpu_cgen::ivc2_cpocmpne_w (PCADDR &pc, DI crqc, DI crpc) +{ + CMPO (SI, !=); +} + +// 1111 0101 0000 0111 10010 qqqqq ppppp 0 cpocmpgtu.b crqc,crpc (c3_1) +void mep::mep_cpu_cgen::ivc2_cpocmpgtu_b (PCADDR &pc, DI crqc, DI crpc) +{ + CMPO (UQI, >); +} + +// 1111 0101 0001 0111 10010 qqqqq ppppp 0 cpocmpgt.b crqc,crpc (c3_1) +void mep::mep_cpu_cgen::ivc2_cpocmpgt_b (PCADDR &pc, DI crqc, DI crpc) +{ + CMPO (QI, >); +} + +// 1111 0101 0011 0111 10010 qqqqq ppppp 0 cpocmpgt.h crqc,crpc (c3_1) +void mep::mep_cpu_cgen::ivc2_cpocmpgt_h (PCADDR &pc, DI crqc, DI crpc) +{ + CMPO (HI, >); +} + +// 1111 0101 0100 0111 10010 qqqqq ppppp 0 cpocmpgtu.w crqc,crpc (c3_1) +void mep::mep_cpu_cgen::ivc2_cpocmpgtu_w (PCADDR &pc, DI crqc, DI crpc) +{ + CMPO (USI, >); +} + +// 1111 0101 0101 0111 10010 qqqqq ppppp 0 cpocmpgt.w crqc,crpc (c3_1) +void mep::mep_cpu_cgen::ivc2_cpocmpgt_w (PCADDR &pc, DI crqc, DI crpc) +{ + CMPO (SI, >); +} + +// 1111 0101 1000 0111 10010 qqqqq ppppp 0 cpocmpgeu.b crqc,crpc (c3_1) +void mep::mep_cpu_cgen::ivc2_cpocmpgeu_b (PCADDR &pc, DI crqc, DI crpc) +{ + CMPO (UQI, >=); +} + +// 1111 0101 1001 0111 10010 qqqqq ppppp 0 cpocmpge.b crqc,crpc (c3_1) +void mep::mep_cpu_cgen::ivc2_cpocmpge_b (PCADDR &pc, DI crqc, DI crpc) +{ + CMPO (QI, >=); +} + +// 1111 0101 1011 0111 10010 qqqqq ppppp 0 cpocmpge.h crqc,crpc (c3_1) +void mep::mep_cpu_cgen::ivc2_cpocmpge_h (PCADDR &pc, DI crqc, DI crpc) +{ + CMPO (HI, >=); +} + +// 1111 0101 1100 0111 10010 qqqqq ppppp 0 cpocmpgeu.w crqc,crpc (c3_1) +void mep::mep_cpu_cgen::ivc2_cpocmpgeu_w (PCADDR &pc, DI crqc, DI crpc) +{ + CMPO (USI, >=); +} + +// 1111 0101 1101 0111 10010 qqqqq ppppp 0 cpocmpge.w crqc,crpc (c3_1) +void mep::mep_cpu_cgen::ivc2_cpocmpge_w (PCADDR &pc, DI crqc, DI crpc) +{ + CMPO (SI, >=); +} + +// 1111 00xx xiii 0111 10100 qqqqq ppppp 0 cpsrli3.b =crqc,crpc,imm3 (c3_imm) +DI mep::mep_cpu_cgen::ivc2_cpsrli3_b (PCADDR &pc, DI crpc, SI imm3) +{ + int i; + UQI p[8], o[8]; + + unpack (crpc, p); + + for (i=0; i<8; i++) + o[i] = p[i] >> imm3; + + return pack (o); +} + +// 1111 01xx iiii 0111 10100 qqqqq ppppp 0 cpsrli3.h =crqc,crpc,imm4 (c3_imm) +DI mep::mep_cpu_cgen::ivc2_cpsrli3_h (PCADDR &pc, DI crpc, SI imm4) +{ + int i; + UHI p[4], o[4]; + + unpack (crpc, p); + + for (i=0; i<4; i++) + o[i] = p[i] >> imm4; + + return pack (o); +} + +// 1111 10xi iiii 0111 10100 qqqqq ppppp 0 cpsrli3.w =crqc,crpc,imm5 (c3_imm) +DI mep::mep_cpu_cgen::ivc2_cpsrli3_w (PCADDR &pc, DI crpc, SI imm5) +{ + int i; + USI p[2], o[2]; + + unpack (crpc, p); + + for (i=0; i<2; i++) + o[i] = p[i] >> imm5; + + return pack (o); +} + +// 1111 11ii iiii 0111 10100 qqqqq ppppp 0 cdsrli3 =crqc,crpc,imm6 (c3_imm) +DI mep::mep_cpu_cgen::ivc2_cdsrli3 (PCADDR &pc, DI crpc, SI imm6) +{ + return (UDI)crpc >> imm6; +} + +// 1111 00xx xiii 0111 10101 qqqqq ppppp 0 cpsrai3.b =crqc,crpc,imm3 (c3_imm) +DI mep::mep_cpu_cgen::ivc2_cpsrai3_b (PCADDR &pc, DI crpc, SI imm3) +{ + int i; + QI p[8], o[8]; + + unpack (crpc, p); + + for (i=0; i<8; i++) + o[i] = p[i] >> imm3; + + return pack (o); +} + +// 1111 01xx iiii 0111 10101 qqqqq ppppp 0 cpsrai3.h =crqc,crpc,imm4 (c3_imm) +DI mep::mep_cpu_cgen::ivc2_cpsrai3_h (PCADDR &pc, DI crpc, SI imm4) +{ + int i; + HI p[4], o[4]; + + unpack (crpc, p); + + for (i=0; i<4; i++) + o[i] = p[i] >> imm4; + + return pack (o); +} + +// 1111 10xi iiii 0111 10101 qqqqq ppppp 0 cpsrai3.w =crqc,crpc,imm5 (c3_imm) +DI mep::mep_cpu_cgen::ivc2_cpsrai3_w (PCADDR &pc, DI crpc, SI imm5) +{ + int i; + SI p[2], o[2]; + + unpack (crpc, p); + + for (i=0; i<2; i++) + o[i] = p[i] >> imm5; + + return pack (o); +} + +// 1111 11ii iiii 0111 10101 qqqqq ppppp 0 cdsrai3 =crqc,crpc,imm6 (c3_imm) +DI mep::mep_cpu_cgen::ivc2_cdsrai3 (PCADDR &pc, DI crpc, SI imm6) +{ + return (DI)crpc >> imm6; +} + +// 1111 00xx xiii 0111 10110 qqqqq ppppp 0 cpslli3.b =crqc,crpc,imm3 (c3_imm) +DI mep::mep_cpu_cgen::ivc2_cpslli3_b (PCADDR &pc, DI crpc, SI imm3) +{ + int i; + QI p[8], o[8]; + + unpack (crpc, p); + + for (i=0; i<8; i++) + o[i] = p[i] << imm3; + + return pack (o); +} + +// 1111 01xx iiii 0111 10110 qqqqq ppppp 0 cpslli3.h =crqc,crpc,imm4 (c3_imm) +DI mep::mep_cpu_cgen::ivc2_cpslli3_h (PCADDR &pc, DI crpc, SI imm4) +{ + int i; + HI p[4], o[4]; + + unpack (crpc, p); + + for (i=0; i<4; i++) + o[i] = p[i] << imm4; + + return pack (o); +} + +// 1111 10xi iiii 0111 10110 qqqqq ppppp 0 cpslli3.w =crqc,crpc,imm5 (c3_imm) +DI mep::mep_cpu_cgen::ivc2_cpslli3_w (PCADDR &pc, DI crpc, SI imm5) +{ + int i; + SI p[2], o[2]; + + unpack (crpc, p); + + for (i=0; i<2; i++) + o[i] = p[i] << imm5; + + return pack (o); +} + +// 1111 11ii iiii 0111 10110 qqqqq ppppp 0 cdslli3 =crqc,crpc,imm6 (c3_imm) +DI mep::mep_cpu_cgen::ivc2_cdslli3 (PCADDR &pc, DI crpc, SI imm6) +{ + return crpc << imm6; +} + +// 1111 01xx iiii 0111 10111 qqqqq ppppp 0 cpslai3.h =crqc,crpc,imm4 (c3_imm) +DI mep::mep_cpu_cgen::ivc2_cpslai3_h (PCADDR &pc, DI crqc, SI imm4) +{ + int i, cofr_idx; + USI cofr; + HI q[4], o[4]; + + if (ivc2_slot == IVC2_P0 || ivc2_slot == IVC2_P0S) + cofr_idx = IVC2_COFR0; + else /* C3 or P1 */ + cofr_idx = IVC2_COFR1; + cofr = ccr (cofr_idx); + + unpack (crqc, q); + + for (i=0; i<4; i++) + { + SI tmp = q[i]; + tmp <<= imm4; + if (tmp > 0x7fff) + { + o[i] = 0x7fff; + cofr |= (3 << i*2); + } + else if (tmp < -0x8000) + { + o[i] = -0x8000; + cofr |= (3 << i*2); + } + else + o[i] = tmp; + } + ccw (cofr_idx, cofr); + + return pack (o); +} + +// 1111 10xi iiii 0111 10111 qqqqq ppppp 0 cpslai3.w =crqc,crpc,imm5 (c3_imm) +DI mep::mep_cpu_cgen::ivc2_cpslai3_w (PCADDR &pc, DI crqc, SI imm5) +{ + int i, cofr_idx; + USI cofr; + SI q[2], o[2]; + + if (ivc2_slot == IVC2_P0 || ivc2_slot == IVC2_P0S) + cofr_idx = IVC2_COFR0; + else /* C3 or P1 */ + cofr_idx = IVC2_COFR1; + cofr = ccr (cofr_idx); + + unpack (crqc, q); + + for (i=0; i<2; i++) + { + DI tmp = q[i]; + tmp <<= imm5; + if (tmp > 0x7fffffffLL) + { + o[i] = 0x7fffffffLL; + cofr |= (15 << i*4); + } + else if (tmp < -0x80000000LL) + { + o[i] = -0x80000000LL; + cofr |= (15 << i*4); + } + else + o[i] = tmp; + } + ccw (cofr_idx, cofr); + + return pack (o); +} + +// 1111 00xi iiii 0111 11000 qqqqq ppppp 0 cpclipiu3.w =crqc,crpc,imm5 (c3_imm) +DI mep::mep_cpu_cgen::ivc2_cpclipiu3_w (PCADDR &pc, DI crqc, SI imm5) +{ + int i; + SI q[2]; + SI o[2]; + + unpack (crqc, q); + + for (i=0; i<2; i++) + { + if (imm5 == 0) + o[i] = 0; + else if (q[i] > (1< (1<<(imm5-1))-1) + o[i] = (1<<(imm5-1))-1; + else if (q[i] < -(1<<(imm5-1))) + o[i] = -(1<<(imm5-1)); + else + o[i] = q[i]; + } + + return pack (o); +} + +// 1111 10ii iiii 0111 11000 qqqqq ppppp 0 cdclipiu3 =crqc,crpc,imm6 (c3_imm) +DI mep::mep_cpu_cgen::ivc2_cdclipiu3 (PCADDR &pc, DI crqc, SI imm6) +{ + DI o; + + if (imm6 == 0) + o = 0; + else if (crqc > (1LL< (1LL<<(imm6-1))-1) + o = (1LL<<(imm6-1))-1; + else if (crqc < -((1LL<<(imm6-1)))) + o = -((1LL<<(imm6-1))); + else + o = crqc; + + return o; +} + +// 1111 iiii iiii 0111 11001 qqqqq 00000 0 cpmovi.b =crqc,imm8 (c3_imm) +DI mep::mep_cpu_cgen::ivc2_cpmovi_b (PCADDR &pc, SI imm8) +{ + int i; + QI o[8]; + for (i=0; i<8; i++) + o[i] = imm8; + + return pack (o); +} + +// 1111 iiii iiii 0111 11001 qqqqq 00010 0 cpmoviu.h =crqc,imm8 (c3_imm) +DI mep::mep_cpu_cgen::ivc2_cpmoviu_h (PCADDR &pc, SI imm8) +{ + int i; + HI o[4]; + for (i=0; i<4; i++) + o[i] = (UQI)imm8; + + return pack (o); +} + +// 1111 iiii iiii 0111 11001 qqqqq 00011 0 cpmovi.h =crqc,imm8 (c3_imm) +DI mep::mep_cpu_cgen::ivc2_cpmovi_h (PCADDR &pc, SI imm8) +{ + int i; + HI o[4]; + for (i=0; i<4; i++) + o[i] = (QI)imm8; + + return pack (o); +} + +// 1111 iiii iiii 0111 11001 qqqqq 00100 0 cpmoviu.w =crqc,imm8 (c3_imm) +DI mep::mep_cpu_cgen::ivc2_cpmoviu_w (PCADDR &pc, SI imm8) +{ + int i; + SI o[2]; + for (i=0; i<2; i++) + o[i] = imm8; + + return pack (o); +} + +// 1111 iiii iiii 0111 11001 qqqqq 00101 0 cpmovi.w =crqc,imm8 (c3_imm) +DI mep::mep_cpu_cgen::ivc2_cpmovi_w (PCADDR &pc, SI imm8) +{ + int i; + SI o[2]; + for (i=0; i<2; i++) + o[i] = (QI)imm8; + + return pack (o); +} + +// 1111 iiii iiii 0111 11001 qqqqq 00110 0 cdmoviu =crqc,imm8 (c3_imm) +DI mep::mep_cpu_cgen::ivc2_cdmoviu (PCADDR &pc, SI imm8) +{ + return (UQI)imm8; +} + +// 1111 iiii iiii 0111 11001 qqqqq 00111 0 cdmovi =crqc,imm8 (c3_imm) +DI mep::mep_cpu_cgen::ivc2_cdmovi (PCADDR &pc, SI imm8) +{ + return (QI)imm8; +} + +// 1111 0000 0000 0111 00000 qqqqq ppppp 1 cpadda1u.b crqc,crpc (c3_1) +void mep::mep_cpu_cgen::ivc2_cpadda1u_b (PCADDR &pc, DI crqc, DI crpc) +{ + int i; + UQI q[8], p[8]; + + unpack (crqc, q); + unpack (crpc, p); + + for (i=0; i<8; i++) + A1w (i, (SI)q[i] + (SI)p[i]); +} + +// 1111 0000 0001 0111 00000 qqqqq ppppp 1 cpadda1.b crqc,crpc (c3_1) +void mep::mep_cpu_cgen::ivc2_cpadda1_b (PCADDR &pc, DI crqc, DI crpc) +{ + int i; + QI q[8], p[8]; + + unpack (crqc, q); + unpack (crpc, p); + + for (i=0; i<8; i++) + A1w (i, (SI)q[i] + (SI)p[i]); +} + +// 1111 0000 0010 0111 00000 qqqqq ppppp 1 cpaddua1.h crqc,crpc (c3_1) +void mep::mep_cpu_cgen::ivc2_cpaddua1_h (PCADDR &pc, DI crqc, DI crpc) +{ + int i; + HI q[4], p[4]; + + unpack (crqc, q); + unpack (crpc, p); + + for (i=0; i<4; i++) + A1w (i+4, (SI)q[i] + (SI)p[i]); +} + +// 1111 0000 0011 0111 00000 qqqqq ppppp 1 cpaddla1.h crqc,crpc (c3_1) +void mep::mep_cpu_cgen::ivc2_cpaddla1_h (PCADDR &pc, DI crqc, DI crpc) +{ + int i; + HI q[4], p[4]; + + unpack (crqc, q); + unpack (crpc, p); + + for (i=0; i<4; i++) + A1w (i, (SI)q[i] + (SI)p[i]); +} + +// 1111 0000 0100 0111 00000 qqqqq ppppp 1 cpaddaca1u.b crqc,crpc (c3_1) +void mep::mep_cpu_cgen::ivc2_cpaddaca1u_b (PCADDR &pc, DI crqc, DI crpc) +{ + int i; + UQI q[8], p[8]; + USI cc; + + unpack (crqc, q); + unpack (crpc, p); + + cc = ccr (IVC2_COFA1); + + for (i=0; i<8; i++) + { + DI acc = A1r (i); + acc += (SI)q[i] + (SI)p[i]; + if (acc < -0x80000000LL + || acc > 0x7fffffffLL) + cc |= (1 << i); + A1w (i, acc); + } + + ccw (IVC2_COFA1, cc); +} + +// 1111 0000 0101 0111 00000 qqqqq ppppp 1 cpaddaca1.b crqc,crpc (c3_1) +void mep::mep_cpu_cgen::ivc2_cpaddaca1_b (PCADDR &pc, DI crqc, DI crpc) +{ + int i; + QI q[8], p[8]; + USI cc; + + unpack (crqc, q); + unpack (crpc, p); + + cc = ccr (IVC2_COFA1); + + for (i=0; i<8; i++) + { + DI acc = (SI) A1r (i); + acc += (SI)q[i] + (SI)p[i]; + if (acc < -0x80000000LL + || acc > 0x7fffffffLL) + cc |= (1 << i); + A1w (i, acc); + } + + ccw (IVC2_COFA1, cc); +} + +// 1111 0000 0110 0111 00000 qqqqq ppppp 1 cpaddacua1.h crqc,crpc (c3_1) +void mep::mep_cpu_cgen::ivc2_cpaddacua1_h (PCADDR &pc, DI crqc, DI crpc) +{ + int i; + HI q[4], p[4]; + USI cc; + + unpack (crqc, q); + unpack (crpc, p); + + cc = ccr (IVC2_COFA1); + + for (i=0; i<4; i++) + { + DI acc = (SI) A1r (i+4); + acc += (SI)q[i] + (SI)p[i]; + if (acc < -0x80000000LL + || acc > 0x7fffffffLL) + cc |= (1 << i); + A1w (i+4, acc); + } + + ccw (IVC2_COFA1, cc); +} + +// 1111 0000 0111 0111 00000 qqqqq ppppp 1 cpaddacla1.h crqc,crpc (c3_1) +void mep::mep_cpu_cgen::ivc2_cpaddacla1_h (PCADDR &pc, DI crqc, DI crpc) +{ + int i; + HI q[4], p[4]; + USI cc; + + unpack (crqc, q); + unpack (crpc, p); + + cc = ccr (IVC2_COFA1); + + for (i=0; i<4; i++) + { + DI acc = (SI) A1r (i); + acc += (SI)q[i] + (SI)p[i]; + if (acc < -0x80000000LL + || acc > 0x7fffffffLL) + cc |= (1 << i); + A1w (i, acc); + } + + ccw (IVC2_COFA1, cc); +} + +// 1111 0000 1000 0111 00000 qqqqq ppppp 1 cpsuba1u.b crqc,crpc (c3_1) +void mep::mep_cpu_cgen::ivc2_cpsuba1u_b (PCADDR &pc, DI crqc, DI crpc) +{ + int i; + UQI q[8], p[8]; + + unpack (crqc, q); + unpack (crpc, p); + + for (i=0; i<8; i++) + A1w (i, (SI)q[i] - (SI)p[i]); +} + +// 1111 0000 1001 0111 00000 qqqqq ppppp 1 cpsuba1.b crqc,crpc (c3_1) +void mep::mep_cpu_cgen::ivc2_cpsuba1_b (PCADDR &pc, DI crqc, DI crpc) +{ + int i; + QI q[8], p[8]; + + unpack (crqc, q); + unpack (crpc, p); + + for (i=0; i<8; i++) + A1w (i, (SI)q[i] - (SI)p[i]); +} + +// 1111 0000 1010 0111 00000 qqqqq ppppp 1 cpsubua1.h crqc,crpc (c3_1) +void mep::mep_cpu_cgen::ivc2_cpsubua1_h (PCADDR &pc, DI crqc, DI crpc) +{ + int i; + HI q[4], p[4]; + + unpack (crqc, q); + unpack (crpc, p); + + for (i=0; i<4; i++) + A1w (i+4, (SI)q[i] - (SI)p[i]); +} + +// 1111 0000 1011 0111 00000 qqqqq ppppp 1 cpsubla1.h crqc,crpc (c3_1) +void mep::mep_cpu_cgen::ivc2_cpsubla1_h (PCADDR &pc, DI crqc, DI crpc) +{ + int i; + HI q[4], p[4]; + + unpack (crqc, q); + unpack (crpc, p); + + for (i=0; i<4; i++) + A1w (i, (SI)q[i] - (SI)p[i]); +} + +// 1111 0000 1100 0111 00000 qqqqq ppppp 1 cpsubaca1u.b crqc,crpc (c3_1) +void mep::mep_cpu_cgen::ivc2_cpsubaca1u_b (PCADDR &pc, DI crqc, DI crpc) +{ + int i; + UQI q[8], p[8]; + USI cc; + + unpack (crqc, q); + unpack (crpc, p); + + cc = ccr (IVC2_COFA1); + + for (i=0; i<8; i++) + { + DI acc = A1r (i); + acc += (SI)q[i] - (SI)p[i]; + if (acc < -0x80000000LL + || acc > 0x7fffffffLL) + cc |= (1 << i); + A1w (i, acc); + } + + ccw (IVC2_COFA1, cc); +} + +// 1111 0000 1101 0111 00000 qqqqq ppppp 1 cpsubaca1.b crqc,crpc (c3_1) +void mep::mep_cpu_cgen::ivc2_cpsubaca1_b (PCADDR &pc, DI crqc, DI crpc) +{ + int i; + QI q[8], p[8]; + USI cc; + + unpack (crqc, q); + unpack (crpc, p); + + cc = ccr (IVC2_COFA1); + + for (i=0; i<8; i++) + { + DI acc = (SI) A1r (i); + acc += (SI)q[i] - (SI)p[i]; + if (acc < -0x80000000LL + || acc > 0x7fffffffLL) + cc |= (1 << i); + A1w (i, acc); + } + + ccw (IVC2_COFA1, cc); +} + +// 1111 0000 1110 0111 00000 qqqqq ppppp 1 cpsubacua1.h crqc,crpc (c3_1) +void mep::mep_cpu_cgen::ivc2_cpsubacua1_h (PCADDR &pc, DI crqc, DI crpc) +{ + int i; + HI q[4], p[4]; + USI cc; + + unpack (crqc, q); + unpack (crpc, p); + + cc = ccr (IVC2_COFA1); + + for (i=0; i<4; i++) + { + DI acc = (SI) A1r (i+4); + acc += (SI)q[i] - (SI)p[i]; + if (acc < -0x80000000LL + || acc > 0x7fffffffLL) + cc |= (1 << i); + A1w (i+4, acc); + } + + ccw (IVC2_COFA1, cc); +} + +// 1111 0000 1111 0111 00000 qqqqq ppppp 1 cpsubacla1.h crqc,crpc (c3_1) +void mep::mep_cpu_cgen::ivc2_cpsubacla1_h (PCADDR &pc, DI crqc, DI crpc) +{ + int i; + HI q[4], p[4]; + USI cc; + + unpack (crqc, q); + unpack (crpc, p); + + cc = ccr (IVC2_COFA1); + + for (i=0; i<4; i++) + { + DI acc = (SI) A1r (i); + acc += (SI)q[i] - (SI)p[i]; + if (acc < -0x80000000LL + || acc > 0x7fffffffLL) + cc |= (1 << i); + A1w (i, acc); + } + + ccw (IVC2_COFA1, cc); +} + +// 1111 0001 0000 0111 00000 qqqqq ppppp 1 cpabsa1u.b crqc,crpc (c3_1) +void mep::mep_cpu_cgen::ivc2_cpabsa1u_b (PCADDR &pc, DI crqc, DI crpc) +{ + int i; + UQI q[8], p[8]; + + unpack (crqc, q); + unpack (crpc, p); + + for (i=0; i<8; i++) + A1w (i, abs ((SI)q[i] - (SI)p[i])); +} + +// 1111 0001 0001 0111 00000 qqqqq ppppp 1 cpabsa1.b crqc,crpc (c3_1) +void mep::mep_cpu_cgen::ivc2_cpabsa1_b (PCADDR &pc, DI crqc, DI crpc) +{ + int i; + QI q[8], p[8]; + + unpack (crqc, q); + unpack (crpc, p); + + for (i=0; i<8; i++) + A1w (i, abs ((SI)q[i] - (SI)p[i])); +} + +// 1111 0001 0010 0111 00000 qqqqq ppppp 1 cpabsua1.h crqc,crpc (c3_1) +void mep::mep_cpu_cgen::ivc2_cpabsua1_h (PCADDR &pc, DI crqc, DI crpc) +{ + int i; + HI q[4], p[4]; + + unpack (crqc, q); + unpack (crpc, p); + + for (i=0; i<4; i++) + A1w (i+4, abs ((SI)q[i] - (SI)p[i])); +} + +// 1111 0001 0011 0111 00000 qqqqq ppppp 1 cpabsla1.h crqc,crpc (c3_1) +void mep::mep_cpu_cgen::ivc2_cpabsla1_h (PCADDR &pc, DI crqc, DI crpc) +{ + int i; + HI q[4], p[4]; + + unpack (crqc, q); + unpack (crpc, p); + + for (i=0; i<4; i++) + A1w (i, abs ((SI)q[i] - (SI)p[i])); +} + +// 1111 0001 0100 0111 00000 qqqqq ppppp 1 cpsada1u.b crqc,crpc (c3_1) +void mep::mep_cpu_cgen::ivc2_cpsada1u_b (PCADDR &pc, DI crqc, DI crpc) +{ + int i; + UQI q[8], p[8]; + USI cc; + + unpack (crqc, q); + unpack (crpc, p); + + cc = ccr (IVC2_COFA1); + + for (i=0; i<8; i++) + { + DI acc = A1r (i); + acc += abs ((SI)q[i] - (SI)p[i]); + if (acc < -0x80000000LL + || acc > 0x7fffffffLL) + cc |= (1 << i); + A1w (i, acc); + } + + ccw (IVC2_COFA1, cc); +} + +// 1111 0001 0101 0111 00000 qqqqq ppppp 1 cpsada1.b crqc,crpc (c3_1) +void mep::mep_cpu_cgen::ivc2_cpsada1_b (PCADDR &pc, DI crqc, DI crpc) +{ + int i; + QI q[8], p[8]; + USI cc; + + unpack (crqc, q); + unpack (crpc, p); + + cc = ccr (IVC2_COFA1); + + for (i=0; i<8; i++) + { + DI acc = (SI) A1r (i); + acc += abs ((SI)q[i] - (SI)p[i]); + if (acc < -0x80000000LL + || acc > 0x7fffffffLL) + cc |= (1 << i); + A1w (i, acc); + } + + ccw (IVC2_COFA1, cc); +} + +// 1111 0001 0110 0111 00000 qqqqq ppppp 1 cpsadua1.h crqc,crpc (c3_1) +void mep::mep_cpu_cgen::ivc2_cpsadua1_h (PCADDR &pc, DI crqc, DI crpc) +{ + int i; + HI q[4], p[4]; + USI cc; + + unpack (crqc, q); + unpack (crpc, p); + + cc = ccr (IVC2_COFA1); + + for (i=0; i<4; i++) + { + DI acc = (SI) A1r (i+4); + acc += abs ((SI)q[i] - (SI)p[i]); + if (acc < -0x80000000LL + || acc > 0x7fffffffLL) + cc |= (1 << i); + A1w (i+4, acc); + } + + ccw (IVC2_COFA1, cc); +} + +// 1111 0001 0111 0111 00000 qqqqq ppppp 1 cpsadla1.h crqc,crpc (c3_1) +void mep::mep_cpu_cgen::ivc2_cpsadla1_h (PCADDR &pc, DI crqc, DI crpc) +{ + int i; + HI q[4], p[4]; + USI cc; + + unpack (crqc, q); + unpack (crpc, p); + + cc = ccr (IVC2_COFA1); + + for (i=0; i<4; i++) + { + DI acc = (SI) A1r (i); + acc += abs ((SI)q[i] - (SI)p[i]); + if (acc < -0x80000000LL + || acc > 0x7fffffffLL) + cc |= (1 << i); + A1w (i, acc); + } + + ccw (IVC2_COFA1, cc); +} + +// 1111 0010 0000 0111 00000 qqqqq ppppp 1 cpseta1.h crqc,crpc (c3_1) +void mep::mep_cpu_cgen::ivc2_cpseta1_h (PCADDR &pc, DI crqc, DI crpc) +{ + int i; + HI q[4], p[4]; + + unpack (crqc, q); + unpack (crpc, p); + + for (i=0; i<4; i++) + { + A1w (i+4, q[i]); + A1w (i, p[i]); + } +} + +// 1111 0010 0010 0111 00000 qqqqq ppppp 1 cpsetua1.w crqc,crpc (c3_1) +void mep::mep_cpu_cgen::ivc2_cpsetua1_w (PCADDR &pc, DI crqc, DI crpc) +{ + int i; + SI q[2], p[2]; + + unpack (crqc, q); + unpack (crpc, p); + + for (i=0; i<2; i++) + { + A1w (i+2, q[i]); + A1w (i, p[i]); + } +} + +// 1111 0010 0011 0111 00000 qqqqq ppppp 1 cpsetla1.w crqc,crpc (c3_1) +void mep::mep_cpu_cgen::ivc2_cpsetla1_w (PCADDR &pc, DI crqc, DI crpc) +{ + int i; + SI q[2], p[2]; + + unpack (crqc, q); + unpack (crpc, p); + + for (i=0; i<2; i++) + { + A1w (i+6, q[i]); + A1w (i+4, p[i]); + } +} + +// 1111 000 ooooo 0111 00100 00000 00000 1 cpmova1.b =croc (c3_1) +DI mep::mep_cpu_cgen::ivc2_cpmova1_b (PCADDR &pc) +{ + int i; + QI o[8]; + + for (i=0; i<8; i++) + o[i] = A1r (i); + + return pack (o); +} + +// 1111 000 ooooo 0111 00100 00000 00010 1 cpmovua1.h =croc (c3_1) +DI mep::mep_cpu_cgen::ivc2_cpmovua1_h (PCADDR &pc) +{ + int i; + HI o[4]; + + for (i=0; i<4; i++) + o[i] = A1r (i+4); + + return pack (o); +} + +// 1111 000 ooooo 0111 00100 00000 00011 1 cpmovla1.h =croc (c3_1) +DI mep::mep_cpu_cgen::ivc2_cpmovla1_h (PCADDR &pc) +{ + int i; + HI o[4]; + + for (i=0; i<4; i++) + o[i] = A1r (i); + + return pack (o); +} + +// 1111 000 ooooo 0111 00100 00000 00100 1 cpmovuua1.w =croc (c3_1) +DI mep::mep_cpu_cgen::ivc2_cpmovuua1_w (PCADDR &pc) +{ + int i; + SI o[2]; + + for (i=0; i<2; i++) + o[i] = A1r (i+6); + + return pack (o); +} + +// 1111 000 ooooo 0111 00100 00000 00101 1 cpmovula1.w =croc (c3_1) +DI mep::mep_cpu_cgen::ivc2_cpmovula1_w (PCADDR &pc) +{ + int i; + SI o[2]; + + for (i=0; i<2; i++) + o[i] = A1r (i+4); + + return pack (o); +} + +// 1111 000 ooooo 0111 00100 00000 00110 1 cpmovlua1.w =croc (c3_1) +DI mep::mep_cpu_cgen::ivc2_cpmovlua1_w (PCADDR &pc) +{ + int i; + SI o[2]; + + for (i=0; i<2; i++) + o[i] = A1r (i+2); + + return pack (o); +} + +// 1111 000 ooooo 0111 00100 00000 00111 1 cpmovlla1.w =croc (c3_1) +DI mep::mep_cpu_cgen::ivc2_cpmovlla1_w (PCADDR &pc) +{ + int i; + SI o[2]; + + for (i=0; i<2; i++) + o[i] = A1r (i); + + return pack (o); +} + +// 1111 000 ooooo 0111 00100 00000 10000 1 cppacka1u.b =croc (c3_1) +DI mep::mep_cpu_cgen::ivc2_cppacka1u_b (PCADDR &pc) +{ + int i; + QI o[8]; + DI acc; + + for (i=0; i<8; i++) + { + acc = A1r (i); + o[i] = (acc > 255) ? 255 : (acc < 0) ? 0 : acc; + } + + return pack (o); +} + +// 1111 000 ooooo 0111 00100 00000 10001 1 cppacka1.b =croc (c3_1) +DI mep::mep_cpu_cgen::ivc2_cppacka1_b (PCADDR &pc) +{ + int i; + QI o[8]; + DI acc; + + for (i=0; i<8; i++) + { + acc = A1r (i); + o[i] = (acc > 127) ? 127 : (acc < -128) ? -128 : acc; + } + + return pack (o); +} + +// 1111 000 ooooo 0111 00100 00000 10010 1 cppackua1.h =croc (c3_1) +DI mep::mep_cpu_cgen::ivc2_cppackua1_h (PCADDR &pc) +{ + int i; + HI o[4]; + DI acc; + + for (i=0; i<4; i++) + { + acc = A1r (i+4); + o[i] = (acc > 32767) ? 32767 : (acc < -32768) ? -32768 : acc; + } + + return pack (o); +} + +// 1111 000 ooooo 0111 00100 00000 10011 1 cppackla1.h =croc (c3_1) +DI mep::mep_cpu_cgen::ivc2_cppackla1_h (PCADDR &pc) +{ + int i; + HI o[4]; + DI acc; + + for (i=0; i<4; i++) + { + acc = A1r (i); + o[i] = (acc > 32767) ? 32767 : (acc < -32768) ? -32768 : acc; + } + + return pack (o); +} + +// 1111 000 ooooo 0111 00100 00000 10100 1 cppackua1.w =croc (c3_1) +DI mep::mep_cpu_cgen::ivc2_cppackua1_w (PCADDR &pc) +{ + int i; + SI o[2]; + DI acc; + + for (i=0; i<2; i++) + { + acc = ((UDI) ((USI) A1r (i*2+5)) << 32) | (USI) A1r (i*2+4); + o[i] = (acc > 2147483647LL) ? 2147483647LL : (acc < -2147483648LL) ? -2147483648LL : acc; + } + + return pack (o); +} + +// 1111 000 ooooo 0111 00100 00000 10101 1 cppackla1.w =croc (c3_1) +DI mep::mep_cpu_cgen::ivc2_cppackla1_w (PCADDR &pc) +{ + int i; + SI o[2]; + DI acc; + + for (i=0; i<2; i++) + { + acc = ((UDI) ((USI) A1r (i*2+1)) << 32) | (USI) A1r (i*2); + o[i] = (acc > 2147483647LL) ? 2147483647LL : (acc < -2147483648LL) ? -2147483648LL : acc; + } + + return pack (o); +} + +// 1111 000 ooooo 0111 00100 00000 10110 1 cpmovhua1.w =croc (c3_1) +DI mep::mep_cpu_cgen::ivc2_cpmovhua1_w (PCADDR &pc) +{ + int i; + SI o[2]; + + for (i=0; i<2; i++) + o[i] = A1r (i*2+5); + + return pack (o); +} + +// 1111 000 ooooo 0111 00100 00000 10111 1 cpmovhla1.w =croc (c3_1) +DI mep::mep_cpu_cgen::ivc2_cpmovhla1_w (PCADDR &pc) +{ + int i; + SI o[2]; + + for (i=0; i<2; i++) + o[i] = A1r (i*2+1); + + return pack (o); +} + +// 1111 0000 0000 0111 00010 qqqqq 00000 1 cpsrla1 crqc (c3_1) +void mep::mep_cpu_cgen::ivc2_cpsrla1 (PCADDR &pc, DI crqc) +{ + int i; + USI acc; + + for (i=0; i<8; i++) + { + acc = A1r (i); + A1w (i, acc >> crqc); + } +} + +// 1111 0000 0001 0111 00010 qqqqq 00000 1 cpsraa1 crqc (c3_1) +void mep::mep_cpu_cgen::ivc2_cpsraa1 (PCADDR &pc, DI crqc) +{ + int i; + SI acc; + + for (i=0; i<8; i++) + { + acc = A1r (i); + A1w (i, acc >> crqc); + } +} + +// 1111 0000 0010 0111 00010 qqqqq 00000 1 cpslla1 crqc (c3_1) +void mep::mep_cpu_cgen::ivc2_cpslla1 (PCADDR &pc, DI crqc) +{ + int i; + SI acc; + + for (i=0; i<8; i++) + { + acc = A1r (i); + A1w (i, acc << crqc); + } +} + +// 1111 00xi iiii 0111 00011 00000 00000 1 cpsrlia1 imm5 (c3_imm) +void mep::mep_cpu_cgen::ivc2_cpsrlia1 (PCADDR &pc, SI imm5) +{ + int i; + USI acc; + + for (i=0; i<8; i++) + { + acc = A1r (i); + A1w (i, acc >> imm5); + } +} + +// 1111 01xi iiii 0111 00011 00000 00000 1 cpsraia1 imm5 (c3_imm) +void mep::mep_cpu_cgen::ivc2_cpsraia1 (PCADDR &pc, SI imm5) +{ + int i; + SI acc; + + for (i=0; i<8; i++) + { + acc = A1r (i); + A1w (i, acc >> imm5); + } +} + +// 1111 10xi iiii 0111 00011 00000 00000 1 cpsllia1 imm5 (c3_imm) +void mep::mep_cpu_cgen::ivc2_cpsllia1 (PCADDR &pc, SI imm5) +{ + int i; + SI acc; + + for (i=0; i<8; i++) + { + acc = A1r (i); + A1w (i, acc << imm5); + } +} + +// 1111 0000 0000 0111 00001 qqqqq ppppp 1 cpssqa1u.b crqc,crpc (c3_1) +void mep::mep_cpu_cgen::ivc2_cpssqa1u_b (PCADDR &pc, DI crqc, DI crpc) +{ + int i; + UQI q[8], p[8]; + + unpack (crqc, q); + unpack (crpc, p); + + for (i=0; i<8; i++) + { + SI d = q[i] - p[i]; + A1w (i, d*d); + } +} + +// 1111 0000 0001 0111 00001 qqqqq ppppp 1 cpssqa1.b crqc,crpc (c3_1) +void mep::mep_cpu_cgen::ivc2_cpssqa1_b (PCADDR &pc, DI crqc, DI crpc) +{ + int i; + QI q[8], p[8]; + + unpack (crqc, q); + unpack (crpc, p); + + for (i=0; i<8; i++) + { + SI d = q[i] - p[i]; + A1w (i, d*d); + } +} + +// 1111 0000 0100 0111 00001 qqqqq ppppp 1 cpssda1u.b crqc,crpc (c3_1) +void mep::mep_cpu_cgen::ivc2_cpssda1u_b (PCADDR &pc, DI crqc, DI crpc) +{ + int i; + UQI q[8], p[8]; + USI cc; + + unpack (crqc, q); + unpack (crpc, p); + + cc = ccr (IVC2_COFA1); + + for (i=0; i<8; i++) + { + DI acc = A1r (i); + SI d = (SI)q[i] - (SI)p[i]; + acc += d * d; + if (acc < -0x80000000LL + || acc > 0x7fffffffLL) + cc |= (1 << i); + A1w (i, acc); + } + + ccw (IVC2_COFA1, cc); +} + +// 1111 0000 0101 0111 00001 qqqqq ppppp 1 cpssda1.b crqc,crpc (c3_1) +void mep::mep_cpu_cgen::ivc2_cpssda1_b (PCADDR &pc, DI crqc, DI crpc) +{ + int i; + QI q[8], p[8]; + USI cc; + + unpack (crqc, q); + unpack (crpc, p); + + cc = ccr (IVC2_COFA1); + + for (i=0; i<8; i++) + { + DI acc = A1r (i); + SI d = (SI)q[i] - (SI)p[i]; + acc += d * d; + if (acc < -0x80000000LL + || acc > 0x7fffffffLL) + cc |= (1 << i); + A1w (i, acc); + } + + ccw (IVC2_COFA1, cc); +} + +// 1111 0000 1000 0111 00001 qqqqq ppppp 1 cpmula1u.b crqc,crpc (c3_1) +void mep::mep_cpu_cgen::ivc2_cpmula1u_b (PCADDR &pc, DI crqc, DI crpc) +{ + int i; + UQI q[8], p[8]; + + unpack (crqc, q); + unpack (crpc, p); + + for (i=0; i<8; i++) + A1w (i, (SI)q[i] * (SI)p[i]); +} + +// 1111 0000 1001 0111 00001 qqqqq ppppp 1 cpmula1.b crqc,crpc (c3_1) +void mep::mep_cpu_cgen::ivc2_cpmula1_b (PCADDR &pc, DI crqc, DI crpc) +{ + int i; + QI q[8], p[8]; + + unpack (crqc, q); + unpack (crpc, p); + + for (i=0; i<8; i++) + A1w (i, (SI)q[i] * (SI)p[i]); +} + +// 1111 0000 1010 0111 00001 qqqqq ppppp 1 cpmulua1.h crqc,crpc (c3_1) +void mep::mep_cpu_cgen::ivc2_cpmulua1_h (PCADDR &pc, DI crqc, DI crpc) +{ + int i; + HI q[4], p[4]; + + unpack (crqc, q); + unpack (crpc, p); + + for (i=0; i<4; i++) + A1w (i+4, (SI)q[i] * (SI)p[i]); +} + +// 1111 0000 1011 0111 00001 qqqqq ppppp 1 cpmulla1.h crqc,crpc (c3_1) +void mep::mep_cpu_cgen::ivc2_cpmulla1_h (PCADDR &pc, DI crqc, DI crpc) +{ + int i; + HI q[4], p[4]; + + unpack (crqc, q); + unpack (crpc, p); + + for (i=0; i<4; i++) + A1w (i, (SI)q[i] * (SI)p[i]); +} + +// 1111 0000 1100 0111 00001 qqqqq ppppp 1 cpmulua1u.w crqc,crpc (c3_1) +void mep::mep_cpu_cgen::ivc2_cpmulua1u_w (PCADDR &pc, DI crqc, DI crpc) +{ + int i; + USI q[2], p[2]; + UDI acc; + + unpack (crqc, q); + unpack (crpc, p); + + for (i=0; i<2; i++) + { + acc = (UDI)q[i] * (UDI)p[i]; + A1w (i*2+5, acc >> 32); + A1w (i*2+4, acc); + } +} + +// 1111 0000 1101 0111 00001 qqqqq ppppp 1 cpmulla1u.w crqc,crpc (c3_1) +void mep::mep_cpu_cgen::ivc2_cpmulla1u_w (PCADDR &pc, DI crqc, DI crpc) +{ + int i; + USI q[2], p[2]; + UDI acc; + + unpack (crqc, q); + unpack (crpc, p); + + for (i=0; i<2; i++) + { + acc = (UDI)q[i] * (UDI)p[i]; + A1w (i*2+1, acc >> 32); + A1w (i*2+0, acc); + } +} + +// 1111 0000 1110 0111 00001 qqqqq ppppp 1 cpmulua1.w crqc,crpc (c3_1) +void mep::mep_cpu_cgen::ivc2_cpmulua1_w (PCADDR &pc, DI crqc, DI crpc) +{ + int i; + SI q[2], p[2]; + DI acc; + + unpack (crqc, q); + unpack (crpc, p); + + for (i=0; i<2; i++) + { + acc = (DI)q[i] * (DI)p[i]; + A1w (i*2+5, acc >> 32); + A1w (i*2+4, acc); + } +} + +// 1111 0000 1111 0111 00001 qqqqq ppppp 1 cpmulla1.w crqc,crpc (c3_1) +void mep::mep_cpu_cgen::ivc2_cpmulla1_w (PCADDR &pc, DI crqc, DI crpc) +{ + int i; + SI q[2], p[2]; + DI acc; + + unpack (crqc, q); + unpack (crpc, p); + + for (i=0; i<2; i++) + { + acc = (DI)q[i] * (DI)p[i]; + A1w (i*2+1, acc >> 32); + A1w (i*2+0, acc); + } +} + +// 1111 0001 0000 0111 00001 qqqqq ppppp 1 cpmada1u.b crqc,crpc (c3_1) +void mep::mep_cpu_cgen::ivc2_cpmada1u_b (PCADDR &pc, DI crqc, DI crpc) +{ + int i; + UQI q[8], p[8]; + USI cc; + + unpack (crqc, q); + unpack (crpc, p); + + cc = ccr (IVC2_COFA1); + + for (i=0; i<8; i++) + { + DI acc = A1r (i); + acc += (SI)q[i] * (SI)p[i]; + if (acc < -0x80000000LL + || acc > 0x7fffffffLL) + cc |= (1 << i); + A1w (i, acc); + } + + ccw (IVC2_COFA1, cc); +} + +// 1111 0001 0001 0111 00001 qqqqq ppppp 1 cpmada1.b crqc,crpc (c3_1) +void mep::mep_cpu_cgen::ivc2_cpmada1_b (PCADDR &pc, DI crqc, DI crpc) +{ + int i; + QI q[8], p[8]; + USI cc; + + unpack (crqc, q); + unpack (crpc, p); + + cc = ccr (IVC2_COFA1); + + for (i=0; i<8; i++) + { + DI acc = (SI) A1r (i); + acc += (SI)q[i] * (SI)p[i]; + if (acc < -0x80000000LL + || acc > 0x7fffffffLL) + cc |= (1 << i); + A1w (i, acc); + } + + ccw (IVC2_COFA1, cc); +} + +// 1111 0001 0010 0111 00001 qqqqq ppppp 1 cpmadua1.h crqc,crpc (c3_1) +void mep::mep_cpu_cgen::ivc2_cpmadua1_h (PCADDR &pc, DI crqc, DI crpc) +{ + int i; + HI q[4], p[4]; + USI cc; + + unpack (crqc, q); + unpack (crpc, p); + + cc = ccr (IVC2_COFA1); + + for (i=0; i<4; i++) + { + DI acc = (SI) A1r (i+4); + acc += (SI)q[i] * (SI)p[i]; + if (acc < -0x80000000LL + || acc > 0x7fffffffLL) + cc |= (1 << i); + A1w (i+4, acc); + } + + ccw (IVC2_COFA1, cc); +} + +// 1111 0001 0011 0111 00001 qqqqq ppppp 1 cpmadla1.h crqc,crpc (c3_1) +void mep::mep_cpu_cgen::ivc2_cpmadla1_h (PCADDR &pc, DI crqc, DI crpc) +{ + int i; + HI q[4], p[4]; + USI cc; + + unpack (crqc, q); + unpack (crpc, p); + + cc = ccr (IVC2_COFA1); + + for (i=0; i<4; i++) + { + DI acc = (SI) A1r (i); + acc += (SI)q[i] * (SI)p[i]; + if (acc < -0x80000000LL + || acc > 0x7fffffffLL) + cc |= (1 << i); + A1w (i, acc); + } + + ccw (IVC2_COFA1, cc); +} + +// 1111 0001 0100 0111 00001 qqqqq ppppp 1 cpmadua1u.w crqc,crpc (c3_1) +void mep::mep_cpu_cgen::ivc2_cpmadua1u_w (PCADDR &pc, DI crqc, DI crpc) +{ + int i; + USI q[2], p[2]; + USI cc; + UDI acc; + + unpack (crqc, q); + unpack (crpc, p); + + for (i=0; i<2; i++) + { + acc = ((UDI) ((USI) A1r (i*2+5)) << 32) | (USI) A1r (i*2+4); + acc += (UDI)q[i] * (UDI)p[i]; + A1w (i*2+5, acc >> 32); + A1w (i*2+4, acc); + } +} + +// 1111 0001 0101 0111 00001 qqqqq ppppp 1 cpmadla1u.w crqc,crpc (c3_1) +void mep::mep_cpu_cgen::ivc2_cpmadla1u_w (PCADDR &pc, DI crqc, DI crpc) +{ + int i; + USI q[2], p[2]; + USI cc; + UDI acc; + + unpack (crqc, q); + unpack (crpc, p); + + for (i=0; i<2; i++) + { + acc = ((UDI) ((USI) A1r (i*2+1)) << 32) | (USI) A1r (i*2+0); + acc += (UDI)q[i] * (UDI)p[i]; + A1w (i*2+1, acc >> 32); + A1w (i*2+0, acc); + } +} + +// 1111 0001 0110 0111 00001 qqqqq ppppp 1 cpmadua1.w crqc,crpc (c3_1) +void mep::mep_cpu_cgen::ivc2_cpmadua1_w (PCADDR &pc, DI crqc, DI crpc) +{ + int i; + SI q[2], p[2]; + USI cc; + UDI oacc, acc; + + unpack (crqc, q); + unpack (crpc, p); + + cc = ccr (IVC2_COFA1); + + for (i=0; i<2; i++) + { + acc = ((UDI) ((USI) A1r (i*2+5)) << 32) | (USI) A1r (i*2+4); + oacc = acc; + acc += (DI)q[i] * (DI)p[i]; + if (acc < oacc) + cc |= (1 << i); + A1w (i*2+5, acc >> 32); + A1w (i*2+4, acc); + } + + ccw (IVC2_COFA1, cc); +} + +// 1111 0001 0111 0111 00001 qqqqq ppppp 1 cpmadla1.w crqc,crpc (c3_1) +void mep::mep_cpu_cgen::ivc2_cpmadla1_w (PCADDR &pc, DI crqc, DI crpc) +{ + int i; + SI q[2], p[2]; + USI cc; + UDI oacc, acc; + + unpack (crqc, q); + unpack (crpc, p); + + cc = ccr (IVC2_COFA1); + + for (i=0; i<2; i++) + { + acc = ((UDI) ((USI) A1r (i*2+1)) << 32) | (USI) A1r (i*2+0); + oacc = acc; + acc += (DI)q[i] * (DI)p[i]; + if (acc < oacc) + cc |= (1 << i); + A1w (i*2+1, acc >> 32); + A1w (i*2+0, acc); + } + + ccw (IVC2_COFA1, cc); +} + +// 1111 0001 1010 0111 00001 qqqqq ppppp 1 cpmsbua1.h crqc,crpc (c3_1) +void mep::mep_cpu_cgen::ivc2_cpmsbua1_h (PCADDR &pc, DI crqc, DI crpc) +{ + int i; + HI q[4], p[4]; + USI cc; + + unpack (crqc, q); + unpack (crpc, p); + + cc = ccr (IVC2_COFA1); + + for (i=0; i<4; i++) + { + DI acc = (SI) A1r (i+4); + acc -= (SI)q[i] * (SI)p[i]; + if (acc < -0x80000000LL + || acc > 0x7fffffffLL) + cc |= (1 << i); + A1w (i+4, acc); + } + + ccw (IVC2_COFA1, cc); +} + +// 1111 0001 1011 0111 00001 qqqqq ppppp 1 cpmsbla1.h crqc,crpc (c3_1) +void mep::mep_cpu_cgen::ivc2_cpmsbla1_h (PCADDR &pc, DI crqc, DI crpc) +{ + int i; + HI q[4], p[4]; + USI cc; + + unpack (crqc, q); + unpack (crpc, p); + + cc = ccr (IVC2_COFA1); + + for (i=0; i<4; i++) + { + DI acc = (SI) A1r (i); + acc -= (SI)q[i] * (SI)p[i]; + if (acc < -0x80000000LL + || acc > 0x7fffffffLL) + cc |= (1 << i); + A1w (i, acc); + } + + ccw (IVC2_COFA1, cc); +} + +// 1111 0001 1100 0111 00001 qqqqq ppppp 1 cpmsbua1u.w crqc,crpc (c3_1) +void mep::mep_cpu_cgen::ivc2_cpmsbua1u_w (PCADDR &pc, DI crqc, DI crpc) +{ + int i; + USI q[2], p[2]; + USI cc; + UDI acc; + + unpack (crqc, q); + unpack (crpc, p); + + for (i=0; i<2; i++) + { + acc = ((UDI) ((USI) A1r (i*2+5)) << 32) | (USI) A1r (i*2+4); + acc -= (UDI)q[i] * (UDI)p[i]; + A1w (i*2+5, acc >> 32); + A1w (i*2+4, acc); + } +} + +// 1111 0001 1101 0111 00001 qqqqq ppppp 1 cpmsbla1u.w crqc,crpc (c3_1) +void mep::mep_cpu_cgen::ivc2_cpmsbla1u_w (PCADDR &pc, DI crqc, DI crpc) +{ + int i; + USI q[2], p[2]; + USI cc; + UDI acc; + + unpack (crqc, q); + unpack (crpc, p); + + for (i=0; i<2; i++) + { + acc = ((UDI) ((USI) A1r (i*2+1)) << 32) | (USI) A1r (i*2+0); + acc -= (UDI)q[i] * (UDI)p[i]; + A1w (i*2+1, acc >> 32); + A1w (i*2+0, acc); + } +} + +// 1111 0001 1110 0111 00001 qqqqq ppppp 1 cpmsbua1.w crqc,crpc (c3_1) +void mep::mep_cpu_cgen::ivc2_cpmsbua1_w (PCADDR &pc, DI crqc, DI crpc) +{ + int i; + SI q[2], p[2]; + USI cc; + UDI oacc, acc; + + unpack (crqc, q); + unpack (crpc, p); + + cc = ccr (IVC2_COFA1); + + for (i=0; i<2; i++) + { + acc = ((UDI) ((USI) A1r (i*2+5)) << 32) | (USI) A1r (i*2+4); + oacc = acc; + acc -= (DI)q[i] * (DI)p[i]; + if (acc < oacc) + cc |= (1 << i); + A1w (i*2+5, acc >> 32); + A1w (i*2+4, acc); + } + + ccw (IVC2_COFA1, cc); +} + +// 1111 0001 1111 0111 00001 qqqqq ppppp 1 cpmsbla1.w crqc,crpc (c3_1) +void mep::mep_cpu_cgen::ivc2_cpmsbla1_w (PCADDR &pc, DI crqc, DI crpc) +{ + int i; + SI q[2], p[2]; + USI cc; + UDI oacc, acc; + + unpack (crqc, q); + unpack (crpc, p); + + cc = ccr (IVC2_COFA1); + + for (i=0; i<2; i++) + { + acc = ((UDI) ((USI) A1r (i*2+1)) << 32) | (USI) A1r (i*2+0); + oacc = acc; + acc -= (DI)q[i] * (DI)p[i]; + if (acc < oacc) + cc |= (1 << i); + A1w (i*2+1, acc >> 32); + A1w (i*2+0, acc); + } + + ccw (IVC2_COFA1, cc); +} + +// 1111 0011 0010 0111 00001 qqqqq ppppp 1 cpsmadua1.h crqc,crpc (c3_1) +void mep::mep_cpu_cgen::ivc2_cpsmadua1_h (PCADDR &pc, DI crqc, DI crpc) +{ + int i; + HI q[4], p[4]; + USI cc; + + unpack (crqc, q); + unpack (crpc, p); + + cc = ccr (IVC2_COFA1); + + for (i=0; i<4; i++) + { + DI acc = (SI) A1r (i+4); + acc += abs ((SI)q[i] * (SI)p[i]); + if (acc > 0x7fffffffLL) + { + acc = 0x7fffffffLL; + cc |= (1 << (i+4)); + } + else if (acc < -0x80000000LL) + { + acc = -0x80000000LL; + cc |= (1 << (i+4)); + } + A1w (i+4, acc); + } + + ccw (IVC2_COFA1, cc); +} + +// 1111 0011 0011 0111 00001 qqqqq ppppp 1 cpsmadla1.h crqc,crpc (c3_1) +void mep::mep_cpu_cgen::ivc2_cpsmadla1_h (PCADDR &pc, DI crqc, DI crpc) +{ + int i; + HI q[4], p[4]; + USI cc; + + unpack (crqc, q); + unpack (crpc, p); + + cc = ccr (IVC2_COFA1); + + for (i=0; i<4; i++) + { + DI acc = (SI) A1r (i); + acc += (abs ((SI)q[i] * (SI)p[i])) << 1; + if (acc > 0x7fffffffLL) + { + acc = 0x7fffffffLL; + cc |= (1 << i); + } + else if (acc < -0x80000000LL) + { + acc = -0x80000000LL; + cc |= (1 << i); + } + A1w (i, acc); + } + + ccw (IVC2_COFA1, cc); +} + +// 1111 0011 0110 0111 00001 qqqqq ppppp 1 cpsmadua1.w crqc,crpc (c3_1) +void mep::mep_cpu_cgen::ivc2_cpsmadua1_w (PCADDR &pc, DI crqc, DI crpc) +{ + int i; + SI q[2], p[2]; + USI cc; + UDI acc, oacc, term; + + unpack (crqc, q); + unpack (crpc, p); + + cc = ccr (IVC2_COFA1); + + for (i=0; i<2; i++) + { + acc = ((UDI) ((USI) A1r (i*2+5)) << 32) | (USI) A1r (i*2+4); + oacc = acc; + term = (DI)q[i] * (DI)p[i]; + acc += term; + switch (di_msbs (acc, oacc, term)) + { + case 0: // P = P + P + case 1: // P = P + N + case 6: // N = N + P + case 7: // N = N + N + // no range crossing + break; + case 2: // P = N + P + case 5: // N = P + N + // cross through zero + break; + case 3: // P = N + N + acc = -0x8000000000000000LL; + cc |= (3 << (i*2+4)); + break; + case 4: // N = P + P + acc = 0x7fffffffffffffffLL; + cc |= (3 << (i*2+4)); + break; + } + A1w (i*2+5, acc >> 32); + A1w (i*2+4, acc); + } + + ccw (IVC2_COFA1, cc); +} + +// 1111 0011 0111 0111 00001 qqqqq ppppp 1 cpsmadla1.w crqc,crpc (c3_1) +void mep::mep_cpu_cgen::ivc2_cpsmadla1_w (PCADDR &pc, DI crqc, DI crpc) +{ + int i; + SI q[2], p[2]; + USI cc; + UDI acc, oacc, term; + + unpack (crqc, q); + unpack (crpc, p); + + cc = ccr (IVC2_COFA1); + + for (i=0; i<2; i++) + { + acc = ((UDI) ((USI) A1r (i*2+1)) << 32) | (USI) A1r (i*2+0); + oacc = acc; + term = (DI)q[i] * (DI)p[i]; + acc += term; + switch (di_msbs (acc, oacc, term)) + { + case 0: // P = P + P + case 1: // P = P + N + case 6: // N = N + P + case 7: // N = N + N + // no range crossing + break; + case 2: // P = N + P + case 5: // N = P + N + // cross through zero + break; + case 3: // P = N + N + acc = -0x8000000000000000LL; + cc |= (3 << (i*2+0)); + break; + case 4: // N = P + P + acc = 0x7fffffffffffffffLL; + cc |= (3 << (i*2+0)); + break; + } + A1w (i*2+1, acc >> 32); + A1w (i*2+0, acc); + } + + ccw (IVC2_COFA1, cc); +} + +// 1111 0011 1010 0111 00001 qqqqq ppppp 1 cpsmsbua1.h crqc,crpc (c3_1) +void mep::mep_cpu_cgen::ivc2_cpsmsbua1_h (PCADDR &pc, DI crqc, DI crpc) +{ + int i; + HI q[4], p[4]; + USI cc; + + unpack (crqc, q); + unpack (crpc, p); + + cc = ccr (IVC2_COFA1); + + for (i=0; i<4; i++) + { + DI acc = (SI) A1r (i+4); + acc -= abs ((SI)q[i] * (SI)p[i]); + if (acc > 0x7fffffffLL) + { + acc = 0x7fffffffLL; + cc |= (1 << (i+4)); + } + else if (acc < -0x80000000LL) + { + acc = -0x80000000LL; + cc |= (1 << (i+4)); + } + A1w (i+4, acc); + } + + ccw (IVC2_COFA1, cc); +} + +// 1111 0011 1011 0111 00001 qqqqq ppppp 1 cpsmsbla1.h crqc,crpc (c3_1) +void mep::mep_cpu_cgen::ivc2_cpsmsbla1_h (PCADDR &pc, DI crqc, DI crpc) +{ + int i; + HI q[4], p[4]; + USI cc; + + unpack (crqc, q); + unpack (crpc, p); + + cc = ccr (IVC2_COFA1); + + for (i=0; i<4; i++) + { + DI acc = (SI) A1r (i); + acc -= abs ((SI)q[i] * (SI)p[i]); + if (acc > 0x7fffffffLL) + { + acc = 0x7fffffffLL; + cc |= (1 << i); + } + else if (acc < -0x80000000LL) + { + acc = -0x80000000LL; + cc |= (1 << i); + } + A1w (i, acc); + } + + ccw (IVC2_COFA1, cc); +} + +// 1111 0011 1110 0111 00001 qqqqq ppppp 1 cpsmsbua1.w crqc,crpc (c3_1) +void mep::mep_cpu_cgen::ivc2_cpsmsbua1_w (PCADDR &pc, DI crqc, DI crpc) +{ + int i; + SI q[2], p[2]; + USI cc; + UDI acc, oacc, term; + + unpack (crqc, q); + unpack (crpc, p); + + cc = ccr (IVC2_COFA1); + + for (i=0; i<2; i++) + { + acc = ((UDI) ((USI) A1r (i*2+5)) << 32) | (USI) A1r (i*2+4); + oacc = acc; + term = (DI)q[i] * (DI)p[i]; + acc -= term; + switch (di_msbs (acc, oacc, term)) + { + case 0: // P = P - P + case 1: // P = P - N + case 6: // N = N - P + case 7: // N = N - N + // no range crossing + break; + case 3: // P = N - N + case 4: // N = P - P + // cross through zero + break; + case 2: // P = N - P + acc = -0x8000000000000000LL; + cc |= (3 << (i*2+4)); + break; + case 5: // N = P - N + acc = 0x7fffffffffffffffLL; + cc |= (3 << (i*2+4)); + break; + } + A1w (i*2+5, acc >> 32); + A1w (i*2+4, acc); + } + + ccw (IVC2_COFA1, cc); +} + +// 1111 0011 1111 0111 00001 qqqqq ppppp 1 cpsmsbla1.w crqc,crpc (c3_1) +void mep::mep_cpu_cgen::ivc2_cpsmsbla1_w (PCADDR &pc, DI crqc, DI crpc) +{ + int i; + SI q[2], p[2]; + USI cc; + UDI acc, oacc, term; + + unpack (crqc, q); + unpack (crpc, p); + + cc = ccr (IVC2_COFA1); + + for (i=0; i<2; i++) + { + acc = ((UDI) ((USI) A1r (i*2+1)) << 32) | (USI) A1r (i*2); + oacc = acc; + term = (DI)q[i] * (DI)p[i]; + acc -= term; + switch (di_msbs (acc, oacc, term)) + { + case 0: // P = P - P + case 1: // P = P - N + case 6: // N = N - P + case 7: // N = N - N + // no range crossing + break; + case 3: // P = N - N + case 4: // N = P - P + // cross through zero + break; + case 2: // P = N - P + acc = -0x8000000000000000LL; + cc |= (3 << (i*2)); + break; + case 5: // N = P - N + acc = 0x7fffffffffffffffLL; + cc |= (3 << (i*2)); + break; + } + A1w (i*2+1, acc >> 32); + A1w (i*2+0, acc); + } + + ccw (IVC2_COFA1, cc); +} + +// 1111 0100 1010 0111 00001 qqqqq ppppp 1 cpmulslua1.h crqc,crpc (c3_1) +void mep::mep_cpu_cgen::ivc2_cpmulslua1_h (PCADDR &pc, DI crqc, DI crpc) +{ + int i; + HI q[4], p[4]; + + unpack (crqc, q); + unpack (crpc, p); + + for (i=0; i<4; i++) + { + if (q[i] == 0x8000 && p[i] == 0x8000) + A1w (i+4, 0x7fffffff); + else + A1w (i+4, ((SI)q[i] * (SI)p[i]) << 1); + } +} + +// 1111 0100 1011 0111 00001 qqqqq ppppp 1 cpmulslla1.h crqc,crpc (c3_1) +void mep::mep_cpu_cgen::ivc2_cpmulslla1_h (PCADDR &pc, DI crqc, DI crpc) +{ + int i; + HI q[4], p[4]; + + unpack (crqc, q); + unpack (crpc, p); + + for (i=0; i<4; i++) + { + if (q[i] == 0x8000 && p[i] == 0x8000) + A1w (i, 0x7fffffff); + else + A1w (i, ((SI)q[i] * (SI)p[i]) << 1); + } +} + +// 1111 0100 1110 0111 00001 qqqqq ppppp 1 cpmulslua1.w crqc,crpc (c3_1) +void mep::mep_cpu_cgen::ivc2_cpmulslua1_w (PCADDR &pc, DI crqc, DI crpc) +{ + int i; + USI q[2], p[2]; + UDI acc; + USI cc; + + unpack (crqc, q); + unpack (crpc, p); + + cc = ccr (IVC2_COFA1); + + for (i=0; i<2; i++) + { + if (q[i] == 0x80000000ULL && p[i] == 0x80000000ULL) + { + acc = 0x7fffffffffffffffLL; + cc |= (3 << (i*2+4)); + } + else + acc = ((UDI)q[i] * (UDI)p[i]) << 1; + A1w (i*2+5, acc >> 32); + A1w (i*2+4, acc); + } + + ccw (IVC2_COFA1, cc); +} + +// 1111 0100 1111 0111 00001 qqqqq ppppp 1 cpmulslla1.w crqc,crpc (c3_1) +void mep::mep_cpu_cgen::ivc2_cpmulslla1_w (PCADDR &pc, DI crqc, DI crpc) +{ + int i; + USI q[2], p[2]; + UDI acc; + USI cc; + + unpack (crqc, q); + unpack (crpc, p); + + cc = ccr (IVC2_COFA1); + + for (i=0; i<2; i++) + { + if (q[i] == 0x80000000ULL && p[i] == 0x80000000ULL) + { + acc = 0x7fffffffffffffffLL; + cc |= (3 << (i*2)); + } + else + acc = ((UDI)q[i] * (UDI)p[i]) << 1; + A1w (i*2+1, acc >> 32); + A1w (i*2+0, acc); + } + + ccw (IVC2_COFA1, cc); +} + +// 1111 0111 0010 0111 00001 qqqqq ppppp 1 cpsmadslua1.h crqc,crpc (c3_1) +void mep::mep_cpu_cgen::ivc2_cpsmadslua1_h (PCADDR &pc, DI crqc, DI crpc) +{ + int i; + HI q[4], p[4]; + USI cc; + + unpack (crqc, q); + unpack (crpc, p); + + cc = ccr (IVC2_COFA1); + + for (i=0; i<4; i++) + { + DI acc = (SI) A1r (i+4); + DI tmp; + + if (q[i] == 0x8000 && p[i] == 0x8000) + { + tmp = 0x7ffffff; + cc |= (1 << (i+4)); + } + else + tmp = ((SI)q[i] * (SI)p[i]) << 1; + + acc += tmp; + if (acc > 0x7fffffffLL) + { + acc = 0x7fffffffLL; + cc |= (1 << (i+4)); + } + else if (acc < -0x80000000LL) + { + acc = -0x80000000LL; + cc |= (1 << (i+4)); + } + A1w (i+4, acc); + } + + ccw (IVC2_COFA1, cc); +} + +// 1111 0111 0011 0111 00001 qqqqq ppppp 1 cpsmadslla1.h crqc,crpc (c3_1) +void mep::mep_cpu_cgen::ivc2_cpsmadslla1_h (PCADDR &pc, DI crqc, DI crpc) +{ + int i; + HI q[4], p[4]; + USI cc; + + unpack (crqc, q); + unpack (crpc, p); + + cc = ccr (IVC2_COFA1); + + for (i=0; i<4; i++) + { + DI acc = (SI) A1r (i); + DI tmp; + + if (q[i] == 0x8000 && p[i] == 0x8000) + { + tmp = 0x7ffffff; + cc |= (1 << (i)); + } + else + tmp = ((SI)q[i] * (SI)p[i]) << 1; + + acc += tmp; + if (acc > 0x7fffffffLL) + { + acc = 0x7fffffffLL; + cc |= (1 << (i)); + } + else if (acc < -0x80000000LL) + { + acc = -0x80000000LL; + cc |= (1 << (i)); + } + A1w (i, acc); + } + + ccw (IVC2_COFA1, cc); +} + +// 1111 0111 0110 0111 00001 qqqqq ppppp 1 cpsmadslua1.w crqc,crpc (c3_1) +void mep::mep_cpu_cgen::ivc2_cpsmadslua1_w (PCADDR &pc, DI crqc, DI crpc) +{ + int i; + SI q[2], p[2]; + USI cc; + UDI acc, oacc, term; + + unpack (crqc, q); + unpack (crpc, p); + + cc = ccr (IVC2_COFA1); + + for (i=0; i<2; i++) + { + acc = ((UDI) ((USI) A1r (i*2+5)) << 32) | (USI) A1r (i*2+4); + oacc = acc; + if (q[i] == 0x80000000 && p[i] == 0x80000000) + { + term = 0x7fffffffffffffffLL; + cc |= (3 << (i*2+4)); + } + else + term = (DI)q[i] * (DI)p[i]; + acc += term << 1; + switch (di_msbs (acc, oacc, term)) + { + case 0: // P = P + P + case 1: // P = P + N + case 6: // N = N + P + case 7: // N = N + N + // no range crossing + break; + case 2: // P = N + P + case 5: // N = P + N + // cross through zero + break; + case 3: // P = N + N + acc = -0x8000000000000000LL; + cc |= (3 << (i*2+4)); + break; + case 4: // N = P + P + acc = 0x7fffffffffffffffLL; + cc |= (3 << (i*2+4)); + break; + } + A1w (i*2+5, acc >> 32); + A1w (i*2+4, acc); + } + + ccw (IVC2_COFA1, cc); +} + +// 1111 0111 0111 0111 00001 qqqqq ppppp 1 cpsmadslla1.w crqc,crpc (c3_1) +void mep::mep_cpu_cgen::ivc2_cpsmadslla1_w (PCADDR &pc, DI crqc, DI crpc) +{ + int i; + SI q[2], p[2]; + USI cc; + UDI acc, oacc, term; + + unpack (crqc, q); + unpack (crpc, p); + + cc = ccr (IVC2_COFA1); + + for (i=0; i<2; i++) + { + acc = ((UDI) ((USI) A1r (i*2+1)) << 32) | (USI) A1r (i*2); + oacc = acc; + if (q[i] == 0x80000000 && p[i] == 0x80000000) + { + term = 0x7fffffffffffffffLL; + cc |= (3 << (i*2+4)); + } + else + term = (DI)q[i] * (DI)p[i]; + acc += term << 1; + switch (di_msbs (acc, oacc, term)) + { + case 0: // P = P + P + case 1: // P = P + N + case 6: // N = N + P + case 7: // N = N + N + // no range crossing + break; + case 2: // P = N + P + case 5: // N = P + N + // cross through zero + break; + case 3: // P = N + N + acc = -0x8000000000000000LL; + cc |= (3 << (i*2)); + break; + case 4: // N = P + P + acc = 0x7fffffffffffffffLL; + cc |= (3 << (i*2)); + break; + } + A1w (i*2+1, acc >> 32); + A1w (i*2+0, acc); + } + + ccw (IVC2_COFA1, cc); +} + +// 1111 0111 1010 0111 00001 qqqqq ppppp 1 cpsmsbslua1.h crqc,crpc (c3_1) +void mep::mep_cpu_cgen::ivc2_cpsmsbslua1_h (PCADDR &pc, DI crqc, DI crpc) +{ + int i; + HI q[4], p[4]; + USI cc; + + unpack (crqc, q); + unpack (crpc, p); + + cc = ccr (IVC2_COFA1); + + for (i=0; i<4; i++) + { + DI acc = (SI) A1r (i+4); + DI tmp; + + if (q[i] == 0x8000 && p[i] == 0x8000) + { + tmp = 0x7ffffff; + cc |= (1 << (i+4)); + } + else + tmp = ((SI)q[i] * (SI)p[i]) << 1; + + acc -= tmp; + if (acc > 0x7fffffffLL) + { + acc = 0x7fffffffLL; + cc |= (1 << (i+4)); + } + else if (acc < -0x80000000LL) + { + acc = -0x80000000LL; + cc |= (1 << (i+4)); + } + A1w (i+4, acc); + } + + ccw (IVC2_COFA1, cc); +} + +// 1111 0111 1011 0111 00001 qqqqq ppppp 1 cpsmsbslla1.h crqc,crpc (c3_1) +void mep::mep_cpu_cgen::ivc2_cpsmsbslla1_h (PCADDR &pc, DI crqc, DI crpc) +{ + int i; + HI q[4], p[4]; + USI cc; + + unpack (crqc, q); + unpack (crpc, p); + + cc = ccr (IVC2_COFA1); + + for (i=0; i<4; i++) + { + DI acc = (SI) A1r (i); + DI tmp; + + if (q[i] == 0x8000 && p[i] == 0x8000) + { + tmp = 0x7ffffff; + cc |= (1 << (i)); + } + else + tmp = ((SI)q[i] * (SI)p[i]) << 1; + + acc -= tmp; + if (acc > 0x7fffffffLL) + { + acc = 0x7fffffffLL; + cc |= (1 << (i)); + } + else if (acc < -0x80000000LL) + { + acc = -0x80000000LL; + cc |= (1 << (i)); + } + A1w (i, acc); + } + + ccw (IVC2_COFA1, cc); +} + +// 1111 0111 1110 0111 00001 qqqqq ppppp 1 cpsmsbslua1.w crqc,crpc (c3_1) +void mep::mep_cpu_cgen::ivc2_cpsmsbslua1_w (PCADDR &pc, DI crqc, DI crpc) +{ + int i; + SI q[2], p[2]; + USI cc; + UDI acc, oacc, term; + + unpack (crqc, q); + unpack (crpc, p); + + cc = ccr (IVC2_COFA1); + + for (i=0; i<2; i++) + { + acc = ((UDI) ((USI) A1r (i*2+5)) << 32) | (USI) A1r (i*2+4); + oacc = acc; + if (q[i] == 0x80000000 && p[i] == 0x80000000) + { + term = 0x7fffffffffffffffLL; + cc |= (3 << (i*2+4)); + } + else + term = (DI)q[i] * (DI)p[i]; + acc -= term << 1; + switch (di_msbs (acc, oacc, term)) + { + case 0: // P = P - P + case 1: // P = P - N + case 6: // N = N - P + case 7: // N = N - N + // no range crossing + break; + case 3: // P = N - N + case 4: // N = P - P + // cross through zero + break; + case 2: // P = N - P + acc = -0x8000000000000000LL; + cc |= (3 << (i*2+4)); + break; + case 5: // N = P - N + acc = 0x7fffffffffffffffLL; + cc |= (3 << (i*2+4)); + break; + } + A1w (i*2+5, acc >> 32); + A1w (i*2+4, acc); + } + + ccw (IVC2_COFA1, cc); +} + +// 1111 0111 1111 0111 00001 qqqqq ppppp 1 cpsmsbslla1.w crqc,crpc (c3_1) +void mep::mep_cpu_cgen::ivc2_cpsmsbslla1_w (PCADDR &pc, DI crqc, DI crpc) +{ + int i; + SI q[2], p[2]; + USI cc; + UDI acc, oacc, term; + + unpack (crqc, q); + unpack (crpc, p); + + cc = ccr (IVC2_COFA1); + + for (i=0; i<2; i++) + { + acc = ((UDI) ((USI) A1r (i*2+1)) << 32) | (USI) A1r (i*2); + oacc = acc; + if (q[i] == 0x80000000 && p[i] == 0x80000000) + { + term = 0x7fffffffffffffffLL; + cc |= (3 << (i*2+4)); + } + else + term = (DI)q[i] * (DI)p[i]; + acc -= term << 1; + switch (di_msbs (acc, oacc, term)) + { + case 0: // P = P - P + case 1: // P = P - N + case 6: // N = N - P + case 7: // N = N - N + // no range crossing + break; + case 3: // P = N - N + case 4: // N = P - P + // cross through zero + break; + case 2: // P = N - P + acc = -0x8000000000000000LL; + cc |= (3 << (i*2)); + break; + case 5: // N = P - N + acc = 0x7fffffffffffffffLL; + cc |= (3 << (i*2)); + break; + } + A1w (i*2+1, acc >> 32); + A1w (i*2+0, acc); + } + + ccw (IVC2_COFA1, cc); +} + +// 00000 00000 00000 00000 c0nop (p0_1) +void mep::mep_cpu_cgen::ivc2_c0nop (PCADDR &pc) +{ +} + +// 11000 qqqqq ppppp 00000 cpadda0u.b crqp,crpp (p0_1) +void mep::mep_cpu_cgen::ivc2_cpadda0u_b (PCADDR &pc, DI crqp, DI crpp) +{ + int i; + UQI q[8], p[8]; + + unpack (crqp, q); + unpack (crpp, p); + + for (i=0; i<8; i++) + A0w (i, (SI)q[i] + (SI)p[i]); +} + +// 11000 qqqqq ppppp 00001 cpadda0.b crqp,crpp (p0_1) +void mep::mep_cpu_cgen::ivc2_cpadda0_b (PCADDR &pc, DI crqp, DI crpp) +{ + int i; + QI q[8], p[8]; + + unpack (crqp, q); + unpack (crpp, p); + + for (i=0; i<8; i++) + A0w (i, (SI)q[i] + (SI)p[i]); +} + +// 11000 qqqqq ppppp 00010 cpaddua0.h crqp,crpp (p0_1) +void mep::mep_cpu_cgen::ivc2_cpaddua0_h (PCADDR &pc, DI crqp, DI crpp) +{ + int i; + HI q[4], p[4]; + + unpack (crqp, q); + unpack (crpp, p); + + for (i=0; i<4; i++) + A0w (i+4, (SI)q[i] + (SI)p[i]); +} + +// 11000 qqqqq ppppp 00011 cpaddla0.h crqp,crpp (p0_1) +void mep::mep_cpu_cgen::ivc2_cpaddla0_h (PCADDR &pc, DI crqp, DI crpp) +{ + int i; + HI q[4], p[4]; + + unpack (crqp, q); + unpack (crpp, p); + + for (i=0; i<4; i++) + A0w (i, (SI)q[i] + (SI)p[i]); +} + +// 11000 qqqqq ppppp 00100 cpaddaca0u.b crqp,crpp (p0_1) +void mep::mep_cpu_cgen::ivc2_cpaddaca0u_b (PCADDR &pc, DI crqp, DI crpp) +{ + int i; + UQI q[8], p[8]; + USI cc; + + unpack (crqp, q); + unpack (crpp, p); + + cc = ccr (IVC2_COFA0); + + for (i=0; i<8; i++) + { + DI acc = A0r (i); + acc += (SI)q[i] + (SI)p[i]; + if (acc < -0x80000000LL + || acc > 0x7fffffffLL) + cc |= (1 << i); + A0w (i, acc); + } + + ccw (IVC2_COFA0, cc); +} + +// 11000 qqqqq ppppp 00101 cpaddaca0.b crqp,crpp (p0_1) +void mep::mep_cpu_cgen::ivc2_cpaddaca0_b (PCADDR &pc, DI crqp, DI crpp) +{ + int i; + QI q[8], p[8]; + USI cc; + + unpack (crqp, q); + unpack (crpp, p); + + cc = ccr (IVC2_COFA0); + + for (i=0; i<8; i++) + { + DI acc = (SI) A0r (i); + acc += (SI)q[i] + (SI)p[i]; + if (acc < -0x80000000LL + || acc > 0x7fffffffLL) + cc |= (1 << i); + A0w (i, acc); + } + + ccw (IVC2_COFA0, cc); +} + +// 11000 qqqqq ppppp 00110 cpaddacua0.h crqp,crpp (p0_1) +void mep::mep_cpu_cgen::ivc2_cpaddacua0_h (PCADDR &pc, DI crqp, DI crpp) +{ + int i; + HI q[4], p[4]; + USI cc; + + unpack (crqp, q); + unpack (crpp, p); + + cc = ccr (IVC2_COFA0); + + for (i=0; i<4; i++) + { + DI acc = (SI) A0r (i+4); + acc += (SI)q[i] + (SI)p[i]; + if (acc < -0x80000000LL + || acc > 0x7fffffffLL) + cc |= (1 << i); + A0w (i+4, acc); + } + + ccw (IVC2_COFA0, cc); +} + +// 11000 qqqqq ppppp 00111 cpaddacla0.h crqp,crpp (p0_1) +void mep::mep_cpu_cgen::ivc2_cpaddacla0_h (PCADDR &pc, DI crqp, DI crpp) +{ + int i; + HI q[4], p[4]; + USI cc; + + unpack (crqp, q); + unpack (crpp, p); + + cc = ccr (IVC2_COFA0); + + for (i=0; i<4; i++) + { + DI acc = (SI) A0r (i); + acc += (SI)q[i] + (SI)p[i]; + if (acc < -0x80000000LL + || acc > 0x7fffffffLL) + cc |= (1 << i); + A0w (i, acc); + } + + ccw (IVC2_COFA0, cc); +} + +// 11000 qqqqq ppppp 01000 cpsuba0u.b crqp,crpp (p0_1) +void mep::mep_cpu_cgen::ivc2_cpsuba0u_b (PCADDR &pc, DI crqp, DI crpp) +{ + int i; + UQI q[8], p[8]; + + unpack (crqp, q); + unpack (crpp, p); + + for (i=0; i<8; i++) + A0w (i, (SI)q[i] - (SI)p[i]); +} + +// 11000 qqqqq ppppp 01001 cpsuba0.b crqp,crpp (p0_1) +void mep::mep_cpu_cgen::ivc2_cpsuba0_b (PCADDR &pc, DI crqp, DI crpp) +{ + int i; + QI q[8], p[8]; + + unpack (crqp, q); + unpack (crpp, p); + + for (i=0; i<8; i++) + A0w (i, (SI)q[i] - (SI)p[i]); +} + +// 11000 qqqqq ppppp 01010 cpsubua0.h crqp,crpp (p0_1) +void mep::mep_cpu_cgen::ivc2_cpsubua0_h (PCADDR &pc, DI crqp, DI crpp) +{ + int i; + HI q[4], p[4]; + + unpack (crqp, q); + unpack (crpp, p); + + for (i=0; i<4; i++) + A0w (i+4, (SI)q[i] - (SI)p[i]); +} + +// 11000 qqqqq ppppp 01011 cpsubla0.h crqp,crpp (p0_1) +void mep::mep_cpu_cgen::ivc2_cpsubla0_h (PCADDR &pc, DI crqp, DI crpp) +{ + int i; + HI q[4], p[4]; + + unpack (crqp, q); + unpack (crpp, p); + + for (i=0; i<4; i++) + A0w (i, (SI)q[i] - (SI)p[i]); +} + +// 11000 qqqqq ppppp 01100 cpsubaca0u.b crqp,crpp (p0_1) +void mep::mep_cpu_cgen::ivc2_cpsubaca0u_b (PCADDR &pc, DI crqp, DI crpp) +{ + int i; + UQI q[8], p[8]; + USI cc; + + cout << " cpsubaca1u_b \n"; + + unpack (crqp, q); + unpack (crpp, p); + + cc = ccr (IVC2_COFA0); + + for (i=0; i<8; i++) + { + DI acc = A0r (i); + acc += (SI)q[i] - (SI)p[i]; + if (acc < -0x80000000LL + || acc > 0x7fffffffLL) + cc |= (1 << i); + A0w (i, acc); + } + + ccw (IVC2_COFA0, cc); +} + +// 11000 qqqqq ppppp 01101 cpsubaca0.b crqp,crpp (p0_1) +void mep::mep_cpu_cgen::ivc2_cpsubaca0_b (PCADDR &pc, DI crqp, DI crpp) +{ + int i; + QI q[8], p[8]; + USI cc; + + unpack (crqp, q); + unpack (crpp, p); + + cc = ccr (IVC2_COFA0); + + for (i=0; i<8; i++) + { + DI acc = (SI) A0r (i); + acc += (SI)q[i] - (SI)p[i]; + if (acc < -0x80000000LL + || acc > 0x7fffffffLL) + cc |= (1 << i); + A0w (i, acc); + } + + ccw (IVC2_COFA0, cc); +} + +// 11000 qqqqq ppppp 01110 cpsubacua0.h crqp,crpp (p0_1) +void mep::mep_cpu_cgen::ivc2_cpsubacua0_h (PCADDR &pc, DI crqp, DI crpp) +{ + int i; + HI q[4], p[4]; + USI cc; + + unpack (crqp, q); + unpack (crpp, p); + + cc = ccr (IVC2_COFA0); + + for (i=0; i<4; i++) + { + DI acc = (SI) A0r (i+4); + acc += (SI)q[i] - (SI)p[i]; + if (acc < -0x80000000LL + || acc > 0x7fffffffLL) + cc |= (1 << i); + A0w (i+4, acc); + } + + ccw (IVC2_COFA0, cc); +} + +// 11000 qqqqq ppppp 01111 cpsubacla0.h crqp,crpp (p0_1) +void mep::mep_cpu_cgen::ivc2_cpsubacla0_h (PCADDR &pc, DI crqp, DI crpp) +{ + int i; + HI q[4], p[4]; + USI cc; + + unpack (crqp, q); + unpack (crpp, p); + + cc = ccr (IVC2_COFA0); + + for (i=0; i<4; i++) + { + DI acc = (SI) A0r (i); + acc += (SI)q[i] - (SI)p[i]; + if (acc < -0x80000000LL + || acc > 0x7fffffffLL) + cc |= (1 << i); + A0w (i, acc); + } + + ccw (IVC2_COFA0, cc); +} + +// 11000 qqqqq ppppp 10000 cpabsa0u.b crqp,crpp (p0_1) +void mep::mep_cpu_cgen::ivc2_cpabsa0u_b (PCADDR &pc, DI crqp, DI crpp) +{ + int i; + UQI q[8], p[8]; + + unpack (crqp, q); + unpack (crpp, p); + + for (i=0; i<8; i++) + A0w (i, abs ((SI)q[i] - (SI)p[i])); +} + +// 11000 qqqqq ppppp 10001 cpabsa0.b crqp,crpp (p0_1) +void mep::mep_cpu_cgen::ivc2_cpabsa0_b (PCADDR &pc, DI crqp, DI crpp) +{ + int i; + QI q[8], p[8]; + + unpack (crqp, q); + unpack (crpp, p); + + for (i=0; i<8; i++) + A0w (i, abs ((SI)q[i] - (SI)p[i])); +} + +// 11000 qqqqq ppppp 10010 cpabsua0.h crqp,crpp (p0_1) +void mep::mep_cpu_cgen::ivc2_cpabsua0_h (PCADDR &pc, DI crqp, DI crpp) +{ + int i; + HI q[4], p[4]; + + unpack (crqp, q); + unpack (crpp, p); + + for (i=0; i<4; i++) + A0w (i+4, abs ((SI)q[i] - (SI)p[i])); +} + +// 11000 qqqqq ppppp 10011 cpabsla0.h crqp,crpp (p0_1) +void mep::mep_cpu_cgen::ivc2_cpabsla0_h (PCADDR &pc, DI crqp, DI crpp) +{ + int i; + HI q[4], p[4]; + + unpack (crqp, q); + unpack (crpp, p); + + for (i=0; i<4; i++) + A0w (i, abs ((SI)q[i] - (SI)p[i])); +} + +// 11000 qqqqq ppppp 10100 cpsada0u.b crqp,crpp (p0_1) +void mep::mep_cpu_cgen::ivc2_cpsada0u_b (PCADDR &pc, DI crqp, DI crpp) +{ + int i; + UQI q[8], p[8]; + USI cc; + + unpack (crqp, q); + unpack (crpp, p); + + cc = ccr (IVC2_COFA0); + + for (i=0; i<8; i++) + { + DI acc = A0r (i); + acc += abs ((SI)q[i] - (SI)p[i]); + if (acc < -0x80000000LL + || acc > 0x7fffffffLL) + cc |= (1 << i); + A0w (i, acc); + } + + ccw (IVC2_COFA0, cc); +} + +// 11000 qqqqq ppppp 10101 cpsada0.b crqp,crpp (p0_1) +void mep::mep_cpu_cgen::ivc2_cpsada0_b (PCADDR &pc, DI crqp, DI crpp) +{ + int i; + QI q[8], p[8]; + USI cc; + + unpack (crqp, q); + unpack (crpp, p); + + cc = ccr (IVC2_COFA0); + + for (i=0; i<8; i++) + { + DI acc = (SI) A0r (i); + acc += abs ((SI)q[i] - (SI)p[i]); + if (acc < -0x80000000LL + || acc > 0x7fffffffLL) + cc |= (1 << i); + A0w (i, acc); + } + + ccw (IVC2_COFA0, cc); +} + +// 11000 qqqqq ppppp 10110 cpsadua0.h crqp,crpp (p0_1) +void mep::mep_cpu_cgen::ivc2_cpsadua0_h (PCADDR &pc, DI crqp, DI crpp) +{ + int i; + HI q[4], p[4]; + USI cc; + + unpack (crqp, q); + unpack (crpp, p); + + cc = ccr (IVC2_COFA0); + + for (i=0; i<4; i++) + { + DI acc = (SI) A0r (i+4); + acc += abs ((SI)q[i] - (SI)p[i]); + if (acc < -0x80000000LL + || acc > 0x7fffffffLL) + cc |= (1 << i); + A0w (i+4, acc); + } + + ccw (IVC2_COFA0, cc); +} + +// 11000 qqqqq ppppp 10111 cpsadla0.h crqp,crpp (p0_1) +void mep::mep_cpu_cgen::ivc2_cpsadla0_h (PCADDR &pc, DI crqp, DI crpp) +{ + int i; + HI q[4], p[4]; + USI cc; + + unpack (crqp, q); + unpack (crpp, p); + + cc = ccr (IVC2_COFA0); + + for (i=0; i<4; i++) + { + DI acc = (SI) A0r (i); + acc += abs ((SI)q[i] - (SI)p[i]); + if (acc < -0x80000000LL + || acc > 0x7fffffffLL) + cc |= (1 << i); + A0w (i, acc); + } + + ccw (IVC2_COFA0, cc); +} + +// 11000 qqqqq ppppp 11011 cpseta0.h crqp,crpp (p0_1) +void mep::mep_cpu_cgen::ivc2_cpseta0_h (PCADDR &pc, DI crqp, DI crpp) +{ + int i; + HI q[4], p[4]; + + unpack (crqp, q); + unpack (crpp, p); + + for (i=0; i<4; i++) + { + A0w (i+4, q[i]); + A0w (i, p[i]); + } +} + +// 11000 qqqqq ppppp 11100 cpsetua0.w crqp,crpp (p0_1) +void mep::mep_cpu_cgen::ivc2_cpsetua0_w (PCADDR &pc, DI crqp, DI crpp) +{ + int i; + SI q[2], p[2]; + + unpack (crqp, q); + unpack (crpp, p); + + for (i=0; i<2; i++) + { + A0w (i+2, q[i]); + A0w (i, p[i]); + } +} + +// 11000 qqqqq ppppp 11101 cpsetla0.w crqp,crpp (p0_1) +void mep::mep_cpu_cgen::ivc2_cpsetla0_w (PCADDR &pc, DI crqp, DI crpp) +{ + int i; + SI q[2], p[2]; + + unpack (crqp, q); + unpack (crpp, p); + + for (i=0; i<2; i++) + { + A0w (i+6, q[i]); + A0w (i+4, p[i]); + } +} + +// 11001 00000 00001 ooooo cpmova0.b =crop (p0_1) +DI mep::mep_cpu_cgen::ivc2_cpmova0_b (PCADDR &pc) +{ + int i; + QI o[8]; + + for (i=0; i<8; i++) + o[i] = A0r (i); + + return pack (o); +} + +// 11001 00000 00010 ooooo cpmovua0.h =crop (p0_1) +DI mep::mep_cpu_cgen::ivc2_cpmovua0_h (PCADDR &pc) +{ + int i; + HI o[4]; + + for (i=0; i<4; i++) + o[i] = A0r (i+4); + + return pack (o); +} + +// 11001 00000 00011 ooooo cpmovla0.h =crop (p0_1) +DI mep::mep_cpu_cgen::ivc2_cpmovla0_h (PCADDR &pc) +{ + int i; + HI o[4]; + + for (i=0; i<4; i++) + o[i] = A0r (i); + + return pack (o); +} + +// 11001 00000 00100 ooooo cpmovuua0.w =crop (p0_1) +DI mep::mep_cpu_cgen::ivc2_cpmovuua0_w (PCADDR &pc) +{ + int i; + SI o[2]; + + for (i=0; i<2; i++) + o[i] = A0r (i+6); + + return pack (o); +} + +// 11001 00000 00101 ooooo cpmovula0.w =crop (p0_1) +DI mep::mep_cpu_cgen::ivc2_cpmovula0_w (PCADDR &pc) +{ + int i; + SI o[2]; + + for (i=0; i<2; i++) + o[i] = A0r (i+4); + + return pack (o); +} + +// 11001 00000 00110 ooooo cpmovlua0.w =crop (p0_1) +DI mep::mep_cpu_cgen::ivc2_cpmovlua0_w (PCADDR &pc) +{ + int i; + SI o[2]; + + for (i=0; i<2; i++) + o[i] = A0r (i+2); + + return pack (o); +} + +// 11001 00000 00111 ooooo cpmovlla0.w =crop (p0_1) +DI mep::mep_cpu_cgen::ivc2_cpmovlla0_w (PCADDR &pc) +{ + int i; + SI o[2]; + + for (i=0; i<2; i++) + o[i] = A0r (i); + + return pack (o); +} + +// 11001 00000 01000 ooooo cppacka0u.b =crop (p0_1) +DI mep::mep_cpu_cgen::ivc2_cppacka0u_b (PCADDR &pc) +{ + int i; + QI o[8]; + DI acc; + + for (i=0; i<8; i++) + { + acc = A0r (i); + o[i] = (acc > 255) ? 255 : (acc < 0) ? 0 : acc; + } + + return pack (o); +} + +// 11001 00000 01001 ooooo cppacka0.b =crop (p0_1) +DI mep::mep_cpu_cgen::ivc2_cppacka0_b (PCADDR &pc) +{ + int i; + QI o[8]; + DI acc; + + for (i=0; i<8; i++) + { + acc = A0r (i); + o[i] = (acc > 127) ? 127 : (acc < -128) ? -128 : acc; + } + + return pack (o); +} + +// 11001 00000 01010 ooooo cppackua0.h =crop (p0_1) +DI mep::mep_cpu_cgen::ivc2_cppackua0_h (PCADDR &pc) +{ + int i; + HI o[4]; + DI acc; + + for (i=0; i<4; i++) + { + acc = A0r (i+4); + o[i] = (acc > 32767) ? 32767 : (acc < -32768) ? -32768 : acc; + } + + return pack (o); +} + +// 11001 00000 01011 ooooo cppackla0.h =crop (p0_1) +DI mep::mep_cpu_cgen::ivc2_cppackla0_h (PCADDR &pc) +{ + int i; + HI o[4]; + DI acc; + + for (i=0; i<4; i++) + { + acc = A0r (i); + o[i] = (acc > 32767) ? 32767 : (acc < -32768) ? -32768 : acc; + } + + return pack (o); +} + +// 11001 00000 01100 ooooo cppackua0.w =crop (p0_1) +DI mep::mep_cpu_cgen::ivc2_cppackua0_w (PCADDR &pc) +{ + int i; + SI o[2]; + DI acc; + + for (i=0; i<2; i++) + { + acc = ((UDI) ((USI) A0r (i*2+5)) << 32) | (USI) A0r (i*2+4); + o[i] = (acc > 2147483647LL) ? 2147483647LL : (acc < -2147483648LL) ? -2147483648LL : acc; + } + + return pack (o); +} + +// 11001 00000 01101 ooooo cppackla0.w =crop (p0_1) +DI mep::mep_cpu_cgen::ivc2_cppackla0_w (PCADDR &pc) +{ + int i; + SI o[2]; + DI acc; + + for (i=0; i<2; i++) + { + acc = ((UDI) ((USI) A0r (i*2+1)) << 32) | (USI) A0r (i*2); + o[i] = (acc > 2147483647LL) ? 2147483647LL : (acc < -2147483648LL) ? -2147483648LL : acc; + } + + return pack (o); +} + +// 11001 00000 01110 ooooo cpmovhua0.w =crop (p0_1) +DI mep::mep_cpu_cgen::ivc2_cpmovhua0_w (PCADDR &pc) +{ + int i; + SI o[2]; + + for (i=0; i<2; i++) + o[i] = A0r (i*2+5); + + return pack (o); +} + +// 11001 00000 01111 ooooo cpmovhla0.w =crop (p0_1) +DI mep::mep_cpu_cgen::ivc2_cpmovhla0_w (PCADDR &pc) +{ + int i; + SI o[2]; + + for (i=0; i<2; i++) + o[i] = A0r (i*2+1); + + return pack (o); +} + +// 11001 00000 10000 00000 cpacsuma0 (p0_1) +void mep::mep_cpu_cgen::ivc2_cpacsuma0 (PCADDR &pc) +{ + int i; + + for (i=0; i<8; i++) + A0w (i, A0r (i) + A1r (i)); +} + +// 11001 00000 10001 00000 cpaccpa0 (p0_1) +void mep::mep_cpu_cgen::ivc2_cpaccpa0 (PCADDR &pc) +{ + int i; + + for (i=0; i<8; i++) + A0w (i, A1r (i)); +} + +// 11001 qqqqq 11000 00000 cpsrla0 crqp (p0_1) +void mep::mep_cpu_cgen::ivc2_cpsrla0 (PCADDR &pc, DI crqp) +{ + int i; + + for (i=0; i<8; i++) + A0w (i, (USI) A0r (i) >> (crqp & 0x1f)); +} + +// 11001 qqqqq 11001 00000 cpsraa0 crqp (p0_1) +void mep::mep_cpu_cgen::ivc2_cpsraa0 (PCADDR &pc, DI crqp) +{ + int i; + + for (i=0; i<8; i++) + A0w (i, (SI) A0r (i) >> (crqp & 0x1f)); +} + +// 11001 qqqqq 11010 00000 cpslla0 crqp (p0_1) +void mep::mep_cpu_cgen::ivc2_cpslla0 (PCADDR &pc, DI crqp) +{ + int i; + + for (i=0; i<8; i++) + A0w (i, (USI) A0r (i) << (crqp & 0x1f)); +} + +// 11001 00000 11100 iiiii cpsrlia0 imm5 (p0_1) +void mep::mep_cpu_cgen::ivc2_cpsrlia0 (PCADDR &pc, SI imm5) +{ + int i; + + for (i=0; i<8; i++) + A0w (i, (USI) A0r (i) >> imm5); +} + +// 11001 00000 11101 iiiii cpsraia0 imm5 (p0_1) +void mep::mep_cpu_cgen::ivc2_cpsraia0 (PCADDR &pc, SI imm5) +{ + int i; + + for (i=0; i<8; i++) + A0w (i, (SI) A0r (i) >> imm5); +} + +// 11001 00000 11110 iiiii cpsllia0 imm5 (p0_1) +void mep::mep_cpu_cgen::ivc2_cpsllia0 (PCADDR &pc, SI imm5) +{ + int i; + + for (i=0; i<8; i++) + A0w (i, (USI) A0r (i) << imm5); +} + +// 11111 qqqqq ppppp 00000 cpfsftba0s0u.b crqp,crpp (p0_1) +void mep::mep_cpu_cgen::ivc2_cpfsftba0s0u_b (PCADDR &pc, DI crqp, DI crpp) +{ + int i, csar0; + UDI tmp; + UQI tmpv[8]; + + csar0 = ccr (IVC2_CSAR0) * 8; + tmp = ((UDI) crqp << csar0) | (UDI) crpp >> (64-csar0); + unpack (tmp, tmpv); + + for (i=0; i<8; i++) + A0w (i, tmpv[i]); +} + +// 11111 qqqqq ppppp 00001 cpfsftba0s0.b crqp,crpp (p0_1) +void mep::mep_cpu_cgen::ivc2_cpfsftba0s0_b (PCADDR &pc, DI crqp, DI crpp) +{ + int i, csar0; + DI tmp; + QI tmpv[8]; + + csar0 = ccr (IVC2_CSAR0) * 8; + tmp = ((UDI) crqp << csar0) | (UDI) crpp >> (64-csar0); + unpack (tmp, tmpv); + + for (i=0; i<8; i++) + A0w (i, tmpv[i]); +} + +// 11111 qqqqq ppppp 00010 cpfsftbua0s0.h crqp,crpp (p0_1) +void mep::mep_cpu_cgen::ivc2_cpfsftbua0s0_h (PCADDR &pc, DI crqp, DI crpp) +{ + int i, csar0; + DI tmp; + HI tmpv[4]; + + csar0 = ccr (IVC2_CSAR0) * 8; + tmp = ((UDI) crqp << csar0) | (UDI) crpp >> (64-csar0); + unpack (tmp, tmpv); + + for (i=0; i<4; i++) + A0w (i+4, tmpv[i]); +} + +// 11111 qqqqq ppppp 00011 cpfsftbla0s0.h crqp,crpp (p0_1) +void mep::mep_cpu_cgen::ivc2_cpfsftbla0s0_h (PCADDR &pc, DI crqp, DI crpp) +{ + int i, csar0; + DI tmp; + HI tmpv[4]; + + csar0 = ccr (IVC2_CSAR0) * 8; + tmp = ((UDI) crqp << csar0) | (UDI) crpp >> (64-csar0); + unpack (tmp, tmpv); + + for (i=0; i<4; i++) + A0w (i, tmpv[i]); +} + +// 11111 qqqqq ppppp 00100 cpfaca0s0u.b crqp,crpp (p0_1) +void mep::mep_cpu_cgen::ivc2_cpfaca0s0u_b (PCADDR &pc, DI crqp, DI crpp) +{ + int i, csar0; + DI tmp; + UQI tmpv[8]; + USI cc; + + csar0 = ccr (IVC2_CSAR0) * 8; + tmp = ((UDI) crqp << csar0) | (UDI) crpp >> (64-csar0); + unpack (tmp, tmpv); + + cc = ccr (IVC2_COFA0); + + for (i=0; i<8; i++) + { + tmp = A0r (i); + tmp += tmpv[i]; + if (tmp > 0x7fffffffLL || tmp < -0x80000000LL) + cc |= (1 << i); + A0w (i, tmp); + } + + ccw (IVC2_COFA0, cc); +} + +// 11111 qqqqq ppppp 00101 cpfaca0s0.b crqp,crpp (p0_1) +void mep::mep_cpu_cgen::ivc2_cpfaca0s0_b (PCADDR &pc, DI crqp, DI crpp) +{ + int i, csar0; + DI tmp; + QI tmpv[8]; + USI cc; + + csar0 = ccr (IVC2_CSAR0) * 8; + tmp = ((UDI) crqp << csar0) | (UDI) crpp >> (64-csar0); + unpack (tmp, tmpv); + + cc = ccr (IVC2_COFA0); + + for (i=0; i<8; i++) + { + tmp = A0r (i); + tmp += tmpv[i]; + if (tmp > 0x7fffffffLL || tmp < -0x80000000LL) + cc |= (1 << i); + A0w (i, tmp); + } + + ccw (IVC2_COFA0, cc); +} + +// 11111 qqqqq ppppp 00110 cpfacua0s0.h crqp,crpp (p0_1) +void mep::mep_cpu_cgen::ivc2_cpfacua0s0_h (PCADDR &pc, DI crqp, DI crpp) +{ + int i, csar0; + DI tmp; + HI tmpv[4]; + USI cc; + + csar0 = ccr (IVC2_CSAR0) * 8; + tmp = ((UDI) crqp << csar0) | (UDI) crpp >> (64-csar0); + unpack (tmp, tmpv); + + cc = ccr (IVC2_COFA0); + + for (i=0; i<4; i++) + { + tmp = A0r (i+4); + tmp += tmpv[i]; + if (tmp > 0x7fffffffLL || tmp < -0x80000000LL) + cc |= (1 << (i+4)); + A0w (i+4, tmp); + } + + ccw (IVC2_COFA0, cc); +} + +// 11111 qqqqq ppppp 00111 cpfacla0s0.h crqp,crpp (p0_1) +void mep::mep_cpu_cgen::ivc2_cpfacla0s0_h (PCADDR &pc, DI crqp, DI crpp) +{ + int i, csar0; + DI tmp; + HI tmpv[4]; + USI cc; + + csar0 = ccr (IVC2_CSAR0) * 8; + tmp = ((UDI) crqp << csar0) | (UDI) crpp >> (64-csar0); + unpack (tmp, tmpv); + + cc = ccr (IVC2_COFA0); + + for (i=0; i<4; i++) + { + tmp = A0r (i); + tmp += tmpv[i]; + if (tmp > 0x7fffffffLL || tmp < -0x80000000LL) + cc |= (1 << i); + A0w (i, tmp); + } + + ccw (IVC2_COFA0, cc); +} + +// 11111 qqqqq ppppp 01000 cpfsftba0s1u.b crqp,crpp (p0_1) +void mep::mep_cpu_cgen::ivc2_cpfsftba0s1u_b (PCADDR &pc, DI crqp, DI crpp) +{ + int i, csar1; + UDI tmp; + UQI tmpv[8]; + + csar1 = ccr (IVC2_CSAR1) * 8; + tmp = ((UDI) crqp << csar1) | (UDI) crpp >> (64-csar1); + unpack (tmp, tmpv); + + for (i=0; i<8; i++) + A0w (i, tmpv[i]); +} + +// 11111 qqqqq ppppp 01001 cpfsftba0s1.b crqp,crpp (p0_1) +void mep::mep_cpu_cgen::ivc2_cpfsftba0s1_b (PCADDR &pc, DI crqp, DI crpp) +{ + int i, csar1; + DI tmp; + QI tmpv[8]; + + csar1 = ccr (IVC2_CSAR1) * 8; + tmp = ((UDI) crqp << csar1) | (UDI) crpp >> (64-csar1); + unpack (tmp, tmpv); + + for (i=0; i<8; i++) + A0w (i, tmpv[i]); +} + +// 11111 qqqqq ppppp 01010 cpfsftbua0s1.h crqp,crpp (p0_1) +void mep::mep_cpu_cgen::ivc2_cpfsftbua0s1_h (PCADDR &pc, DI crqp, DI crpp) +{ + int i, csar1; + DI tmp; + HI tmpv[4]; + + csar1 = ccr (IVC2_CSAR1) * 8; + tmp = ((UDI) crqp << csar1) | (UDI) crpp >> (64-csar1); + unpack (tmp, tmpv); + + for (i=0; i<4; i++) + A0w (i+4, tmpv[i]); +} + +// 11111 qqqqq ppppp 01011 cpfsftbla0s1.h crqp,crpp (p0_1) +void mep::mep_cpu_cgen::ivc2_cpfsftbla0s1_h (PCADDR &pc, DI crqp, DI crpp) +{ + int i, csar1; + DI tmp; + HI tmpv[4]; + + csar1 = ccr (IVC2_CSAR1) * 8; + tmp = ((UDI) crqp << csar1) | (UDI) crpp >> (64-csar1); + unpack (tmp, tmpv); + + for (i=0; i<4; i++) + A0w (i, tmpv[i]); +} + +// 11111 qqqqq ppppp 01100 cpfaca0s1u.b crqp,crpp (p0_1) +void mep::mep_cpu_cgen::ivc2_cpfaca0s1u_b (PCADDR &pc, DI crqp, DI crpp) +{ + int i, csar1; + DI tmp; + UQI tmpv[8]; + USI cc; + + csar1 = ccr (IVC2_CSAR1) * 8; + tmp = ((UDI) crqp << csar1) | (UDI) crpp >> (64-csar1); + unpack (tmp, tmpv); + cc = ccr (IVC2_COFA0); + + for (i=0; i<8; i++) + { + tmp = A0r (i); + tmp += tmpv[i]; + if (tmp > 0x7fffffffLL || tmp < -0x80000000LL) + cc |= (1 << i); + A0w (i, tmp); + } + + ccw (IVC2_COFA0, cc); +} + +// 11111 qqqqq ppppp 01101 cpfaca0s1.b crqp,crpp (p0_1) +void mep::mep_cpu_cgen::ivc2_cpfaca0s1_b (PCADDR &pc, DI crqp, DI crpp) +{ + int i, csar1; + DI tmp; + QI tmpv[8]; + USI cc; + + csar1 = ccr (IVC2_CSAR1) * 8; + tmp = ((UDI) crqp << csar1) | (UDI) crpp >> (64-csar1); + unpack (tmp, tmpv); + cc = ccr (IVC2_COFA0); + + for (i=0; i<8; i++) + { + tmp = A0r (i); + tmp += tmpv[i]; + if (tmp > 0x7fffffffLL || tmp < -0x80000000LL) + cc |= (1 << i); + A0w (i, tmp); + } + + ccw (IVC2_COFA0, cc); +} + +// 11111 qqqqq ppppp 01110 cpfacua0s1.h crqp,crpp (p0_1) +void mep::mep_cpu_cgen::ivc2_cpfacua0s1_h (PCADDR &pc, DI crqp, DI crpp) +{ + int i, csar1; + DI tmp; + HI tmpv[4]; + USI cc; + + csar1 = ccr (IVC2_CSAR1) * 8; + tmp = ((UDI) crqp << csar1) | (UDI) crpp >> (64-csar1); + unpack (tmp, tmpv); + + cc = ccr (IVC2_COFA0); + + for (i=0; i<4; i++) + { + tmp = A0r (i+4); + tmp += tmpv[i]; + if (tmp > 0x7fffffffLL || tmp < -0x80000000LL) + cc |= (1 << (i+4)); + A0w (i+4, tmp); + } + + ccw (IVC2_COFA0, cc); +} + +// 11111 qqqqq ppppp 01111 cpfacla0s1.h crqp,crpp (p0_1) +void mep::mep_cpu_cgen::ivc2_cpfacla0s1_h (PCADDR &pc, DI crqp, DI crpp) +{ + int i, csar1; + DI tmp; + HI tmpv[4]; + USI cc; + + csar1 = ccr (IVC2_CSAR1) * 8; + tmp = ((UDI) crqp << csar1) | (UDI) crpp >> (64-csar1); + unpack (tmp, tmpv); + + cc = ccr (IVC2_COFA0); + + for (i=0; i<4; i++) + { + tmp = A0r (i); + tmp += tmpv[i]; + if (tmp > 0x7fffffffLL || tmp < -0x80000000LL) + cc |= (1 << i); + A0w (i, tmp); + } + + ccw (IVC2_COFA0, cc); +} + +// iiiiiiii 10110 qqqqq 01iii iiiii cpmovi.h =crqp,imm16p0 (p0_i) +DI mep::mep_cpu_cgen::ivc2_cpmovi_h16 (PCADDR &pc, SI imm16) +{ + int i; + HI o[4]; + for (i=0; i<4; i++) + o[i] = (HI)imm16; + + return pack (o); +} + +// iiiiiiii 10111 qqqqq 00iii iiiii cpmoviu.w =crqp,imm16p0 (p0_i) +DI mep::mep_cpu_cgen::ivc2_cpmoviu_w16 (PCADDR &pc, SI imm16) +{ + int i; + USI o[2]; + + for (i=0; i<2; i++) + o[i] = (UHI)imm16; + + return pack (o); +} + +// iiiiiiii 10111 qqqqq 01iii iiiii cpmovi.w =crqp,imm16p0 (p0_i) +DI mep::mep_cpu_cgen::ivc2_cpmovi_w16 (PCADDR &pc, SI imm16) +{ + int i; + SI o[2]; + + for (i=0; i<2; i++) + o[i] = (HI)imm16; + + return pack (o); +} + +// iiiiiiii 10111 qqqqq 10iii iiiii cdmoviu =crqp,imm16p0 (p0_i) +DI mep::mep_cpu_cgen::ivc2_cdmoviu16 (PCADDR &pc, SI imm16) +{ + return (UHI)imm16; +} + +// iiiiiiii 10111 qqqqq 11iii iiiii cdmovi =crqp,imm16p0 (p0_i) +DI mep::mep_cpu_cgen::ivc2_cdmovi16 (PCADDR &pc, SI imm16) +{ + return (HI)imm16; +} +// 00000000 00000 00000 00000 00000 c1nop (p0_1) +void mep::mep_cpu_cgen::ivc2_c1nop (PCADDR &pc) +{ +} + +// 00000000 11001 00000 10000 00000 cpacsuma1 (p0_1) +void mep::mep_cpu_cgen::ivc2_cpacsuma1 (PCADDR &pc) +{ + int i; + + for (i=0; i<8; i++) + A1w (i, A0r (i) + A1r (i)); +} + +// 00000000 11001 00000 10001 00000 cpaccpa1 (p0_1) +void mep::mep_cpu_cgen::ivc2_cpaccpa1 (PCADDR &pc) +{ + int i; + + for (i=0; i<8; i++) + A1w (i, A0r (i)); +} + +// 00000000 11001 00000 10010 00000 cpacswp (p0_1) +void mep::mep_cpu_cgen::ivc2_cpacswp (PCADDR &pc) +{ + int i; + USI tmp; + + for (i=0; i<8; i++) + { + tmp = A0r (i); + A0w (i, A1r (i)); + A1w (i, tmp); + } +} + +// iiiiiiii 11111 qqqqq ppppp 00000 cpfmulia1s0u.b crqp,crpp,imm8 (p0_1) +void mep::mep_cpu_cgen::ivc2_cpfmulia1s0u_b (PCADDR &pc, DI crqp, DI crpp, SI imm8) +{ + int i, csar0; + DI tmp; + UQI tmpv[8]; + + csar0 = ccr (IVC2_CSAR0) * 8; + tmp = ((UDI) crqp << csar0) | (UDI) crpp >> (64-csar0); + unpack (tmp, tmpv); + + for (i=0; i<8; i++) + A1w (i, tmpv[i] * imm8); +} + +// iiiiiiii 11111 qqqqq ppppp 00001 cpfmulia1s0.b crqp,crpp,imm8 (p0_1) +void mep::mep_cpu_cgen::ivc2_cpfmulia1s0_b (PCADDR &pc, DI crqp, DI crpp, SI imm8) +{ + int i, csar0; + DI tmp; + QI tmpv[8]; + + csar0 = ccr (IVC2_CSAR0) * 8; + tmp = ((UDI) crqp << csar0) | (UDI) crpp >> (64-csar0); + unpack (tmp, tmpv); + + for (i=0; i<8; i++) + A1w (i, tmpv[i] * imm8); +} + +// iiiiiiii 11111 qqqqq ppppp 00010 cpfmuliua1s0.h crqp,crpp,imm8 (p0_1) +void mep::mep_cpu_cgen::ivc2_cpfmuliua1s0_h (PCADDR &pc, DI crqp, DI crpp, SI imm8) +{ + int i, csar0; + DI tmp; + HI tmpv[4]; + + csar0 = ccr (IVC2_CSAR0) * 8; + tmp = ((UDI) crqp << csar0) | (UDI) crpp >> (64-csar0); + unpack (tmp, tmpv); + + for (i=0; i<4; i++) + A1w (i+4, tmpv[i] * imm8); +} + +// iiiiiiii 11111 qqqqq ppppp 00011 cpfmulila1s0.h crqp,crpp,imm8 (p0_1) +void mep::mep_cpu_cgen::ivc2_cpfmulila1s0_h (PCADDR &pc, DI crqp, DI crpp, SI imm8) +{ + int i, csar0; + DI tmp; + HI tmpv[4]; + + csar0 = ccr (IVC2_CSAR0) * 8; + tmp = ((UDI) crqp << csar0) | (UDI) crpp >> (64-csar0); + unpack (tmp, tmpv); + + for (i=0; i<4; i++) + A1w (i, tmpv[i] * imm8); +} + +// iiiiiiii 11111 qqqqq ppppp 00100 cpfmadia1s0u.b crqp,crpp,imm8 (p0_1) +void mep::mep_cpu_cgen::ivc2_cpfmadia1s0u_b (PCADDR &pc, DI crqp, DI crpp, SI imm8) +{ + int i, csar0; + DI tmp; + UQI tmpv[8]; + USI cc; + + csar0 = ccr (IVC2_CSAR0) * 8; + tmp = ((UDI) crqp << csar0) | (UDI) crpp >> (64-csar0); + unpack (tmp, tmpv); + + cc = ccr (IVC2_COFA1); + + for (i=0; i<8; i++) + { + DI acc = (SI) A1r (i); + acc += tmpv[i] * imm8; + if (acc < -0x80000000LL + || acc > 0x7fffffffLL) + cc |= (1 << i); + A1w (i, acc); + } + + ccw (IVC2_COFA1, cc); +} + +// iiiiiiii 11111 qqqqq ppppp 00101 cpfmadia1s0.b crqp,crpp,imm8 (p0_1) +void mep::mep_cpu_cgen::ivc2_cpfmadia1s0_b (PCADDR &pc, DI crqp, DI crpp, SI imm8) +{ + int i, csar0; + DI tmp; + QI tmpv[8]; + USI cc; + + csar0 = ccr (IVC2_CSAR0) * 8; + tmp = ((UDI) crqp << csar0) | (UDI) crpp >> (64-csar0); + unpack (tmp, tmpv); + + cc = ccr (IVC2_COFA1); + + for (i=0; i<8; i++) + { + DI acc = (SI) A1r (i); + acc += tmpv[i] * imm8; + if (acc < -0x80000000LL + || acc > 0x7fffffffLL) + cc |= (1 << i); + A1w (i, acc); + } + + ccw (IVC2_COFA1, cc); +} + +// iiiiiiii 11111 qqqqq ppppp 00110 cpfmadiua1s0.h crqp,crpp,imm8 (p0_1) +void mep::mep_cpu_cgen::ivc2_cpfmadiua1s0_h (PCADDR &pc, DI crqp, DI crpp, SI imm8) +{ + int i, csar0; + DI tmp; + HI tmpv[4]; + USI cc; + + csar0 = ccr (IVC2_CSAR0) * 8; + tmp = ((UDI) crqp << csar0) | (UDI) crpp >> (64-csar0); + unpack (tmp, tmpv); + + cc = ccr (IVC2_COFA1); + + for (i=0; i<4; i++) + { + DI acc = (SI) A1r (i+4); + acc += tmpv[i] * imm8; + if (acc < -0x80000000LL + || acc > 0x7fffffffLL) + cc |= (1 << (i+4)); + A1w (i+4, acc); + } + + ccw (IVC2_COFA1, cc); +} + +// iiiiiiii 11111 qqqqq ppppp 00111 cpfmadila1s0.h crqp,crpp,imm8 (p0_1) +void mep::mep_cpu_cgen::ivc2_cpfmadila1s0_h (PCADDR &pc, DI crqp, DI crpp, SI imm8) +{ + int i, csar0; + DI tmp; + HI tmpv[4]; + USI cc; + + csar0 = ccr (IVC2_CSAR0) * 8; + tmp = ((UDI) crqp << csar0) | (UDI) crpp >> (64-csar0); + unpack (tmp, tmpv); + + cc = ccr (IVC2_COFA1); + + for (i=0; i<4; i++) + { + DI acc = (SI) A1r (i); + acc += tmpv[i] * imm8; + if (acc < -0x80000000LL + || acc > 0x7fffffffLL) + cc |= (1 << i); + A1w (i, acc); + } + + ccw (IVC2_COFA1, cc); +} + +// iiiiiiii 11111 qqqqq ppppp 01000 cpfmulia1s1u.b crqp,crpp,imm8 (p0_1) +void mep::mep_cpu_cgen::ivc2_cpfmulia1s1u_b (PCADDR &pc, DI crqp, DI crpp, SI imm8) +{ + int i, csar1; + DI tmp; + UQI tmpv[8]; + + csar1 = ccr (IVC2_CSAR1) * 8; + tmp = ((UDI) crqp << csar1) | (UDI) crpp >> (64-csar1); + unpack (tmp, tmpv); + + for (i=0; i<8; i++) + A1w (i, tmpv[i] * imm8); +} + +// iiiiiiii 11111 qqqqq ppppp 01001 cpfmulia1s1.b crqp,crpp,imm8 (p0_1) +void mep::mep_cpu_cgen::ivc2_cpfmulia1s1_b (PCADDR &pc, DI crqp, DI crpp, SI imm8) +{ + int i, csar1; + DI tmp; + QI tmpv[8]; + + csar1 = ccr (IVC2_CSAR1) * 8; + tmp = ((UDI) crqp << csar1) | (UDI) crpp >> (64-csar1); + unpack (tmp, tmpv); + + for (i=0; i<8; i++) + A1w (i, tmpv[i] * imm8); +} + +// iiiiiiii 11111 qqqqq ppppp 01010 cpfmuliua1s1.h crqp,crpp,imm8 (p0_1) +void mep::mep_cpu_cgen::ivc2_cpfmuliua1s1_h (PCADDR &pc, DI crqp, DI crpp, SI imm8) +{ + int i, csar1; + DI tmp; + HI tmpv[4]; + + csar1 = ccr (IVC2_CSAR1) * 8; + tmp = ((UDI) crqp << csar1) | (UDI) crpp >> (64-csar1); + unpack (tmp, tmpv); + + for (i=0; i<4; i++) + A1w (i+4, tmpv[i] * imm8); +} + +// iiiiiiii 11111 qqqqq ppppp 01011 cpfmulila1s1.h crqp,crpp,imm8 (p0_1) +void mep::mep_cpu_cgen::ivc2_cpfmulila1s1_h (PCADDR &pc, DI crqp, DI crpp, SI imm8) +{ + int i, csar1; + DI tmp; + HI tmpv[4]; + + csar1 = ccr (IVC2_CSAR1) * 8; + tmp = ((UDI) crqp << csar1) | (UDI) crpp >> (64-csar1); + unpack (tmp, tmpv); + + for (i=0; i<4; i++) + A1w (i, tmpv[i] * imm8); +} + +// iiiiiiii 11111 qqqqq ppppp 01100 cpfmadia1s1u.b crqp,crpp,imm8 (p0_1) +void mep::mep_cpu_cgen::ivc2_cpfmadia1s1u_b (PCADDR &pc, DI crqp, DI crpp, SI imm8) +{ + int i, csar1; + DI tmp; + UQI tmpv[8]; + USI cc; + + csar1 = ccr (IVC2_CSAR1) * 8; + tmp = ((UDI) crqp << csar1) | (UDI) crpp >> (64-csar1); + unpack (tmp, tmpv); + + cc = ccr (IVC2_COFA1); + + for (i=0; i<8; i++) + { + DI acc = (SI) A1r (i); + acc += tmpv[i] * imm8; + if (acc < -0x80000000LL + || acc > 0x7fffffffLL) + cc |= (1 << i); + A1w (i, acc); + } + + ccw (IVC2_COFA1, cc); +} + +// iiiiiiii 11111 qqqqq ppppp 01101 cpfmadia1s1.b crqp,crpp,imm8 (p0_1) +void mep::mep_cpu_cgen::ivc2_cpfmadia1s1_b (PCADDR &pc, DI crqp, DI crpp, SI imm8) +{ + int i, csar1; + DI tmp; + QI tmpv[8]; + USI cc; + + csar1 = ccr (IVC2_CSAR1) * 8; + tmp = ((UDI) crqp << csar1) | (UDI) crpp >> (64-csar1); + unpack (tmp, tmpv); + + cc = ccr (IVC2_COFA1); + + for (i=0; i<8; i++) + { + DI acc = (SI) A1r (i); + acc += tmpv[i] * imm8; + if (acc < -0x80000000LL + || acc > 0x7fffffffLL) + cc |= (1 << i); + A1w (i, acc); + } + + ccw (IVC2_COFA1, cc); +} + +// iiiiiiii 11111 qqqqq ppppp 01110 cpfmadiua1s1.h crqp,crpp,imm8 (p0_1) +void mep::mep_cpu_cgen::ivc2_cpfmadiua1s1_h (PCADDR &pc, DI crqp, DI crpp, SI imm8) +{ + int i, csar1; + DI tmp; + HI tmpv[4]; + USI cc; + + csar1 = ccr (IVC2_CSAR1) * 8; + tmp = ((UDI) crqp << csar1) | (UDI) crpp >> (64-csar1); + unpack (tmp, tmpv); + + cc = ccr (IVC2_COFA1); + + for (i=0; i<4; i++) + { + DI acc = (SI) A1r (i+4); + acc += tmpv[i] * imm8; + if (acc < -0x80000000LL + || acc > 0x7fffffffLL) + cc |= (1 << (i+4)); + A1w (i+4, acc); + } + + ccw (IVC2_COFA1, cc); +} + +// iiiiiiii 11111 qqqqq ppppp 01111 cpfmadila1s1.h crqp,crpp,imm8 (p0_1) +void mep::mep_cpu_cgen::ivc2_cpfmadila1s1_h (PCADDR &pc, DI crqp, DI crpp, SI imm8) +{ + int i, csar1; + DI tmp; + HI tmpv[4]; + USI cc; + + csar1 = ccr (IVC2_CSAR1) * 8; + tmp = ((UDI) crqp << csar1) | (UDI) crpp >> (64-csar1); + unpack (tmp, tmpv); + + cc = ccr (IVC2_COFA1); + + for (i=0; i<4; i++) + { + DI acc = (SI) A1r (i); + acc += tmpv[i] * imm8; + if (acc < -0x80000000LL + || acc > 0x7fffffffLL) + cc |= (1 << i); + A1w (i, acc); + } + + ccw (IVC2_COFA1, cc); +} + +// iiiiiiii 11111 qqqqq ppppp 10000 cpamulia1u.b crqp,crpp,imm8 (p0_1) +void mep::mep_cpu_cgen::ivc2_cpamulia1u_b (PCADDR &pc, DI crqp, DI crpp, SI imm8) +{ + int i; + UQI q[8], p[8]; + + unpack (crqp, q); + unpack (crpp, p); + + for (i=0; i<8; i++) + A1w (i, ((SI)q[i] + (SI)p[i]) * imm8); +} + +// iiiiiiii 11111 qqqqq ppppp 10001 cpamulia1.b crqp,crpp,imm8 (p0_1) +void mep::mep_cpu_cgen::ivc2_cpamulia1_b (PCADDR &pc, DI crqp, DI crpp, SI imm8) +{ + int i; + QI q[8], p[8]; + + unpack (crqp, q); + unpack (crpp, p); + + for (i=0; i<8; i++) + A1w (i, ((SI)q[i] + (SI)p[i]) * imm8); +} + +// iiiiiiii 11111 qqqqq ppppp 10010 cpamuliua1.h crqp,crpp,imm8 (p0_1) +void mep::mep_cpu_cgen::ivc2_cpamuliua1_h (PCADDR &pc, DI crqp, DI crpp, SI imm8) +{ + int i; + HI q[4], p[4]; + + unpack (crqp, q); + unpack (crpp, p); + + for (i=0; i<4; i++) + A1w (i+4, ((SI)q[i] + (SI)p[i]) * imm8); +} + +// iiiiiiii 11111 qqqqq ppppp 10011 cpamulila1.h crqp,crpp,imm8 (p0_1) +void mep::mep_cpu_cgen::ivc2_cpamulila1_h (PCADDR &pc, DI crqp, DI crpp, SI imm8) +{ + int i; + HI q[4], p[4]; + + unpack (crqp, q); + unpack (crpp, p); + + for (i=0; i<4; i++) + A1w (i, ((SI)q[i] + (SI)p[i]) * imm8); +} + +// iiiiiiii 11111 qqqqq ppppp 10100 cpamadia1u.b crqp,crpp,imm8 (p0_1) +void mep::mep_cpu_cgen::ivc2_cpamadia1u_b (PCADDR &pc, DI crqp, DI crpp, SI imm8) +{ + int i; + UQI q[8], p[8]; + USI cc; + + unpack (crqp, q); + unpack (crpp, p); + + cc = ccr (IVC2_COFA1); + + for (i=0; i<8; i++) + { + DI acc = (SI) A1r (i); + acc += ((SI)q[i] + (SI)p[i]) * imm8; + if (acc < -0x80000000LL + || acc > 0x7fffffffLL) + cc |= (1 << i); + A1w (i, acc); + } + + ccw (IVC2_COFA1, cc); +} + +// iiiiiiii 11111 qqqqq ppppp 10101 cpamadia1.b crqp,crpp,imm8 (p0_1) +void mep::mep_cpu_cgen::ivc2_cpamadia1_b (PCADDR &pc, DI crqp, DI crpp, SI imm8) +{ + int i; + QI q[8], p[8]; + USI cc; + + unpack (crqp, q); + unpack (crpp, p); + + cc = ccr (IVC2_COFA1); + + for (i=0; i<8; i++) + { + DI acc = (SI) A1r (i); + acc += ((SI)q[i] + (SI)p[i]) * imm8; + if (acc < -0x80000000LL + || acc > 0x7fffffffLL) + cc |= (1 << i); + A1w (i, acc); + } + + ccw (IVC2_COFA1, cc); +} + +// iiiiiiii 11111 qqqqq ppppp 10110 cpamadiua1.h crqp,crpp,imm8 (p0_1) +void mep::mep_cpu_cgen::ivc2_cpamadiua1_h (PCADDR &pc, DI crqp, DI crpp, SI imm8) +{ + int i; + HI q[4], p[4]; + USI cc; + + unpack (crqp, q); + unpack (crpp, p); + + cc = ccr (IVC2_COFA1); + + for (i=0; i<4; i++) + { + DI acc = (SI) A1r (i+4); + acc += ((SI)q[i] + (SI)p[i]) * imm8; + if (acc < -0x80000000LL + || acc > 0x7fffffffLL) + cc |= (1 << (i+4)); + A1w (i+4, acc); + } + + ccw (IVC2_COFA1, cc); +} + +// iiiiiiii 11111 qqqqq ppppp 10111 cpamadila1.h crqp,crpp,imm8 (p0_1) +void mep::mep_cpu_cgen::ivc2_cpamadila1_h (PCADDR &pc, DI crqp, DI crpp, SI imm8) +{ + int i; + HI q[4], p[4]; + USI cc; + + unpack (crqp, q); + unpack (crpp, p); + + cc = ccr (IVC2_COFA1); + + for (i=0; i<4; i++) + { + DI acc = (SI) A1r (i); + acc += ((SI)q[i] + (SI)p[i]) * imm8; + if (acc < -0x80000000LL + || acc > 0x7fffffffLL) + cc |= (1 << i); + A1w (i, acc); + } + + ccw (IVC2_COFA1, cc); +} + +// iiiiiiii 11100 qqqqq ppppp 00 III cpfmulia1u.b crqp,crpp,imm3p25,imm8p0 (cpfm) +void mep::mep_cpu_cgen::ivc2_cpfmulia1u_b (PCADDR &pc, DI crqp, DI crpp, SI imm3, SI imm8) +{ + int i; + DI tmp; + UQI tmpv[8]; + + tmp = ((UDI) crqp << (imm3*8)) | (UDI) crpp >> (64-(imm3*8)); + unpack (tmp, tmpv); + + for (i=0; i<8; i++) + A1w (i, tmpv[i] * imm8); +} + +// iiiiiiii 11100 qqqqq ppppp 01 III cpfmulia1.b crqp,crpp,imm3p25,imm8p0 (cpfm) +void mep::mep_cpu_cgen::ivc2_cpfmulia1_b (PCADDR &pc, DI crqp, DI crpp, SI imm3, SI imm8) +{ + int i; + DI tmp; + QI tmpv[8]; + + tmp = ((UDI) crqp << (imm3*8)) | (UDI) crpp >> (64-(imm3*8)); + unpack (tmp, tmpv); + + for (i=0; i<8; i++) + A1w (i, tmpv[i] * imm8); +} + +// iiiiiiii 11100 qqqqq ppppp 10 III cpfmuliua1.h crqp,crpp,imm3p25,imm8p0 (cpfm) +void mep::mep_cpu_cgen::ivc2_cpfmuliua1_h (PCADDR &pc, DI crqp, DI crpp, SI imm3, SI imm8) +{ + int i; + DI tmp; + HI tmpv[4]; + + tmp = ((UDI) crqp << (imm3*8)) | (UDI) crpp >> (64-(imm3*8)); + unpack (tmp, tmpv); + + for (i=0; i<4; i++) + A1w (i+4, tmpv[i] * imm8); +} + +// iiiiiiii 11100 qqqqq ppppp 11 III cpfmulila1.h crqp,crpp,imm3p25,imm8p0 (cpfm) +void mep::mep_cpu_cgen::ivc2_cpfmulila1_h (PCADDR &pc, DI crqp, DI crpp, SI imm3, SI imm8) +{ + int i; + DI tmp; + HI tmpv[4]; + + tmp = ((UDI) crqp << (imm3*8)) | (UDI) crpp >> (64-(imm3*8)); + unpack (tmp, tmpv); + + for (i=0; i<4; i++) + A1w (i, tmpv[i] * imm8); +} + +// iiiiiiii 11101 qqqqq ppppp 00 III cpfmadia1u.b crqp,crpp,imm3p25,imm8p0 (cpfm) +void mep::mep_cpu_cgen::ivc2_cpfmadia1u_b (PCADDR &pc, DI crqp, DI crpp, SI imm3, SI imm8) +{ + int i; + DI tmp; + UQI tmpv[8]; + USI cc; + + tmp = ((UDI) crqp << (imm3*8)) | (UDI) crpp >> (64-(imm3*8)); + unpack (tmp, tmpv); + + cc = ccr (IVC2_COFA1); + + for (i=0; i<8; i++) + { + DI acc = (SI) A1r (i); + acc += tmpv[i] * imm8; + if (acc < -0x80000000LL + || acc > 0x7fffffffLL) + cc |= (1 << i); + A1w (i, acc); + } + + ccw (IVC2_COFA1, cc); +} + +// iiiiiiii 11101 qqqqq ppppp 01 III cpfmadia1.b crqp,crpp,imm3p25,imm8p0 (cpfm) +void mep::mep_cpu_cgen::ivc2_cpfmadia1_b (PCADDR &pc, DI crqp, DI crpp, SI imm3, SI imm8) +{ + int i; + DI tmp; + QI tmpv[8]; + USI cc; + + tmp = ((UDI) crqp << (imm3*8)) | (UDI) crpp >> (64-(imm3*8)); + unpack (tmp, tmpv); + + cc = ccr (IVC2_COFA1); + + for (i=0; i<8; i++) + { + DI acc = (SI) A1r (i); + acc += tmpv[i] * imm8; + if (acc < -0x80000000LL + || acc > 0x7fffffffLL) + cc |= (1 << i); + A1w (i, acc); + } + + ccw (IVC2_COFA1, cc); +} + +// iiiiiiii 11101 qqqqq ppppp 10 III cpfmadiua1.h crqp,crpp,imm3p25,imm8p0 (cpfm) +void mep::mep_cpu_cgen::ivc2_cpfmadiua1_h (PCADDR &pc, DI crqp, DI crpp, SI imm3, SI imm8) +{ + int i; + DI tmp; + HI tmpv[4]; + USI cc; + + tmp = ((UDI) crqp << (imm3*8)) | (UDI) crpp >> (64-(imm3*8)); + unpack (tmp, tmpv); + + cc = ccr (IVC2_COFA1); + + for (i=0; i<4; i++) + { + DI acc = (SI) A1r (i+4); + acc += tmpv[i] * imm8; + if (acc < -0x80000000LL + || acc > 0x7fffffffLL) + cc |= (1 << (i+4)); + A1w (i+4, acc); + } + + ccw (IVC2_COFA1, cc); +} + +// iiiiiiii 11101 qqqqq ppppp 11 III cpfmadila1.h crqp,crpp,imm3p25,imm8p0 (cpfm) +void mep::mep_cpu_cgen::ivc2_cpfmadila1_h (PCADDR &pc, DI crqp, DI crpp, SI imm3, SI imm8) +{ + int i; + DI tmp; + HI tmpv[4]; + USI cc; + + tmp = ((UDI) crqp << (imm3*8)) | (UDI) crpp >> (64-(imm3*8)); + unpack (tmp, tmpv); + + cc = ccr (IVC2_COFA1); + + for (i=0; i<4; i++) + { + DI acc = (SI) A1r (i); + acc += tmpv[i] * imm8; + if (acc < -0x80000000LL + || acc > 0x7fffffffLL) + cc |= (1 << i); + A1w (i, acc); + } + + ccw (IVC2_COFA1, cc); +} + diff --git a/sid/component/cgen-cpu/mep/ivc2-cpu.h b/sid/component/cgen-cpu/mep/ivc2-cpu.h new file mode 100644 index 0000000000..cc26b46f2e --- /dev/null +++ b/sid/component/cgen-cpu/mep/ivc2-cpu.h @@ -0,0 +1,404 @@ +// ivc2-cpu.h - Hand-written code for the Toshiba IVC2 coprocessor. -*- C++ -*- + +// Copyright (C) 2009 Red Hat. +// This file is part of SID and is licensed under the GPL. +// See the file COPYING.SID for conditions for redistribution. + +// This file is included in the middle of the cpu class struct. + +public: + DI ivc2_cdadd3 (PCADDR &pc, DI crqc, DI crpc); + DI ivc2_cdcastuw (PCADDR &pc, DI crqc); + DI ivc2_cdcastw (PCADDR &pc, DI crqc); + DI ivc2_cdclipi3 (PCADDR &pc, DI crpc, SI imm6_6); + DI ivc2_cdclipiu3 (PCADDR &pc, DI crpc, SI imm6_6); + DI ivc2_cdmovi (PCADDR &pc, SI imm8_4); + DI ivc2_cdmovi16 (PCADDR &pc, SI imm16); + DI ivc2_cdmoviu (PCADDR &pc, SI imm8_4); + DI ivc2_cdmoviu16 (PCADDR &pc, SI imm16); + DI ivc2_cdsll3 (PCADDR &pc, DI crqc, DI crpc); + DI ivc2_cdslli3 (PCADDR &pc, DI crpc, SI imm6_6); + DI ivc2_cdsra3 (PCADDR &pc, DI crqc, DI crpc); + DI ivc2_cdsrai3 (PCADDR &pc, DI crpc, SI imm6_6); + DI ivc2_cdsrl3 (PCADDR &pc, DI crqc, DI crpc); + DI ivc2_cdsrli3 (PCADDR &pc, DI crpc, SI imm6_6); + DI ivc2_cdsub3 (PCADDR &pc, DI crqc, DI crpc); + DI ivc2_cpabs3_b (PCADDR &pc, DI crqc, DI crpc); + DI ivc2_cpabs3_h (PCADDR &pc, DI crqc, DI crpc); + DI ivc2_cpabsu3_b (PCADDR &pc, DI crqc, DI crpc); + DI ivc2_cpabsz_b (PCADDR &pc, DI crqc); + DI ivc2_cpabsz_h (PCADDR &pc, DI crqc); + DI ivc2_cpabsz_w (PCADDR &pc, DI crqc); + DI ivc2_cpadd3_b (PCADDR &pc, DI crqc, DI crpc); + DI ivc2_cpadd3_h (PCADDR &pc, DI crqc, DI crpc); + DI ivc2_cpadd3_w (PCADDR &pc, DI crqc, DI crpc); + DI ivc2_cpaddsr3_b (PCADDR &pc, DI crqc, DI crpc); + DI ivc2_cpaddsr3_h (PCADDR &pc, DI crqc, DI crpc); + DI ivc2_cpaddsr3_w (PCADDR &pc, DI crqc, DI crpc); + DI ivc2_cpaddsru3_b (PCADDR &pc, DI crqc, DI crpc); + DI ivc2_cpand3 (PCADDR &pc, DI crqc, DI crpc); + DI ivc2_cpave3_b (PCADDR &pc, DI crqc, DI crpc); + DI ivc2_cpave3_h (PCADDR &pc, DI crqc, DI crpc); + DI ivc2_cpave3_w (PCADDR &pc, DI crqc, DI crpc); + DI ivc2_cpaveu3_b (PCADDR &pc, DI crqc, DI crpc); + DI ivc2_cpbcast_b (PCADDR &pc, DI crqc); + DI ivc2_cpbcast_h (PCADDR &pc, DI crqc); + DI ivc2_cpbcast_w (PCADDR &pc, DI crqc); + DI ivc2_cpcastb_h (PCADDR &pc, DI crqc); + DI ivc2_cpcastb_w (PCADDR &pc, DI crqc); + DI ivc2_cpcasth_w (PCADDR &pc, DI crqc); + DI ivc2_cpcastub_h (PCADDR &pc, DI crqc); + DI ivc2_cpcastub_w (PCADDR &pc, DI crqc); + DI ivc2_cpcastuh_w (PCADDR &pc, DI crqc); + DI ivc2_cpclipi3_w (PCADDR &pc, DI crpc, SI imm5_7); + DI ivc2_cpclipiu3_w (PCADDR &pc, DI crpc, SI imm5_7); + DI ivc2_cpextl_b (PCADDR &pc, DI crqc); + DI ivc2_cpextl_h (PCADDR &pc, DI crqc); + DI ivc2_cpextladd3_b (PCADDR &pc, DI crqc, DI crpc); + DI ivc2_cpextladdu3_b (PCADDR &pc, DI crqc, DI crpc); + DI ivc2_cpextlsub3_b (PCADDR &pc, DI crqc, DI crpc); + DI ivc2_cpextlsubu3_b (PCADDR &pc, DI crqc, DI crpc); + DI ivc2_cpextlu_b (PCADDR &pc, DI crqc); + DI ivc2_cpextlu_h (PCADDR &pc, DI crqc); + DI ivc2_cpextu_b (PCADDR &pc, DI crqc); + DI ivc2_cpextu_h (PCADDR &pc, DI crqc); + DI ivc2_cpextuadd3_b (PCADDR &pc, DI crqc, DI crpc); + DI ivc2_cpextuaddu3_b (PCADDR &pc, DI crqc, DI crpc); + DI ivc2_cpextusub3_b (PCADDR &pc, DI crqc, DI crpc); + DI ivc2_cpextusubu3_b (PCADDR &pc, DI crqc, DI crpc); + DI ivc2_cpextuu_b (PCADDR &pc, DI crqc); + DI ivc2_cpextuu_h (PCADDR &pc, DI crqc); + DI ivc2_cpfsftbi (PCADDR &pc, DI crqc, DI crpc, SI imm3_4); + DI ivc2_cpfsftbs0 (PCADDR &pc, DI crqc, DI crpc); + DI ivc2_cpfsftbs1 (PCADDR &pc, DI crqc, DI crpc); + DI ivc2_cphadd_b (PCADDR &pc, DI crqc); + DI ivc2_cphadd_h (PCADDR &pc, DI crqc); + DI ivc2_cphadd_w (PCADDR &pc, DI crqc); + DI ivc2_cphaddu_b (PCADDR &pc, DI crqc); + DI ivc2_cpldz_h (PCADDR &pc, DI crqc); + DI ivc2_cpldz_w (PCADDR &pc, DI crqc); + DI ivc2_cpmax3_b (PCADDR &pc, DI crqc, DI crpc); + DI ivc2_cpmax3_h (PCADDR &pc, DI crqc, DI crpc); + DI ivc2_cpmax3_w (PCADDR &pc, DI crqc, DI crpc); + DI ivc2_cpmaxu3_b (PCADDR &pc, DI crqc, DI crpc); + DI ivc2_cpmaxu3_w (PCADDR &pc, DI crqc, DI crpc); + DI ivc2_cpmin3_b (PCADDR &pc, DI crqc, DI crpc); + DI ivc2_cpmin3_h (PCADDR &pc, DI crqc, DI crpc); + DI ivc2_cpmin3_w (PCADDR &pc, DI crqc, DI crpc); + DI ivc2_cpminu3_b (PCADDR &pc, DI crqc, DI crpc); + DI ivc2_cpminu3_w (PCADDR &pc, DI crqc, DI crpc); + DI ivc2_cpmov (PCADDR &pc, DI crqc); + DI ivc2_cpmova0_b (PCADDR &pc); + DI ivc2_cpmova1_b (PCADDR &pc); + DI ivc2_cpmovfrcc (PCADDR &pc); + DI ivc2_cpmovfrcsar0 (PCADDR &pc); + DI ivc2_cpmovfrcsar1 (PCADDR &pc); + DI ivc2_cpmovhla0_w (PCADDR &pc); + DI ivc2_cpmovhla1_w (PCADDR &pc); + DI ivc2_cpmovhua0_w (PCADDR &pc); + DI ivc2_cpmovhua1_w (PCADDR &pc); + DI ivc2_cpmovi_b (PCADDR &pc, SI imm8_4); + DI ivc2_cpmovi_h (PCADDR &pc, SI imm8_4); + DI ivc2_cpmovi_h16 (PCADDR &pc, SI imm16p0); + DI ivc2_cpmovi_w (PCADDR &pc, SI imm8_4); + DI ivc2_cpmovi_w16 (PCADDR &pc, SI imm16p0); + DI ivc2_cpmoviu_h (PCADDR &pc, SI imm8_4); + DI ivc2_cpmoviu_w (PCADDR &pc, SI imm8_4); + DI ivc2_cpmoviu_w16 (PCADDR &pc, SI imm16p0); + DI ivc2_cpmovla0_h (PCADDR &pc); + DI ivc2_cpmovla1_h (PCADDR &pc); + DI ivc2_cpmovlla0_w (PCADDR &pc); + DI ivc2_cpmovlla1_w (PCADDR &pc); + DI ivc2_cpmovlua0_w (PCADDR &pc); + DI ivc2_cpmovlua1_w (PCADDR &pc); + DI ivc2_cpmovua0_h (PCADDR &pc); + DI ivc2_cpmovua1_h (PCADDR &pc); + DI ivc2_cpmovula0_w (PCADDR &pc); + DI ivc2_cpmovula1_w (PCADDR &pc); + DI ivc2_cpmovuua0_w (PCADDR &pc); + DI ivc2_cpmovuua1_w (PCADDR &pc); + DI ivc2_cpnor3 (PCADDR &pc, DI crqc, DI crpc); + DI ivc2_cpnorm_h (PCADDR &pc, DI crqc); + DI ivc2_cpnorm_w (PCADDR &pc, DI crqc); + DI ivc2_cpor3 (PCADDR &pc, DI crqc, DI crpc); + DI ivc2_cppack_b (PCADDR &pc, DI crqc, DI crpc); + DI ivc2_cppack_h (PCADDR &pc, DI crqc, DI crpc); + DI ivc2_cppacka0_b (PCADDR &pc); + DI ivc2_cppacka0u_b (PCADDR &pc); + DI ivc2_cppacka1_b (PCADDR &pc); + DI ivc2_cppacka1u_b (PCADDR &pc); + DI ivc2_cppackla0_h (PCADDR &pc); + DI ivc2_cppackla0_w (PCADDR &pc); + DI ivc2_cppackla1_h (PCADDR &pc); + DI ivc2_cppackla1_w (PCADDR &pc); + DI ivc2_cppacku_b (PCADDR &pc, DI crqc, DI crpc); + DI ivc2_cppackua0_h (PCADDR &pc); + DI ivc2_cppackua0_w (PCADDR &pc); + DI ivc2_cppackua1_h (PCADDR &pc); + DI ivc2_cppackua1_w (PCADDR &pc); + DI ivc2_cpsadd3_h (PCADDR &pc, DI crqc, DI crpc); + DI ivc2_cpsadd3_w (PCADDR &pc, DI crqc, DI crpc); + DI ivc2_cpsel (PCADDR &pc, DI crqc, DI crpc); + DI ivc2_cpsla3_h (PCADDR &pc, DI crqc, DI crpc); + DI ivc2_cpsla3_w (PCADDR &pc, DI crqc, DI crpc); + DI ivc2_cpslai3_h (PCADDR &pc, DI crpc, SI imm4_8); + DI ivc2_cpslai3_w (PCADDR &pc, DI crpc, SI imm5_7); + DI ivc2_cpsll3_b (PCADDR &pc, DI crqc, DI crpc); + DI ivc2_cpsll3_h (PCADDR &pc, DI crqc, DI crpc); + DI ivc2_cpsll3_w (PCADDR &pc, DI crqc, DI crpc); + DI ivc2_cpslli3_b (PCADDR &pc, DI crpc, SI imm3_9); + DI ivc2_cpslli3_h (PCADDR &pc, DI crpc, SI imm4_8); + DI ivc2_cpslli3_w (PCADDR &pc, DI crpc, SI imm5_7); + DI ivc2_cpsra3_b (PCADDR &pc, DI crqc, DI crpc); + DI ivc2_cpsra3_h (PCADDR &pc, DI crqc, DI crpc); + DI ivc2_cpsra3_w (PCADDR &pc, DI crqc, DI crpc); + DI ivc2_cpsrai3_b (PCADDR &pc, DI crpc, SI imm3_9); + DI ivc2_cpsrai3_h (PCADDR &pc, DI crpc, SI imm4_8); + DI ivc2_cpsrai3_w (PCADDR &pc, DI crpc, SI imm5_7); + DI ivc2_cpsrl3_b (PCADDR &pc, DI crqc, DI crpc); + DI ivc2_cpsrl3_h (PCADDR &pc, DI crqc, DI crpc); + DI ivc2_cpsrl3_w (PCADDR &pc, DI crqc, DI crpc); + DI ivc2_cpsrli3_b (PCADDR &pc, DI crpc, SI imm3_9); + DI ivc2_cpsrli3_h (PCADDR &pc, DI crpc, SI imm4_8); + DI ivc2_cpsrli3_w (PCADDR &pc, DI crpc, SI imm5_7); + DI ivc2_cpssll3_b (PCADDR &pc, DI crqc, DI crpc); + DI ivc2_cpssll3_h (PCADDR &pc, DI crqc, DI crpc); + DI ivc2_cpssll3_w (PCADDR &pc, DI crqc, DI crpc); + DI ivc2_cpssra3_b (PCADDR &pc, DI crqc, DI crpc); + DI ivc2_cpssra3_h (PCADDR &pc, DI crqc, DI crpc); + DI ivc2_cpssra3_w (PCADDR &pc, DI crqc, DI crpc); + DI ivc2_cpssrl3_b (PCADDR &pc, DI crqc, DI crpc); + DI ivc2_cpssrl3_h (PCADDR &pc, DI crqc, DI crpc); + DI ivc2_cpssrl3_w (PCADDR &pc, DI crqc, DI crpc); + DI ivc2_cpssub3_h (PCADDR &pc, DI crqc, DI crpc); + DI ivc2_cpssub3_w (PCADDR &pc, DI crqc, DI crpc); + DI ivc2_cpsub3_b (PCADDR &pc, DI crqc, DI crpc); + DI ivc2_cpsub3_h (PCADDR &pc, DI crqc, DI crpc); + DI ivc2_cpsub3_w (PCADDR &pc, DI crqc, DI crpc); + DI ivc2_cpunpackl_b (PCADDR &pc, DI crqc, DI crpc); + DI ivc2_cpunpackl_h (PCADDR &pc, DI crqc, DI crpc); + DI ivc2_cpunpackl_w (PCADDR &pc, DI crqc, DI crpc); + DI ivc2_cpunpacku_b (PCADDR &pc, DI crqc, DI crpc); + DI ivc2_cpunpacku_h (PCADDR &pc, DI crqc, DI crpc); + DI ivc2_cpunpacku_w (PCADDR &pc, DI crqc, DI crpc); + DI ivc2_cpxor3 (PCADDR &pc, DI crqc, DI crpc); + void ivc2_c0nop (PCADDR &pc); + void ivc2_c1nop (PCADDR &pc); + void ivc2_cpabsa0_b (PCADDR &pc, DI crqp, DI crpp); + void ivc2_cpabsa0u_b (PCADDR &pc, DI crqp, DI crpp); + void ivc2_cpabsa1_b (PCADDR &pc, DI crqc, DI crpc); + void ivc2_cpabsa1u_b (PCADDR &pc, DI crqc, DI crpc); + void ivc2_cpabsla0_h (PCADDR &pc, DI crqp, DI crpp); + void ivc2_cpabsla1_h (PCADDR &pc, DI crqc, DI crpc); + void ivc2_cpabsua0_h (PCADDR &pc, DI crqp, DI crpp); + void ivc2_cpabsua1_h (PCADDR &pc, DI crqc, DI crpc); + void ivc2_cpaccpa0 (PCADDR &pc); + void ivc2_cpaccpa1 (PCADDR &pc); + void ivc2_cpacmpeq_b (PCADDR &pc, DI crqc, DI crpc); + void ivc2_cpacmpeq_h (PCADDR &pc, DI crqc, DI crpc); + void ivc2_cpacmpeq_w (PCADDR &pc, DI crqc, DI crpc); + void ivc2_cpacmpge_b (PCADDR &pc, DI crqc, DI crpc); + void ivc2_cpacmpge_h (PCADDR &pc, DI crqc, DI crpc); + void ivc2_cpacmpge_w (PCADDR &pc, DI crqc, DI crpc); + void ivc2_cpacmpgeu_b (PCADDR &pc, DI crqc, DI crpc); + void ivc2_cpacmpgeu_w (PCADDR &pc, DI crqc, DI crpc); + void ivc2_cpacmpgt_b (PCADDR &pc, DI crqc, DI crpc); + void ivc2_cpacmpgt_h (PCADDR &pc, DI crqc, DI crpc); + void ivc2_cpacmpgt_w (PCADDR &pc, DI crqc, DI crpc); + void ivc2_cpacmpgtu_b (PCADDR &pc, DI crqc, DI crpc); + void ivc2_cpacmpgtu_w (PCADDR &pc, DI crqc, DI crpc); + void ivc2_cpacmpne_b (PCADDR &pc, DI crqc, DI crpc); + void ivc2_cpacmpne_h (PCADDR &pc, DI crqc, DI crpc); + void ivc2_cpacmpne_w (PCADDR &pc, DI crqc, DI crpc); + void ivc2_cpacsuma0 (PCADDR &pc); + void ivc2_cpacsuma1 (PCADDR &pc); + void ivc2_cpacswp (PCADDR &pc); + void ivc2_cpadda0_b (PCADDR &pc, DI crqp, DI crpp); + void ivc2_cpadda0u_b (PCADDR &pc, DI crqp, DI crpp); + void ivc2_cpadda1_b (PCADDR &pc, DI crqc, DI crpc); + void ivc2_cpadda1u_b (PCADDR &pc, DI crqc, DI crpc); + void ivc2_cpaddaca0_b (PCADDR &pc, DI crqp, DI crpp); + void ivc2_cpaddaca0u_b (PCADDR &pc, DI crqp, DI crpp); + void ivc2_cpaddaca1_b (PCADDR &pc, DI crqc, DI crpc); + void ivc2_cpaddaca1u_b (PCADDR &pc, DI crqc, DI crpc); + void ivc2_cpaddacla0_h (PCADDR &pc, DI crqp, DI crpp); + void ivc2_cpaddacla1_h (PCADDR &pc, DI crqc, DI crpc); + void ivc2_cpaddacua0_h (PCADDR &pc, DI crqp, DI crpp); + void ivc2_cpaddacua1_h (PCADDR &pc, DI crqc, DI crpc); + void ivc2_cpaddla0_h (PCADDR &pc, DI crqp, DI crpp); + void ivc2_cpaddla1_h (PCADDR &pc, DI crqc, DI crpc); + void ivc2_cpaddua0_h (PCADDR &pc, DI crqp, DI crpp); + void ivc2_cpaddua1_h (PCADDR &pc, DI crqc, DI crpc); + void ivc2_cpamadia1_b (PCADDR &pc, DI crqp, DI crpp, SI imm8_0); + void ivc2_cpamadia1u_b (PCADDR &pc, DI crqp, DI crpp, SI imm8_0); + void ivc2_cpamadila1_h (PCADDR &pc, DI crqp, DI crpp, SI imm8_0); + void ivc2_cpamadiua1_h (PCADDR &pc, DI crqp, DI crpp, SI imm8_0); + void ivc2_cpamulia1_b (PCADDR &pc, DI crqp, DI crpp, SI imm8_0); + void ivc2_cpamulia1u_b (PCADDR &pc, DI crqp, DI crpp, SI imm8_0); + void ivc2_cpamulila1_h (PCADDR &pc, DI crqp, DI crpp, SI imm8_0); + void ivc2_cpamuliua1_h (PCADDR &pc, DI crqp, DI crpp, SI imm8_0); + void ivc2_cpccadd_b (PCADDR &pc, SI crqc); + void ivc2_cpcmpeq_b (PCADDR &pc, DI crqc, DI crpc); + void ivc2_cpcmpeq_h (PCADDR &pc, DI crqc, DI crpc); + void ivc2_cpcmpeq_w (PCADDR &pc, DI crqc, DI crpc); + void ivc2_cpcmpeqz_b (PCADDR &pc, DI crqc, DI crpc); + void ivc2_cpcmpge_b (PCADDR &pc, DI crqc, DI crpc); + void ivc2_cpcmpge_h (PCADDR &pc, DI crqc, DI crpc); + void ivc2_cpcmpge_w (PCADDR &pc, DI crqc, DI crpc); + void ivc2_cpcmpgeu_b (PCADDR &pc, DI crqc, DI crpc); + void ivc2_cpcmpgeu_w (PCADDR &pc, DI crqc, DI crpc); + void ivc2_cpcmpgt_b (PCADDR &pc, DI crqc, DI crpc); + void ivc2_cpcmpgt_h (PCADDR &pc, DI crqc, DI crpc); + void ivc2_cpcmpgt_w (PCADDR &pc, DI crqc, DI crpc); + void ivc2_cpcmpgtu_b (PCADDR &pc, DI crqc, DI crpc); + void ivc2_cpcmpgtu_w (PCADDR &pc, DI crqc, DI crpc); + void ivc2_cpcmpne_b (PCADDR &pc, DI crqc, DI crpc); + void ivc2_cpcmpne_h (PCADDR &pc, DI crqc, DI crpc); + void ivc2_cpcmpne_w (PCADDR &pc, DI crqc, DI crpc); + void ivc2_cpfaca0s0_b (PCADDR &pc, DI crqp, DI crpp); + void ivc2_cpfaca0s0u_b (PCADDR &pc, DI crqp, DI crpp); + void ivc2_cpfaca0s1_b (PCADDR &pc, DI crqp, DI crpp); + void ivc2_cpfaca0s1u_b (PCADDR &pc, DI crqp, DI crpp); + void ivc2_cpfacla0s0_h (PCADDR &pc, DI crqp, DI crpp); + void ivc2_cpfacla0s1_h (PCADDR &pc, DI crqp, DI crpp); + void ivc2_cpfacua0s0_h (PCADDR &pc, DI crqp, DI crpp); + void ivc2_cpfacua0s1_h (PCADDR &pc, DI crqp, DI crpp); + void ivc2_cpfmadia1_b (PCADDR &pc, DI crqp, DI crpp, SI imm3, SI imm8); + void ivc2_cpfmadia1s0_b (PCADDR &pc, DI crqp, DI crpp, SI imm8_0); + void ivc2_cpfmadia1s0u_b (PCADDR &pc, DI crqp, DI crpp, SI imm8_0); + void ivc2_cpfmadia1s1_b (PCADDR &pc, DI crqp, DI crpp, SI imm8_0); + void ivc2_cpfmadia1s1u_b (PCADDR &pc, DI crqp, DI crpp, SI imm8_0); + void ivc2_cpfmadia1u_b (PCADDR &pc, DI crqp, DI crpp, SI imm3, SI imm8); + void ivc2_cpfmadila1_h (PCADDR &pc, DI crqp, DI crpp, SI imm3, SI imm8); + void ivc2_cpfmadila1s0_h (PCADDR &pc, DI crqp, DI crpp, SI imm8_0); + void ivc2_cpfmadila1s1_h (PCADDR &pc, DI crqp, DI crpp, SI imm8_0); + void ivc2_cpfmadiua1_h (PCADDR &pc, DI crqp, DI crpp, SI imm3, SI imm8); + void ivc2_cpfmadiua1s0_h (PCADDR &pc, DI crqp, DI crpp, SI imm8_0); + void ivc2_cpfmadiua1s1_h (PCADDR &pc, DI crqp, DI crpp, SI imm8_0); + void ivc2_cpfmulia1_b (PCADDR &pc, DI crqp, DI crpp, SI imm3, SI imm8); + void ivc2_cpfmulia1s0_b (PCADDR &pc, DI crqp, DI crpp, SI imm8_0); + void ivc2_cpfmulia1s0u_b (PCADDR &pc, DI crqp, DI crpp, SI imm8_0); + void ivc2_cpfmulia1s1_b (PCADDR &pc, DI crqp, DI crpp, SI imm8_0); + void ivc2_cpfmulia1s1u_b (PCADDR &pc, DI crqp, DI crpp, SI imm8_0); + void ivc2_cpfmulia1u_b (PCADDR &pc, DI crqp, DI crpp, SI imm3, SI imm8); + void ivc2_cpfmulila1_h (PCADDR &pc, DI crqp, DI crpp, SI imm3, SI imm8); + void ivc2_cpfmulila1s0_h (PCADDR &pc, DI crqp, DI crpp, SI imm8_0); + void ivc2_cpfmulila1s1_h (PCADDR &pc, DI crqp, DI crpp, SI imm8_0); + void ivc2_cpfmuliua1_h (PCADDR &pc, DI crqp, DI crpp, SI imm3, SI imm8); + void ivc2_cpfmuliua1s0_h (PCADDR &pc, DI crqp, DI crpp, SI imm8_0); + void ivc2_cpfmuliua1s1_h (PCADDR &pc, DI crqp, DI crpp, SI imm8_0); + void ivc2_cpfsftba0s0_b (PCADDR &pc, DI crqp, DI crpp); + void ivc2_cpfsftba0s0u_b (PCADDR &pc, DI crqp, DI crpp); + void ivc2_cpfsftba0s1_b (PCADDR &pc, DI crqp, DI crpp); + void ivc2_cpfsftba0s1u_b (PCADDR &pc, DI crqp, DI crpp); + void ivc2_cpfsftbla0s0_h (PCADDR &pc, DI crqp, DI crpp); + void ivc2_cpfsftbla0s1_h (PCADDR &pc, DI crqp, DI crpp); + void ivc2_cpfsftbua0s0_h (PCADDR &pc, DI crqp, DI crpp); + void ivc2_cpfsftbua0s1_h (PCADDR &pc, DI crqp, DI crpp); + void ivc2_cpmada1_b (PCADDR &pc, DI crqc, DI crpc); + void ivc2_cpmada1u_b (PCADDR &pc, DI crqc, DI crpc); + void ivc2_cpmadla1_h (PCADDR &pc, DI crqc, DI crpc); + void ivc2_cpmadla1_w (PCADDR &pc, DI crqc, DI crpc); + void ivc2_cpmadla1u_w (PCADDR &pc, DI crqc, DI crpc); + void ivc2_cpmadua1_h (PCADDR &pc, DI crqc, DI crpc); + void ivc2_cpmadua1_w (PCADDR &pc, DI crqc, DI crpc); + void ivc2_cpmadua1u_w (PCADDR &pc, DI crqc, DI crpc); + void ivc2_cpmovtocc (PCADDR &pc, DI crqc); + void ivc2_cpmovtocsar0 (PCADDR &pc, DI crqc); + void ivc2_cpmovtocsar1 (PCADDR &pc, DI crqc); + void ivc2_cpmsbla1_h (PCADDR &pc, DI crqc, DI crpc); + void ivc2_cpmsbla1_w (PCADDR &pc, DI crqc, DI crpc); + void ivc2_cpmsbla1u_w (PCADDR &pc, DI crqc, DI crpc); + void ivc2_cpmsbua1_h (PCADDR &pc, DI crqc, DI crpc); + void ivc2_cpmsbua1_w (PCADDR &pc, DI crqc, DI crpc); + void ivc2_cpmsbua1u_w (PCADDR &pc, DI crqc, DI crpc); + void ivc2_cpmula1_b (PCADDR &pc, DI crqc, DI crpc); + void ivc2_cpmula1u_b (PCADDR &pc, DI crqc, DI crpc); + void ivc2_cpmulla1_h (PCADDR &pc, DI crqc, DI crpc); + void ivc2_cpmulla1_w (PCADDR &pc, DI crqc, DI crpc); + void ivc2_cpmulla1u_w (PCADDR &pc, DI crqc, DI crpc); + void ivc2_cpmulslla1_h (PCADDR &pc, DI crqc, DI crpc); + void ivc2_cpmulslla1_w (PCADDR &pc, DI crqc, DI crpc); + void ivc2_cpmulslua1_h (PCADDR &pc, DI crqc, DI crpc); + void ivc2_cpmulslua1_w (PCADDR &pc, DI crqc, DI crpc); + void ivc2_cpmulua1_h (PCADDR &pc, DI crqc, DI crpc); + void ivc2_cpmulua1_w (PCADDR &pc, DI crqc, DI crpc); + void ivc2_cpmulua1u_w (PCADDR &pc, DI crqc, DI crpc); + void ivc2_cpocmpeq_b (PCADDR &pc, DI crqc, DI crpc); + void ivc2_cpocmpeq_h (PCADDR &pc, DI crqc, DI crpc); + void ivc2_cpocmpeq_w (PCADDR &pc, DI crqc, DI crpc); + void ivc2_cpocmpge_b (PCADDR &pc, DI crqc, DI crpc); + void ivc2_cpocmpge_h (PCADDR &pc, DI crqc, DI crpc); + void ivc2_cpocmpge_w (PCADDR &pc, DI crqc, DI crpc); + void ivc2_cpocmpgeu_b (PCADDR &pc, DI crqc, DI crpc); + void ivc2_cpocmpgeu_w (PCADDR &pc, DI crqc, DI crpc); + void ivc2_cpocmpgt_b (PCADDR &pc, DI crqc, DI crpc); + void ivc2_cpocmpgt_h (PCADDR &pc, DI crqc, DI crpc); + void ivc2_cpocmpgt_w (PCADDR &pc, DI crqc, DI crpc); + void ivc2_cpocmpgtu_b (PCADDR &pc, DI crqc, DI crpc); + void ivc2_cpocmpgtu_w (PCADDR &pc, DI crqc, DI crpc); + void ivc2_cpocmpne_b (PCADDR &pc, DI crqc, DI crpc); + void ivc2_cpocmpne_h (PCADDR &pc, DI crqc, DI crpc); + void ivc2_cpocmpne_w (PCADDR &pc, DI crqc, DI crpc); + void ivc2_cpsada0_b (PCADDR &pc, DI crqp, DI crpp); + void ivc2_cpsada0u_b (PCADDR &pc, DI crqp, DI crpp); + void ivc2_cpsada1_b (PCADDR &pc, DI crqc, DI crpc); + void ivc2_cpsada1u_b (PCADDR &pc, DI crqc, DI crpc); + void ivc2_cpsadla0_h (PCADDR &pc, DI crqp, DI crpp); + void ivc2_cpsadla1_h (PCADDR &pc, DI crqc, DI crpc); + void ivc2_cpsadua0_h (PCADDR &pc, DI crqp, DI crpp); + void ivc2_cpsadua1_h (PCADDR &pc, DI crqc, DI crpc); + void ivc2_cpseta0_h (PCADDR &pc, DI crqp, DI crpp); + void ivc2_cpseta1_h (PCADDR &pc, DI crqc, DI crpc); + void ivc2_cpsetla0_w (PCADDR &pc, DI crqp, DI crpp); + void ivc2_cpsetla1_w (PCADDR &pc, DI crqc, DI crpc); + void ivc2_cpsetua0_w (PCADDR &pc, DI crqp, DI crpp); + void ivc2_cpsetua1_w (PCADDR &pc, DI crqc, DI crpc); + void ivc2_cpslla0 (PCADDR &pc, DI crqp); + void ivc2_cpslla1 (PCADDR &pc, DI crqc); + void ivc2_cpsllia0 (PCADDR &pc, SI imm5_23); + void ivc2_cpsllia1 (PCADDR &pc, SI imm5_7); + void ivc2_cpsmadla1_h (PCADDR &pc, DI crqc, DI crpc); + void ivc2_cpsmadla1_w (PCADDR &pc, DI crqc, DI crpc); + void ivc2_cpsmadslla1_h (PCADDR &pc, DI crqc, DI crpc); + void ivc2_cpsmadslla1_w (PCADDR &pc, DI crqc, DI crpc); + void ivc2_cpsmadslua1_h (PCADDR &pc, DI crqc, DI crpc); + void ivc2_cpsmadslua1_w (PCADDR &pc, DI crqc, DI crpc); + void ivc2_cpsmadua1_h (PCADDR &pc, DI crqc, DI crpc); + void ivc2_cpsmadua1_w (PCADDR &pc, DI crqc, DI crpc); + void ivc2_cpsmsbla1_h (PCADDR &pc, DI crqc, DI crpc); + void ivc2_cpsmsbla1_w (PCADDR &pc, DI crqc, DI crpc); + void ivc2_cpsmsbslla1_h (PCADDR &pc, DI crqc, DI crpc); + void ivc2_cpsmsbslla1_w (PCADDR &pc, DI crqc, DI crpc); + void ivc2_cpsmsbslua1_h (PCADDR &pc, DI crqc, DI crpc); + void ivc2_cpsmsbslua1_w (PCADDR &pc, DI crqc, DI crpc); + void ivc2_cpsmsbua1_h (PCADDR &pc, DI crqc, DI crpc); + void ivc2_cpsmsbua1_w (PCADDR &pc, DI crqc, DI crpc); + void ivc2_cpsraa0 (PCADDR &pc, DI crqp); + void ivc2_cpsraa1 (PCADDR &pc, DI crqc); + void ivc2_cpsraia0 (PCADDR &pc, SI imm5_23); + void ivc2_cpsraia1 (PCADDR &pc, SI imm5_7); + void ivc2_cpsrla0 (PCADDR &pc, DI crqp); + void ivc2_cpsrla1 (PCADDR &pc, DI crqc); + void ivc2_cpsrlia0 (PCADDR &pc, SI imm5_23); + void ivc2_cpsrlia1 (PCADDR &pc, SI imm5_7); + void ivc2_cpssda1_b (PCADDR &pc, DI crqc, DI crpc); + void ivc2_cpssda1u_b (PCADDR &pc, DI crqc, DI crpc); + void ivc2_cpssqa1_b (PCADDR &pc, DI crqc, DI crpc); + void ivc2_cpssqa1u_b (PCADDR &pc, DI crqc, DI crpc); + void ivc2_cpsuba0_b (PCADDR &pc, DI crqp, DI crpp); + void ivc2_cpsuba0u_b (PCADDR &pc, DI crqp, DI crpp); + void ivc2_cpsuba1_b (PCADDR &pc, DI crqc, DI crpc); + void ivc2_cpsuba1u_b (PCADDR &pc, DI crqc, DI crpc); + void ivc2_cpsubaca0_b (PCADDR &pc, DI crqp, DI crpp); + void ivc2_cpsubaca0u_b (PCADDR &pc, DI crqp, DI crpp); + void ivc2_cpsubaca1_b (PCADDR &pc, DI crqc, DI crpc); + void ivc2_cpsubaca1u_b (PCADDR &pc, DI crqc, DI crpc); + void ivc2_cpsubacla0_h (PCADDR &pc, DI crqp, DI crpp); + void ivc2_cpsubacla1_h (PCADDR &pc, DI crqc, DI crpc); + void ivc2_cpsubacua0_h (PCADDR &pc, DI crqp, DI crpp); + void ivc2_cpsubacua1_h (PCADDR &pc, DI crqc, DI crpc); + void ivc2_cpsubla0_h (PCADDR &pc, DI crqp, DI crpp); + void ivc2_cpsubla1_h (PCADDR &pc, DI crqc, DI crpc); + void ivc2_cpsubua0_h (PCADDR &pc, DI crqp, DI crpp); + void ivc2_cpsubua1_h (PCADDR &pc, DI crqc, DI crpc); diff --git a/sid/component/cgen-cpu/mep/ivc2.h b/sid/component/cgen-cpu/mep/ivc2.h new file mode 100644 index 0000000000..5568673ac9 --- /dev/null +++ b/sid/component/cgen-cpu/mep/ivc2.h @@ -0,0 +1,8 @@ +// ivc2.h - Hand-written code for the Toshiba AVC2 coprocessor. -*- C++ -*- + +// Copyright (C) 2009 Red Hat. +// This file is part of SID and is licensed under the GPL. +// See the file COPYING.SID for conditions for redistribution. + +// This file is included in the middle of the mep_ext_cpu class struct. + diff --git a/sid/component/cgen-cpu/mep/mep-cop1-16-decode.cxx b/sid/component/cgen-cpu/mep/mep-cop1-16-decode.cxx new file mode 100644 index 0000000000..2f14fe5dd8 --- /dev/null +++ b/sid/component/cgen-cpu/mep/mep-cop1-16-decode.cxx @@ -0,0 +1,2213 @@ +/* Simulator instruction decoder for mepcop1_16. + +THIS FILE IS MACHINE GENERATED WITH CGEN. + +Copyright (C) 2000-2007 Red Hat, Inc. + +This file is part of the Red Hat simulators. + + +*/ + + +#if HAVE_CONFIG_H +#include "config.h" +#endif +#include "mep_ext1.h" + +using namespace mep_ext1; // FIXME: namespace organization still wip + + +// The instruction descriptor array. + +mepcop1_16_idesc mepcop1_16_idesc::idesc_table[MEPCOP1_16_INSN_CPFACLA0S1_H_P0S + 1] = +{ + { mepcop1_16_sem_x_invalid, "X_INVALID", MEPCOP1_16_INSN_X_INVALID, { 0|(1<> 13) & (31 << 6)) | ((insn >> 4) & (63 << 0))); + switch (val) + { + case 0 : + if ((entire_insn & 0xffffffff) == 0x0) + { itype = MEPCOP1_16_INSN_C0NOP_P0_P0S; mepcop1_16_extract_sfmt_c0nop_P0_P0S (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_16_INSN_X_INVALID; mepcop1_16_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 64 : /* fall through */ + case 65 : /* fall through */ + case 66 : /* fall through */ + case 67 : /* fall through */ + case 68 : /* fall through */ + case 69 : /* fall through */ + case 70 : /* fall through */ + case 71 : /* fall through */ + case 72 : /* fall through */ + case 73 : /* fall through */ + case 74 : /* fall through */ + case 75 : /* fall through */ + case 76 : /* fall through */ + case 77 : /* fall through */ + case 78 : /* fall through */ + case 79 : /* fall through */ + case 80 : /* fall through */ + case 81 : /* fall through */ + case 82 : /* fall through */ + case 83 : /* fall through */ + case 84 : /* fall through */ + case 85 : /* fall through */ + case 86 : /* fall through */ + case 87 : /* fall through */ + case 88 : /* fall through */ + case 89 : /* fall through */ + case 90 : /* fall through */ + case 91 : /* fall through */ + case 92 : /* fall through */ + case 93 : /* fall through */ + case 94 : /* fall through */ + case 95 : /* fall through */ + case 96 : /* fall through */ + case 97 : /* fall through */ + case 98 : /* fall through */ + case 99 : /* fall through */ + case 100 : /* fall through */ + case 101 : /* fall through */ + case 102 : /* fall through */ + case 103 : /* fall through */ + case 104 : /* fall through */ + case 105 : /* fall through */ + case 106 : /* fall through */ + case 107 : /* fall through */ + case 108 : /* fall through */ + case 109 : /* fall through */ + case 110 : /* fall through */ + case 111 : /* fall through */ + case 112 : /* fall through */ + case 113 : /* fall through */ + case 114 : /* fall through */ + case 115 : /* fall through */ + case 116 : /* fall through */ + case 117 : /* fall through */ + case 118 : /* fall through */ + case 119 : /* fall through */ + case 120 : /* fall through */ + case 121 : /* fall through */ + case 122 : /* fall through */ + case 123 : /* fall through */ + case 124 : /* fall through */ + case 125 : /* fall through */ + case 126 : /* fall through */ + case 127 : + if ((entire_insn & 0xfff8000f) == 0x80000) + { itype = MEPCOP1_16_INSN_CPADD3_B_P0S_P1; mepcop1_16_extract_sfmt_cpadd3_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_16_INSN_X_INVALID; mepcop1_16_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 128 : /* fall through */ + case 129 : /* fall through */ + case 130 : /* fall through */ + case 131 : /* fall through */ + case 132 : /* fall through */ + case 133 : /* fall through */ + case 134 : /* fall through */ + case 135 : /* fall through */ + case 136 : /* fall through */ + case 137 : /* fall through */ + case 138 : /* fall through */ + case 139 : /* fall through */ + case 140 : /* fall through */ + case 141 : /* fall through */ + case 142 : /* fall through */ + case 143 : /* fall through */ + case 144 : /* fall through */ + case 145 : /* fall through */ + case 146 : /* fall through */ + case 147 : /* fall through */ + case 148 : /* fall through */ + case 149 : /* fall through */ + case 150 : /* fall through */ + case 151 : /* fall through */ + case 152 : /* fall through */ + case 153 : /* fall through */ + case 154 : /* fall through */ + case 155 : /* fall through */ + case 156 : /* fall through */ + case 157 : /* fall through */ + case 158 : /* fall through */ + case 159 : /* fall through */ + case 160 : /* fall through */ + case 161 : /* fall through */ + case 162 : /* fall through */ + case 163 : /* fall through */ + case 164 : /* fall through */ + case 165 : /* fall through */ + case 166 : /* fall through */ + case 167 : /* fall through */ + case 168 : /* fall through */ + case 169 : /* fall through */ + case 170 : /* fall through */ + case 171 : /* fall through */ + case 172 : /* fall through */ + case 173 : /* fall through */ + case 174 : /* fall through */ + case 175 : /* fall through */ + case 176 : /* fall through */ + case 177 : /* fall through */ + case 178 : /* fall through */ + case 179 : /* fall through */ + case 180 : /* fall through */ + case 181 : /* fall through */ + case 182 : /* fall through */ + case 183 : /* fall through */ + case 184 : /* fall through */ + case 185 : /* fall through */ + case 186 : /* fall through */ + case 187 : /* fall through */ + case 188 : /* fall through */ + case 189 : /* fall through */ + case 190 : /* fall through */ + case 191 : + if ((entire_insn & 0xfff8000f) == 0x100000) + { itype = MEPCOP1_16_INSN_CPADD3_H_P0S_P1; mepcop1_16_extract_sfmt_cpadd3_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_16_INSN_X_INVALID; mepcop1_16_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 192 : /* fall through */ + case 193 : /* fall through */ + case 194 : /* fall through */ + case 195 : /* fall through */ + case 196 : /* fall through */ + case 197 : /* fall through */ + case 198 : /* fall through */ + case 199 : /* fall through */ + case 200 : /* fall through */ + case 201 : /* fall through */ + case 202 : /* fall through */ + case 203 : /* fall through */ + case 204 : /* fall through */ + case 205 : /* fall through */ + case 206 : /* fall through */ + case 207 : /* fall through */ + case 208 : /* fall through */ + case 209 : /* fall through */ + case 210 : /* fall through */ + case 211 : /* fall through */ + case 212 : /* fall through */ + case 213 : /* fall through */ + case 214 : /* fall through */ + case 215 : /* fall through */ + case 216 : /* fall through */ + case 217 : /* fall through */ + case 218 : /* fall through */ + case 219 : /* fall through */ + case 220 : /* fall through */ + case 221 : /* fall through */ + case 222 : /* fall through */ + case 223 : /* fall through */ + case 224 : /* fall through */ + case 225 : /* fall through */ + case 226 : /* fall through */ + case 227 : /* fall through */ + case 228 : /* fall through */ + case 229 : /* fall through */ + case 230 : /* fall through */ + case 231 : /* fall through */ + case 232 : /* fall through */ + case 233 : /* fall through */ + case 234 : /* fall through */ + case 235 : /* fall through */ + case 236 : /* fall through */ + case 237 : /* fall through */ + case 238 : /* fall through */ + case 239 : /* fall through */ + case 240 : /* fall through */ + case 241 : /* fall through */ + case 242 : /* fall through */ + case 243 : /* fall through */ + case 244 : /* fall through */ + case 245 : /* fall through */ + case 246 : /* fall through */ + case 247 : /* fall through */ + case 248 : /* fall through */ + case 249 : /* fall through */ + case 250 : /* fall through */ + case 251 : /* fall through */ + case 252 : /* fall through */ + case 253 : /* fall through */ + case 254 : /* fall through */ + case 255 : + if ((entire_insn & 0xfff8000f) == 0x180000) + { itype = MEPCOP1_16_INSN_CPADD3_W_P0S_P1; mepcop1_16_extract_sfmt_cpadd3_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_16_INSN_X_INVALID; mepcop1_16_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 256 : /* fall through */ + case 257 : /* fall through */ + case 258 : /* fall through */ + case 259 : /* fall through */ + case 260 : /* fall through */ + case 261 : /* fall through */ + case 262 : /* fall through */ + case 263 : /* fall through */ + case 264 : /* fall through */ + case 265 : /* fall through */ + case 266 : /* fall through */ + case 267 : /* fall through */ + case 268 : /* fall through */ + case 269 : /* fall through */ + case 270 : /* fall through */ + case 271 : /* fall through */ + case 272 : /* fall through */ + case 273 : /* fall through */ + case 274 : /* fall through */ + case 275 : /* fall through */ + case 276 : /* fall through */ + case 277 : /* fall through */ + case 278 : /* fall through */ + case 279 : /* fall through */ + case 280 : /* fall through */ + case 281 : /* fall through */ + case 282 : /* fall through */ + case 283 : /* fall through */ + case 284 : /* fall through */ + case 285 : /* fall through */ + case 286 : /* fall through */ + case 287 : /* fall through */ + case 288 : /* fall through */ + case 289 : /* fall through */ + case 290 : /* fall through */ + case 291 : /* fall through */ + case 292 : /* fall through */ + case 293 : /* fall through */ + case 294 : /* fall through */ + case 295 : /* fall through */ + case 296 : /* fall through */ + case 297 : /* fall through */ + case 298 : /* fall through */ + case 299 : /* fall through */ + case 300 : /* fall through */ + case 301 : /* fall through */ + case 302 : /* fall through */ + case 303 : /* fall through */ + case 304 : /* fall through */ + case 305 : /* fall through */ + case 306 : /* fall through */ + case 307 : /* fall through */ + case 308 : /* fall through */ + case 309 : /* fall through */ + case 310 : /* fall through */ + case 311 : /* fall through */ + case 312 : /* fall through */ + case 313 : /* fall through */ + case 314 : /* fall through */ + case 315 : /* fall through */ + case 316 : /* fall through */ + case 317 : /* fall through */ + case 318 : /* fall through */ + case 319 : + if ((entire_insn & 0xfff8000f) == 0x200000) + { itype = MEPCOP1_16_INSN_CPSEL_P0S_P1; mepcop1_16_extract_sfmt_cpadd3_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_16_INSN_X_INVALID; mepcop1_16_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 320 : /* fall through */ + case 321 : /* fall through */ + case 322 : /* fall through */ + case 323 : /* fall through */ + case 324 : /* fall through */ + case 325 : /* fall through */ + case 326 : /* fall through */ + case 327 : /* fall through */ + case 328 : /* fall through */ + case 329 : /* fall through */ + case 330 : /* fall through */ + case 331 : /* fall through */ + case 332 : /* fall through */ + case 333 : /* fall through */ + case 334 : /* fall through */ + case 335 : /* fall through */ + case 336 : /* fall through */ + case 337 : /* fall through */ + case 338 : /* fall through */ + case 339 : /* fall through */ + case 340 : /* fall through */ + case 341 : /* fall through */ + case 342 : /* fall through */ + case 343 : /* fall through */ + case 344 : /* fall through */ + case 345 : /* fall through */ + case 346 : /* fall through */ + case 347 : /* fall through */ + case 348 : /* fall through */ + case 349 : /* fall through */ + case 350 : /* fall through */ + case 351 : /* fall through */ + case 352 : /* fall through */ + case 353 : /* fall through */ + case 354 : /* fall through */ + case 355 : /* fall through */ + case 356 : /* fall through */ + case 357 : /* fall through */ + case 358 : /* fall through */ + case 359 : /* fall through */ + case 360 : /* fall through */ + case 361 : /* fall through */ + case 362 : /* fall through */ + case 363 : /* fall through */ + case 364 : /* fall through */ + case 365 : /* fall through */ + case 366 : /* fall through */ + case 367 : /* fall through */ + case 368 : /* fall through */ + case 369 : /* fall through */ + case 370 : /* fall through */ + case 371 : /* fall through */ + case 372 : /* fall through */ + case 373 : /* fall through */ + case 374 : /* fall through */ + case 375 : /* fall through */ + case 376 : /* fall through */ + case 377 : /* fall through */ + case 378 : /* fall through */ + case 379 : /* fall through */ + case 380 : /* fall through */ + case 381 : /* fall through */ + case 382 : /* fall through */ + case 383 : + if ((entire_insn & 0xfff8000f) == 0x280000) + { itype = MEPCOP1_16_INSN_CPUNPACKU_B_P0S_P1; mepcop1_16_extract_sfmt_cpadd3_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_16_INSN_X_INVALID; mepcop1_16_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 384 : /* fall through */ + case 385 : /* fall through */ + case 386 : /* fall through */ + case 387 : /* fall through */ + case 388 : /* fall through */ + case 389 : /* fall through */ + case 390 : /* fall through */ + case 391 : /* fall through */ + case 392 : /* fall through */ + case 393 : /* fall through */ + case 394 : /* fall through */ + case 395 : /* fall through */ + case 396 : /* fall through */ + case 397 : /* fall through */ + case 398 : /* fall through */ + case 399 : /* fall through */ + case 400 : /* fall through */ + case 401 : /* fall through */ + case 402 : /* fall through */ + case 403 : /* fall through */ + case 404 : /* fall through */ + case 405 : /* fall through */ + case 406 : /* fall through */ + case 407 : /* fall through */ + case 408 : /* fall through */ + case 409 : /* fall through */ + case 410 : /* fall through */ + case 411 : /* fall through */ + case 412 : /* fall through */ + case 413 : /* fall through */ + case 414 : /* fall through */ + case 415 : /* fall through */ + case 416 : /* fall through */ + case 417 : /* fall through */ + case 418 : /* fall through */ + case 419 : /* fall through */ + case 420 : /* fall through */ + case 421 : /* fall through */ + case 422 : /* fall through */ + case 423 : /* fall through */ + case 424 : /* fall through */ + case 425 : /* fall through */ + case 426 : /* fall through */ + case 427 : /* fall through */ + case 428 : /* fall through */ + case 429 : /* fall through */ + case 430 : /* fall through */ + case 431 : /* fall through */ + case 432 : /* fall through */ + case 433 : /* fall through */ + case 434 : /* fall through */ + case 435 : /* fall through */ + case 436 : /* fall through */ + case 437 : /* fall through */ + case 438 : /* fall through */ + case 439 : /* fall through */ + case 440 : /* fall through */ + case 441 : /* fall through */ + case 442 : /* fall through */ + case 443 : /* fall through */ + case 444 : /* fall through */ + case 445 : /* fall through */ + case 446 : /* fall through */ + case 447 : + if ((entire_insn & 0xfff8000f) == 0x300000) + { itype = MEPCOP1_16_INSN_CPUNPACKU_H_P0S_P1; mepcop1_16_extract_sfmt_cpadd3_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_16_INSN_X_INVALID; mepcop1_16_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 448 : /* fall through */ + case 449 : /* fall through */ + case 450 : /* fall through */ + case 451 : /* fall through */ + case 452 : /* fall through */ + case 453 : /* fall through */ + case 454 : /* fall through */ + case 455 : /* fall through */ + case 456 : /* fall through */ + case 457 : /* fall through */ + case 458 : /* fall through */ + case 459 : /* fall through */ + case 460 : /* fall through */ + case 461 : /* fall through */ + case 462 : /* fall through */ + case 463 : /* fall through */ + case 464 : /* fall through */ + case 465 : /* fall through */ + case 466 : /* fall through */ + case 467 : /* fall through */ + case 468 : /* fall through */ + case 469 : /* fall through */ + case 470 : /* fall through */ + case 471 : /* fall through */ + case 472 : /* fall through */ + case 473 : /* fall through */ + case 474 : /* fall through */ + case 475 : /* fall through */ + case 476 : /* fall through */ + case 477 : /* fall through */ + case 478 : /* fall through */ + case 479 : /* fall through */ + case 480 : /* fall through */ + case 481 : /* fall through */ + case 482 : /* fall through */ + case 483 : /* fall through */ + case 484 : /* fall through */ + case 485 : /* fall through */ + case 486 : /* fall through */ + case 487 : /* fall through */ + case 488 : /* fall through */ + case 489 : /* fall through */ + case 490 : /* fall through */ + case 491 : /* fall through */ + case 492 : /* fall through */ + case 493 : /* fall through */ + case 494 : /* fall through */ + case 495 : /* fall through */ + case 496 : /* fall through */ + case 497 : /* fall through */ + case 498 : /* fall through */ + case 499 : /* fall through */ + case 500 : /* fall through */ + case 501 : /* fall through */ + case 502 : /* fall through */ + case 503 : /* fall through */ + case 504 : /* fall through */ + case 505 : /* fall through */ + case 506 : /* fall through */ + case 507 : /* fall through */ + case 508 : /* fall through */ + case 509 : /* fall through */ + case 510 : /* fall through */ + case 511 : + if ((entire_insn & 0xfff8000f) == 0x380000) + { itype = MEPCOP1_16_INSN_CPUNPACKU_W_P0S_P1; mepcop1_16_extract_sfmt_cpadd3_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_16_INSN_X_INVALID; mepcop1_16_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 576 : /* fall through */ + case 577 : /* fall through */ + case 578 : /* fall through */ + case 579 : /* fall through */ + case 580 : /* fall through */ + case 581 : /* fall through */ + case 582 : /* fall through */ + case 583 : /* fall through */ + case 584 : /* fall through */ + case 585 : /* fall through */ + case 586 : /* fall through */ + case 587 : /* fall through */ + case 588 : /* fall through */ + case 589 : /* fall through */ + case 590 : /* fall through */ + case 591 : /* fall through */ + case 592 : /* fall through */ + case 593 : /* fall through */ + case 594 : /* fall through */ + case 595 : /* fall through */ + case 596 : /* fall through */ + case 597 : /* fall through */ + case 598 : /* fall through */ + case 599 : /* fall through */ + case 600 : /* fall through */ + case 601 : /* fall through */ + case 602 : /* fall through */ + case 603 : /* fall through */ + case 604 : /* fall through */ + case 605 : /* fall through */ + case 606 : /* fall through */ + case 607 : /* fall through */ + case 608 : /* fall through */ + case 609 : /* fall through */ + case 610 : /* fall through */ + case 611 : /* fall through */ + case 612 : /* fall through */ + case 613 : /* fall through */ + case 614 : /* fall through */ + case 615 : /* fall through */ + case 616 : /* fall through */ + case 617 : /* fall through */ + case 618 : /* fall through */ + case 619 : /* fall through */ + case 620 : /* fall through */ + case 621 : /* fall through */ + case 622 : /* fall through */ + case 623 : /* fall through */ + case 624 : /* fall through */ + case 625 : /* fall through */ + case 626 : /* fall through */ + case 627 : /* fall through */ + case 628 : /* fall through */ + case 629 : /* fall through */ + case 630 : /* fall through */ + case 631 : /* fall through */ + case 632 : /* fall through */ + case 633 : /* fall through */ + case 634 : /* fall through */ + case 635 : /* fall through */ + case 636 : /* fall through */ + case 637 : /* fall through */ + case 638 : /* fall through */ + case 639 : + if ((entire_insn & 0xfff8000f) == 0x480000) + { itype = MEPCOP1_16_INSN_CPUNPACKL_B_P0S_P1; mepcop1_16_extract_sfmt_cpadd3_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_16_INSN_X_INVALID; mepcop1_16_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 640 : /* fall through */ + case 641 : /* fall through */ + case 642 : /* fall through */ + case 643 : /* fall through */ + case 644 : /* fall through */ + case 645 : /* fall through */ + case 646 : /* fall through */ + case 647 : /* fall through */ + case 648 : /* fall through */ + case 649 : /* fall through */ + case 650 : /* fall through */ + case 651 : /* fall through */ + case 652 : /* fall through */ + case 653 : /* fall through */ + case 654 : /* fall through */ + case 655 : /* fall through */ + case 656 : /* fall through */ + case 657 : /* fall through */ + case 658 : /* fall through */ + case 659 : /* fall through */ + case 660 : /* fall through */ + case 661 : /* fall through */ + case 662 : /* fall through */ + case 663 : /* fall through */ + case 664 : /* fall through */ + case 665 : /* fall through */ + case 666 : /* fall through */ + case 667 : /* fall through */ + case 668 : /* fall through */ + case 669 : /* fall through */ + case 670 : /* fall through */ + case 671 : /* fall through */ + case 672 : /* fall through */ + case 673 : /* fall through */ + case 674 : /* fall through */ + case 675 : /* fall through */ + case 676 : /* fall through */ + case 677 : /* fall through */ + case 678 : /* fall through */ + case 679 : /* fall through */ + case 680 : /* fall through */ + case 681 : /* fall through */ + case 682 : /* fall through */ + case 683 : /* fall through */ + case 684 : /* fall through */ + case 685 : /* fall through */ + case 686 : /* fall through */ + case 687 : /* fall through */ + case 688 : /* fall through */ + case 689 : /* fall through */ + case 690 : /* fall through */ + case 691 : /* fall through */ + case 692 : /* fall through */ + case 693 : /* fall through */ + case 694 : /* fall through */ + case 695 : /* fall through */ + case 696 : /* fall through */ + case 697 : /* fall through */ + case 698 : /* fall through */ + case 699 : /* fall through */ + case 700 : /* fall through */ + case 701 : /* fall through */ + case 702 : /* fall through */ + case 703 : + if ((entire_insn & 0xfff8000f) == 0x500000) + { itype = MEPCOP1_16_INSN_CPUNPACKL_H_P0S_P1; mepcop1_16_extract_sfmt_cpadd3_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_16_INSN_X_INVALID; mepcop1_16_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 704 : /* fall through */ + case 705 : /* fall through */ + case 706 : /* fall through */ + case 707 : /* fall through */ + case 708 : /* fall through */ + case 709 : /* fall through */ + case 710 : /* fall through */ + case 711 : /* fall through */ + case 712 : /* fall through */ + case 713 : /* fall through */ + case 714 : /* fall through */ + case 715 : /* fall through */ + case 716 : /* fall through */ + case 717 : /* fall through */ + case 718 : /* fall through */ + case 719 : /* fall through */ + case 720 : /* fall through */ + case 721 : /* fall through */ + case 722 : /* fall through */ + case 723 : /* fall through */ + case 724 : /* fall through */ + case 725 : /* fall through */ + case 726 : /* fall through */ + case 727 : /* fall through */ + case 728 : /* fall through */ + case 729 : /* fall through */ + case 730 : /* fall through */ + case 731 : /* fall through */ + case 732 : /* fall through */ + case 733 : /* fall through */ + case 734 : /* fall through */ + case 735 : /* fall through */ + case 736 : /* fall through */ + case 737 : /* fall through */ + case 738 : /* fall through */ + case 739 : /* fall through */ + case 740 : /* fall through */ + case 741 : /* fall through */ + case 742 : /* fall through */ + case 743 : /* fall through */ + case 744 : /* fall through */ + case 745 : /* fall through */ + case 746 : /* fall through */ + case 747 : /* fall through */ + case 748 : /* fall through */ + case 749 : /* fall through */ + case 750 : /* fall through */ + case 751 : /* fall through */ + case 752 : /* fall through */ + case 753 : /* fall through */ + case 754 : /* fall through */ + case 755 : /* fall through */ + case 756 : /* fall through */ + case 757 : /* fall through */ + case 758 : /* fall through */ + case 759 : /* fall through */ + case 760 : /* fall through */ + case 761 : /* fall through */ + case 762 : /* fall through */ + case 763 : /* fall through */ + case 764 : /* fall through */ + case 765 : /* fall through */ + case 766 : /* fall through */ + case 767 : + if ((entire_insn & 0xfff8000f) == 0x580000) + { itype = MEPCOP1_16_INSN_CPUNPACKL_W_P0S_P1; mepcop1_16_extract_sfmt_cpadd3_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_16_INSN_X_INVALID; mepcop1_16_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 768 : /* fall through */ + case 769 : /* fall through */ + case 770 : /* fall through */ + case 771 : /* fall through */ + case 772 : /* fall through */ + case 773 : /* fall through */ + case 774 : /* fall through */ + case 775 : /* fall through */ + case 776 : /* fall through */ + case 777 : /* fall through */ + case 778 : /* fall through */ + case 779 : /* fall through */ + case 780 : /* fall through */ + case 781 : /* fall through */ + case 782 : /* fall through */ + case 783 : /* fall through */ + case 784 : /* fall through */ + case 785 : /* fall through */ + case 786 : /* fall through */ + case 787 : /* fall through */ + case 788 : /* fall through */ + case 789 : /* fall through */ + case 790 : /* fall through */ + case 791 : /* fall through */ + case 792 : /* fall through */ + case 793 : /* fall through */ + case 794 : /* fall through */ + case 795 : /* fall through */ + case 796 : /* fall through */ + case 797 : /* fall through */ + case 798 : /* fall through */ + case 799 : /* fall through */ + case 800 : /* fall through */ + case 801 : /* fall through */ + case 802 : /* fall through */ + case 803 : /* fall through */ + case 804 : /* fall through */ + case 805 : /* fall through */ + case 806 : /* fall through */ + case 807 : /* fall through */ + case 808 : /* fall through */ + case 809 : /* fall through */ + case 810 : /* fall through */ + case 811 : /* fall through */ + case 812 : /* fall through */ + case 813 : /* fall through */ + case 814 : /* fall through */ + case 815 : /* fall through */ + case 816 : /* fall through */ + case 817 : /* fall through */ + case 818 : /* fall through */ + case 819 : /* fall through */ + case 820 : /* fall through */ + case 821 : /* fall through */ + case 822 : /* fall through */ + case 823 : /* fall through */ + case 824 : /* fall through */ + case 825 : /* fall through */ + case 826 : /* fall through */ + case 827 : /* fall through */ + case 828 : /* fall through */ + case 829 : /* fall through */ + case 830 : /* fall through */ + case 831 : + if ((entire_insn & 0xfff8000f) == 0x600000) + { itype = MEPCOP1_16_INSN_CPFSFTBS0_P0S_P1; mepcop1_16_extract_sfmt_cpadd3_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_16_INSN_X_INVALID; mepcop1_16_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 832 : /* fall through */ + case 833 : /* fall through */ + case 834 : /* fall through */ + case 835 : /* fall through */ + case 836 : /* fall through */ + case 837 : /* fall through */ + case 838 : /* fall through */ + case 839 : /* fall through */ + case 840 : /* fall through */ + case 841 : /* fall through */ + case 842 : /* fall through */ + case 843 : /* fall through */ + case 844 : /* fall through */ + case 845 : /* fall through */ + case 846 : /* fall through */ + case 847 : /* fall through */ + case 848 : /* fall through */ + case 849 : /* fall through */ + case 850 : /* fall through */ + case 851 : /* fall through */ + case 852 : /* fall through */ + case 853 : /* fall through */ + case 854 : /* fall through */ + case 855 : /* fall through */ + case 856 : /* fall through */ + case 857 : /* fall through */ + case 858 : /* fall through */ + case 859 : /* fall through */ + case 860 : /* fall through */ + case 861 : /* fall through */ + case 862 : /* fall through */ + case 863 : /* fall through */ + case 864 : /* fall through */ + case 865 : /* fall through */ + case 866 : /* fall through */ + case 867 : /* fall through */ + case 868 : /* fall through */ + case 869 : /* fall through */ + case 870 : /* fall through */ + case 871 : /* fall through */ + case 872 : /* fall through */ + case 873 : /* fall through */ + case 874 : /* fall through */ + case 875 : /* fall through */ + case 876 : /* fall through */ + case 877 : /* fall through */ + case 878 : /* fall through */ + case 879 : /* fall through */ + case 880 : /* fall through */ + case 881 : /* fall through */ + case 882 : /* fall through */ + case 883 : /* fall through */ + case 884 : /* fall through */ + case 885 : /* fall through */ + case 886 : /* fall through */ + case 887 : /* fall through */ + case 888 : /* fall through */ + case 889 : /* fall through */ + case 890 : /* fall through */ + case 891 : /* fall through */ + case 892 : /* fall through */ + case 893 : /* fall through */ + case 894 : /* fall through */ + case 895 : + if ((entire_insn & 0xfff8000f) == 0x680000) + { itype = MEPCOP1_16_INSN_CPFSFTBS1_P0S_P1; mepcop1_16_extract_sfmt_cpadd3_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_16_INSN_X_INVALID; mepcop1_16_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 1024 : + { + unsigned int val = (((insn >> 10) & (15 << 0))); + switch (val) + { + case 0 : + if ((entire_insn & 0xfff83e0f) == 0x800000) + { itype = MEPCOP1_16_INSN_CPMOV_P0S_P1; mepcop1_16_extract_sfmt_cpmov_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_16_INSN_X_INVALID; mepcop1_16_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 1 : + if ((entire_insn & 0xfff83e0f) == 0x800400) + { itype = MEPCOP1_16_INSN_CPABSZ_H_P0S_P1; mepcop1_16_extract_sfmt_cpmov_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_16_INSN_X_INVALID; mepcop1_16_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 2 : + if ((entire_insn & 0xfff83e0f) == 0x800800) + { itype = MEPCOP1_16_INSN_CPLDZ_H_P0S_P1; mepcop1_16_extract_sfmt_cpmov_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_16_INSN_X_INVALID; mepcop1_16_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 3 : + if ((entire_insn & 0xfff83e0f) == 0x800c00) + { itype = MEPCOP1_16_INSN_CPNORM_H_P0S_P1; mepcop1_16_extract_sfmt_cpmov_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_16_INSN_X_INVALID; mepcop1_16_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 4 : + if ((entire_insn & 0xfff83e0f) == 0x801000) + { itype = MEPCOP1_16_INSN_CPHADDU_B_P0S_P1; mepcop1_16_extract_sfmt_cpmov_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_16_INSN_X_INVALID; mepcop1_16_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 5 : + if ((entire_insn & 0xfff83e0f) == 0x801400) + { itype = MEPCOP1_16_INSN_CPHADD_H_P0S_P1; mepcop1_16_extract_sfmt_cpmov_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_16_INSN_X_INVALID; mepcop1_16_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 6 : + if ((entire_insn & 0xfff83fff) == 0x801800) + { itype = MEPCOP1_16_INSN_CPCCADD_B_P0S_P1; mepcop1_16_extract_sfmt_cpccadd_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_16_INSN_X_INVALID; mepcop1_16_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 7 : + if ((entire_insn & 0xfff83e0f) == 0x801c00) + { itype = MEPCOP1_16_INSN_CPBCAST_H_P0S_P1; mepcop1_16_extract_sfmt_cpmov_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_16_INSN_X_INVALID; mepcop1_16_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 8 : + if ((entire_insn & 0xfff83e0f) == 0x802000) + { itype = MEPCOP1_16_INSN_CPEXTUU_B_P0S_P1; mepcop1_16_extract_sfmt_cpmov_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_16_INSN_X_INVALID; mepcop1_16_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 9 : + if ((entire_insn & 0xfff83e0f) == 0x802400) + { itype = MEPCOP1_16_INSN_CPEXTUU_H_P0S_P1; mepcop1_16_extract_sfmt_cpmov_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_16_INSN_X_INVALID; mepcop1_16_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 10 : + if ((entire_insn & 0xfff83e0f) == 0x802800) + { itype = MEPCOP1_16_INSN_CPEXTLU_B_P0S_P1; mepcop1_16_extract_sfmt_cpmov_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_16_INSN_X_INVALID; mepcop1_16_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 11 : + if ((entire_insn & 0xfff83e0f) == 0x802c00) + { itype = MEPCOP1_16_INSN_CPEXTLU_H_P0S_P1; mepcop1_16_extract_sfmt_cpmov_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_16_INSN_X_INVALID; mepcop1_16_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 12 : + if ((entire_insn & 0xfff83e0f) == 0x803000) + { itype = MEPCOP1_16_INSN_CPCASTUB_H_P0S_P1; mepcop1_16_extract_sfmt_cpmov_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_16_INSN_X_INVALID; mepcop1_16_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 13 : + if ((entire_insn & 0xfff83e0f) == 0x803400) + { itype = MEPCOP1_16_INSN_CDCASTUW_P0S_P1; mepcop1_16_extract_sfmt_cpmov_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_16_INSN_X_INVALID; mepcop1_16_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 14 : + if ((entire_insn & 0xfff83e0f) == 0x803800) + { itype = MEPCOP1_16_INSN_CPCASTUB_W_P0S_P1; mepcop1_16_extract_sfmt_cpmov_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_16_INSN_X_INVALID; mepcop1_16_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 15 : + if ((entire_insn & 0xfff83e0f) == 0x803c00) + { itype = MEPCOP1_16_INSN_CPCASTUH_W_P0S_P1; mepcop1_16_extract_sfmt_cpmov_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_16_INSN_X_INVALID; mepcop1_16_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + default : itype = MEPCOP1_16_INSN_X_INVALID; mepcop1_16_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + } + } + case 1025 : /* fall through */ + case 1026 : /* fall through */ + case 1027 : /* fall through */ + case 1028 : /* fall through */ + case 1029 : /* fall through */ + case 1030 : /* fall through */ + case 1031 : /* fall through */ + case 1032 : /* fall through */ + case 1033 : /* fall through */ + case 1034 : /* fall through */ + case 1035 : /* fall through */ + case 1036 : /* fall through */ + case 1037 : /* fall through */ + case 1038 : /* fall through */ + case 1039 : /* fall through */ + case 1040 : /* fall through */ + case 1041 : /* fall through */ + case 1042 : /* fall through */ + case 1043 : /* fall through */ + case 1044 : /* fall through */ + case 1045 : /* fall through */ + case 1046 : /* fall through */ + case 1047 : /* fall through */ + case 1048 : /* fall through */ + case 1049 : /* fall through */ + case 1050 : /* fall through */ + case 1051 : /* fall through */ + case 1052 : /* fall through */ + case 1053 : /* fall through */ + case 1054 : /* fall through */ + case 1055 : + { + unsigned int val = (((insn >> 10) & (15 << 0))); + switch (val) + { + case 0 : + if ((entire_insn & 0xfff83e0f) == 0x800000) + { itype = MEPCOP1_16_INSN_CPMOV_P0S_P1; mepcop1_16_extract_sfmt_cpmov_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_16_INSN_X_INVALID; mepcop1_16_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 1 : + if ((entire_insn & 0xfff83e0f) == 0x800400) + { itype = MEPCOP1_16_INSN_CPABSZ_H_P0S_P1; mepcop1_16_extract_sfmt_cpmov_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_16_INSN_X_INVALID; mepcop1_16_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 2 : + if ((entire_insn & 0xfff83e0f) == 0x800800) + { itype = MEPCOP1_16_INSN_CPLDZ_H_P0S_P1; mepcop1_16_extract_sfmt_cpmov_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_16_INSN_X_INVALID; mepcop1_16_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 3 : + if ((entire_insn & 0xfff83e0f) == 0x800c00) + { itype = MEPCOP1_16_INSN_CPNORM_H_P0S_P1; mepcop1_16_extract_sfmt_cpmov_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_16_INSN_X_INVALID; mepcop1_16_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 4 : + if ((entire_insn & 0xfff83e0f) == 0x801000) + { itype = MEPCOP1_16_INSN_CPHADDU_B_P0S_P1; mepcop1_16_extract_sfmt_cpmov_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_16_INSN_X_INVALID; mepcop1_16_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 5 : + if ((entire_insn & 0xfff83e0f) == 0x801400) + { itype = MEPCOP1_16_INSN_CPHADD_H_P0S_P1; mepcop1_16_extract_sfmt_cpmov_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_16_INSN_X_INVALID; mepcop1_16_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 7 : + if ((entire_insn & 0xfff83e0f) == 0x801c00) + { itype = MEPCOP1_16_INSN_CPBCAST_H_P0S_P1; mepcop1_16_extract_sfmt_cpmov_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_16_INSN_X_INVALID; mepcop1_16_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 8 : + if ((entire_insn & 0xfff83e0f) == 0x802000) + { itype = MEPCOP1_16_INSN_CPEXTUU_B_P0S_P1; mepcop1_16_extract_sfmt_cpmov_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_16_INSN_X_INVALID; mepcop1_16_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 9 : + if ((entire_insn & 0xfff83e0f) == 0x802400) + { itype = MEPCOP1_16_INSN_CPEXTUU_H_P0S_P1; mepcop1_16_extract_sfmt_cpmov_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_16_INSN_X_INVALID; mepcop1_16_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 10 : + if ((entire_insn & 0xfff83e0f) == 0x802800) + { itype = MEPCOP1_16_INSN_CPEXTLU_B_P0S_P1; mepcop1_16_extract_sfmt_cpmov_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_16_INSN_X_INVALID; mepcop1_16_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 11 : + if ((entire_insn & 0xfff83e0f) == 0x802c00) + { itype = MEPCOP1_16_INSN_CPEXTLU_H_P0S_P1; mepcop1_16_extract_sfmt_cpmov_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_16_INSN_X_INVALID; mepcop1_16_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 12 : + if ((entire_insn & 0xfff83e0f) == 0x803000) + { itype = MEPCOP1_16_INSN_CPCASTUB_H_P0S_P1; mepcop1_16_extract_sfmt_cpmov_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_16_INSN_X_INVALID; mepcop1_16_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 13 : + if ((entire_insn & 0xfff83e0f) == 0x803400) + { itype = MEPCOP1_16_INSN_CDCASTUW_P0S_P1; mepcop1_16_extract_sfmt_cpmov_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_16_INSN_X_INVALID; mepcop1_16_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 14 : + if ((entire_insn & 0xfff83e0f) == 0x803800) + { itype = MEPCOP1_16_INSN_CPCASTUB_W_P0S_P1; mepcop1_16_extract_sfmt_cpmov_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_16_INSN_X_INVALID; mepcop1_16_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 15 : + if ((entire_insn & 0xfff83e0f) == 0x803c00) + { itype = MEPCOP1_16_INSN_CPCASTUH_W_P0S_P1; mepcop1_16_extract_sfmt_cpmov_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_16_INSN_X_INVALID; mepcop1_16_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + default : itype = MEPCOP1_16_INSN_X_INVALID; mepcop1_16_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + } + } + case 1056 : /* fall through */ + case 1057 : /* fall through */ + case 1058 : /* fall through */ + case 1059 : /* fall through */ + case 1060 : /* fall through */ + case 1061 : /* fall through */ + case 1062 : /* fall through */ + case 1063 : /* fall through */ + case 1064 : /* fall through */ + case 1065 : /* fall through */ + case 1066 : /* fall through */ + case 1067 : /* fall through */ + case 1068 : /* fall through */ + case 1069 : /* fall through */ + case 1070 : /* fall through */ + case 1071 : /* fall through */ + case 1072 : /* fall through */ + case 1073 : /* fall through */ + case 1074 : /* fall through */ + case 1075 : /* fall through */ + case 1076 : /* fall through */ + case 1077 : /* fall through */ + case 1078 : /* fall through */ + case 1079 : /* fall through */ + case 1080 : /* fall through */ + case 1081 : /* fall through */ + case 1082 : /* fall through */ + case 1083 : /* fall through */ + case 1084 : /* fall through */ + case 1085 : /* fall through */ + case 1086 : /* fall through */ + case 1087 : + { + unsigned int val = (((insn >> 10) & (15 << 0))); + switch (val) + { + case 0 : + if ((entire_insn & 0xfff83e0f) == 0x800200) + { itype = MEPCOP1_16_INSN_CPABSZ_B_P0S_P1; mepcop1_16_extract_sfmt_cpmov_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_16_INSN_X_INVALID; mepcop1_16_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 1 : + if ((entire_insn & 0xfff83e0f) == 0x800600) + { itype = MEPCOP1_16_INSN_CPABSZ_W_P0S_P1; mepcop1_16_extract_sfmt_cpmov_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_16_INSN_X_INVALID; mepcop1_16_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 2 : + if ((entire_insn & 0xfff83e0f) == 0x800a00) + { itype = MEPCOP1_16_INSN_CPLDZ_W_P0S_P1; mepcop1_16_extract_sfmt_cpmov_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_16_INSN_X_INVALID; mepcop1_16_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 3 : + if ((entire_insn & 0xfff83e0f) == 0x800e00) + { itype = MEPCOP1_16_INSN_CPNORM_W_P0S_P1; mepcop1_16_extract_sfmt_cpmov_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_16_INSN_X_INVALID; mepcop1_16_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 4 : + if ((entire_insn & 0xfff83e0f) == 0x801200) + { itype = MEPCOP1_16_INSN_CPHADD_B_P0S_P1; mepcop1_16_extract_sfmt_cpmov_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_16_INSN_X_INVALID; mepcop1_16_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 5 : + if ((entire_insn & 0xfff83e0f) == 0x801600) + { itype = MEPCOP1_16_INSN_CPHADD_W_P0S_P1; mepcop1_16_extract_sfmt_cpmov_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_16_INSN_X_INVALID; mepcop1_16_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 6 : + if ((entire_insn & 0xfff83e0f) == 0x801a00) + { itype = MEPCOP1_16_INSN_CPBCAST_B_P0S_P1; mepcop1_16_extract_sfmt_cpmov_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_16_INSN_X_INVALID; mepcop1_16_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 7 : + if ((entire_insn & 0xfff83e0f) == 0x801e00) + { itype = MEPCOP1_16_INSN_CPBCAST_W_P0S_P1; mepcop1_16_extract_sfmt_cpmov_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_16_INSN_X_INVALID; mepcop1_16_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 8 : + if ((entire_insn & 0xfff83e0f) == 0x802200) + { itype = MEPCOP1_16_INSN_CPEXTU_B_P0S_P1; mepcop1_16_extract_sfmt_cpmov_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_16_INSN_X_INVALID; mepcop1_16_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 9 : + if ((entire_insn & 0xfff83e0f) == 0x802600) + { itype = MEPCOP1_16_INSN_CPEXTU_H_P0S_P1; mepcop1_16_extract_sfmt_cpmov_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_16_INSN_X_INVALID; mepcop1_16_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 10 : + if ((entire_insn & 0xfff83e0f) == 0x802a00) + { itype = MEPCOP1_16_INSN_CPEXTL_B_P0S_P1; mepcop1_16_extract_sfmt_cpmov_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_16_INSN_X_INVALID; mepcop1_16_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 11 : + if ((entire_insn & 0xfff83e0f) == 0x802e00) + { itype = MEPCOP1_16_INSN_CPEXTL_H_P0S_P1; mepcop1_16_extract_sfmt_cpmov_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_16_INSN_X_INVALID; mepcop1_16_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 12 : + if ((entire_insn & 0xfff83e0f) == 0x803200) + { itype = MEPCOP1_16_INSN_CPCASTB_H_P0S_P1; mepcop1_16_extract_sfmt_cpmov_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_16_INSN_X_INVALID; mepcop1_16_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 13 : + if ((entire_insn & 0xfff83e0f) == 0x803600) + { itype = MEPCOP1_16_INSN_CDCASTW_P0S_P1; mepcop1_16_extract_sfmt_cpmov_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_16_INSN_X_INVALID; mepcop1_16_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 14 : + if ((entire_insn & 0xfff83e0f) == 0x803a00) + { itype = MEPCOP1_16_INSN_CPCASTB_W_P0S_P1; mepcop1_16_extract_sfmt_cpmov_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_16_INSN_X_INVALID; mepcop1_16_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 15 : + if ((entire_insn & 0xfff83e0f) == 0x803e00) + { itype = MEPCOP1_16_INSN_CPCASTH_W_P0S_P1; mepcop1_16_extract_sfmt_cpmov_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_16_INSN_X_INVALID; mepcop1_16_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + default : itype = MEPCOP1_16_INSN_X_INVALID; mepcop1_16_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + } + } + case 1088 : + { + unsigned int val = (((insn >> 13) & (1 << 0))); + switch (val) + { + case 0 : + if ((entire_insn & 0xfffffe0f) == 0x880000) + { itype = MEPCOP1_16_INSN_CPMOVFRCSAR0_P0S_P1; mepcop1_16_extract_sfmt_cpmovfrcsar0_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_16_INSN_X_INVALID; mepcop1_16_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 1 : + if ((entire_insn & 0xfff83fff) == 0x882000) + { itype = MEPCOP1_16_INSN_CPMOVTOCSAR0_P0S_P1; mepcop1_16_extract_sfmt_cpmovtocsar0_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_16_INSN_X_INVALID; mepcop1_16_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + default : itype = MEPCOP1_16_INSN_X_INVALID; mepcop1_16_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + } + } + case 1089 : /* fall through */ + case 1090 : /* fall through */ + case 1091 : /* fall through */ + case 1092 : /* fall through */ + case 1093 : /* fall through */ + case 1094 : /* fall through */ + case 1095 : /* fall through */ + case 1096 : /* fall through */ + case 1097 : /* fall through */ + case 1098 : /* fall through */ + case 1099 : /* fall through */ + case 1100 : /* fall through */ + case 1101 : /* fall through */ + case 1102 : /* fall through */ + case 1103 : /* fall through */ + case 1104 : /* fall through */ + case 1105 : /* fall through */ + case 1106 : /* fall through */ + case 1107 : /* fall through */ + case 1108 : /* fall through */ + case 1109 : /* fall through */ + case 1110 : /* fall through */ + case 1111 : /* fall through */ + case 1112 : /* fall through */ + case 1113 : /* fall through */ + case 1114 : /* fall through */ + case 1115 : /* fall through */ + case 1116 : /* fall through */ + case 1117 : /* fall through */ + case 1118 : /* fall through */ + case 1119 : + if ((entire_insn & 0xfffffe0f) == 0x880000) + { itype = MEPCOP1_16_INSN_CPMOVFRCSAR0_P0S_P1; mepcop1_16_extract_sfmt_cpmovfrcsar0_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_16_INSN_X_INVALID; mepcop1_16_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 1120 : + { + unsigned int val = (((insn >> 10) & (15 << 0))); + switch (val) + { + case 0 : + if ((entire_insn & 0xfffffe0f) == 0x880200) + { itype = MEPCOP1_16_INSN_CPMOVFRCC_P0S_P1; mepcop1_16_extract_sfmt_cpmovfrcsar0_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_16_INSN_X_INVALID; mepcop1_16_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 7 : + if ((entire_insn & 0xfffffe0f) == 0x881e00) + { itype = MEPCOP1_16_INSN_CPMOVFRCSAR1_P0S_P1; mepcop1_16_extract_sfmt_cpmovfrcsar0_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_16_INSN_X_INVALID; mepcop1_16_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 8 : + if ((entire_insn & 0xfff83fff) == 0x882200) + { itype = MEPCOP1_16_INSN_CPMOVTOCC_P0S_P1; mepcop1_16_extract_sfmt_cpmovtocsar0_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_16_INSN_X_INVALID; mepcop1_16_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 15 : + if ((entire_insn & 0xfff83fff) == 0x883e00) + { itype = MEPCOP1_16_INSN_CPMOVTOCSAR1_P0S_P1; mepcop1_16_extract_sfmt_cpmovtocsar0_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_16_INSN_X_INVALID; mepcop1_16_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + default : itype = MEPCOP1_16_INSN_X_INVALID; mepcop1_16_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + } + } + case 1121 : /* fall through */ + case 1122 : /* fall through */ + case 1123 : /* fall through */ + case 1124 : /* fall through */ + case 1125 : /* fall through */ + case 1126 : /* fall through */ + case 1127 : /* fall through */ + case 1128 : /* fall through */ + case 1129 : /* fall through */ + case 1130 : /* fall through */ + case 1131 : /* fall through */ + case 1132 : /* fall through */ + case 1133 : /* fall through */ + case 1134 : /* fall through */ + case 1135 : /* fall through */ + case 1136 : /* fall through */ + case 1137 : /* fall through */ + case 1138 : /* fall through */ + case 1139 : /* fall through */ + case 1140 : /* fall through */ + case 1141 : /* fall through */ + case 1142 : /* fall through */ + case 1143 : /* fall through */ + case 1144 : /* fall through */ + case 1145 : /* fall through */ + case 1146 : /* fall through */ + case 1147 : /* fall through */ + case 1148 : /* fall through */ + case 1149 : /* fall through */ + case 1150 : /* fall through */ + case 1151 : + { + unsigned int val = (((insn >> 10) & (7 << 0))); + switch (val) + { + case 0 : + if ((entire_insn & 0xfffffe0f) == 0x880200) + { itype = MEPCOP1_16_INSN_CPMOVFRCC_P0S_P1; mepcop1_16_extract_sfmt_cpmovfrcsar0_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_16_INSN_X_INVALID; mepcop1_16_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 7 : + if ((entire_insn & 0xfffffe0f) == 0x881e00) + { itype = MEPCOP1_16_INSN_CPMOVFRCSAR1_P0S_P1; mepcop1_16_extract_sfmt_cpmovfrcsar0_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_16_INSN_X_INVALID; mepcop1_16_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + default : itype = MEPCOP1_16_INSN_X_INVALID; mepcop1_16_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + } + } + case 1152 : /* fall through */ + case 1184 : + if ((entire_insn & 0xfff801ff) == 0x900000) + { itype = MEPCOP1_16_INSN_CPCMPEQZ_B_P0S_P1; mepcop1_16_extract_sfmt_cpcmpeqz_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_16_INSN_X_INVALID; mepcop1_16_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 1153 : /* fall through */ + case 1185 : + if ((entire_insn & 0xfff801ff) == 0x900010) + { itype = MEPCOP1_16_INSN_CPCMPEQ_B_P0S_P1; mepcop1_16_extract_sfmt_cpcmpeqz_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_16_INSN_X_INVALID; mepcop1_16_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 1155 : /* fall through */ + case 1187 : + if ((entire_insn & 0xfff801ff) == 0x900030) + { itype = MEPCOP1_16_INSN_CPCMPEQ_H_P0S_P1; mepcop1_16_extract_sfmt_cpcmpeqz_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_16_INSN_X_INVALID; mepcop1_16_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 1157 : /* fall through */ + case 1189 : + if ((entire_insn & 0xfff801ff) == 0x900050) + { itype = MEPCOP1_16_INSN_CPCMPEQ_W_P0S_P1; mepcop1_16_extract_sfmt_cpcmpeqz_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_16_INSN_X_INVALID; mepcop1_16_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 1161 : /* fall through */ + case 1193 : + if ((entire_insn & 0xfff801ff) == 0x900090) + { itype = MEPCOP1_16_INSN_CPCMPNE_B_P0S_P1; mepcop1_16_extract_sfmt_cpcmpeqz_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_16_INSN_X_INVALID; mepcop1_16_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 1163 : /* fall through */ + case 1195 : + if ((entire_insn & 0xfff801ff) == 0x9000b0) + { itype = MEPCOP1_16_INSN_CPCMPNE_H_P0S_P1; mepcop1_16_extract_sfmt_cpcmpeqz_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_16_INSN_X_INVALID; mepcop1_16_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 1165 : /* fall through */ + case 1197 : + if ((entire_insn & 0xfff801ff) == 0x9000d0) + { itype = MEPCOP1_16_INSN_CPCMPNE_W_P0S_P1; mepcop1_16_extract_sfmt_cpcmpeqz_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_16_INSN_X_INVALID; mepcop1_16_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 1168 : /* fall through */ + case 1200 : + if ((entire_insn & 0xfff801ff) == 0x900100) + { itype = MEPCOP1_16_INSN_CPCMPGTU_B_P0S_P1; mepcop1_16_extract_sfmt_cpcmpeqz_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_16_INSN_X_INVALID; mepcop1_16_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 1169 : /* fall through */ + case 1201 : + if ((entire_insn & 0xfff801ff) == 0x900110) + { itype = MEPCOP1_16_INSN_CPCMPGT_B_P0S_P1; mepcop1_16_extract_sfmt_cpcmpeqz_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_16_INSN_X_INVALID; mepcop1_16_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 1171 : /* fall through */ + case 1203 : + if ((entire_insn & 0xfff801ff) == 0x900130) + { itype = MEPCOP1_16_INSN_CPCMPGT_H_P0S_P1; mepcop1_16_extract_sfmt_cpcmpeqz_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_16_INSN_X_INVALID; mepcop1_16_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 1172 : /* fall through */ + case 1204 : + if ((entire_insn & 0xfff801ff) == 0x900140) + { itype = MEPCOP1_16_INSN_CPCMPGTU_W_P0S_P1; mepcop1_16_extract_sfmt_cpcmpeqz_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_16_INSN_X_INVALID; mepcop1_16_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 1173 : /* fall through */ + case 1205 : + if ((entire_insn & 0xfff801ff) == 0x900150) + { itype = MEPCOP1_16_INSN_CPCMPGT_W_P0S_P1; mepcop1_16_extract_sfmt_cpcmpeqz_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_16_INSN_X_INVALID; mepcop1_16_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 1176 : /* fall through */ + case 1208 : + if ((entire_insn & 0xfff801ff) == 0x900180) + { itype = MEPCOP1_16_INSN_CPCMPGEU_B_P0S_P1; mepcop1_16_extract_sfmt_cpcmpeqz_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_16_INSN_X_INVALID; mepcop1_16_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 1177 : /* fall through */ + case 1209 : + if ((entire_insn & 0xfff801ff) == 0x900190) + { itype = MEPCOP1_16_INSN_CPCMPGE_B_P0S_P1; mepcop1_16_extract_sfmt_cpcmpeqz_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_16_INSN_X_INVALID; mepcop1_16_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 1179 : /* fall through */ + case 1211 : + if ((entire_insn & 0xfff801ff) == 0x9001b0) + { itype = MEPCOP1_16_INSN_CPCMPGE_H_P0S_P1; mepcop1_16_extract_sfmt_cpcmpeqz_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_16_INSN_X_INVALID; mepcop1_16_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 1180 : /* fall through */ + case 1212 : + if ((entire_insn & 0xfff801ff) == 0x9001c0) + { itype = MEPCOP1_16_INSN_CPCMPGEU_W_P0S_P1; mepcop1_16_extract_sfmt_cpcmpeqz_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_16_INSN_X_INVALID; mepcop1_16_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 1181 : /* fall through */ + case 1213 : + if ((entire_insn & 0xfff801ff) == 0x9001d0) + { itype = MEPCOP1_16_INSN_CPCMPGE_W_P0S_P1; mepcop1_16_extract_sfmt_cpcmpeqz_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_16_INSN_X_INVALID; mepcop1_16_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 1536 : /* fall through */ + case 1568 : + if ((entire_insn & 0xfff801ff) == 0xc00000) + { itype = MEPCOP1_16_INSN_CPADDA0U_B_P0S; mepcop1_16_extract_sfmt_cpcmpeqz_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_16_INSN_X_INVALID; mepcop1_16_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 1537 : /* fall through */ + case 1569 : + if ((entire_insn & 0xfff801ff) == 0xc00010) + { itype = MEPCOP1_16_INSN_CPADDA0_B_P0S; mepcop1_16_extract_sfmt_cpcmpeqz_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_16_INSN_X_INVALID; mepcop1_16_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 1538 : /* fall through */ + case 1570 : + if ((entire_insn & 0xfff801ff) == 0xc00020) + { itype = MEPCOP1_16_INSN_CPADDUA0_H_P0S; mepcop1_16_extract_sfmt_cpcmpeqz_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_16_INSN_X_INVALID; mepcop1_16_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 1539 : /* fall through */ + case 1571 : + if ((entire_insn & 0xfff801ff) == 0xc00030) + { itype = MEPCOP1_16_INSN_CPADDLA0_H_P0S; mepcop1_16_extract_sfmt_cpcmpeqz_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_16_INSN_X_INVALID; mepcop1_16_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 1540 : /* fall through */ + case 1572 : + if ((entire_insn & 0xfff801ff) == 0xc00040) + { itype = MEPCOP1_16_INSN_CPADDACA0U_B_P0S; mepcop1_16_extract_sfmt_cpcmpeqz_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_16_INSN_X_INVALID; mepcop1_16_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 1541 : /* fall through */ + case 1573 : + if ((entire_insn & 0xfff801ff) == 0xc00050) + { itype = MEPCOP1_16_INSN_CPADDACA0_B_P0S; mepcop1_16_extract_sfmt_cpcmpeqz_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_16_INSN_X_INVALID; mepcop1_16_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 1542 : /* fall through */ + case 1574 : + if ((entire_insn & 0xfff801ff) == 0xc00060) + { itype = MEPCOP1_16_INSN_CPADDACUA0_H_P0S; mepcop1_16_extract_sfmt_cpcmpeqz_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_16_INSN_X_INVALID; mepcop1_16_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 1543 : /* fall through */ + case 1575 : + if ((entire_insn & 0xfff801ff) == 0xc00070) + { itype = MEPCOP1_16_INSN_CPADDACLA0_H_P0S; mepcop1_16_extract_sfmt_cpcmpeqz_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_16_INSN_X_INVALID; mepcop1_16_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 1544 : /* fall through */ + case 1576 : + if ((entire_insn & 0xfff801ff) == 0xc00080) + { itype = MEPCOP1_16_INSN_CPSUBA0U_B_P0S; mepcop1_16_extract_sfmt_cpcmpeqz_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_16_INSN_X_INVALID; mepcop1_16_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 1545 : /* fall through */ + case 1577 : + if ((entire_insn & 0xfff801ff) == 0xc00090) + { itype = MEPCOP1_16_INSN_CPSUBA0_B_P0S; mepcop1_16_extract_sfmt_cpcmpeqz_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_16_INSN_X_INVALID; mepcop1_16_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 1546 : /* fall through */ + case 1578 : + if ((entire_insn & 0xfff801ff) == 0xc000a0) + { itype = MEPCOP1_16_INSN_CPSUBUA0_H_P0S; mepcop1_16_extract_sfmt_cpcmpeqz_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_16_INSN_X_INVALID; mepcop1_16_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 1547 : /* fall through */ + case 1579 : + if ((entire_insn & 0xfff801ff) == 0xc000b0) + { itype = MEPCOP1_16_INSN_CPSUBLA0_H_P0S; mepcop1_16_extract_sfmt_cpcmpeqz_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_16_INSN_X_INVALID; mepcop1_16_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 1548 : /* fall through */ + case 1580 : + if ((entire_insn & 0xfff801ff) == 0xc000c0) + { itype = MEPCOP1_16_INSN_CPSUBACA0U_B_P0S; mepcop1_16_extract_sfmt_cpcmpeqz_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_16_INSN_X_INVALID; mepcop1_16_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 1549 : /* fall through */ + case 1581 : + if ((entire_insn & 0xfff801ff) == 0xc000d0) + { itype = MEPCOP1_16_INSN_CPSUBACA0_B_P0S; mepcop1_16_extract_sfmt_cpcmpeqz_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_16_INSN_X_INVALID; mepcop1_16_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 1550 : /* fall through */ + case 1582 : + if ((entire_insn & 0xfff801ff) == 0xc000e0) + { itype = MEPCOP1_16_INSN_CPSUBACUA0_H_P0S; mepcop1_16_extract_sfmt_cpcmpeqz_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_16_INSN_X_INVALID; mepcop1_16_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 1551 : /* fall through */ + case 1583 : + if ((entire_insn & 0xfff801ff) == 0xc000f0) + { itype = MEPCOP1_16_INSN_CPSUBACLA0_H_P0S; mepcop1_16_extract_sfmt_cpcmpeqz_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_16_INSN_X_INVALID; mepcop1_16_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 1552 : /* fall through */ + case 1584 : + if ((entire_insn & 0xfff801ff) == 0xc00100) + { itype = MEPCOP1_16_INSN_CPABSA0U_B_P0S; mepcop1_16_extract_sfmt_cpcmpeqz_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_16_INSN_X_INVALID; mepcop1_16_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 1553 : /* fall through */ + case 1585 : + if ((entire_insn & 0xfff801ff) == 0xc00110) + { itype = MEPCOP1_16_INSN_CPABSA0_B_P0S; mepcop1_16_extract_sfmt_cpcmpeqz_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_16_INSN_X_INVALID; mepcop1_16_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 1554 : /* fall through */ + case 1586 : + if ((entire_insn & 0xfff801ff) == 0xc00120) + { itype = MEPCOP1_16_INSN_CPABSUA0_H_P0S; mepcop1_16_extract_sfmt_cpcmpeqz_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_16_INSN_X_INVALID; mepcop1_16_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 1555 : /* fall through */ + case 1587 : + if ((entire_insn & 0xfff801ff) == 0xc00130) + { itype = MEPCOP1_16_INSN_CPABSLA0_H_P0S; mepcop1_16_extract_sfmt_cpcmpeqz_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_16_INSN_X_INVALID; mepcop1_16_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 1556 : /* fall through */ + case 1588 : + if ((entire_insn & 0xfff801ff) == 0xc00140) + { itype = MEPCOP1_16_INSN_CPSADA0U_B_P0S; mepcop1_16_extract_sfmt_cpcmpeqz_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_16_INSN_X_INVALID; mepcop1_16_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 1557 : /* fall through */ + case 1589 : + if ((entire_insn & 0xfff801ff) == 0xc00150) + { itype = MEPCOP1_16_INSN_CPSADA0_B_P0S; mepcop1_16_extract_sfmt_cpcmpeqz_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_16_INSN_X_INVALID; mepcop1_16_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 1558 : /* fall through */ + case 1590 : + if ((entire_insn & 0xfff801ff) == 0xc00160) + { itype = MEPCOP1_16_INSN_CPSADUA0_H_P0S; mepcop1_16_extract_sfmt_cpcmpeqz_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_16_INSN_X_INVALID; mepcop1_16_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 1559 : /* fall through */ + case 1591 : + if ((entire_insn & 0xfff801ff) == 0xc00170) + { itype = MEPCOP1_16_INSN_CPSADLA0_H_P0S; mepcop1_16_extract_sfmt_cpcmpeqz_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_16_INSN_X_INVALID; mepcop1_16_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 1563 : /* fall through */ + case 1595 : + if ((entire_insn & 0xfff801ff) == 0xc001b0) + { itype = MEPCOP1_16_INSN_CPSETA0_H_P0S; mepcop1_16_extract_sfmt_cpcmpeqz_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_16_INSN_X_INVALID; mepcop1_16_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 1564 : /* fall through */ + case 1596 : + if ((entire_insn & 0xfff801ff) == 0xc001c0) + { itype = MEPCOP1_16_INSN_CPSETUA0_W_P0S; mepcop1_16_extract_sfmt_cpcmpeqz_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_16_INSN_X_INVALID; mepcop1_16_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 1565 : /* fall through */ + case 1597 : + if ((entire_insn & 0xfff801ff) == 0xc001d0) + { itype = MEPCOP1_16_INSN_CPSETLA0_W_P0S; mepcop1_16_extract_sfmt_cpcmpeqz_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_16_INSN_X_INVALID; mepcop1_16_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 1600 : + { + unsigned int val = (((insn >> 10) & (15 << 0))); + switch (val) + { + case 1 : + if ((entire_insn & 0xfffffe0f) == 0xc80400) + { itype = MEPCOP1_16_INSN_CPMOVUA0_H_P0S; mepcop1_16_extract_sfmt_cpmovfrcsar0_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_16_INSN_X_INVALID; mepcop1_16_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 2 : + if ((entire_insn & 0xfffffe0f) == 0xc80800) + { itype = MEPCOP1_16_INSN_CPMOVUUA0_W_P0S; mepcop1_16_extract_sfmt_cpmovfrcsar0_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_16_INSN_X_INVALID; mepcop1_16_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 3 : + if ((entire_insn & 0xfffffe0f) == 0xc80c00) + { itype = MEPCOP1_16_INSN_CPMOVLUA0_W_P0S; mepcop1_16_extract_sfmt_cpmovfrcsar0_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_16_INSN_X_INVALID; mepcop1_16_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 4 : + if ((entire_insn & 0xfffffe0f) == 0xc81000) + { itype = MEPCOP1_16_INSN_CPPACKA0U_B_P0S; mepcop1_16_extract_sfmt_cpmovfrcsar0_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_16_INSN_X_INVALID; mepcop1_16_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 5 : + if ((entire_insn & 0xfffffe0f) == 0xc81400) + { itype = MEPCOP1_16_INSN_CPPACKUA0_H_P0S; mepcop1_16_extract_sfmt_cpmovfrcsar0_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_16_INSN_X_INVALID; mepcop1_16_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 6 : + if ((entire_insn & 0xfffffe0f) == 0xc81800) + { itype = MEPCOP1_16_INSN_CPPACKUA0_W_P0S; mepcop1_16_extract_sfmt_cpmovfrcsar0_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_16_INSN_X_INVALID; mepcop1_16_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 7 : + if ((entire_insn & 0xfffffe0f) == 0xc81c00) + { itype = MEPCOP1_16_INSN_CPMOVHUA0_W_P0S; mepcop1_16_extract_sfmt_cpmovfrcsar0_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_16_INSN_X_INVALID; mepcop1_16_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 8 : + if ((entire_insn & 0xffffffff) == 0xc82000) + { itype = MEPCOP1_16_INSN_CPACSUMA0_P0S; mepcop1_16_extract_sfmt_c0nop_P0_P0S (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_16_INSN_X_INVALID; mepcop1_16_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 12 : + if ((entire_insn & 0xfff83fff) == 0xc83000) + { itype = MEPCOP1_16_INSN_CPSRLA0_P0S; mepcop1_16_extract_sfmt_cpmovtocsar0_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_16_INSN_X_INVALID; mepcop1_16_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 13 : + if ((entire_insn & 0xfff83fff) == 0xc83400) + { itype = MEPCOP1_16_INSN_CPSLLA0_P0S; mepcop1_16_extract_sfmt_cpmovtocsar0_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_16_INSN_X_INVALID; mepcop1_16_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 14 : + if ((entire_insn & 0xfffffe0f) == 0xc83800) + { itype = MEPCOP1_16_INSN_CPSRLIA0_P0S; mepcop1_16_extract_sfmt_cpsrlia0_P0S (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_16_INSN_X_INVALID; mepcop1_16_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 15 : + if ((entire_insn & 0xfffffe0f) == 0xc83c00) + { itype = MEPCOP1_16_INSN_CPSLLIA0_P0S; mepcop1_16_extract_sfmt_cpsrlia0_P0S (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_16_INSN_X_INVALID; mepcop1_16_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + default : itype = MEPCOP1_16_INSN_X_INVALID; mepcop1_16_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + } + } + case 1601 : /* fall through */ + case 1602 : /* fall through */ + case 1603 : /* fall through */ + case 1604 : /* fall through */ + case 1605 : /* fall through */ + case 1606 : /* fall through */ + case 1607 : /* fall through */ + case 1608 : /* fall through */ + case 1609 : /* fall through */ + case 1610 : /* fall through */ + case 1611 : /* fall through */ + case 1612 : /* fall through */ + case 1613 : /* fall through */ + case 1614 : /* fall through */ + case 1615 : /* fall through */ + case 1616 : /* fall through */ + case 1617 : /* fall through */ + case 1618 : /* fall through */ + case 1619 : /* fall through */ + case 1620 : /* fall through */ + case 1621 : /* fall through */ + case 1622 : /* fall through */ + case 1623 : /* fall through */ + case 1624 : /* fall through */ + case 1625 : /* fall through */ + case 1626 : /* fall through */ + case 1627 : /* fall through */ + case 1628 : /* fall through */ + case 1629 : /* fall through */ + case 1630 : /* fall through */ + case 1631 : + { + unsigned int val = (((insn >> 10) & (15 << 0))); + switch (val) + { + case 1 : + if ((entire_insn & 0xfffffe0f) == 0xc80400) + { itype = MEPCOP1_16_INSN_CPMOVUA0_H_P0S; mepcop1_16_extract_sfmt_cpmovfrcsar0_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_16_INSN_X_INVALID; mepcop1_16_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 2 : + if ((entire_insn & 0xfffffe0f) == 0xc80800) + { itype = MEPCOP1_16_INSN_CPMOVUUA0_W_P0S; mepcop1_16_extract_sfmt_cpmovfrcsar0_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_16_INSN_X_INVALID; mepcop1_16_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 3 : + if ((entire_insn & 0xfffffe0f) == 0xc80c00) + { itype = MEPCOP1_16_INSN_CPMOVLUA0_W_P0S; mepcop1_16_extract_sfmt_cpmovfrcsar0_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_16_INSN_X_INVALID; mepcop1_16_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 4 : + if ((entire_insn & 0xfffffe0f) == 0xc81000) + { itype = MEPCOP1_16_INSN_CPPACKA0U_B_P0S; mepcop1_16_extract_sfmt_cpmovfrcsar0_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_16_INSN_X_INVALID; mepcop1_16_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 5 : + if ((entire_insn & 0xfffffe0f) == 0xc81400) + { itype = MEPCOP1_16_INSN_CPPACKUA0_H_P0S; mepcop1_16_extract_sfmt_cpmovfrcsar0_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_16_INSN_X_INVALID; mepcop1_16_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 6 : + if ((entire_insn & 0xfffffe0f) == 0xc81800) + { itype = MEPCOP1_16_INSN_CPPACKUA0_W_P0S; mepcop1_16_extract_sfmt_cpmovfrcsar0_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_16_INSN_X_INVALID; mepcop1_16_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 7 : + if ((entire_insn & 0xfffffe0f) == 0xc81c00) + { itype = MEPCOP1_16_INSN_CPMOVHUA0_W_P0S; mepcop1_16_extract_sfmt_cpmovfrcsar0_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_16_INSN_X_INVALID; mepcop1_16_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 14 : + if ((entire_insn & 0xfffffe0f) == 0xc83800) + { itype = MEPCOP1_16_INSN_CPSRLIA0_P0S; mepcop1_16_extract_sfmt_cpsrlia0_P0S (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_16_INSN_X_INVALID; mepcop1_16_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 15 : + if ((entire_insn & 0xfffffe0f) == 0xc83c00) + { itype = MEPCOP1_16_INSN_CPSLLIA0_P0S; mepcop1_16_extract_sfmt_cpsrlia0_P0S (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_16_INSN_X_INVALID; mepcop1_16_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + default : itype = MEPCOP1_16_INSN_X_INVALID; mepcop1_16_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + } + } + case 1632 : + { + unsigned int val = (((insn >> 10) & (15 << 0))); + switch (val) + { + case 0 : + if ((entire_insn & 0xfffffe0f) == 0xc80200) + { itype = MEPCOP1_16_INSN_CPMOVA0_B_P0S; mepcop1_16_extract_sfmt_cpmovfrcsar0_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_16_INSN_X_INVALID; mepcop1_16_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 1 : + if ((entire_insn & 0xfffffe0f) == 0xc80600) + { itype = MEPCOP1_16_INSN_CPMOVLA0_H_P0S; mepcop1_16_extract_sfmt_cpmovfrcsar0_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_16_INSN_X_INVALID; mepcop1_16_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 2 : + if ((entire_insn & 0xfffffe0f) == 0xc80a00) + { itype = MEPCOP1_16_INSN_CPMOVULA0_W_P0S; mepcop1_16_extract_sfmt_cpmovfrcsar0_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_16_INSN_X_INVALID; mepcop1_16_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 3 : + if ((entire_insn & 0xfffffe0f) == 0xc80e00) + { itype = MEPCOP1_16_INSN_CPMOVLLA0_W_P0S; mepcop1_16_extract_sfmt_cpmovfrcsar0_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_16_INSN_X_INVALID; mepcop1_16_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 4 : + if ((entire_insn & 0xfffffe0f) == 0xc81200) + { itype = MEPCOP1_16_INSN_CPPACKA0_B_P0S; mepcop1_16_extract_sfmt_cpmovfrcsar0_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_16_INSN_X_INVALID; mepcop1_16_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 5 : + if ((entire_insn & 0xfffffe0f) == 0xc81600) + { itype = MEPCOP1_16_INSN_CPPACKLA0_H_P0S; mepcop1_16_extract_sfmt_cpmovfrcsar0_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_16_INSN_X_INVALID; mepcop1_16_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 6 : + if ((entire_insn & 0xfffffe0f) == 0xc81a00) + { itype = MEPCOP1_16_INSN_CPPACKLA0_W_P0S; mepcop1_16_extract_sfmt_cpmovfrcsar0_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_16_INSN_X_INVALID; mepcop1_16_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 7 : + if ((entire_insn & 0xfffffe0f) == 0xc81e00) + { itype = MEPCOP1_16_INSN_CPMOVHLA0_W_P0S; mepcop1_16_extract_sfmt_cpmovfrcsar0_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_16_INSN_X_INVALID; mepcop1_16_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 8 : + if ((entire_insn & 0xffffffff) == 0xc82200) + { itype = MEPCOP1_16_INSN_CPACCPA0_P0S; mepcop1_16_extract_sfmt_c0nop_P0_P0S (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_16_INSN_X_INVALID; mepcop1_16_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 12 : + if ((entire_insn & 0xfff83fff) == 0xc83200) + { itype = MEPCOP1_16_INSN_CPSRAA0_P0S; mepcop1_16_extract_sfmt_cpmovtocsar0_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_16_INSN_X_INVALID; mepcop1_16_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 14 : + if ((entire_insn & 0xfffffe0f) == 0xc83a00) + { itype = MEPCOP1_16_INSN_CPSRAIA0_P0S; mepcop1_16_extract_sfmt_cpsrlia0_P0S (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_16_INSN_X_INVALID; mepcop1_16_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + default : itype = MEPCOP1_16_INSN_X_INVALID; mepcop1_16_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + } + } + case 1633 : /* fall through */ + case 1634 : /* fall through */ + case 1635 : /* fall through */ + case 1636 : /* fall through */ + case 1637 : /* fall through */ + case 1638 : /* fall through */ + case 1639 : /* fall through */ + case 1640 : /* fall through */ + case 1641 : /* fall through */ + case 1642 : /* fall through */ + case 1643 : /* fall through */ + case 1644 : /* fall through */ + case 1645 : /* fall through */ + case 1646 : /* fall through */ + case 1647 : /* fall through */ + case 1648 : /* fall through */ + case 1649 : /* fall through */ + case 1650 : /* fall through */ + case 1651 : /* fall through */ + case 1652 : /* fall through */ + case 1653 : /* fall through */ + case 1654 : /* fall through */ + case 1655 : /* fall through */ + case 1656 : /* fall through */ + case 1657 : /* fall through */ + case 1658 : /* fall through */ + case 1659 : /* fall through */ + case 1660 : /* fall through */ + case 1661 : /* fall through */ + case 1662 : /* fall through */ + case 1663 : + { + unsigned int val = (((insn >> 10) & (15 << 0))); + switch (val) + { + case 0 : + if ((entire_insn & 0xfffffe0f) == 0xc80200) + { itype = MEPCOP1_16_INSN_CPMOVA0_B_P0S; mepcop1_16_extract_sfmt_cpmovfrcsar0_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_16_INSN_X_INVALID; mepcop1_16_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 1 : + if ((entire_insn & 0xfffffe0f) == 0xc80600) + { itype = MEPCOP1_16_INSN_CPMOVLA0_H_P0S; mepcop1_16_extract_sfmt_cpmovfrcsar0_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_16_INSN_X_INVALID; mepcop1_16_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 2 : + if ((entire_insn & 0xfffffe0f) == 0xc80a00) + { itype = MEPCOP1_16_INSN_CPMOVULA0_W_P0S; mepcop1_16_extract_sfmt_cpmovfrcsar0_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_16_INSN_X_INVALID; mepcop1_16_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 3 : + if ((entire_insn & 0xfffffe0f) == 0xc80e00) + { itype = MEPCOP1_16_INSN_CPMOVLLA0_W_P0S; mepcop1_16_extract_sfmt_cpmovfrcsar0_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_16_INSN_X_INVALID; mepcop1_16_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 4 : + if ((entire_insn & 0xfffffe0f) == 0xc81200) + { itype = MEPCOP1_16_INSN_CPPACKA0_B_P0S; mepcop1_16_extract_sfmt_cpmovfrcsar0_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_16_INSN_X_INVALID; mepcop1_16_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 5 : + if ((entire_insn & 0xfffffe0f) == 0xc81600) + { itype = MEPCOP1_16_INSN_CPPACKLA0_H_P0S; mepcop1_16_extract_sfmt_cpmovfrcsar0_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_16_INSN_X_INVALID; mepcop1_16_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 6 : + if ((entire_insn & 0xfffffe0f) == 0xc81a00) + { itype = MEPCOP1_16_INSN_CPPACKLA0_W_P0S; mepcop1_16_extract_sfmt_cpmovfrcsar0_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_16_INSN_X_INVALID; mepcop1_16_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 7 : + if ((entire_insn & 0xfffffe0f) == 0xc81e00) + { itype = MEPCOP1_16_INSN_CPMOVHLA0_W_P0S; mepcop1_16_extract_sfmt_cpmovfrcsar0_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_16_INSN_X_INVALID; mepcop1_16_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 14 : + if ((entire_insn & 0xfffffe0f) == 0xc83a00) + { itype = MEPCOP1_16_INSN_CPSRAIA0_P0S; mepcop1_16_extract_sfmt_cpsrlia0_P0S (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_16_INSN_X_INVALID; mepcop1_16_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + default : itype = MEPCOP1_16_INSN_X_INVALID; mepcop1_16_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + } + } + case 1984 : /* fall through */ + case 2016 : + if ((entire_insn & 0xfff801ff) == 0xf80000) + { itype = MEPCOP1_16_INSN_CPFSFTBA0S0U_B_P0S; mepcop1_16_extract_sfmt_cpcmpeqz_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_16_INSN_X_INVALID; mepcop1_16_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 1985 : /* fall through */ + case 2017 : + if ((entire_insn & 0xfff801ff) == 0xf80010) + { itype = MEPCOP1_16_INSN_CPFSFTBA0S0_B_P0S; mepcop1_16_extract_sfmt_cpcmpeqz_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_16_INSN_X_INVALID; mepcop1_16_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 1986 : /* fall through */ + case 2018 : + if ((entire_insn & 0xfff801ff) == 0xf80020) + { itype = MEPCOP1_16_INSN_CPFSFTBUA0S0_H_P0S; mepcop1_16_extract_sfmt_cpcmpeqz_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_16_INSN_X_INVALID; mepcop1_16_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 1987 : /* fall through */ + case 2019 : + if ((entire_insn & 0xfff801ff) == 0xf80030) + { itype = MEPCOP1_16_INSN_CPFSFTBLA0S0_H_P0S; mepcop1_16_extract_sfmt_cpcmpeqz_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_16_INSN_X_INVALID; mepcop1_16_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 1988 : /* fall through */ + case 2020 : + if ((entire_insn & 0xfff801ff) == 0xf80040) + { itype = MEPCOP1_16_INSN_CPFACA0S0U_B_P0S; mepcop1_16_extract_sfmt_cpcmpeqz_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_16_INSN_X_INVALID; mepcop1_16_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 1989 : /* fall through */ + case 2021 : + if ((entire_insn & 0xfff801ff) == 0xf80050) + { itype = MEPCOP1_16_INSN_CPFACA0S0_B_P0S; mepcop1_16_extract_sfmt_cpcmpeqz_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_16_INSN_X_INVALID; mepcop1_16_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 1990 : /* fall through */ + case 2022 : + if ((entire_insn & 0xfff801ff) == 0xf80060) + { itype = MEPCOP1_16_INSN_CPFACUA0S0_H_P0S; mepcop1_16_extract_sfmt_cpcmpeqz_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_16_INSN_X_INVALID; mepcop1_16_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 1991 : /* fall through */ + case 2023 : + if ((entire_insn & 0xfff801ff) == 0xf80070) + { itype = MEPCOP1_16_INSN_CPFACLA0S0_H_P0S; mepcop1_16_extract_sfmt_cpcmpeqz_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_16_INSN_X_INVALID; mepcop1_16_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 1992 : /* fall through */ + case 2024 : + if ((entire_insn & 0xfff801ff) == 0xf80080) + { itype = MEPCOP1_16_INSN_CPFSFTBA0S1U_B_P0S; mepcop1_16_extract_sfmt_cpcmpeqz_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_16_INSN_X_INVALID; mepcop1_16_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 1993 : /* fall through */ + case 2025 : + if ((entire_insn & 0xfff801ff) == 0xf80090) + { itype = MEPCOP1_16_INSN_CPFSFTBA0S1_B_P0S; mepcop1_16_extract_sfmt_cpcmpeqz_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_16_INSN_X_INVALID; mepcop1_16_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 1994 : /* fall through */ + case 2026 : + if ((entire_insn & 0xfff801ff) == 0xf800a0) + { itype = MEPCOP1_16_INSN_CPFSFTBUA0S1_H_P0S; mepcop1_16_extract_sfmt_cpcmpeqz_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_16_INSN_X_INVALID; mepcop1_16_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 1995 : /* fall through */ + case 2027 : + if ((entire_insn & 0xfff801ff) == 0xf800b0) + { itype = MEPCOP1_16_INSN_CPFSFTBLA0S1_H_P0S; mepcop1_16_extract_sfmt_cpcmpeqz_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_16_INSN_X_INVALID; mepcop1_16_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 1996 : /* fall through */ + case 2028 : + if ((entire_insn & 0xfff801ff) == 0xf800c0) + { itype = MEPCOP1_16_INSN_CPFACA0S1U_B_P0S; mepcop1_16_extract_sfmt_cpcmpeqz_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_16_INSN_X_INVALID; mepcop1_16_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 1997 : /* fall through */ + case 2029 : + if ((entire_insn & 0xfff801ff) == 0xf800d0) + { itype = MEPCOP1_16_INSN_CPFACA0S1_B_P0S; mepcop1_16_extract_sfmt_cpcmpeqz_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_16_INSN_X_INVALID; mepcop1_16_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 1998 : /* fall through */ + case 2030 : + if ((entire_insn & 0xfff801ff) == 0xf800e0) + { itype = MEPCOP1_16_INSN_CPFACUA0S1_H_P0S; mepcop1_16_extract_sfmt_cpcmpeqz_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_16_INSN_X_INVALID; mepcop1_16_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 1999 : /* fall through */ + case 2031 : + if ((entire_insn & 0xfff801ff) == 0xf800f0) + { itype = MEPCOP1_16_INSN_CPFACLA0S1_H_P0S; mepcop1_16_extract_sfmt_cpcmpeqz_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_16_INSN_X_INVALID; mepcop1_16_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + default : itype = MEPCOP1_16_INSN_X_INVALID; mepcop1_16_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + } + } + + } + + /* The instruction has been decoded and fields extracted. */ + done: + + this->addr = pc; + // FIXME: To be redone (to handle ISA variants). + this->idesc = & mepcop1_16_idesc::idesc_table[itype]; + // ??? record semantic handler? + assert(this->idesc->sem_index == itype); +} + +void +mepcop1_16_extract_sfmt_empty (mepcop1_16_scache* abuf, mep_ext1_cpu* current_cpu, PCADDR pc, mepcop1_16_insn_word base_insn, mepcop1_16_insn_word entire_insn){ + mepcop1_16_insn_word insn = entire_insn; +#define FLD(f) abuf->fields.fmt_empty.f + + + /* Record the fields for the semantic handler. */ + if (UNLIKELY(current_cpu->trace_extract_p)) + { + current_cpu->trace_stream + << "0x" << hex << pc << dec << " (sfmt_empty)\t" + << endl; + } + +#undef FLD +} + +void +mepcop1_16_extract_sfmt_c0nop_P0_P0S (mepcop1_16_scache* abuf, mep_ext1_cpu* current_cpu, PCADDR pc, mepcop1_16_insn_word base_insn, mepcop1_16_insn_word entire_insn){ + mepcop1_16_insn_word insn = entire_insn; +#define FLD(f) abuf->fields.fmt_empty.f + + + /* Record the fields for the semantic handler. */ + if (UNLIKELY(current_cpu->trace_extract_p)) + { + current_cpu->trace_stream + << "0x" << hex << pc << dec << " (sfmt_c0nop_P0_P0S)\t" + << endl; + } + + /* Record the fields for profiling. */ + if (UNLIKELY (current_cpu->trace_counter_p || current_cpu->final_insn_count_p)) + { + } +#undef FLD +} + +void +mepcop1_16_extract_sfmt_cpadd3_b_P0S_P1 (mepcop1_16_scache* abuf, mep_ext1_cpu* current_cpu, PCADDR pc, mepcop1_16_insn_word base_insn, mepcop1_16_insn_word entire_insn){ + mepcop1_16_insn_word insn = entire_insn; +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + UINT f_ivc2_5u13; + UINT f_ivc2_5u18; + UINT f_ivc2_5u23; + + f_ivc2_5u13 = EXTRACT_MSB0_UINT (insn, 32, 13, 5); + f_ivc2_5u18 = EXTRACT_MSB0_UINT (insn, 32, 18, 5); + f_ivc2_5u23 = EXTRACT_MSB0_UINT (insn, 32, 23, 5); + + /* Record the fields for the semantic handler. */ + FLD (f_ivc2_5u18) = f_ivc2_5u18; + FLD (f_ivc2_5u13) = f_ivc2_5u13; + FLD (f_ivc2_5u23) = f_ivc2_5u23; + if (UNLIKELY(current_cpu->trace_extract_p)) + { + current_cpu->trace_stream + << "0x" << hex << pc << dec << " (sfmt_cpadd3_b_P0S_P1)\t" + << " f_ivc2_5u18:0x" << hex << f_ivc2_5u18 << dec + << " f_ivc2_5u13:0x" << hex << f_ivc2_5u13 << dec + << " f_ivc2_5u23:0x" << hex << f_ivc2_5u23 << dec + << endl; + } + + /* Record the fields for profiling. */ + if (UNLIKELY (current_cpu->trace_counter_p || current_cpu->final_insn_count_p)) + { + } +#undef FLD +} + +void +mepcop1_16_extract_sfmt_cpmov_P0S_P1 (mepcop1_16_scache* abuf, mep_ext1_cpu* current_cpu, PCADDR pc, mepcop1_16_insn_word base_insn, mepcop1_16_insn_word entire_insn){ + mepcop1_16_insn_word insn = entire_insn; +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + UINT f_ivc2_5u13; + UINT f_ivc2_5u23; + + f_ivc2_5u13 = EXTRACT_MSB0_UINT (insn, 32, 13, 5); + f_ivc2_5u23 = EXTRACT_MSB0_UINT (insn, 32, 23, 5); + + /* Record the fields for the semantic handler. */ + FLD (f_ivc2_5u13) = f_ivc2_5u13; + FLD (f_ivc2_5u23) = f_ivc2_5u23; + if (UNLIKELY(current_cpu->trace_extract_p)) + { + current_cpu->trace_stream + << "0x" << hex << pc << dec << " (sfmt_cpmov_P0S_P1)\t" + << " f_ivc2_5u13:0x" << hex << f_ivc2_5u13 << dec + << " f_ivc2_5u23:0x" << hex << f_ivc2_5u23 << dec + << endl; + } + + /* Record the fields for profiling. */ + if (UNLIKELY (current_cpu->trace_counter_p || current_cpu->final_insn_count_p)) + { + } +#undef FLD +} + +void +mepcop1_16_extract_sfmt_cpccadd_b_P0S_P1 (mepcop1_16_scache* abuf, mep_ext1_cpu* current_cpu, PCADDR pc, mepcop1_16_insn_word base_insn, mepcop1_16_insn_word entire_insn){ + mepcop1_16_insn_word insn = entire_insn; +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + UINT f_ivc2_5u13; + + f_ivc2_5u13 = EXTRACT_MSB0_UINT (insn, 32, 13, 5); + + /* Record the fields for the semantic handler. */ + FLD (f_ivc2_5u13) = f_ivc2_5u13; + if (UNLIKELY(current_cpu->trace_extract_p)) + { + current_cpu->trace_stream + << "0x" << hex << pc << dec << " (sfmt_cpccadd_b_P0S_P1)\t" + << " f_ivc2_5u13:0x" << hex << f_ivc2_5u13 << dec + << endl; + } + + /* Record the fields for profiling. */ + if (UNLIKELY (current_cpu->trace_counter_p || current_cpu->final_insn_count_p)) + { + } +#undef FLD +} + +void +mepcop1_16_extract_sfmt_cpmovfrcsar0_P0S_P1 (mepcop1_16_scache* abuf, mep_ext1_cpu* current_cpu, PCADDR pc, mepcop1_16_insn_word base_insn, mepcop1_16_insn_word entire_insn){ + mepcop1_16_insn_word insn = entire_insn; +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + UINT f_ivc2_5u23; + + f_ivc2_5u23 = EXTRACT_MSB0_UINT (insn, 32, 23, 5); + + /* Record the fields for the semantic handler. */ + FLD (f_ivc2_5u23) = f_ivc2_5u23; + if (UNLIKELY(current_cpu->trace_extract_p)) + { + current_cpu->trace_stream + << "0x" << hex << pc << dec << " (sfmt_cpmovfrcsar0_P0S_P1)\t" + << " f_ivc2_5u23:0x" << hex << f_ivc2_5u23 << dec + << endl; + } + + /* Record the fields for profiling. */ + if (UNLIKELY (current_cpu->trace_counter_p || current_cpu->final_insn_count_p)) + { + } +#undef FLD +} + +void +mepcop1_16_extract_sfmt_cpmovtocsar0_P0S_P1 (mepcop1_16_scache* abuf, mep_ext1_cpu* current_cpu, PCADDR pc, mepcop1_16_insn_word base_insn, mepcop1_16_insn_word entire_insn){ + mepcop1_16_insn_word insn = entire_insn; +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + UINT f_ivc2_5u13; + + f_ivc2_5u13 = EXTRACT_MSB0_UINT (insn, 32, 13, 5); + + /* Record the fields for the semantic handler. */ + FLD (f_ivc2_5u13) = f_ivc2_5u13; + if (UNLIKELY(current_cpu->trace_extract_p)) + { + current_cpu->trace_stream + << "0x" << hex << pc << dec << " (sfmt_cpmovtocsar0_P0S_P1)\t" + << " f_ivc2_5u13:0x" << hex << f_ivc2_5u13 << dec + << endl; + } + + /* Record the fields for profiling. */ + if (UNLIKELY (current_cpu->trace_counter_p || current_cpu->final_insn_count_p)) + { + } +#undef FLD +} + +void +mepcop1_16_extract_sfmt_cpcmpeqz_b_P0S_P1 (mepcop1_16_scache* abuf, mep_ext1_cpu* current_cpu, PCADDR pc, mepcop1_16_insn_word base_insn, mepcop1_16_insn_word entire_insn){ + mepcop1_16_insn_word insn = entire_insn; +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + UINT f_ivc2_5u13; + UINT f_ivc2_5u18; + + f_ivc2_5u13 = EXTRACT_MSB0_UINT (insn, 32, 13, 5); + f_ivc2_5u18 = EXTRACT_MSB0_UINT (insn, 32, 18, 5); + + /* Record the fields for the semantic handler. */ + FLD (f_ivc2_5u18) = f_ivc2_5u18; + FLD (f_ivc2_5u13) = f_ivc2_5u13; + if (UNLIKELY(current_cpu->trace_extract_p)) + { + current_cpu->trace_stream + << "0x" << hex << pc << dec << " (sfmt_cpcmpeqz_b_P0S_P1)\t" + << " f_ivc2_5u18:0x" << hex << f_ivc2_5u18 << dec + << " f_ivc2_5u13:0x" << hex << f_ivc2_5u13 << dec + << endl; + } + + /* Record the fields for profiling. */ + if (UNLIKELY (current_cpu->trace_counter_p || current_cpu->final_insn_count_p)) + { + } +#undef FLD +} + +void +mepcop1_16_extract_sfmt_cpsrlia0_P0S (mepcop1_16_scache* abuf, mep_ext1_cpu* current_cpu, PCADDR pc, mepcop1_16_insn_word base_insn, mepcop1_16_insn_word entire_insn){ + mepcop1_16_insn_word insn = entire_insn; +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + UINT f_ivc2_5u23; + + f_ivc2_5u23 = EXTRACT_MSB0_UINT (insn, 32, 23, 5); + + /* Record the fields for the semantic handler. */ + FLD (f_ivc2_5u23) = f_ivc2_5u23; + if (UNLIKELY(current_cpu->trace_extract_p)) + { + current_cpu->trace_stream + << "0x" << hex << pc << dec << " (sfmt_cpsrlia0_P0S)\t" + << " f_ivc2_5u23:0x" << hex << f_ivc2_5u23 << dec + << endl; + } + + /* Record the fields for profiling. */ + if (UNLIKELY (current_cpu->trace_counter_p || current_cpu->final_insn_count_p)) + { + } +#undef FLD +} + diff --git a/sid/component/cgen-cpu/mep/mep-cop1-16-decode.h b/sid/component/cgen-cpu/mep/mep-cop1-16-decode.h new file mode 100644 index 0000000000..9f65cbc134 --- /dev/null +++ b/sid/component/cgen-cpu/mep/mep-cop1-16-decode.h @@ -0,0 +1,280 @@ +/* Decode header for mepcop1_16. + +THIS FILE IS MACHINE GENERATED WITH CGEN. + +Copyright (C) 2000-2007 Red Hat, Inc. + +This file is part of the Red Hat simulators. + + +*/ + +#ifndef MEPCOP1_16_DECODE_H +#define MEPCOP1_16_DECODE_H + +namespace mep_ext1 { + +using namespace cgen; +using namespace mep; + +typedef UINT mepcop1_16_insn_word; + +/* Enum declaration for instructions in cpu family mepcop1_16. */ +typedef enum mepcop1_16_insn_type { + MEPCOP1_16_INSN_X_INVALID, MEPCOP1_16_INSN_C0NOP_P0_P0S, MEPCOP1_16_INSN_CPADD3_B_P0S_P1, MEPCOP1_16_INSN_CPADD3_H_P0S_P1 + , MEPCOP1_16_INSN_CPADD3_W_P0S_P1, MEPCOP1_16_INSN_CPUNPACKU_B_P0S_P1, MEPCOP1_16_INSN_CPUNPACKU_H_P0S_P1, MEPCOP1_16_INSN_CPUNPACKU_W_P0S_P1 + , MEPCOP1_16_INSN_CPUNPACKL_B_P0S_P1, MEPCOP1_16_INSN_CPUNPACKL_H_P0S_P1, MEPCOP1_16_INSN_CPUNPACKL_W_P0S_P1, MEPCOP1_16_INSN_CPSEL_P0S_P1 + , MEPCOP1_16_INSN_CPFSFTBS0_P0S_P1, MEPCOP1_16_INSN_CPFSFTBS1_P0S_P1, MEPCOP1_16_INSN_CPMOV_P0S_P1, MEPCOP1_16_INSN_CPABSZ_B_P0S_P1 + , MEPCOP1_16_INSN_CPABSZ_H_P0S_P1, MEPCOP1_16_INSN_CPABSZ_W_P0S_P1, MEPCOP1_16_INSN_CPLDZ_H_P0S_P1, MEPCOP1_16_INSN_CPLDZ_W_P0S_P1 + , MEPCOP1_16_INSN_CPNORM_H_P0S_P1, MEPCOP1_16_INSN_CPNORM_W_P0S_P1, MEPCOP1_16_INSN_CPHADDU_B_P0S_P1, MEPCOP1_16_INSN_CPHADD_B_P0S_P1 + , MEPCOP1_16_INSN_CPHADD_H_P0S_P1, MEPCOP1_16_INSN_CPHADD_W_P0S_P1, MEPCOP1_16_INSN_CPCCADD_B_P0S_P1, MEPCOP1_16_INSN_CPBCAST_B_P0S_P1 + , MEPCOP1_16_INSN_CPBCAST_H_P0S_P1, MEPCOP1_16_INSN_CPBCAST_W_P0S_P1, MEPCOP1_16_INSN_CPEXTUU_B_P0S_P1, MEPCOP1_16_INSN_CPEXTU_B_P0S_P1 + , MEPCOP1_16_INSN_CPEXTUU_H_P0S_P1, MEPCOP1_16_INSN_CPEXTU_H_P0S_P1, MEPCOP1_16_INSN_CPEXTLU_B_P0S_P1, MEPCOP1_16_INSN_CPEXTL_B_P0S_P1 + , MEPCOP1_16_INSN_CPEXTLU_H_P0S_P1, MEPCOP1_16_INSN_CPEXTL_H_P0S_P1, MEPCOP1_16_INSN_CPCASTUB_H_P0S_P1, MEPCOP1_16_INSN_CPCASTB_H_P0S_P1 + , MEPCOP1_16_INSN_CPCASTUB_W_P0S_P1, MEPCOP1_16_INSN_CPCASTB_W_P0S_P1, MEPCOP1_16_INSN_CPCASTUH_W_P0S_P1, MEPCOP1_16_INSN_CPCASTH_W_P0S_P1 + , MEPCOP1_16_INSN_CDCASTUW_P0S_P1, MEPCOP1_16_INSN_CDCASTW_P0S_P1, MEPCOP1_16_INSN_CPMOVFRCSAR0_P0S_P1, MEPCOP1_16_INSN_CPMOVFRCSAR1_P0S_P1 + , MEPCOP1_16_INSN_CPMOVFRCC_P0S_P1, MEPCOP1_16_INSN_CPMOVTOCSAR0_P0S_P1, MEPCOP1_16_INSN_CPMOVTOCSAR1_P0S_P1, MEPCOP1_16_INSN_CPMOVTOCC_P0S_P1 + , MEPCOP1_16_INSN_CPCMPEQZ_B_P0S_P1, MEPCOP1_16_INSN_CPCMPEQ_B_P0S_P1, MEPCOP1_16_INSN_CPCMPEQ_H_P0S_P1, MEPCOP1_16_INSN_CPCMPEQ_W_P0S_P1 + , MEPCOP1_16_INSN_CPCMPNE_B_P0S_P1, MEPCOP1_16_INSN_CPCMPNE_H_P0S_P1, MEPCOP1_16_INSN_CPCMPNE_W_P0S_P1, MEPCOP1_16_INSN_CPCMPGTU_B_P0S_P1 + , MEPCOP1_16_INSN_CPCMPGT_B_P0S_P1, MEPCOP1_16_INSN_CPCMPGT_H_P0S_P1, MEPCOP1_16_INSN_CPCMPGTU_W_P0S_P1, MEPCOP1_16_INSN_CPCMPGT_W_P0S_P1 + , MEPCOP1_16_INSN_CPCMPGEU_B_P0S_P1, MEPCOP1_16_INSN_CPCMPGE_B_P0S_P1, MEPCOP1_16_INSN_CPCMPGE_H_P0S_P1, MEPCOP1_16_INSN_CPCMPGEU_W_P0S_P1 + , MEPCOP1_16_INSN_CPCMPGE_W_P0S_P1, MEPCOP1_16_INSN_CPADDA0U_B_P0S, MEPCOP1_16_INSN_CPADDA0_B_P0S, MEPCOP1_16_INSN_CPADDUA0_H_P0S + , MEPCOP1_16_INSN_CPADDLA0_H_P0S, MEPCOP1_16_INSN_CPADDACA0U_B_P0S, MEPCOP1_16_INSN_CPADDACA0_B_P0S, MEPCOP1_16_INSN_CPADDACUA0_H_P0S + , MEPCOP1_16_INSN_CPADDACLA0_H_P0S, MEPCOP1_16_INSN_CPSUBA0U_B_P0S, MEPCOP1_16_INSN_CPSUBA0_B_P0S, MEPCOP1_16_INSN_CPSUBUA0_H_P0S + , MEPCOP1_16_INSN_CPSUBLA0_H_P0S, MEPCOP1_16_INSN_CPSUBACA0U_B_P0S, MEPCOP1_16_INSN_CPSUBACA0_B_P0S, MEPCOP1_16_INSN_CPSUBACUA0_H_P0S + , MEPCOP1_16_INSN_CPSUBACLA0_H_P0S, MEPCOP1_16_INSN_CPABSA0U_B_P0S, MEPCOP1_16_INSN_CPABSA0_B_P0S, MEPCOP1_16_INSN_CPABSUA0_H_P0S + , MEPCOP1_16_INSN_CPABSLA0_H_P0S, MEPCOP1_16_INSN_CPSADA0U_B_P0S, MEPCOP1_16_INSN_CPSADA0_B_P0S, MEPCOP1_16_INSN_CPSADUA0_H_P0S + , MEPCOP1_16_INSN_CPSADLA0_H_P0S, MEPCOP1_16_INSN_CPSETA0_H_P0S, MEPCOP1_16_INSN_CPSETUA0_W_P0S, MEPCOP1_16_INSN_CPSETLA0_W_P0S + , MEPCOP1_16_INSN_CPMOVA0_B_P0S, MEPCOP1_16_INSN_CPMOVUA0_H_P0S, MEPCOP1_16_INSN_CPMOVLA0_H_P0S, MEPCOP1_16_INSN_CPMOVUUA0_W_P0S + , MEPCOP1_16_INSN_CPMOVULA0_W_P0S, MEPCOP1_16_INSN_CPMOVLUA0_W_P0S, MEPCOP1_16_INSN_CPMOVLLA0_W_P0S, MEPCOP1_16_INSN_CPPACKA0U_B_P0S + , MEPCOP1_16_INSN_CPPACKA0_B_P0S, MEPCOP1_16_INSN_CPPACKUA0_H_P0S, MEPCOP1_16_INSN_CPPACKLA0_H_P0S, MEPCOP1_16_INSN_CPPACKUA0_W_P0S + , MEPCOP1_16_INSN_CPPACKLA0_W_P0S, MEPCOP1_16_INSN_CPMOVHUA0_W_P0S, MEPCOP1_16_INSN_CPMOVHLA0_W_P0S, MEPCOP1_16_INSN_CPACSUMA0_P0S + , MEPCOP1_16_INSN_CPACCPA0_P0S, MEPCOP1_16_INSN_CPSRLA0_P0S, MEPCOP1_16_INSN_CPSRAA0_P0S, MEPCOP1_16_INSN_CPSLLA0_P0S + , MEPCOP1_16_INSN_CPSRLIA0_P0S, MEPCOP1_16_INSN_CPSRAIA0_P0S, MEPCOP1_16_INSN_CPSLLIA0_P0S, MEPCOP1_16_INSN_CPFSFTBA0S0U_B_P0S + , MEPCOP1_16_INSN_CPFSFTBA0S0_B_P0S, MEPCOP1_16_INSN_CPFSFTBUA0S0_H_P0S, MEPCOP1_16_INSN_CPFSFTBLA0S0_H_P0S, MEPCOP1_16_INSN_CPFACA0S0U_B_P0S + , MEPCOP1_16_INSN_CPFACA0S0_B_P0S, MEPCOP1_16_INSN_CPFACUA0S0_H_P0S, MEPCOP1_16_INSN_CPFACLA0S0_H_P0S, MEPCOP1_16_INSN_CPFSFTBA0S1U_B_P0S + , MEPCOP1_16_INSN_CPFSFTBA0S1_B_P0S, MEPCOP1_16_INSN_CPFSFTBUA0S1_H_P0S, MEPCOP1_16_INSN_CPFSFTBLA0S1_H_P0S, MEPCOP1_16_INSN_CPFACA0S1U_B_P0S + , MEPCOP1_16_INSN_CPFACA0S1_B_P0S, MEPCOP1_16_INSN_CPFACUA0S1_H_P0S, MEPCOP1_16_INSN_CPFACLA0S1_H_P0S +} MEPCOP1_16_INSN_TYPE; + + +// Forward decls. +struct mep_ext1_cpu; +struct mepcop1_16_scache; +typedef sem_status (mepcop1_16_sem_fn) (mep_ext1_cpu* cpu, mepcop1_16_scache* sem); + + +// Instruction descriptor. + +struct mepcop1_16_idesc { + + // scache engine executor for this insn + mepcop1_16_sem_fn* execute; + + const char* insn_name; + enum mepcop1_16_insn_type sem_index; + mep_insn_attr attrs; + + // idesc table: indexed by sem_index + static mepcop1_16_idesc idesc_table[]; + + static mepcop1_16_insn_type lookup_virtual (virtual_insn_type vit); +}; + +// Instruction argument buffer. + +union mepcop1_16_sem_fields { + struct { /* no operands */ + int empty; + } fmt_empty; + struct { /* */ + UINT f_ivc2_5u13; + UINT f_ivc2_5u18; + UINT f_ivc2_5u23; + } sfmt_cpadd3_b_P0S_P1; + // This one is for chain/cti-chain virtual insns. + struct { + // Number of insns in pbb. + unsigned insn_count; + // This is used by chain insns and by untaken conditional branches. + mepcop1_16_scache* next; + mepcop1_16_scache* branch_target; + } chain; + // This one is for `before' virtual insns. + struct { + // The cache entry of the real insn. + mepcop1_16_scache* insn; + } before; +}; + +// Simulator instruction cache. + +struct mepcop1_16_scache { + // executor + union { + cgoto_label cgoto; + mepcop1_16_sem_fn* fn; + } execute; + + // PC of this instruction. + PCADDR addr; + + // instruction class + mepcop1_16_idesc* idesc; + + // argument buffer + mepcop1_16_sem_fields fields; + + + // writeback flags + // Only used if profiling or parallel execution support enabled during + // file generation. + unsigned long long written; + + + // decode given instruction + void decode (mep_ext1_cpu* current_cpu, PCADDR pc, mepcop1_16_insn_word base_insn, mepcop1_16_insn_word entire_insn); +}; + +} // end mep_ext1 namespace + +// Decls of each semantic fn. + +using mep_ext1::mepcop1_16_sem_fn; +extern mepcop1_16_sem_fn mepcop1_16_sem_x_invalid; +extern mepcop1_16_sem_fn mepcop1_16_sem_c0nop_P0_P0S; +extern mepcop1_16_sem_fn mepcop1_16_sem_cpadd3_b_P0S_P1; +extern mepcop1_16_sem_fn mepcop1_16_sem_cpadd3_h_P0S_P1; +extern mepcop1_16_sem_fn mepcop1_16_sem_cpadd3_w_P0S_P1; +extern mepcop1_16_sem_fn mepcop1_16_sem_cpunpacku_b_P0S_P1; +extern mepcop1_16_sem_fn mepcop1_16_sem_cpunpacku_h_P0S_P1; +extern mepcop1_16_sem_fn mepcop1_16_sem_cpunpacku_w_P0S_P1; +extern mepcop1_16_sem_fn mepcop1_16_sem_cpunpackl_b_P0S_P1; +extern mepcop1_16_sem_fn mepcop1_16_sem_cpunpackl_h_P0S_P1; +extern mepcop1_16_sem_fn mepcop1_16_sem_cpunpackl_w_P0S_P1; +extern mepcop1_16_sem_fn mepcop1_16_sem_cpsel_P0S_P1; +extern mepcop1_16_sem_fn mepcop1_16_sem_cpfsftbs0_P0S_P1; +extern mepcop1_16_sem_fn mepcop1_16_sem_cpfsftbs1_P0S_P1; +extern mepcop1_16_sem_fn mepcop1_16_sem_cpmov_P0S_P1; +extern mepcop1_16_sem_fn mepcop1_16_sem_cpabsz_b_P0S_P1; +extern mepcop1_16_sem_fn mepcop1_16_sem_cpabsz_h_P0S_P1; +extern mepcop1_16_sem_fn mepcop1_16_sem_cpabsz_w_P0S_P1; +extern mepcop1_16_sem_fn mepcop1_16_sem_cpldz_h_P0S_P1; +extern mepcop1_16_sem_fn mepcop1_16_sem_cpldz_w_P0S_P1; +extern mepcop1_16_sem_fn mepcop1_16_sem_cpnorm_h_P0S_P1; +extern mepcop1_16_sem_fn mepcop1_16_sem_cpnorm_w_P0S_P1; +extern mepcop1_16_sem_fn mepcop1_16_sem_cphaddu_b_P0S_P1; +extern mepcop1_16_sem_fn mepcop1_16_sem_cphadd_b_P0S_P1; +extern mepcop1_16_sem_fn mepcop1_16_sem_cphadd_h_P0S_P1; +extern mepcop1_16_sem_fn mepcop1_16_sem_cphadd_w_P0S_P1; +extern mepcop1_16_sem_fn mepcop1_16_sem_cpccadd_b_P0S_P1; +extern mepcop1_16_sem_fn mepcop1_16_sem_cpbcast_b_P0S_P1; +extern mepcop1_16_sem_fn mepcop1_16_sem_cpbcast_h_P0S_P1; +extern mepcop1_16_sem_fn mepcop1_16_sem_cpbcast_w_P0S_P1; +extern mepcop1_16_sem_fn mepcop1_16_sem_cpextuu_b_P0S_P1; +extern mepcop1_16_sem_fn mepcop1_16_sem_cpextu_b_P0S_P1; +extern mepcop1_16_sem_fn mepcop1_16_sem_cpextuu_h_P0S_P1; +extern mepcop1_16_sem_fn mepcop1_16_sem_cpextu_h_P0S_P1; +extern mepcop1_16_sem_fn mepcop1_16_sem_cpextlu_b_P0S_P1; +extern mepcop1_16_sem_fn mepcop1_16_sem_cpextl_b_P0S_P1; +extern mepcop1_16_sem_fn mepcop1_16_sem_cpextlu_h_P0S_P1; +extern mepcop1_16_sem_fn mepcop1_16_sem_cpextl_h_P0S_P1; +extern mepcop1_16_sem_fn mepcop1_16_sem_cpcastub_h_P0S_P1; +extern mepcop1_16_sem_fn mepcop1_16_sem_cpcastb_h_P0S_P1; +extern mepcop1_16_sem_fn mepcop1_16_sem_cpcastub_w_P0S_P1; +extern mepcop1_16_sem_fn mepcop1_16_sem_cpcastb_w_P0S_P1; +extern mepcop1_16_sem_fn mepcop1_16_sem_cpcastuh_w_P0S_P1; +extern mepcop1_16_sem_fn mepcop1_16_sem_cpcasth_w_P0S_P1; +extern mepcop1_16_sem_fn mepcop1_16_sem_cdcastuw_P0S_P1; +extern mepcop1_16_sem_fn mepcop1_16_sem_cdcastw_P0S_P1; +extern mepcop1_16_sem_fn mepcop1_16_sem_cpmovfrcsar0_P0S_P1; +extern mepcop1_16_sem_fn mepcop1_16_sem_cpmovfrcsar1_P0S_P1; +extern mepcop1_16_sem_fn mepcop1_16_sem_cpmovfrcc_P0S_P1; +extern mepcop1_16_sem_fn mepcop1_16_sem_cpmovtocsar0_P0S_P1; +extern mepcop1_16_sem_fn mepcop1_16_sem_cpmovtocsar1_P0S_P1; +extern mepcop1_16_sem_fn mepcop1_16_sem_cpmovtocc_P0S_P1; +extern mepcop1_16_sem_fn mepcop1_16_sem_cpcmpeqz_b_P0S_P1; +extern mepcop1_16_sem_fn mepcop1_16_sem_cpcmpeq_b_P0S_P1; +extern mepcop1_16_sem_fn mepcop1_16_sem_cpcmpeq_h_P0S_P1; +extern mepcop1_16_sem_fn mepcop1_16_sem_cpcmpeq_w_P0S_P1; +extern mepcop1_16_sem_fn mepcop1_16_sem_cpcmpne_b_P0S_P1; +extern mepcop1_16_sem_fn mepcop1_16_sem_cpcmpne_h_P0S_P1; +extern mepcop1_16_sem_fn mepcop1_16_sem_cpcmpne_w_P0S_P1; +extern mepcop1_16_sem_fn mepcop1_16_sem_cpcmpgtu_b_P0S_P1; +extern mepcop1_16_sem_fn mepcop1_16_sem_cpcmpgt_b_P0S_P1; +extern mepcop1_16_sem_fn mepcop1_16_sem_cpcmpgt_h_P0S_P1; +extern mepcop1_16_sem_fn mepcop1_16_sem_cpcmpgtu_w_P0S_P1; +extern mepcop1_16_sem_fn mepcop1_16_sem_cpcmpgt_w_P0S_P1; +extern mepcop1_16_sem_fn mepcop1_16_sem_cpcmpgeu_b_P0S_P1; +extern mepcop1_16_sem_fn mepcop1_16_sem_cpcmpge_b_P0S_P1; +extern mepcop1_16_sem_fn mepcop1_16_sem_cpcmpge_h_P0S_P1; +extern mepcop1_16_sem_fn mepcop1_16_sem_cpcmpgeu_w_P0S_P1; +extern mepcop1_16_sem_fn mepcop1_16_sem_cpcmpge_w_P0S_P1; +extern mepcop1_16_sem_fn mepcop1_16_sem_cpadda0u_b_P0S; +extern mepcop1_16_sem_fn mepcop1_16_sem_cpadda0_b_P0S; +extern mepcop1_16_sem_fn mepcop1_16_sem_cpaddua0_h_P0S; +extern mepcop1_16_sem_fn mepcop1_16_sem_cpaddla0_h_P0S; +extern mepcop1_16_sem_fn mepcop1_16_sem_cpaddaca0u_b_P0S; +extern mepcop1_16_sem_fn mepcop1_16_sem_cpaddaca0_b_P0S; +extern mepcop1_16_sem_fn mepcop1_16_sem_cpaddacua0_h_P0S; +extern mepcop1_16_sem_fn mepcop1_16_sem_cpaddacla0_h_P0S; +extern mepcop1_16_sem_fn mepcop1_16_sem_cpsuba0u_b_P0S; +extern mepcop1_16_sem_fn mepcop1_16_sem_cpsuba0_b_P0S; +extern mepcop1_16_sem_fn mepcop1_16_sem_cpsubua0_h_P0S; +extern mepcop1_16_sem_fn mepcop1_16_sem_cpsubla0_h_P0S; +extern mepcop1_16_sem_fn mepcop1_16_sem_cpsubaca0u_b_P0S; +extern mepcop1_16_sem_fn mepcop1_16_sem_cpsubaca0_b_P0S; +extern mepcop1_16_sem_fn mepcop1_16_sem_cpsubacua0_h_P0S; +extern mepcop1_16_sem_fn mepcop1_16_sem_cpsubacla0_h_P0S; +extern mepcop1_16_sem_fn mepcop1_16_sem_cpabsa0u_b_P0S; +extern mepcop1_16_sem_fn mepcop1_16_sem_cpabsa0_b_P0S; +extern mepcop1_16_sem_fn mepcop1_16_sem_cpabsua0_h_P0S; +extern mepcop1_16_sem_fn mepcop1_16_sem_cpabsla0_h_P0S; +extern mepcop1_16_sem_fn mepcop1_16_sem_cpsada0u_b_P0S; +extern mepcop1_16_sem_fn mepcop1_16_sem_cpsada0_b_P0S; +extern mepcop1_16_sem_fn mepcop1_16_sem_cpsadua0_h_P0S; +extern mepcop1_16_sem_fn mepcop1_16_sem_cpsadla0_h_P0S; +extern mepcop1_16_sem_fn mepcop1_16_sem_cpseta0_h_P0S; +extern mepcop1_16_sem_fn mepcop1_16_sem_cpsetua0_w_P0S; +extern mepcop1_16_sem_fn mepcop1_16_sem_cpsetla0_w_P0S; +extern mepcop1_16_sem_fn mepcop1_16_sem_cpmova0_b_P0S; +extern mepcop1_16_sem_fn mepcop1_16_sem_cpmovua0_h_P0S; +extern mepcop1_16_sem_fn mepcop1_16_sem_cpmovla0_h_P0S; +extern mepcop1_16_sem_fn mepcop1_16_sem_cpmovuua0_w_P0S; +extern mepcop1_16_sem_fn mepcop1_16_sem_cpmovula0_w_P0S; +extern mepcop1_16_sem_fn mepcop1_16_sem_cpmovlua0_w_P0S; +extern mepcop1_16_sem_fn mepcop1_16_sem_cpmovlla0_w_P0S; +extern mepcop1_16_sem_fn mepcop1_16_sem_cppacka0u_b_P0S; +extern mepcop1_16_sem_fn mepcop1_16_sem_cppacka0_b_P0S; +extern mepcop1_16_sem_fn mepcop1_16_sem_cppackua0_h_P0S; +extern mepcop1_16_sem_fn mepcop1_16_sem_cppackla0_h_P0S; +extern mepcop1_16_sem_fn mepcop1_16_sem_cppackua0_w_P0S; +extern mepcop1_16_sem_fn mepcop1_16_sem_cppackla0_w_P0S; +extern mepcop1_16_sem_fn mepcop1_16_sem_cpmovhua0_w_P0S; +extern mepcop1_16_sem_fn mepcop1_16_sem_cpmovhla0_w_P0S; +extern mepcop1_16_sem_fn mepcop1_16_sem_cpacsuma0_P0S; +extern mepcop1_16_sem_fn mepcop1_16_sem_cpaccpa0_P0S; +extern mepcop1_16_sem_fn mepcop1_16_sem_cpsrla0_P0S; +extern mepcop1_16_sem_fn mepcop1_16_sem_cpsraa0_P0S; +extern mepcop1_16_sem_fn mepcop1_16_sem_cpslla0_P0S; +extern mepcop1_16_sem_fn mepcop1_16_sem_cpsrlia0_P0S; +extern mepcop1_16_sem_fn mepcop1_16_sem_cpsraia0_P0S; +extern mepcop1_16_sem_fn mepcop1_16_sem_cpsllia0_P0S; +extern mepcop1_16_sem_fn mepcop1_16_sem_cpfsftba0s0u_b_P0S; +extern mepcop1_16_sem_fn mepcop1_16_sem_cpfsftba0s0_b_P0S; +extern mepcop1_16_sem_fn mepcop1_16_sem_cpfsftbua0s0_h_P0S; +extern mepcop1_16_sem_fn mepcop1_16_sem_cpfsftbla0s0_h_P0S; +extern mepcop1_16_sem_fn mepcop1_16_sem_cpfaca0s0u_b_P0S; +extern mepcop1_16_sem_fn mepcop1_16_sem_cpfaca0s0_b_P0S; +extern mepcop1_16_sem_fn mepcop1_16_sem_cpfacua0s0_h_P0S; +extern mepcop1_16_sem_fn mepcop1_16_sem_cpfacla0s0_h_P0S; +extern mepcop1_16_sem_fn mepcop1_16_sem_cpfsftba0s1u_b_P0S; +extern mepcop1_16_sem_fn mepcop1_16_sem_cpfsftba0s1_b_P0S; +extern mepcop1_16_sem_fn mepcop1_16_sem_cpfsftbua0s1_h_P0S; +extern mepcop1_16_sem_fn mepcop1_16_sem_cpfsftbla0s1_h_P0S; +extern mepcop1_16_sem_fn mepcop1_16_sem_cpfaca0s1u_b_P0S; +extern mepcop1_16_sem_fn mepcop1_16_sem_cpfaca0s1_b_P0S; +extern mepcop1_16_sem_fn mepcop1_16_sem_cpfacua0s1_h_P0S; +extern mepcop1_16_sem_fn mepcop1_16_sem_cpfacla0s1_h_P0S; + +#endif /* MEPCOP1_16_DECODE_H */ diff --git a/sid/component/cgen-cpu/mep/mep-cop1-16-defs.h b/sid/component/cgen-cpu/mep/mep-cop1-16-defs.h new file mode 100644 index 0000000000..c6cfeb4ac0 --- /dev/null +++ b/sid/component/cgen-cpu/mep/mep-cop1-16-defs.h @@ -0,0 +1,16 @@ +/* CPU family header for mep_ext1 / mepcop1_16. + +THIS FILE IS MACHINE GENERATED WITH CGEN. + +Copyright (C) 2000-2007 Red Hat, Inc. + +This file is part of the Red Hat simulators. + + +*/ + +#ifndef DEFS_MEPCOP1_16_H +#define DEFS_MEPCOP1_16_H + + +#endif /* DEFS_MEPCOP1_16_H */ diff --git a/sid/component/cgen-cpu/mep/mep-cop1-16-model.cxx b/sid/component/cgen-cpu/mep/mep-cop1-16-model.cxx new file mode 100644 index 0000000000..36df94a441 --- /dev/null +++ b/sid/component/cgen-cpu/mep/mep-cop1-16-model.cxx @@ -0,0 +1,4192 @@ +/* Simulator model support for mepcop1_16. + +THIS FILE IS MACHINE GENERATED WITH CGEN. + +Copyright (C) 2000-2007 Red Hat, Inc. + +This file is part of the Red Hat simulators. + + +*/ + + +#if HAVE_CONFIG_H +#include "config.h" +#endif +#include "mep_ext1.h" + +using namespace mep_ext1; // FIXME: namespace organization still wip + +/* The profiling data is recorded here, but is accessed via the profiling + mechanism. After all, this is information for profiling. */ + +/* Model handlers for each insn. */ + +mepcop1_16_mep_model::mepcop1_16_mep_model (mep_ext1_cpu *cpu) + : cgen_model (cpu) +{ +} + +UINT +mepcop1_16_mep_model::model_c0nop_P0_P0S_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.fmt_empty.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_c0nop_P0_P0S_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.fmt_empty.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpadd3_b_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpadd3_b_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpadd3_h_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpadd3_h_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpadd3_w_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpadd3_w_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpunpacku_b_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpunpacku_b_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpunpacku_h_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpunpacku_h_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpunpacku_w_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpunpacku_w_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpunpackl_b_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpunpackl_b_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpunpackl_h_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpunpackl_h_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpunpackl_w_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpunpackl_w_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpsel_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpsel_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpfsftbs0_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpfsftbs0_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpfsftbs1_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpfsftbs1_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpmov_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpmov_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpabsz_b_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpabsz_b_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpabsz_h_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpabsz_h_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpabsz_w_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpabsz_w_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpldz_h_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpldz_h_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpldz_w_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpldz_w_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpnorm_h_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpnorm_h_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpnorm_w_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpnorm_w_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cphaddu_b_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cphaddu_b_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cphadd_b_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cphadd_b_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cphadd_h_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cphadd_h_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cphadd_w_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cphadd_w_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpccadd_b_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpccadd_b_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpbcast_b_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpbcast_b_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpbcast_h_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpbcast_h_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpbcast_w_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpbcast_w_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpextuu_b_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpextuu_b_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpextu_b_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpextu_b_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpextuu_h_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpextuu_h_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpextu_h_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpextu_h_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpextlu_b_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpextlu_b_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpextl_b_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpextl_b_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpextlu_h_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpextlu_h_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpextl_h_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpextl_h_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpcastub_h_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpcastub_h_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpcastb_h_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpcastb_h_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpcastub_w_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpcastub_w_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpcastb_w_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpcastb_w_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpcastuh_w_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpcastuh_w_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpcasth_w_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpcasth_w_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cdcastuw_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cdcastuw_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cdcastw_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cdcastw_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpmovfrcsar0_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpmovfrcsar0_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpmovfrcsar1_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpmovfrcsar1_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpmovfrcc_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpmovfrcc_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpmovtocsar0_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpmovtocsar0_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpmovtocsar1_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpmovtocsar1_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpmovtocc_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpmovtocc_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpcmpeqz_b_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpcmpeqz_b_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpcmpeq_b_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpcmpeq_b_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpcmpeq_h_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpcmpeq_h_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpcmpeq_w_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpcmpeq_w_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpcmpne_b_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpcmpne_b_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpcmpne_h_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpcmpne_h_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpcmpne_w_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpcmpne_w_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpcmpgtu_b_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpcmpgtu_b_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpcmpgt_b_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpcmpgt_b_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpcmpgt_h_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpcmpgt_h_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpcmpgtu_w_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpcmpgtu_w_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpcmpgt_w_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpcmpgt_w_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpcmpgeu_b_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpcmpgeu_b_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpcmpge_b_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpcmpge_b_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpcmpge_h_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpcmpge_h_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpcmpgeu_w_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpcmpgeu_w_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpcmpge_w_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpcmpge_w_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpadda0u_b_P0S_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpadda0u_b_P0S_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpadda0_b_P0S_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpadda0_b_P0S_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpaddua0_h_P0S_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpaddua0_h_P0S_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpaddla0_h_P0S_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpaddla0_h_P0S_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpaddaca0u_b_P0S_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpaddaca0u_b_P0S_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpaddaca0_b_P0S_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpaddaca0_b_P0S_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpaddacua0_h_P0S_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpaddacua0_h_P0S_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpaddacla0_h_P0S_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpaddacla0_h_P0S_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpsuba0u_b_P0S_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpsuba0u_b_P0S_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpsuba0_b_P0S_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpsuba0_b_P0S_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpsubua0_h_P0S_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpsubua0_h_P0S_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpsubla0_h_P0S_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpsubla0_h_P0S_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpsubaca0u_b_P0S_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpsubaca0u_b_P0S_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpsubaca0_b_P0S_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpsubaca0_b_P0S_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpsubacua0_h_P0S_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpsubacua0_h_P0S_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpsubacla0_h_P0S_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpsubacla0_h_P0S_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpabsa0u_b_P0S_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpabsa0u_b_P0S_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpabsa0_b_P0S_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpabsa0_b_P0S_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpabsua0_h_P0S_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpabsua0_h_P0S_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpabsla0_h_P0S_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpabsla0_h_P0S_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpsada0u_b_P0S_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpsada0u_b_P0S_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpsada0_b_P0S_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpsada0_b_P0S_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpsadua0_h_P0S_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpsadua0_h_P0S_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpsadla0_h_P0S_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpsadla0_h_P0S_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpseta0_h_P0S_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpseta0_h_P0S_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpsetua0_w_P0S_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpsetua0_w_P0S_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpsetla0_w_P0S_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpsetla0_w_P0S_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpmova0_b_P0S_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpmova0_b_P0S_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpmovua0_h_P0S_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpmovua0_h_P0S_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpmovla0_h_P0S_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpmovla0_h_P0S_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpmovuua0_w_P0S_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpmovuua0_w_P0S_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpmovula0_w_P0S_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpmovula0_w_P0S_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpmovlua0_w_P0S_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpmovlua0_w_P0S_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpmovlla0_w_P0S_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpmovlla0_w_P0S_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cppacka0u_b_P0S_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cppacka0u_b_P0S_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cppacka0_b_P0S_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cppacka0_b_P0S_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cppackua0_h_P0S_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cppackua0_h_P0S_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cppackla0_h_P0S_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cppackla0_h_P0S_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cppackua0_w_P0S_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cppackua0_w_P0S_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cppackla0_w_P0S_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cppackla0_w_P0S_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpmovhua0_w_P0S_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpmovhua0_w_P0S_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpmovhla0_w_P0S_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpmovhla0_w_P0S_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpacsuma0_P0S_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.fmt_empty.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpacsuma0_P0S_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.fmt_empty.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpaccpa0_P0S_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.fmt_empty.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpaccpa0_P0S_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.fmt_empty.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpsrla0_P0S_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpsrla0_P0S_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpsraa0_P0S_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpsraa0_P0S_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpslla0_P0S_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpslla0_P0S_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpsrlia0_P0S_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpsrlia0_P0S_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpsraia0_P0S_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpsraia0_P0S_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpsllia0_P0S_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpsllia0_P0S_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpfsftba0s0u_b_P0S_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpfsftba0s0u_b_P0S_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpfsftba0s0_b_P0S_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpfsftba0s0_b_P0S_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpfsftbua0s0_h_P0S_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpfsftbua0s0_h_P0S_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpfsftbla0s0_h_P0S_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpfsftbla0s0_h_P0S_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpfaca0s0u_b_P0S_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpfaca0s0u_b_P0S_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpfaca0s0_b_P0S_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpfaca0s0_b_P0S_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpfacua0s0_h_P0S_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpfacua0s0_h_P0S_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpfacla0s0_h_P0S_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpfacla0s0_h_P0S_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpfsftba0s1u_b_P0S_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpfsftba0s1u_b_P0S_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpfsftba0s1_b_P0S_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpfsftba0s1_b_P0S_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpfsftbua0s1_h_P0S_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpfsftbua0s1_h_P0S_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpfsftbla0s1_h_P0S_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpfsftbla0s1_h_P0S_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpfaca0s1u_b_P0S_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpfaca0s1u_b_P0S_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpfaca0s1_b_P0S_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpfaca0s1_b_P0S_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpfacua0s1_h_P0S_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpfacua0s1_h_P0S_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpfacla0s1_h_P0S_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_16_mep_model::model_cpfacla0s1_h_P0S_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + const mepcop1_16_scache* abuf = sem; + const mepcop1_16_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +/* We assume UNIT_NONE == 0 because the tables don't always terminate + entries with it. */ + +/* Model timing data for `mep'. */ + +const mepcop1_16_mep_model::insn_timing mepcop1_16_mep_model::timing[] = { + { MEPCOP1_16_INSN_X_INVALID, 0, 0, { { mepcop1_16_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_16_INSN_C0NOP_P0_P0S, & mepcop1_16_mep_model::model_c0nop_P0_P0S_before, & mepcop1_16_mep_model::model_c0nop_P0_P0S_after, { { mepcop1_16_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_16_INSN_CPADD3_B_P0S_P1, & mepcop1_16_mep_model::model_cpadd3_b_P0S_P1_before, & mepcop1_16_mep_model::model_cpadd3_b_P0S_P1_after, { { mepcop1_16_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_16_INSN_CPADD3_H_P0S_P1, & mepcop1_16_mep_model::model_cpadd3_h_P0S_P1_before, & mepcop1_16_mep_model::model_cpadd3_h_P0S_P1_after, { { mepcop1_16_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_16_INSN_CPADD3_W_P0S_P1, & mepcop1_16_mep_model::model_cpadd3_w_P0S_P1_before, & mepcop1_16_mep_model::model_cpadd3_w_P0S_P1_after, { { mepcop1_16_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_16_INSN_CPUNPACKU_B_P0S_P1, & mepcop1_16_mep_model::model_cpunpacku_b_P0S_P1_before, & mepcop1_16_mep_model::model_cpunpacku_b_P0S_P1_after, { { mepcop1_16_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_16_INSN_CPUNPACKU_H_P0S_P1, & mepcop1_16_mep_model::model_cpunpacku_h_P0S_P1_before, & mepcop1_16_mep_model::model_cpunpacku_h_P0S_P1_after, { { mepcop1_16_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_16_INSN_CPUNPACKU_W_P0S_P1, & mepcop1_16_mep_model::model_cpunpacku_w_P0S_P1_before, & mepcop1_16_mep_model::model_cpunpacku_w_P0S_P1_after, { { mepcop1_16_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_16_INSN_CPUNPACKL_B_P0S_P1, & mepcop1_16_mep_model::model_cpunpackl_b_P0S_P1_before, & mepcop1_16_mep_model::model_cpunpackl_b_P0S_P1_after, { { mepcop1_16_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_16_INSN_CPUNPACKL_H_P0S_P1, & mepcop1_16_mep_model::model_cpunpackl_h_P0S_P1_before, & mepcop1_16_mep_model::model_cpunpackl_h_P0S_P1_after, { { mepcop1_16_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_16_INSN_CPUNPACKL_W_P0S_P1, & mepcop1_16_mep_model::model_cpunpackl_w_P0S_P1_before, & mepcop1_16_mep_model::model_cpunpackl_w_P0S_P1_after, { { mepcop1_16_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_16_INSN_CPSEL_P0S_P1, & mepcop1_16_mep_model::model_cpsel_P0S_P1_before, & mepcop1_16_mep_model::model_cpsel_P0S_P1_after, { { mepcop1_16_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_16_INSN_CPFSFTBS0_P0S_P1, & mepcop1_16_mep_model::model_cpfsftbs0_P0S_P1_before, & mepcop1_16_mep_model::model_cpfsftbs0_P0S_P1_after, { { mepcop1_16_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_16_INSN_CPFSFTBS1_P0S_P1, & mepcop1_16_mep_model::model_cpfsftbs1_P0S_P1_before, & mepcop1_16_mep_model::model_cpfsftbs1_P0S_P1_after, { { mepcop1_16_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_16_INSN_CPMOV_P0S_P1, & mepcop1_16_mep_model::model_cpmov_P0S_P1_before, & mepcop1_16_mep_model::model_cpmov_P0S_P1_after, { { mepcop1_16_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_16_INSN_CPABSZ_B_P0S_P1, & mepcop1_16_mep_model::model_cpabsz_b_P0S_P1_before, & mepcop1_16_mep_model::model_cpabsz_b_P0S_P1_after, { { mepcop1_16_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_16_INSN_CPABSZ_H_P0S_P1, & mepcop1_16_mep_model::model_cpabsz_h_P0S_P1_before, & mepcop1_16_mep_model::model_cpabsz_h_P0S_P1_after, { { mepcop1_16_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_16_INSN_CPABSZ_W_P0S_P1, & mepcop1_16_mep_model::model_cpabsz_w_P0S_P1_before, & mepcop1_16_mep_model::model_cpabsz_w_P0S_P1_after, { { mepcop1_16_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_16_INSN_CPLDZ_H_P0S_P1, & mepcop1_16_mep_model::model_cpldz_h_P0S_P1_before, & mepcop1_16_mep_model::model_cpldz_h_P0S_P1_after, { { mepcop1_16_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_16_INSN_CPLDZ_W_P0S_P1, & mepcop1_16_mep_model::model_cpldz_w_P0S_P1_before, & mepcop1_16_mep_model::model_cpldz_w_P0S_P1_after, { { mepcop1_16_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_16_INSN_CPNORM_H_P0S_P1, & mepcop1_16_mep_model::model_cpnorm_h_P0S_P1_before, & mepcop1_16_mep_model::model_cpnorm_h_P0S_P1_after, { { mepcop1_16_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_16_INSN_CPNORM_W_P0S_P1, & mepcop1_16_mep_model::model_cpnorm_w_P0S_P1_before, & mepcop1_16_mep_model::model_cpnorm_w_P0S_P1_after, { { mepcop1_16_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_16_INSN_CPHADDU_B_P0S_P1, & mepcop1_16_mep_model::model_cphaddu_b_P0S_P1_before, & mepcop1_16_mep_model::model_cphaddu_b_P0S_P1_after, { { mepcop1_16_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_16_INSN_CPHADD_B_P0S_P1, & mepcop1_16_mep_model::model_cphadd_b_P0S_P1_before, & mepcop1_16_mep_model::model_cphadd_b_P0S_P1_after, { { mepcop1_16_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_16_INSN_CPHADD_H_P0S_P1, & mepcop1_16_mep_model::model_cphadd_h_P0S_P1_before, & mepcop1_16_mep_model::model_cphadd_h_P0S_P1_after, { { mepcop1_16_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_16_INSN_CPHADD_W_P0S_P1, & mepcop1_16_mep_model::model_cphadd_w_P0S_P1_before, & mepcop1_16_mep_model::model_cphadd_w_P0S_P1_after, { { mepcop1_16_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_16_INSN_CPCCADD_B_P0S_P1, & mepcop1_16_mep_model::model_cpccadd_b_P0S_P1_before, & mepcop1_16_mep_model::model_cpccadd_b_P0S_P1_after, { { mepcop1_16_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_16_INSN_CPBCAST_B_P0S_P1, & mepcop1_16_mep_model::model_cpbcast_b_P0S_P1_before, & mepcop1_16_mep_model::model_cpbcast_b_P0S_P1_after, { { mepcop1_16_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_16_INSN_CPBCAST_H_P0S_P1, & mepcop1_16_mep_model::model_cpbcast_h_P0S_P1_before, & mepcop1_16_mep_model::model_cpbcast_h_P0S_P1_after, { { mepcop1_16_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_16_INSN_CPBCAST_W_P0S_P1, & mepcop1_16_mep_model::model_cpbcast_w_P0S_P1_before, & mepcop1_16_mep_model::model_cpbcast_w_P0S_P1_after, { { mepcop1_16_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_16_INSN_CPEXTUU_B_P0S_P1, & mepcop1_16_mep_model::model_cpextuu_b_P0S_P1_before, & mepcop1_16_mep_model::model_cpextuu_b_P0S_P1_after, { { mepcop1_16_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_16_INSN_CPEXTU_B_P0S_P1, & mepcop1_16_mep_model::model_cpextu_b_P0S_P1_before, & mepcop1_16_mep_model::model_cpextu_b_P0S_P1_after, { { mepcop1_16_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_16_INSN_CPEXTUU_H_P0S_P1, & mepcop1_16_mep_model::model_cpextuu_h_P0S_P1_before, & mepcop1_16_mep_model::model_cpextuu_h_P0S_P1_after, { { mepcop1_16_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_16_INSN_CPEXTU_H_P0S_P1, & mepcop1_16_mep_model::model_cpextu_h_P0S_P1_before, & mepcop1_16_mep_model::model_cpextu_h_P0S_P1_after, { { mepcop1_16_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_16_INSN_CPEXTLU_B_P0S_P1, & mepcop1_16_mep_model::model_cpextlu_b_P0S_P1_before, & mepcop1_16_mep_model::model_cpextlu_b_P0S_P1_after, { { mepcop1_16_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_16_INSN_CPEXTL_B_P0S_P1, & mepcop1_16_mep_model::model_cpextl_b_P0S_P1_before, & mepcop1_16_mep_model::model_cpextl_b_P0S_P1_after, { { mepcop1_16_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_16_INSN_CPEXTLU_H_P0S_P1, & mepcop1_16_mep_model::model_cpextlu_h_P0S_P1_before, & mepcop1_16_mep_model::model_cpextlu_h_P0S_P1_after, { { mepcop1_16_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_16_INSN_CPEXTL_H_P0S_P1, & mepcop1_16_mep_model::model_cpextl_h_P0S_P1_before, & mepcop1_16_mep_model::model_cpextl_h_P0S_P1_after, { { mepcop1_16_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_16_INSN_CPCASTUB_H_P0S_P1, & mepcop1_16_mep_model::model_cpcastub_h_P0S_P1_before, & mepcop1_16_mep_model::model_cpcastub_h_P0S_P1_after, { { mepcop1_16_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_16_INSN_CPCASTB_H_P0S_P1, & mepcop1_16_mep_model::model_cpcastb_h_P0S_P1_before, & mepcop1_16_mep_model::model_cpcastb_h_P0S_P1_after, { { mepcop1_16_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_16_INSN_CPCASTUB_W_P0S_P1, & mepcop1_16_mep_model::model_cpcastub_w_P0S_P1_before, & mepcop1_16_mep_model::model_cpcastub_w_P0S_P1_after, { { mepcop1_16_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_16_INSN_CPCASTB_W_P0S_P1, & mepcop1_16_mep_model::model_cpcastb_w_P0S_P1_before, & mepcop1_16_mep_model::model_cpcastb_w_P0S_P1_after, { { mepcop1_16_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_16_INSN_CPCASTUH_W_P0S_P1, & mepcop1_16_mep_model::model_cpcastuh_w_P0S_P1_before, & mepcop1_16_mep_model::model_cpcastuh_w_P0S_P1_after, { { mepcop1_16_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_16_INSN_CPCASTH_W_P0S_P1, & mepcop1_16_mep_model::model_cpcasth_w_P0S_P1_before, & mepcop1_16_mep_model::model_cpcasth_w_P0S_P1_after, { { mepcop1_16_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_16_INSN_CDCASTUW_P0S_P1, & mepcop1_16_mep_model::model_cdcastuw_P0S_P1_before, & mepcop1_16_mep_model::model_cdcastuw_P0S_P1_after, { { mepcop1_16_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_16_INSN_CDCASTW_P0S_P1, & mepcop1_16_mep_model::model_cdcastw_P0S_P1_before, & mepcop1_16_mep_model::model_cdcastw_P0S_P1_after, { { mepcop1_16_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_16_INSN_CPMOVFRCSAR0_P0S_P1, & mepcop1_16_mep_model::model_cpmovfrcsar0_P0S_P1_before, & mepcop1_16_mep_model::model_cpmovfrcsar0_P0S_P1_after, { { mepcop1_16_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_16_INSN_CPMOVFRCSAR1_P0S_P1, & mepcop1_16_mep_model::model_cpmovfrcsar1_P0S_P1_before, & mepcop1_16_mep_model::model_cpmovfrcsar1_P0S_P1_after, { { mepcop1_16_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_16_INSN_CPMOVFRCC_P0S_P1, & mepcop1_16_mep_model::model_cpmovfrcc_P0S_P1_before, & mepcop1_16_mep_model::model_cpmovfrcc_P0S_P1_after, { { mepcop1_16_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_16_INSN_CPMOVTOCSAR0_P0S_P1, & mepcop1_16_mep_model::model_cpmovtocsar0_P0S_P1_before, & mepcop1_16_mep_model::model_cpmovtocsar0_P0S_P1_after, { { mepcop1_16_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_16_INSN_CPMOVTOCSAR1_P0S_P1, & mepcop1_16_mep_model::model_cpmovtocsar1_P0S_P1_before, & mepcop1_16_mep_model::model_cpmovtocsar1_P0S_P1_after, { { mepcop1_16_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_16_INSN_CPMOVTOCC_P0S_P1, & mepcop1_16_mep_model::model_cpmovtocc_P0S_P1_before, & mepcop1_16_mep_model::model_cpmovtocc_P0S_P1_after, { { mepcop1_16_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_16_INSN_CPCMPEQZ_B_P0S_P1, & mepcop1_16_mep_model::model_cpcmpeqz_b_P0S_P1_before, & mepcop1_16_mep_model::model_cpcmpeqz_b_P0S_P1_after, { { mepcop1_16_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_16_INSN_CPCMPEQ_B_P0S_P1, & mepcop1_16_mep_model::model_cpcmpeq_b_P0S_P1_before, & mepcop1_16_mep_model::model_cpcmpeq_b_P0S_P1_after, { { mepcop1_16_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_16_INSN_CPCMPEQ_H_P0S_P1, & mepcop1_16_mep_model::model_cpcmpeq_h_P0S_P1_before, & mepcop1_16_mep_model::model_cpcmpeq_h_P0S_P1_after, { { mepcop1_16_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_16_INSN_CPCMPEQ_W_P0S_P1, & mepcop1_16_mep_model::model_cpcmpeq_w_P0S_P1_before, & mepcop1_16_mep_model::model_cpcmpeq_w_P0S_P1_after, { { mepcop1_16_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_16_INSN_CPCMPNE_B_P0S_P1, & mepcop1_16_mep_model::model_cpcmpne_b_P0S_P1_before, & mepcop1_16_mep_model::model_cpcmpne_b_P0S_P1_after, { { mepcop1_16_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_16_INSN_CPCMPNE_H_P0S_P1, & mepcop1_16_mep_model::model_cpcmpne_h_P0S_P1_before, & mepcop1_16_mep_model::model_cpcmpne_h_P0S_P1_after, { { mepcop1_16_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_16_INSN_CPCMPNE_W_P0S_P1, & mepcop1_16_mep_model::model_cpcmpne_w_P0S_P1_before, & mepcop1_16_mep_model::model_cpcmpne_w_P0S_P1_after, { { mepcop1_16_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_16_INSN_CPCMPGTU_B_P0S_P1, & mepcop1_16_mep_model::model_cpcmpgtu_b_P0S_P1_before, & mepcop1_16_mep_model::model_cpcmpgtu_b_P0S_P1_after, { { mepcop1_16_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_16_INSN_CPCMPGT_B_P0S_P1, & mepcop1_16_mep_model::model_cpcmpgt_b_P0S_P1_before, & mepcop1_16_mep_model::model_cpcmpgt_b_P0S_P1_after, { { mepcop1_16_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_16_INSN_CPCMPGT_H_P0S_P1, & mepcop1_16_mep_model::model_cpcmpgt_h_P0S_P1_before, & mepcop1_16_mep_model::model_cpcmpgt_h_P0S_P1_after, { { mepcop1_16_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_16_INSN_CPCMPGTU_W_P0S_P1, & mepcop1_16_mep_model::model_cpcmpgtu_w_P0S_P1_before, & mepcop1_16_mep_model::model_cpcmpgtu_w_P0S_P1_after, { { mepcop1_16_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_16_INSN_CPCMPGT_W_P0S_P1, & mepcop1_16_mep_model::model_cpcmpgt_w_P0S_P1_before, & mepcop1_16_mep_model::model_cpcmpgt_w_P0S_P1_after, { { mepcop1_16_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_16_INSN_CPCMPGEU_B_P0S_P1, & mepcop1_16_mep_model::model_cpcmpgeu_b_P0S_P1_before, & mepcop1_16_mep_model::model_cpcmpgeu_b_P0S_P1_after, { { mepcop1_16_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_16_INSN_CPCMPGE_B_P0S_P1, & mepcop1_16_mep_model::model_cpcmpge_b_P0S_P1_before, & mepcop1_16_mep_model::model_cpcmpge_b_P0S_P1_after, { { mepcop1_16_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_16_INSN_CPCMPGE_H_P0S_P1, & mepcop1_16_mep_model::model_cpcmpge_h_P0S_P1_before, & mepcop1_16_mep_model::model_cpcmpge_h_P0S_P1_after, { { mepcop1_16_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_16_INSN_CPCMPGEU_W_P0S_P1, & mepcop1_16_mep_model::model_cpcmpgeu_w_P0S_P1_before, & mepcop1_16_mep_model::model_cpcmpgeu_w_P0S_P1_after, { { mepcop1_16_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_16_INSN_CPCMPGE_W_P0S_P1, & mepcop1_16_mep_model::model_cpcmpge_w_P0S_P1_before, & mepcop1_16_mep_model::model_cpcmpge_w_P0S_P1_after, { { mepcop1_16_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_16_INSN_CPADDA0U_B_P0S, & mepcop1_16_mep_model::model_cpadda0u_b_P0S_before, & mepcop1_16_mep_model::model_cpadda0u_b_P0S_after, { { mepcop1_16_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_16_INSN_CPADDA0_B_P0S, & mepcop1_16_mep_model::model_cpadda0_b_P0S_before, & mepcop1_16_mep_model::model_cpadda0_b_P0S_after, { { mepcop1_16_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_16_INSN_CPADDUA0_H_P0S, & mepcop1_16_mep_model::model_cpaddua0_h_P0S_before, & mepcop1_16_mep_model::model_cpaddua0_h_P0S_after, { { mepcop1_16_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_16_INSN_CPADDLA0_H_P0S, & mepcop1_16_mep_model::model_cpaddla0_h_P0S_before, & mepcop1_16_mep_model::model_cpaddla0_h_P0S_after, { { mepcop1_16_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_16_INSN_CPADDACA0U_B_P0S, & mepcop1_16_mep_model::model_cpaddaca0u_b_P0S_before, & mepcop1_16_mep_model::model_cpaddaca0u_b_P0S_after, { { mepcop1_16_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_16_INSN_CPADDACA0_B_P0S, & mepcop1_16_mep_model::model_cpaddaca0_b_P0S_before, & mepcop1_16_mep_model::model_cpaddaca0_b_P0S_after, { { mepcop1_16_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_16_INSN_CPADDACUA0_H_P0S, & mepcop1_16_mep_model::model_cpaddacua0_h_P0S_before, & mepcop1_16_mep_model::model_cpaddacua0_h_P0S_after, { { mepcop1_16_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_16_INSN_CPADDACLA0_H_P0S, & mepcop1_16_mep_model::model_cpaddacla0_h_P0S_before, & mepcop1_16_mep_model::model_cpaddacla0_h_P0S_after, { { mepcop1_16_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_16_INSN_CPSUBA0U_B_P0S, & mepcop1_16_mep_model::model_cpsuba0u_b_P0S_before, & mepcop1_16_mep_model::model_cpsuba0u_b_P0S_after, { { mepcop1_16_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_16_INSN_CPSUBA0_B_P0S, & mepcop1_16_mep_model::model_cpsuba0_b_P0S_before, & mepcop1_16_mep_model::model_cpsuba0_b_P0S_after, { { mepcop1_16_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_16_INSN_CPSUBUA0_H_P0S, & mepcop1_16_mep_model::model_cpsubua0_h_P0S_before, & mepcop1_16_mep_model::model_cpsubua0_h_P0S_after, { { mepcop1_16_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_16_INSN_CPSUBLA0_H_P0S, & mepcop1_16_mep_model::model_cpsubla0_h_P0S_before, & mepcop1_16_mep_model::model_cpsubla0_h_P0S_after, { { mepcop1_16_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_16_INSN_CPSUBACA0U_B_P0S, & mepcop1_16_mep_model::model_cpsubaca0u_b_P0S_before, & mepcop1_16_mep_model::model_cpsubaca0u_b_P0S_after, { { mepcop1_16_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_16_INSN_CPSUBACA0_B_P0S, & mepcop1_16_mep_model::model_cpsubaca0_b_P0S_before, & mepcop1_16_mep_model::model_cpsubaca0_b_P0S_after, { { mepcop1_16_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_16_INSN_CPSUBACUA0_H_P0S, & mepcop1_16_mep_model::model_cpsubacua0_h_P0S_before, & mepcop1_16_mep_model::model_cpsubacua0_h_P0S_after, { { mepcop1_16_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_16_INSN_CPSUBACLA0_H_P0S, & mepcop1_16_mep_model::model_cpsubacla0_h_P0S_before, & mepcop1_16_mep_model::model_cpsubacla0_h_P0S_after, { { mepcop1_16_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_16_INSN_CPABSA0U_B_P0S, & mepcop1_16_mep_model::model_cpabsa0u_b_P0S_before, & mepcop1_16_mep_model::model_cpabsa0u_b_P0S_after, { { mepcop1_16_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_16_INSN_CPABSA0_B_P0S, & mepcop1_16_mep_model::model_cpabsa0_b_P0S_before, & mepcop1_16_mep_model::model_cpabsa0_b_P0S_after, { { mepcop1_16_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_16_INSN_CPABSUA0_H_P0S, & mepcop1_16_mep_model::model_cpabsua0_h_P0S_before, & mepcop1_16_mep_model::model_cpabsua0_h_P0S_after, { { mepcop1_16_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_16_INSN_CPABSLA0_H_P0S, & mepcop1_16_mep_model::model_cpabsla0_h_P0S_before, & mepcop1_16_mep_model::model_cpabsla0_h_P0S_after, { { mepcop1_16_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_16_INSN_CPSADA0U_B_P0S, & mepcop1_16_mep_model::model_cpsada0u_b_P0S_before, & mepcop1_16_mep_model::model_cpsada0u_b_P0S_after, { { mepcop1_16_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_16_INSN_CPSADA0_B_P0S, & mepcop1_16_mep_model::model_cpsada0_b_P0S_before, & mepcop1_16_mep_model::model_cpsada0_b_P0S_after, { { mepcop1_16_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_16_INSN_CPSADUA0_H_P0S, & mepcop1_16_mep_model::model_cpsadua0_h_P0S_before, & mepcop1_16_mep_model::model_cpsadua0_h_P0S_after, { { mepcop1_16_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_16_INSN_CPSADLA0_H_P0S, & mepcop1_16_mep_model::model_cpsadla0_h_P0S_before, & mepcop1_16_mep_model::model_cpsadla0_h_P0S_after, { { mepcop1_16_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_16_INSN_CPSETA0_H_P0S, & mepcop1_16_mep_model::model_cpseta0_h_P0S_before, & mepcop1_16_mep_model::model_cpseta0_h_P0S_after, { { mepcop1_16_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_16_INSN_CPSETUA0_W_P0S, & mepcop1_16_mep_model::model_cpsetua0_w_P0S_before, & mepcop1_16_mep_model::model_cpsetua0_w_P0S_after, { { mepcop1_16_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_16_INSN_CPSETLA0_W_P0S, & mepcop1_16_mep_model::model_cpsetla0_w_P0S_before, & mepcop1_16_mep_model::model_cpsetla0_w_P0S_after, { { mepcop1_16_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_16_INSN_CPMOVA0_B_P0S, & mepcop1_16_mep_model::model_cpmova0_b_P0S_before, & mepcop1_16_mep_model::model_cpmova0_b_P0S_after, { { mepcop1_16_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_16_INSN_CPMOVUA0_H_P0S, & mepcop1_16_mep_model::model_cpmovua0_h_P0S_before, & mepcop1_16_mep_model::model_cpmovua0_h_P0S_after, { { mepcop1_16_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_16_INSN_CPMOVLA0_H_P0S, & mepcop1_16_mep_model::model_cpmovla0_h_P0S_before, & mepcop1_16_mep_model::model_cpmovla0_h_P0S_after, { { mepcop1_16_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_16_INSN_CPMOVUUA0_W_P0S, & mepcop1_16_mep_model::model_cpmovuua0_w_P0S_before, & mepcop1_16_mep_model::model_cpmovuua0_w_P0S_after, { { mepcop1_16_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_16_INSN_CPMOVULA0_W_P0S, & mepcop1_16_mep_model::model_cpmovula0_w_P0S_before, & mepcop1_16_mep_model::model_cpmovula0_w_P0S_after, { { mepcop1_16_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_16_INSN_CPMOVLUA0_W_P0S, & mepcop1_16_mep_model::model_cpmovlua0_w_P0S_before, & mepcop1_16_mep_model::model_cpmovlua0_w_P0S_after, { { mepcop1_16_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_16_INSN_CPMOVLLA0_W_P0S, & mepcop1_16_mep_model::model_cpmovlla0_w_P0S_before, & mepcop1_16_mep_model::model_cpmovlla0_w_P0S_after, { { mepcop1_16_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_16_INSN_CPPACKA0U_B_P0S, & mepcop1_16_mep_model::model_cppacka0u_b_P0S_before, & mepcop1_16_mep_model::model_cppacka0u_b_P0S_after, { { mepcop1_16_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_16_INSN_CPPACKA0_B_P0S, & mepcop1_16_mep_model::model_cppacka0_b_P0S_before, & mepcop1_16_mep_model::model_cppacka0_b_P0S_after, { { mepcop1_16_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_16_INSN_CPPACKUA0_H_P0S, & mepcop1_16_mep_model::model_cppackua0_h_P0S_before, & mepcop1_16_mep_model::model_cppackua0_h_P0S_after, { { mepcop1_16_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_16_INSN_CPPACKLA0_H_P0S, & mepcop1_16_mep_model::model_cppackla0_h_P0S_before, & mepcop1_16_mep_model::model_cppackla0_h_P0S_after, { { mepcop1_16_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_16_INSN_CPPACKUA0_W_P0S, & mepcop1_16_mep_model::model_cppackua0_w_P0S_before, & mepcop1_16_mep_model::model_cppackua0_w_P0S_after, { { mepcop1_16_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_16_INSN_CPPACKLA0_W_P0S, & mepcop1_16_mep_model::model_cppackla0_w_P0S_before, & mepcop1_16_mep_model::model_cppackla0_w_P0S_after, { { mepcop1_16_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_16_INSN_CPMOVHUA0_W_P0S, & mepcop1_16_mep_model::model_cpmovhua0_w_P0S_before, & mepcop1_16_mep_model::model_cpmovhua0_w_P0S_after, { { mepcop1_16_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_16_INSN_CPMOVHLA0_W_P0S, & mepcop1_16_mep_model::model_cpmovhla0_w_P0S_before, & mepcop1_16_mep_model::model_cpmovhla0_w_P0S_after, { { mepcop1_16_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_16_INSN_CPACSUMA0_P0S, & mepcop1_16_mep_model::model_cpacsuma0_P0S_before, & mepcop1_16_mep_model::model_cpacsuma0_P0S_after, { { mepcop1_16_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_16_INSN_CPACCPA0_P0S, & mepcop1_16_mep_model::model_cpaccpa0_P0S_before, & mepcop1_16_mep_model::model_cpaccpa0_P0S_after, { { mepcop1_16_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_16_INSN_CPSRLA0_P0S, & mepcop1_16_mep_model::model_cpsrla0_P0S_before, & mepcop1_16_mep_model::model_cpsrla0_P0S_after, { { mepcop1_16_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_16_INSN_CPSRAA0_P0S, & mepcop1_16_mep_model::model_cpsraa0_P0S_before, & mepcop1_16_mep_model::model_cpsraa0_P0S_after, { { mepcop1_16_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_16_INSN_CPSLLA0_P0S, & mepcop1_16_mep_model::model_cpslla0_P0S_before, & mepcop1_16_mep_model::model_cpslla0_P0S_after, { { mepcop1_16_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_16_INSN_CPSRLIA0_P0S, & mepcop1_16_mep_model::model_cpsrlia0_P0S_before, & mepcop1_16_mep_model::model_cpsrlia0_P0S_after, { { mepcop1_16_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_16_INSN_CPSRAIA0_P0S, & mepcop1_16_mep_model::model_cpsraia0_P0S_before, & mepcop1_16_mep_model::model_cpsraia0_P0S_after, { { mepcop1_16_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_16_INSN_CPSLLIA0_P0S, & mepcop1_16_mep_model::model_cpsllia0_P0S_before, & mepcop1_16_mep_model::model_cpsllia0_P0S_after, { { mepcop1_16_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_16_INSN_CPFSFTBA0S0U_B_P0S, & mepcop1_16_mep_model::model_cpfsftba0s0u_b_P0S_before, & mepcop1_16_mep_model::model_cpfsftba0s0u_b_P0S_after, { { mepcop1_16_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_16_INSN_CPFSFTBA0S0_B_P0S, & mepcop1_16_mep_model::model_cpfsftba0s0_b_P0S_before, & mepcop1_16_mep_model::model_cpfsftba0s0_b_P0S_after, { { mepcop1_16_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_16_INSN_CPFSFTBUA0S0_H_P0S, & mepcop1_16_mep_model::model_cpfsftbua0s0_h_P0S_before, & mepcop1_16_mep_model::model_cpfsftbua0s0_h_P0S_after, { { mepcop1_16_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_16_INSN_CPFSFTBLA0S0_H_P0S, & mepcop1_16_mep_model::model_cpfsftbla0s0_h_P0S_before, & mepcop1_16_mep_model::model_cpfsftbla0s0_h_P0S_after, { { mepcop1_16_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_16_INSN_CPFACA0S0U_B_P0S, & mepcop1_16_mep_model::model_cpfaca0s0u_b_P0S_before, & mepcop1_16_mep_model::model_cpfaca0s0u_b_P0S_after, { { mepcop1_16_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_16_INSN_CPFACA0S0_B_P0S, & mepcop1_16_mep_model::model_cpfaca0s0_b_P0S_before, & mepcop1_16_mep_model::model_cpfaca0s0_b_P0S_after, { { mepcop1_16_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_16_INSN_CPFACUA0S0_H_P0S, & mepcop1_16_mep_model::model_cpfacua0s0_h_P0S_before, & mepcop1_16_mep_model::model_cpfacua0s0_h_P0S_after, { { mepcop1_16_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_16_INSN_CPFACLA0S0_H_P0S, & mepcop1_16_mep_model::model_cpfacla0s0_h_P0S_before, & mepcop1_16_mep_model::model_cpfacla0s0_h_P0S_after, { { mepcop1_16_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_16_INSN_CPFSFTBA0S1U_B_P0S, & mepcop1_16_mep_model::model_cpfsftba0s1u_b_P0S_before, & mepcop1_16_mep_model::model_cpfsftba0s1u_b_P0S_after, { { mepcop1_16_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_16_INSN_CPFSFTBA0S1_B_P0S, & mepcop1_16_mep_model::model_cpfsftba0s1_b_P0S_before, & mepcop1_16_mep_model::model_cpfsftba0s1_b_P0S_after, { { mepcop1_16_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_16_INSN_CPFSFTBUA0S1_H_P0S, & mepcop1_16_mep_model::model_cpfsftbua0s1_h_P0S_before, & mepcop1_16_mep_model::model_cpfsftbua0s1_h_P0S_after, { { mepcop1_16_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_16_INSN_CPFSFTBLA0S1_H_P0S, & mepcop1_16_mep_model::model_cpfsftbla0s1_h_P0S_before, & mepcop1_16_mep_model::model_cpfsftbla0s1_h_P0S_after, { { mepcop1_16_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_16_INSN_CPFACA0S1U_B_P0S, & mepcop1_16_mep_model::model_cpfaca0s1u_b_P0S_before, & mepcop1_16_mep_model::model_cpfaca0s1u_b_P0S_after, { { mepcop1_16_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_16_INSN_CPFACA0S1_B_P0S, & mepcop1_16_mep_model::model_cpfaca0s1_b_P0S_before, & mepcop1_16_mep_model::model_cpfaca0s1_b_P0S_after, { { mepcop1_16_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_16_INSN_CPFACUA0S1_H_P0S, & mepcop1_16_mep_model::model_cpfacua0s1_h_P0S_before, & mepcop1_16_mep_model::model_cpfacua0s1_h_P0S_after, { { mepcop1_16_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_16_INSN_CPFACLA0S1_H_P0S, & mepcop1_16_mep_model::model_cpfacla0s1_h_P0S_before, & mepcop1_16_mep_model::model_cpfacla0s1_h_P0S_after, { { mepcop1_16_mep_model::UNIT_U_EXEC, 1, 1 } } }, +}; + diff --git a/sid/component/cgen-cpu/mep/mep-cop1-16-model.h b/sid/component/cgen-cpu/mep/mep-cop1-16-model.h new file mode 100644 index 0000000000..2d340d794a --- /dev/null +++ b/sid/component/cgen-cpu/mep/mep-cop1-16-model.h @@ -0,0 +1,440 @@ +/* Simulator model support for mepcop1_16. + +THIS FILE IS MACHINE GENERATED WITH CGEN. + +Copyright (C) 2000-2007 Red Hat, Inc. + +This file is part of the Red Hat simulators. + + +*/ + +#ifndef MEPCOP1_16_MODEL_H +#define MEPCOP1_16_MODEL_H + +#include "cgen-cpu.h" +#include "cgen-model.h" + +namespace mep_ext1 +{ +using namespace cgen; + +class mepcop1_16_mep_model : public cgen_model +{ +public: + mepcop1_16_mep_model (mep_ext1_cpu *cpu); + + // Call the proper unit modelling function for the given insn. + UINT model_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache* sem) + { + return (this->*(timing[sem->idesc->sem_index].model_before)) (current_cpu, sem); + } + UINT model_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache* sem) + { + return (this->*(timing[sem->idesc->sem_index].model_after)) (current_cpu, sem); + } + +// Function unit handlers +// To be overridden as needed. + virtual UINT model_u_store_ctrl_reg_before (mep_ext1_cpu *cpu, const struct mepcop1_16_idesc *idesc, int unit_num, INT /*storereg*/) + { + return 0; + } + virtual UINT model_u_store_ctrl_reg_after (mep_ext1_cpu *cpu, const struct mepcop1_16_idesc *idesc, int unit_num, unsigned long long referenced, INT /*storereg*/) + { + return timing[idesc->sem_index].units[unit_num].done; + } + virtual UINT model_u_use_ctrl_reg_before (mep_ext1_cpu *cpu, const struct mepcop1_16_idesc *idesc, int unit_num, INT /*usereg*/) + { + return 0; + } + virtual UINT model_u_use_ctrl_reg_after (mep_ext1_cpu *cpu, const struct mepcop1_16_idesc *idesc, int unit_num, unsigned long long referenced, INT /*usereg*/) + { + return timing[idesc->sem_index].units[unit_num].done; + } + virtual UINT model_u_use_gpr_before (mep_ext1_cpu *cpu, const struct mepcop1_16_idesc *idesc, int unit_num, INT /*usereg*/) + { + return 0; + } + virtual UINT model_u_use_gpr_after (mep_ext1_cpu *cpu, const struct mepcop1_16_idesc *idesc, int unit_num, unsigned long long referenced, INT /*usereg*/) + { + return timing[idesc->sem_index].units[unit_num].done; + } + virtual UINT model_u_mul_gpr_before (mep_ext1_cpu *cpu, const struct mepcop1_16_idesc *idesc, int unit_num, INT /*resultreg*/) + { + return 0; + } + virtual UINT model_u_mul_gpr_after (mep_ext1_cpu *cpu, const struct mepcop1_16_idesc *idesc, int unit_num, unsigned long long referenced, INT /*resultreg*/) + { + return timing[idesc->sem_index].units[unit_num].done; + } + virtual UINT model_u_ldcb_gpr_before (mep_ext1_cpu *cpu, const struct mepcop1_16_idesc *idesc, int unit_num, INT /*loadreg*/) + { + return 0; + } + virtual UINT model_u_ldcb_gpr_after (mep_ext1_cpu *cpu, const struct mepcop1_16_idesc *idesc, int unit_num, unsigned long long referenced, INT /*loadreg*/) + { + return timing[idesc->sem_index].units[unit_num].done; + } + virtual UINT model_u_load_gpr_before (mep_ext1_cpu *cpu, const struct mepcop1_16_idesc *idesc, int unit_num, INT /*loadreg*/) + { + return 0; + } + virtual UINT model_u_load_gpr_after (mep_ext1_cpu *cpu, const struct mepcop1_16_idesc *idesc, int unit_num, unsigned long long referenced, INT /*loadreg*/) + { + return timing[idesc->sem_index].units[unit_num].done; + } + virtual UINT model_u_ldcb_before (mep_ext1_cpu *cpu, const struct mepcop1_16_idesc *idesc, int unit_num) + { + return 0; + } + virtual UINT model_u_ldcb_after (mep_ext1_cpu *cpu, const struct mepcop1_16_idesc *idesc, int unit_num, unsigned long long referenced) + { + return timing[idesc->sem_index].units[unit_num].done; + } + virtual UINT model_u_stcb_before (mep_ext1_cpu *cpu, const struct mepcop1_16_idesc *idesc, int unit_num) + { + return 0; + } + virtual UINT model_u_stcb_after (mep_ext1_cpu *cpu, const struct mepcop1_16_idesc *idesc, int unit_num, unsigned long long referenced) + { + return timing[idesc->sem_index].units[unit_num].done; + } + virtual UINT model_u_divide_before (mep_ext1_cpu *cpu, const struct mepcop1_16_idesc *idesc, int unit_num) + { + return 0; + } + virtual UINT model_u_divide_after (mep_ext1_cpu *cpu, const struct mepcop1_16_idesc *idesc, int unit_num, unsigned long long referenced) + { + return timing[idesc->sem_index].units[unit_num].done; + } + virtual UINT model_u_multiply_before (mep_ext1_cpu *cpu, const struct mepcop1_16_idesc *idesc, int unit_num) + { + return 0; + } + virtual UINT model_u_multiply_after (mep_ext1_cpu *cpu, const struct mepcop1_16_idesc *idesc, int unit_num, unsigned long long referenced) + { + return timing[idesc->sem_index].units[unit_num].done; + } + virtual UINT model_u_branch_before (mep_ext1_cpu *cpu, const struct mepcop1_16_idesc *idesc, int unit_num) + { + return 0; + } + virtual UINT model_u_branch_after (mep_ext1_cpu *cpu, const struct mepcop1_16_idesc *idesc, int unit_num, unsigned long long referenced) + { + return timing[idesc->sem_index].units[unit_num].done; + } + virtual UINT model_u_exec_before (mep_ext1_cpu *cpu, const struct mepcop1_16_idesc *idesc, int unit_num) + { + return 0; + } + virtual UINT model_u_exec_after (mep_ext1_cpu *cpu, const struct mepcop1_16_idesc *idesc, int unit_num, unsigned long long referenced) + { + return timing[idesc->sem_index].units[unit_num].done; + } + +protected: + // These methods call the appropriate unit modeller(s) for each insn. + UINT model_c0nop_P0_P0S_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_c0nop_P0_P0S_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpadd3_b_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpadd3_b_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpadd3_h_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpadd3_h_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpadd3_w_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpadd3_w_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpunpacku_b_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpunpacku_b_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpunpacku_h_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpunpacku_h_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpunpacku_w_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpunpacku_w_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpunpackl_b_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpunpackl_b_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpunpackl_h_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpunpackl_h_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpunpackl_w_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpunpackl_w_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpsel_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpsel_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpfsftbs0_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpfsftbs0_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpfsftbs1_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpfsftbs1_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpmov_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpmov_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpabsz_b_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpabsz_b_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpabsz_h_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpabsz_h_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpabsz_w_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpabsz_w_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpldz_h_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpldz_h_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpldz_w_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpldz_w_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpnorm_h_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpnorm_h_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpnorm_w_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpnorm_w_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cphaddu_b_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cphaddu_b_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cphadd_b_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cphadd_b_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cphadd_h_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cphadd_h_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cphadd_w_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cphadd_w_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpccadd_b_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpccadd_b_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpbcast_b_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpbcast_b_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpbcast_h_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpbcast_h_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpbcast_w_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpbcast_w_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpextuu_b_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpextuu_b_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpextu_b_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpextu_b_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpextuu_h_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpextuu_h_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpextu_h_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpextu_h_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpextlu_b_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpextlu_b_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpextl_b_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpextl_b_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpextlu_h_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpextlu_h_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpextl_h_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpextl_h_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpcastub_h_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpcastub_h_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpcastb_h_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpcastb_h_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpcastub_w_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpcastub_w_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpcastb_w_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpcastb_w_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpcastuh_w_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpcastuh_w_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpcasth_w_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpcasth_w_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cdcastuw_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cdcastuw_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cdcastw_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cdcastw_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpmovfrcsar0_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpmovfrcsar0_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpmovfrcsar1_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpmovfrcsar1_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpmovfrcc_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpmovfrcc_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpmovtocsar0_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpmovtocsar0_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpmovtocsar1_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpmovtocsar1_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpmovtocc_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpmovtocc_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpcmpeqz_b_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpcmpeqz_b_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpcmpeq_b_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpcmpeq_b_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpcmpeq_h_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpcmpeq_h_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpcmpeq_w_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpcmpeq_w_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpcmpne_b_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpcmpne_b_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpcmpne_h_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpcmpne_h_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpcmpne_w_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpcmpne_w_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpcmpgtu_b_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpcmpgtu_b_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpcmpgt_b_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpcmpgt_b_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpcmpgt_h_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpcmpgt_h_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpcmpgtu_w_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpcmpgtu_w_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpcmpgt_w_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpcmpgt_w_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpcmpgeu_b_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpcmpgeu_b_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpcmpge_b_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpcmpge_b_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpcmpge_h_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpcmpge_h_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpcmpgeu_w_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpcmpgeu_w_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpcmpge_w_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpcmpge_w_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpadda0u_b_P0S_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpadda0u_b_P0S_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpadda0_b_P0S_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpadda0_b_P0S_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpaddua0_h_P0S_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpaddua0_h_P0S_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpaddla0_h_P0S_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpaddla0_h_P0S_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpaddaca0u_b_P0S_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpaddaca0u_b_P0S_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpaddaca0_b_P0S_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpaddaca0_b_P0S_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpaddacua0_h_P0S_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpaddacua0_h_P0S_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpaddacla0_h_P0S_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpaddacla0_h_P0S_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpsuba0u_b_P0S_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpsuba0u_b_P0S_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpsuba0_b_P0S_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpsuba0_b_P0S_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpsubua0_h_P0S_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpsubua0_h_P0S_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpsubla0_h_P0S_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpsubla0_h_P0S_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpsubaca0u_b_P0S_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpsubaca0u_b_P0S_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpsubaca0_b_P0S_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpsubaca0_b_P0S_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpsubacua0_h_P0S_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpsubacua0_h_P0S_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpsubacla0_h_P0S_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpsubacla0_h_P0S_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpabsa0u_b_P0S_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpabsa0u_b_P0S_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpabsa0_b_P0S_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpabsa0_b_P0S_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpabsua0_h_P0S_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpabsua0_h_P0S_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpabsla0_h_P0S_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpabsla0_h_P0S_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpsada0u_b_P0S_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpsada0u_b_P0S_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpsada0_b_P0S_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpsada0_b_P0S_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpsadua0_h_P0S_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpsadua0_h_P0S_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpsadla0_h_P0S_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpsadla0_h_P0S_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpseta0_h_P0S_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpseta0_h_P0S_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpsetua0_w_P0S_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpsetua0_w_P0S_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpsetla0_w_P0S_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpsetla0_w_P0S_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpmova0_b_P0S_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpmova0_b_P0S_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpmovua0_h_P0S_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpmovua0_h_P0S_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpmovla0_h_P0S_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpmovla0_h_P0S_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpmovuua0_w_P0S_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpmovuua0_w_P0S_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpmovula0_w_P0S_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpmovula0_w_P0S_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpmovlua0_w_P0S_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpmovlua0_w_P0S_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpmovlla0_w_P0S_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpmovlla0_w_P0S_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cppacka0u_b_P0S_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cppacka0u_b_P0S_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cppacka0_b_P0S_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cppacka0_b_P0S_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cppackua0_h_P0S_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cppackua0_h_P0S_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cppackla0_h_P0S_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cppackla0_h_P0S_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cppackua0_w_P0S_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cppackua0_w_P0S_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cppackla0_w_P0S_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cppackla0_w_P0S_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpmovhua0_w_P0S_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpmovhua0_w_P0S_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpmovhla0_w_P0S_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpmovhla0_w_P0S_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpacsuma0_P0S_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpacsuma0_P0S_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpaccpa0_P0S_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpaccpa0_P0S_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpsrla0_P0S_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpsrla0_P0S_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpsraa0_P0S_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpsraa0_P0S_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpslla0_P0S_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpslla0_P0S_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpsrlia0_P0S_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpsrlia0_P0S_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpsraia0_P0S_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpsraia0_P0S_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpsllia0_P0S_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpsllia0_P0S_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpfsftba0s0u_b_P0S_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpfsftba0s0u_b_P0S_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpfsftba0s0_b_P0S_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpfsftba0s0_b_P0S_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpfsftbua0s0_h_P0S_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpfsftbua0s0_h_P0S_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpfsftbla0s0_h_P0S_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpfsftbla0s0_h_P0S_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpfaca0s0u_b_P0S_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpfaca0s0u_b_P0S_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpfaca0s0_b_P0S_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpfaca0s0_b_P0S_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpfacua0s0_h_P0S_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpfacua0s0_h_P0S_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpfacla0s0_h_P0S_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpfacla0s0_h_P0S_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpfsftba0s1u_b_P0S_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpfsftba0s1u_b_P0S_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpfsftba0s1_b_P0S_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpfsftba0s1_b_P0S_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpfsftbua0s1_h_P0S_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpfsftbua0s1_h_P0S_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpfsftbla0s1_h_P0S_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpfsftbla0s1_h_P0S_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpfaca0s1u_b_P0S_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpfaca0s1u_b_P0S_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpfaca0s1_b_P0S_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpfaca0s1_b_P0S_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpfacua0s1_h_P0S_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpfacua0s1_h_P0S_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpfacla0s1_h_P0S_before (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + UINT model_cpfacla0s1_h_P0S_after (mep_ext1_cpu *current_cpu, mepcop1_16_scache *sem); + + /* Enum declaration for unit types. */ +typedef enum unit_number { + UNIT_NONE, UNIT_U_STORE_CTRL_REG, UNIT_U_USE_CTRL_REG, UNIT_U_USE_GPR + , UNIT_U_MUL_GPR, UNIT_U_LDCB_GPR, UNIT_U_LOAD_GPR, UNIT_U_LDCB + , UNIT_U_STCB, UNIT_U_DIVIDE, UNIT_U_MULTIPLY, UNIT_U_BRANCH + , UNIT_U_EXEC, UNIT_MAX +} UNIT_NUMBER; + + struct unit { + unit_number unit; + UINT issue; + UINT done; + }; + + static const int MAX_UNITS = 1; + + typedef UINT (mepcop1_16_mep_model::*model_function) (mep_ext1_cpu* current_cpu, mepcop1_16_scache* sem); + + struct insn_timing { + // This is an integer that identifies this insn. + UINT num; + // Functions to handle insn-specific profiling. + model_function model_before; + model_function model_after; + // Array of function units used by this insn. + unit units[MAX_UNITS]; + }; + + static const insn_timing timing[]; +}; + +} // namespace mep_ext1 + +#endif // MEPCOP1_16_MODEL_H diff --git a/sid/component/cgen-cpu/mep/mep-cop1-16-sem.cxx b/sid/component/cgen-cpu/mep/mep-cop1-16-sem.cxx new file mode 100644 index 0000000000..67e0e36995 --- /dev/null +++ b/sid/component/cgen-cpu/mep/mep-cop1-16-sem.cxx @@ -0,0 +1,3297 @@ +/* Simulator instruction semantics for mepcop1_16. + +THIS FILE IS MACHINE GENERATED WITH CGEN. + +Copyright (C) 2000-2007 Red Hat, Inc. + +This file is part of the Red Hat simulators. + + +*/ + + +#if HAVE_CONFIG_H +#include "config.h" +#endif +#include "mep_ext1.h" + +using namespace mep_ext1; // FIXME: namespace organization still wip +#define GET_ATTR(name) GET_ATTR_##name () + + +// ********** x-invalid: --invalid-- + +sem_status +mepcop1_16_sem_x_invalid (mep_ext1_cpu* current_cpu, mepcop1_16_scache* sem) +{ +#define FLD(f) abuf->fields.fmt_empty.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_16_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 0; + + { + current_cpu->invalid_insn (pc); + assert (0); + /* NOTREACHED */ + } + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** c0nop_P0_P0S: c0nop + +sem_status +mepcop1_16_sem_c0nop_P0_P0S (mep_ext1_cpu* current_cpu, mepcop1_16_scache* sem) +{ +#define FLD(f) abuf->fields.fmt_empty.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_16_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_c0nop (pc); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpadd3_b_P0S_P1: cpadd3.b $crop,$crqp,$crpp + +sem_status +mepcop1_16_sem_cpadd3_b_P0S_P1 (mep_ext1_cpu* current_cpu, mepcop1_16_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_16_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpadd3_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpadd3_h_P0S_P1: cpadd3.h $crop,$crqp,$crpp + +sem_status +mepcop1_16_sem_cpadd3_h_P0S_P1 (mep_ext1_cpu* current_cpu, mepcop1_16_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_16_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpadd3_h (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpadd3_w_P0S_P1: cpadd3.w $crop,$crqp,$crpp + +sem_status +mepcop1_16_sem_cpadd3_w_P0S_P1 (mep_ext1_cpu* current_cpu, mepcop1_16_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_16_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpadd3_w (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpunpacku_b_P0S_P1: cpunpacku.b $crop,$crqp,$crpp + +sem_status +mepcop1_16_sem_cpunpacku_b_P0S_P1 (mep_ext1_cpu* current_cpu, mepcop1_16_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_16_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpunpacku_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpunpacku_h_P0S_P1: cpunpacku.h $crop,$crqp,$crpp + +sem_status +mepcop1_16_sem_cpunpacku_h_P0S_P1 (mep_ext1_cpu* current_cpu, mepcop1_16_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_16_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpunpacku_h (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpunpacku_w_P0S_P1: cpunpacku.w $crop,$crqp,$crpp + +sem_status +mepcop1_16_sem_cpunpacku_w_P0S_P1 (mep_ext1_cpu* current_cpu, mepcop1_16_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_16_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpunpacku_w (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpunpackl_b_P0S_P1: cpunpackl.b $crop,$crqp,$crpp + +sem_status +mepcop1_16_sem_cpunpackl_b_P0S_P1 (mep_ext1_cpu* current_cpu, mepcop1_16_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_16_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpunpackl_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpunpackl_h_P0S_P1: cpunpackl.h $crop,$crqp,$crpp + +sem_status +mepcop1_16_sem_cpunpackl_h_P0S_P1 (mep_ext1_cpu* current_cpu, mepcop1_16_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_16_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpunpackl_h (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpunpackl_w_P0S_P1: cpunpackl.w $crop,$crqp,$crpp + +sem_status +mepcop1_16_sem_cpunpackl_w_P0S_P1 (mep_ext1_cpu* current_cpu, mepcop1_16_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_16_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpunpackl_w (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpsel_P0S_P1: cpsel $crop,$crqp,$crpp + +sem_status +mepcop1_16_sem_cpsel_P0S_P1 (mep_ext1_cpu* current_cpu, mepcop1_16_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_16_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpsel (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpfsftbs0_P0S_P1: cpfsftbs0 $crop,$crqp,$crpp + +sem_status +mepcop1_16_sem_cpfsftbs0_P0S_P1 (mep_ext1_cpu* current_cpu, mepcop1_16_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_16_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpfsftbs0 (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpfsftbs1_P0S_P1: cpfsftbs1 $crop,$crqp,$crpp + +sem_status +mepcop1_16_sem_cpfsftbs1_P0S_P1 (mep_ext1_cpu* current_cpu, mepcop1_16_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_16_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpfsftbs1 (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpmov_P0S_P1: cpmov $crop,$crqp + +sem_status +mepcop1_16_sem_cpmov_P0S_P1 (mep_ext1_cpu* current_cpu, mepcop1_16_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_16_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpmov (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpabsz_b_P0S_P1: cpabsz.b $crop,$crqp + +sem_status +mepcop1_16_sem_cpabsz_b_P0S_P1 (mep_ext1_cpu* current_cpu, mepcop1_16_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_16_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpabsz_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpabsz_h_P0S_P1: cpabsz.h $crop,$crqp + +sem_status +mepcop1_16_sem_cpabsz_h_P0S_P1 (mep_ext1_cpu* current_cpu, mepcop1_16_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_16_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpabsz_h (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpabsz_w_P0S_P1: cpabsz.w $crop,$crqp + +sem_status +mepcop1_16_sem_cpabsz_w_P0S_P1 (mep_ext1_cpu* current_cpu, mepcop1_16_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_16_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpabsz_w (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpldz_h_P0S_P1: cpldz.h $crop,$crqp + +sem_status +mepcop1_16_sem_cpldz_h_P0S_P1 (mep_ext1_cpu* current_cpu, mepcop1_16_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_16_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpldz_h (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpldz_w_P0S_P1: cpldz.w $crop,$crqp + +sem_status +mepcop1_16_sem_cpldz_w_P0S_P1 (mep_ext1_cpu* current_cpu, mepcop1_16_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_16_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpldz_w (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpnorm_h_P0S_P1: cpnorm.h $crop,$crqp + +sem_status +mepcop1_16_sem_cpnorm_h_P0S_P1 (mep_ext1_cpu* current_cpu, mepcop1_16_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_16_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpnorm_h (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpnorm_w_P0S_P1: cpnorm.w $crop,$crqp + +sem_status +mepcop1_16_sem_cpnorm_w_P0S_P1 (mep_ext1_cpu* current_cpu, mepcop1_16_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_16_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpnorm_w (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cphaddu_b_P0S_P1: cphaddu.b $crop,$crqp + +sem_status +mepcop1_16_sem_cphaddu_b_P0S_P1 (mep_ext1_cpu* current_cpu, mepcop1_16_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_16_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cphaddu_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cphadd_b_P0S_P1: cphadd.b $crop,$crqp + +sem_status +mepcop1_16_sem_cphadd_b_P0S_P1 (mep_ext1_cpu* current_cpu, mepcop1_16_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_16_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cphadd_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cphadd_h_P0S_P1: cphadd.h $crop,$crqp + +sem_status +mepcop1_16_sem_cphadd_h_P0S_P1 (mep_ext1_cpu* current_cpu, mepcop1_16_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_16_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cphadd_h (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cphadd_w_P0S_P1: cphadd.w $crop,$crqp + +sem_status +mepcop1_16_sem_cphadd_w_P0S_P1 (mep_ext1_cpu* current_cpu, mepcop1_16_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_16_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cphadd_w (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpccadd_b_P0S_P1: cpccadd.b $crqp + +sem_status +mepcop1_16_sem_cpccadd_b_P0S_P1 (mep_ext1_cpu* current_cpu, mepcop1_16_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_16_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpccadd_b (pc, FLD (f_ivc2_5u13)); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpbcast_b_P0S_P1: cpbcast.b $crop,$crqp + +sem_status +mepcop1_16_sem_cpbcast_b_P0S_P1 (mep_ext1_cpu* current_cpu, mepcop1_16_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_16_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpbcast_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpbcast_h_P0S_P1: cpbcast.h $crop,$crqp + +sem_status +mepcop1_16_sem_cpbcast_h_P0S_P1 (mep_ext1_cpu* current_cpu, mepcop1_16_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_16_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpbcast_h (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpbcast_w_P0S_P1: cpbcast.w $crop,$crqp + +sem_status +mepcop1_16_sem_cpbcast_w_P0S_P1 (mep_ext1_cpu* current_cpu, mepcop1_16_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_16_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpbcast_w (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpextuu_b_P0S_P1: cpextuu.b $crop,$crqp + +sem_status +mepcop1_16_sem_cpextuu_b_P0S_P1 (mep_ext1_cpu* current_cpu, mepcop1_16_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_16_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpextuu_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpextu_b_P0S_P1: cpextu.b $crop,$crqp + +sem_status +mepcop1_16_sem_cpextu_b_P0S_P1 (mep_ext1_cpu* current_cpu, mepcop1_16_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_16_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpextu_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpextuu_h_P0S_P1: cpextuu.h $crop,$crqp + +sem_status +mepcop1_16_sem_cpextuu_h_P0S_P1 (mep_ext1_cpu* current_cpu, mepcop1_16_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_16_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpextuu_h (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpextu_h_P0S_P1: cpextu.h $crop,$crqp + +sem_status +mepcop1_16_sem_cpextu_h_P0S_P1 (mep_ext1_cpu* current_cpu, mepcop1_16_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_16_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpextu_h (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpextlu_b_P0S_P1: cpextlu.b $crop,$crqp + +sem_status +mepcop1_16_sem_cpextlu_b_P0S_P1 (mep_ext1_cpu* current_cpu, mepcop1_16_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_16_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpextlu_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpextl_b_P0S_P1: cpextl.b $crop,$crqp + +sem_status +mepcop1_16_sem_cpextl_b_P0S_P1 (mep_ext1_cpu* current_cpu, mepcop1_16_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_16_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpextl_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpextlu_h_P0S_P1: cpextlu.h $crop,$crqp + +sem_status +mepcop1_16_sem_cpextlu_h_P0S_P1 (mep_ext1_cpu* current_cpu, mepcop1_16_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_16_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpextlu_h (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpextl_h_P0S_P1: cpextl.h $crop,$crqp + +sem_status +mepcop1_16_sem_cpextl_h_P0S_P1 (mep_ext1_cpu* current_cpu, mepcop1_16_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_16_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpextl_h (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpcastub_h_P0S_P1: cpcastub.h $crop,$crqp + +sem_status +mepcop1_16_sem_cpcastub_h_P0S_P1 (mep_ext1_cpu* current_cpu, mepcop1_16_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_16_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpcastub_h (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpcastb_h_P0S_P1: cpcastb.h $crop,$crqp + +sem_status +mepcop1_16_sem_cpcastb_h_P0S_P1 (mep_ext1_cpu* current_cpu, mepcop1_16_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_16_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpcastb_h (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpcastub_w_P0S_P1: cpcastub.w $crop,$crqp + +sem_status +mepcop1_16_sem_cpcastub_w_P0S_P1 (mep_ext1_cpu* current_cpu, mepcop1_16_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_16_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpcastub_w (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpcastb_w_P0S_P1: cpcastb.w $crop,$crqp + +sem_status +mepcop1_16_sem_cpcastb_w_P0S_P1 (mep_ext1_cpu* current_cpu, mepcop1_16_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_16_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpcastb_w (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpcastuh_w_P0S_P1: cpcastuh.w $crop,$crqp + +sem_status +mepcop1_16_sem_cpcastuh_w_P0S_P1 (mep_ext1_cpu* current_cpu, mepcop1_16_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_16_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpcastuh_w (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpcasth_w_P0S_P1: cpcasth.w $crop,$crqp + +sem_status +mepcop1_16_sem_cpcasth_w_P0S_P1 (mep_ext1_cpu* current_cpu, mepcop1_16_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_16_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpcasth_w (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cdcastuw_P0S_P1: cdcastuw $crop,$crqp + +sem_status +mepcop1_16_sem_cdcastuw_P0S_P1 (mep_ext1_cpu* current_cpu, mepcop1_16_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_16_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cdcastuw (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cdcastw_P0S_P1: cdcastw $crop,$crqp + +sem_status +mepcop1_16_sem_cdcastw_P0S_P1 (mep_ext1_cpu* current_cpu, mepcop1_16_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_16_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cdcastw (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpmovfrcsar0_P0S_P1: cpmovfrcsar0 $crop + +sem_status +mepcop1_16_sem_cpmovfrcsar0_P0S_P1 (mep_ext1_cpu* current_cpu, mepcop1_16_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_16_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpmovfrcsar0 (pc); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpmovfrcsar1_P0S_P1: cpmovfrcsar1 $crop + +sem_status +mepcop1_16_sem_cpmovfrcsar1_P0S_P1 (mep_ext1_cpu* current_cpu, mepcop1_16_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_16_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpmovfrcsar1 (pc); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpmovfrcc_P0S_P1: cpmovfrcc $crop + +sem_status +mepcop1_16_sem_cpmovfrcc_P0S_P1 (mep_ext1_cpu* current_cpu, mepcop1_16_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_16_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpmovfrcc (pc); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpmovtocsar0_P0S_P1: cpmovtocsar0 $crqp + +sem_status +mepcop1_16_sem_cpmovtocsar0_P0S_P1 (mep_ext1_cpu* current_cpu, mepcop1_16_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_16_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpmovtocsar0 (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpmovtocsar1_P0S_P1: cpmovtocsar1 $crqp + +sem_status +mepcop1_16_sem_cpmovtocsar1_P0S_P1 (mep_ext1_cpu* current_cpu, mepcop1_16_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_16_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpmovtocsar1 (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpmovtocc_P0S_P1: cpmovtocc $crqp + +sem_status +mepcop1_16_sem_cpmovtocc_P0S_P1 (mep_ext1_cpu* current_cpu, mepcop1_16_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_16_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpmovtocc (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpcmpeqz_b_P0S_P1: cpcmpeqz.b $crqp,$crpp + +sem_status +mepcop1_16_sem_cpcmpeqz_b_P0S_P1 (mep_ext1_cpu* current_cpu, mepcop1_16_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_16_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpcmpeqz_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpcmpeq_b_P0S_P1: cpcmpeq.b $crqp,$crpp + +sem_status +mepcop1_16_sem_cpcmpeq_b_P0S_P1 (mep_ext1_cpu* current_cpu, mepcop1_16_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_16_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpcmpeq_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpcmpeq_h_P0S_P1: cpcmpeq.h $crqp,$crpp + +sem_status +mepcop1_16_sem_cpcmpeq_h_P0S_P1 (mep_ext1_cpu* current_cpu, mepcop1_16_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_16_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpcmpeq_h (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpcmpeq_w_P0S_P1: cpcmpeq.w $crqp,$crpp + +sem_status +mepcop1_16_sem_cpcmpeq_w_P0S_P1 (mep_ext1_cpu* current_cpu, mepcop1_16_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_16_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpcmpeq_w (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpcmpne_b_P0S_P1: cpcmpne.b $crqp,$crpp + +sem_status +mepcop1_16_sem_cpcmpne_b_P0S_P1 (mep_ext1_cpu* current_cpu, mepcop1_16_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_16_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpcmpne_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpcmpne_h_P0S_P1: cpcmpne.h $crqp,$crpp + +sem_status +mepcop1_16_sem_cpcmpne_h_P0S_P1 (mep_ext1_cpu* current_cpu, mepcop1_16_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_16_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpcmpne_h (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpcmpne_w_P0S_P1: cpcmpne.w $crqp,$crpp + +sem_status +mepcop1_16_sem_cpcmpne_w_P0S_P1 (mep_ext1_cpu* current_cpu, mepcop1_16_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_16_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpcmpne_w (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpcmpgtu_b_P0S_P1: cpcmpgtu.b $crqp,$crpp + +sem_status +mepcop1_16_sem_cpcmpgtu_b_P0S_P1 (mep_ext1_cpu* current_cpu, mepcop1_16_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_16_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpcmpgtu_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpcmpgt_b_P0S_P1: cpcmpgt.b $crqp,$crpp + +sem_status +mepcop1_16_sem_cpcmpgt_b_P0S_P1 (mep_ext1_cpu* current_cpu, mepcop1_16_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_16_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpcmpgt_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpcmpgt_h_P0S_P1: cpcmpgt.h $crqp,$crpp + +sem_status +mepcop1_16_sem_cpcmpgt_h_P0S_P1 (mep_ext1_cpu* current_cpu, mepcop1_16_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_16_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpcmpgt_h (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpcmpgtu_w_P0S_P1: cpcmpgtu.w $crqp,$crpp + +sem_status +mepcop1_16_sem_cpcmpgtu_w_P0S_P1 (mep_ext1_cpu* current_cpu, mepcop1_16_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_16_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpcmpgtu_w (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpcmpgt_w_P0S_P1: cpcmpgt.w $crqp,$crpp + +sem_status +mepcop1_16_sem_cpcmpgt_w_P0S_P1 (mep_ext1_cpu* current_cpu, mepcop1_16_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_16_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpcmpgt_w (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpcmpgeu_b_P0S_P1: cpcmpgeu.b $crqp,$crpp + +sem_status +mepcop1_16_sem_cpcmpgeu_b_P0S_P1 (mep_ext1_cpu* current_cpu, mepcop1_16_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_16_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpcmpgeu_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpcmpge_b_P0S_P1: cpcmpge.b $crqp,$crpp + +sem_status +mepcop1_16_sem_cpcmpge_b_P0S_P1 (mep_ext1_cpu* current_cpu, mepcop1_16_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_16_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpcmpge_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpcmpge_h_P0S_P1: cpcmpge.h $crqp,$crpp + +sem_status +mepcop1_16_sem_cpcmpge_h_P0S_P1 (mep_ext1_cpu* current_cpu, mepcop1_16_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_16_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpcmpge_h (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpcmpgeu_w_P0S_P1: cpcmpgeu.w $crqp,$crpp + +sem_status +mepcop1_16_sem_cpcmpgeu_w_P0S_P1 (mep_ext1_cpu* current_cpu, mepcop1_16_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_16_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpcmpgeu_w (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpcmpge_w_P0S_P1: cpcmpge.w $crqp,$crpp + +sem_status +mepcop1_16_sem_cpcmpge_w_P0S_P1 (mep_ext1_cpu* current_cpu, mepcop1_16_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_16_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpcmpge_w (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpadda0u_b_P0S: cpadda0u.b $crqp,$crpp + +sem_status +mepcop1_16_sem_cpadda0u_b_P0S (mep_ext1_cpu* current_cpu, mepcop1_16_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_16_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpadda0u_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpadda0_b_P0S: cpadda0.b $crqp,$crpp + +sem_status +mepcop1_16_sem_cpadda0_b_P0S (mep_ext1_cpu* current_cpu, mepcop1_16_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_16_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpadda0_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpaddua0_h_P0S: cpaddua0.h $crqp,$crpp + +sem_status +mepcop1_16_sem_cpaddua0_h_P0S (mep_ext1_cpu* current_cpu, mepcop1_16_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_16_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpaddua0_h (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpaddla0_h_P0S: cpaddla0.h $crqp,$crpp + +sem_status +mepcop1_16_sem_cpaddla0_h_P0S (mep_ext1_cpu* current_cpu, mepcop1_16_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_16_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpaddla0_h (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpaddaca0u_b_P0S: cpaddaca0u.b $crqp,$crpp + +sem_status +mepcop1_16_sem_cpaddaca0u_b_P0S (mep_ext1_cpu* current_cpu, mepcop1_16_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_16_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpaddaca0u_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpaddaca0_b_P0S: cpaddaca0.b $crqp,$crpp + +sem_status +mepcop1_16_sem_cpaddaca0_b_P0S (mep_ext1_cpu* current_cpu, mepcop1_16_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_16_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpaddaca0_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpaddacua0_h_P0S: cpaddacua0.h $crqp,$crpp + +sem_status +mepcop1_16_sem_cpaddacua0_h_P0S (mep_ext1_cpu* current_cpu, mepcop1_16_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_16_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpaddacua0_h (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpaddacla0_h_P0S: cpaddacla0.h $crqp,$crpp + +sem_status +mepcop1_16_sem_cpaddacla0_h_P0S (mep_ext1_cpu* current_cpu, mepcop1_16_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_16_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpaddacla0_h (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpsuba0u_b_P0S: cpsuba0u.b $crqp,$crpp + +sem_status +mepcop1_16_sem_cpsuba0u_b_P0S (mep_ext1_cpu* current_cpu, mepcop1_16_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_16_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpsuba0u_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpsuba0_b_P0S: cpsuba0.b $crqp,$crpp + +sem_status +mepcop1_16_sem_cpsuba0_b_P0S (mep_ext1_cpu* current_cpu, mepcop1_16_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_16_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpsuba0_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpsubua0_h_P0S: cpsubua0.h $crqp,$crpp + +sem_status +mepcop1_16_sem_cpsubua0_h_P0S (mep_ext1_cpu* current_cpu, mepcop1_16_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_16_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpsubua0_h (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpsubla0_h_P0S: cpsubla0.h $crqp,$crpp + +sem_status +mepcop1_16_sem_cpsubla0_h_P0S (mep_ext1_cpu* current_cpu, mepcop1_16_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_16_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpsubla0_h (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpsubaca0u_b_P0S: cpsubaca0u.b $crqp,$crpp + +sem_status +mepcop1_16_sem_cpsubaca0u_b_P0S (mep_ext1_cpu* current_cpu, mepcop1_16_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_16_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpsubaca0u_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpsubaca0_b_P0S: cpsubaca0.b $crqp,$crpp + +sem_status +mepcop1_16_sem_cpsubaca0_b_P0S (mep_ext1_cpu* current_cpu, mepcop1_16_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_16_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpsubaca0_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpsubacua0_h_P0S: cpsubacua0.h $crqp,$crpp + +sem_status +mepcop1_16_sem_cpsubacua0_h_P0S (mep_ext1_cpu* current_cpu, mepcop1_16_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_16_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpsubacua0_h (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpsubacla0_h_P0S: cpsubacla0.h $crqp,$crpp + +sem_status +mepcop1_16_sem_cpsubacla0_h_P0S (mep_ext1_cpu* current_cpu, mepcop1_16_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_16_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpsubacla0_h (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpabsa0u_b_P0S: cpabsa0u.b $crqp,$crpp + +sem_status +mepcop1_16_sem_cpabsa0u_b_P0S (mep_ext1_cpu* current_cpu, mepcop1_16_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_16_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpabsa0u_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpabsa0_b_P0S: cpabsa0.b $crqp,$crpp + +sem_status +mepcop1_16_sem_cpabsa0_b_P0S (mep_ext1_cpu* current_cpu, mepcop1_16_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_16_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpabsa0_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpabsua0_h_P0S: cpabsua0.h $crqp,$crpp + +sem_status +mepcop1_16_sem_cpabsua0_h_P0S (mep_ext1_cpu* current_cpu, mepcop1_16_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_16_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpabsua0_h (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpabsla0_h_P0S: cpabsla0.h $crqp,$crpp + +sem_status +mepcop1_16_sem_cpabsla0_h_P0S (mep_ext1_cpu* current_cpu, mepcop1_16_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_16_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpabsla0_h (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpsada0u_b_P0S: cpsada0u.b $crqp,$crpp + +sem_status +mepcop1_16_sem_cpsada0u_b_P0S (mep_ext1_cpu* current_cpu, mepcop1_16_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_16_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpsada0u_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpsada0_b_P0S: cpsada0.b $crqp,$crpp + +sem_status +mepcop1_16_sem_cpsada0_b_P0S (mep_ext1_cpu* current_cpu, mepcop1_16_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_16_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpsada0_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpsadua0_h_P0S: cpsadua0.h $crqp,$crpp + +sem_status +mepcop1_16_sem_cpsadua0_h_P0S (mep_ext1_cpu* current_cpu, mepcop1_16_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_16_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpsadua0_h (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpsadla0_h_P0S: cpsadla0.h $crqp,$crpp + +sem_status +mepcop1_16_sem_cpsadla0_h_P0S (mep_ext1_cpu* current_cpu, mepcop1_16_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_16_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpsadla0_h (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpseta0_h_P0S: cpseta0.h $crqp,$crpp + +sem_status +mepcop1_16_sem_cpseta0_h_P0S (mep_ext1_cpu* current_cpu, mepcop1_16_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_16_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpseta0_h (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpsetua0_w_P0S: cpsetua0.w $crqp,$crpp + +sem_status +mepcop1_16_sem_cpsetua0_w_P0S (mep_ext1_cpu* current_cpu, mepcop1_16_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_16_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpsetua0_w (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpsetla0_w_P0S: cpsetla0.w $crqp,$crpp + +sem_status +mepcop1_16_sem_cpsetla0_w_P0S (mep_ext1_cpu* current_cpu, mepcop1_16_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_16_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpsetla0_w (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpmova0_b_P0S: cpmova0.b $crop + +sem_status +mepcop1_16_sem_cpmova0_b_P0S (mep_ext1_cpu* current_cpu, mepcop1_16_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_16_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpmova0_b (pc); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpmovua0_h_P0S: cpmovua0.h $crop + +sem_status +mepcop1_16_sem_cpmovua0_h_P0S (mep_ext1_cpu* current_cpu, mepcop1_16_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_16_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpmovua0_h (pc); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpmovla0_h_P0S: cpmovla0.h $crop + +sem_status +mepcop1_16_sem_cpmovla0_h_P0S (mep_ext1_cpu* current_cpu, mepcop1_16_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_16_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpmovla0_h (pc); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpmovuua0_w_P0S: cpmovuua0.w $crop + +sem_status +mepcop1_16_sem_cpmovuua0_w_P0S (mep_ext1_cpu* current_cpu, mepcop1_16_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_16_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpmovuua0_w (pc); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpmovula0_w_P0S: cpmovula0.w $crop + +sem_status +mepcop1_16_sem_cpmovula0_w_P0S (mep_ext1_cpu* current_cpu, mepcop1_16_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_16_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpmovula0_w (pc); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpmovlua0_w_P0S: cpmovlua0.w $crop + +sem_status +mepcop1_16_sem_cpmovlua0_w_P0S (mep_ext1_cpu* current_cpu, mepcop1_16_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_16_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpmovlua0_w (pc); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpmovlla0_w_P0S: cpmovlla0.w $crop + +sem_status +mepcop1_16_sem_cpmovlla0_w_P0S (mep_ext1_cpu* current_cpu, mepcop1_16_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_16_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpmovlla0_w (pc); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cppacka0u_b_P0S: cppacka0u.b $crop + +sem_status +mepcop1_16_sem_cppacka0u_b_P0S (mep_ext1_cpu* current_cpu, mepcop1_16_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_16_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cppacka0u_b (pc); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cppacka0_b_P0S: cppacka0.b $crop + +sem_status +mepcop1_16_sem_cppacka0_b_P0S (mep_ext1_cpu* current_cpu, mepcop1_16_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_16_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cppacka0_b (pc); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cppackua0_h_P0S: cppackua0.h $crop + +sem_status +mepcop1_16_sem_cppackua0_h_P0S (mep_ext1_cpu* current_cpu, mepcop1_16_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_16_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cppackua0_h (pc); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cppackla0_h_P0S: cppackla0.h $crop + +sem_status +mepcop1_16_sem_cppackla0_h_P0S (mep_ext1_cpu* current_cpu, mepcop1_16_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_16_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cppackla0_h (pc); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cppackua0_w_P0S: cppackua0.w $crop + +sem_status +mepcop1_16_sem_cppackua0_w_P0S (mep_ext1_cpu* current_cpu, mepcop1_16_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_16_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cppackua0_w (pc); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cppackla0_w_P0S: cppackla0.w $crop + +sem_status +mepcop1_16_sem_cppackla0_w_P0S (mep_ext1_cpu* current_cpu, mepcop1_16_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_16_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cppackla0_w (pc); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpmovhua0_w_P0S: cpmovhua0.w $crop + +sem_status +mepcop1_16_sem_cpmovhua0_w_P0S (mep_ext1_cpu* current_cpu, mepcop1_16_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_16_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpmovhua0_w (pc); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpmovhla0_w_P0S: cpmovhla0.w $crop + +sem_status +mepcop1_16_sem_cpmovhla0_w_P0S (mep_ext1_cpu* current_cpu, mepcop1_16_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_16_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpmovhla0_w (pc); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpacsuma0_P0S: cpacsuma0 + +sem_status +mepcop1_16_sem_cpacsuma0_P0S (mep_ext1_cpu* current_cpu, mepcop1_16_scache* sem) +{ +#define FLD(f) abuf->fields.fmt_empty.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_16_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpacsuma0 (pc); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpaccpa0_P0S: cpaccpa0 + +sem_status +mepcop1_16_sem_cpaccpa0_P0S (mep_ext1_cpu* current_cpu, mepcop1_16_scache* sem) +{ +#define FLD(f) abuf->fields.fmt_empty.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_16_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpaccpa0 (pc); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpsrla0_P0S: cpsrla0 $crqp + +sem_status +mepcop1_16_sem_cpsrla0_P0S (mep_ext1_cpu* current_cpu, mepcop1_16_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_16_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpsrla0 (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpsraa0_P0S: cpsraa0 $crqp + +sem_status +mepcop1_16_sem_cpsraa0_P0S (mep_ext1_cpu* current_cpu, mepcop1_16_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_16_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpsraa0 (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpslla0_P0S: cpslla0 $crqp + +sem_status +mepcop1_16_sem_cpslla0_P0S (mep_ext1_cpu* current_cpu, mepcop1_16_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_16_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpslla0 (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpsrlia0_P0S: cpsrlia0 $imm5p23 + +sem_status +mepcop1_16_sem_cpsrlia0_P0S (mep_ext1_cpu* current_cpu, mepcop1_16_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_16_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpsrlia0 (pc, FLD (f_ivc2_5u23)); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpsraia0_P0S: cpsraia0 $imm5p23 + +sem_status +mepcop1_16_sem_cpsraia0_P0S (mep_ext1_cpu* current_cpu, mepcop1_16_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_16_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpsraia0 (pc, FLD (f_ivc2_5u23)); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpsllia0_P0S: cpsllia0 $imm5p23 + +sem_status +mepcop1_16_sem_cpsllia0_P0S (mep_ext1_cpu* current_cpu, mepcop1_16_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_16_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpsllia0 (pc, FLD (f_ivc2_5u23)); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpfsftba0s0u_b_P0S: cpfsftba0s0u.b $crqp,$crpp + +sem_status +mepcop1_16_sem_cpfsftba0s0u_b_P0S (mep_ext1_cpu* current_cpu, mepcop1_16_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_16_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpfsftba0s0u_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpfsftba0s0_b_P0S: cpfsftba0s0.b $crqp,$crpp + +sem_status +mepcop1_16_sem_cpfsftba0s0_b_P0S (mep_ext1_cpu* current_cpu, mepcop1_16_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_16_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpfsftba0s0_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpfsftbua0s0_h_P0S: cpfsftbua0s0.h $crqp,$crpp + +sem_status +mepcop1_16_sem_cpfsftbua0s0_h_P0S (mep_ext1_cpu* current_cpu, mepcop1_16_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_16_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpfsftbua0s0_h (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpfsftbla0s0_h_P0S: cpfsftbla0s0.h $crqp,$crpp + +sem_status +mepcop1_16_sem_cpfsftbla0s0_h_P0S (mep_ext1_cpu* current_cpu, mepcop1_16_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_16_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpfsftbla0s0_h (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpfaca0s0u_b_P0S: cpfaca0s0u.b $crqp,$crpp + +sem_status +mepcop1_16_sem_cpfaca0s0u_b_P0S (mep_ext1_cpu* current_cpu, mepcop1_16_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_16_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpfaca0s0u_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpfaca0s0_b_P0S: cpfaca0s0.b $crqp,$crpp + +sem_status +mepcop1_16_sem_cpfaca0s0_b_P0S (mep_ext1_cpu* current_cpu, mepcop1_16_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_16_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpfaca0s0_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpfacua0s0_h_P0S: cpfacua0s0.h $crqp,$crpp + +sem_status +mepcop1_16_sem_cpfacua0s0_h_P0S (mep_ext1_cpu* current_cpu, mepcop1_16_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_16_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpfacua0s0_h (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpfacla0s0_h_P0S: cpfacla0s0.h $crqp,$crpp + +sem_status +mepcop1_16_sem_cpfacla0s0_h_P0S (mep_ext1_cpu* current_cpu, mepcop1_16_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_16_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpfacla0s0_h (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpfsftba0s1u_b_P0S: cpfsftba0s1u.b $crqp,$crpp + +sem_status +mepcop1_16_sem_cpfsftba0s1u_b_P0S (mep_ext1_cpu* current_cpu, mepcop1_16_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_16_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpfsftba0s1u_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpfsftba0s1_b_P0S: cpfsftba0s1.b $crqp,$crpp + +sem_status +mepcop1_16_sem_cpfsftba0s1_b_P0S (mep_ext1_cpu* current_cpu, mepcop1_16_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_16_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpfsftba0s1_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpfsftbua0s1_h_P0S: cpfsftbua0s1.h $crqp,$crpp + +sem_status +mepcop1_16_sem_cpfsftbua0s1_h_P0S (mep_ext1_cpu* current_cpu, mepcop1_16_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_16_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpfsftbua0s1_h (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpfsftbla0s1_h_P0S: cpfsftbla0s1.h $crqp,$crpp + +sem_status +mepcop1_16_sem_cpfsftbla0s1_h_P0S (mep_ext1_cpu* current_cpu, mepcop1_16_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_16_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpfsftbla0s1_h (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpfaca0s1u_b_P0S: cpfaca0s1u.b $crqp,$crpp + +sem_status +mepcop1_16_sem_cpfaca0s1u_b_P0S (mep_ext1_cpu* current_cpu, mepcop1_16_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_16_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpfaca0s1u_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpfaca0s1_b_P0S: cpfaca0s1.b $crqp,$crpp + +sem_status +mepcop1_16_sem_cpfaca0s1_b_P0S (mep_ext1_cpu* current_cpu, mepcop1_16_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_16_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpfaca0s1_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpfacua0s1_h_P0S: cpfacua0s1.h $crqp,$crpp + +sem_status +mepcop1_16_sem_cpfacua0s1_h_P0S (mep_ext1_cpu* current_cpu, mepcop1_16_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_16_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpfacua0s1_h (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpfacla0s1_h_P0S: cpfacla0s1.h $crqp,$crpp + +sem_status +mepcop1_16_sem_cpfacla0s1_h_P0S (mep_ext1_cpu* current_cpu, mepcop1_16_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpadd3_b_P0S_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_16_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpfacla0s1_h (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + diff --git a/sid/component/cgen-cpu/mep/mep-cop1-32-decode.cxx b/sid/component/cgen-cpu/mep/mep-cop1-32-decode.cxx new file mode 100644 index 0000000000..534f426a2c --- /dev/null +++ b/sid/component/cgen-cpu/mep/mep-cop1-32-decode.cxx @@ -0,0 +1,2940 @@ +/* Simulator instruction decoder for mepcop1_32. + +THIS FILE IS MACHINE GENERATED WITH CGEN. + +Copyright (C) 2000-2007 Red Hat, Inc. + +This file is part of the Red Hat simulators. + + +*/ + + +#if HAVE_CONFIG_H +#include "config.h" +#endif +#include "mep_ext1.h" + +using namespace mep_ext1; // FIXME: namespace organization still wip + + +// The instruction descriptor array. + +mepcop1_32_idesc mepcop1_32_idesc::idesc_table[MEPCOP1_32_INSN_CPSMSBSLLA1_W_C3 + 1] = +{ + { mepcop1_32_sem_x_invalid, "X_INVALID", MEPCOP1_32_INSN_X_INVALID, { 0|(1<> 17) & (15 << 7)) | ((insn >> 15) & (1 << 6)) | ((insn >> 10) & (31 << 1)) | ((insn >> 0) & (1 << 0))); + switch (val) + { + case 0 : /* fall through */ + case 64 : /* fall through */ + case 128 : /* fall through */ + case 192 : + if ((entire_insn & 0xfe0ff801) == 0xf0070000) + { itype = MEPCOP1_32_INSN_CPADD3_B_C3; mepcop1_32_extract_sfmt_cpadd3_b_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 1 : + { + unsigned int val = (((insn >> 21) & (3 << 1)) | ((insn >> 20) & (1 << 0))); + switch (val) + { + case 0 : + if ((entire_insn & 0xfffff801) == 0xf0070001) + { itype = MEPCOP1_32_INSN_CPADDA1U_B_C3; mepcop1_32_extract_sfmt_cpcmpeqz_b_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 1 : + if ((entire_insn & 0xfffff801) == 0xf0170001) + { itype = MEPCOP1_32_INSN_CPADDA1_B_C3; mepcop1_32_extract_sfmt_cpcmpeqz_b_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 2 : + if ((entire_insn & 0xfffff801) == 0xf0470001) + { itype = MEPCOP1_32_INSN_CPADDACA1U_B_C3; mepcop1_32_extract_sfmt_cpcmpeqz_b_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 3 : + if ((entire_insn & 0xfffff801) == 0xf0570001) + { itype = MEPCOP1_32_INSN_CPADDACA1_B_C3; mepcop1_32_extract_sfmt_cpcmpeqz_b_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 4 : + if ((entire_insn & 0xfffff801) == 0xf0870001) + { itype = MEPCOP1_32_INSN_CPSUBA1U_B_C3; mepcop1_32_extract_sfmt_cpcmpeqz_b_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 5 : + if ((entire_insn & 0xfffff801) == 0xf0970001) + { itype = MEPCOP1_32_INSN_CPSUBA1_B_C3; mepcop1_32_extract_sfmt_cpcmpeqz_b_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 6 : + if ((entire_insn & 0xfffff801) == 0xf0c70001) + { itype = MEPCOP1_32_INSN_CPSUBACA1U_B_C3; mepcop1_32_extract_sfmt_cpcmpeqz_b_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 7 : + if ((entire_insn & 0xfffff801) == 0xf0d70001) + { itype = MEPCOP1_32_INSN_CPSUBACA1_B_C3; mepcop1_32_extract_sfmt_cpcmpeqz_b_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + default : itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + } + } + case 2 : /* fall through */ + case 66 : /* fall through */ + case 130 : /* fall through */ + case 194 : + if ((entire_insn & 0xfe0ff801) == 0xf0070800) + { itype = MEPCOP1_32_INSN_CPAND3_C3; mepcop1_32_extract_sfmt_cpadd3_b_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 3 : + { + unsigned int val = (((insn >> 21) & (3 << 1)) | ((insn >> 20) & (1 << 0))); + switch (val) + { + case 0 : + if ((entire_insn & 0xfffff801) == 0xf0070801) + { itype = MEPCOP1_32_INSN_CPSSQA1U_B_C3; mepcop1_32_extract_sfmt_cpcmpeqz_b_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 1 : + if ((entire_insn & 0xfffff801) == 0xf0170801) + { itype = MEPCOP1_32_INSN_CPSSQA1_B_C3; mepcop1_32_extract_sfmt_cpcmpeqz_b_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 2 : + if ((entire_insn & 0xfffff801) == 0xf0470801) + { itype = MEPCOP1_32_INSN_CPSSDA1U_B_C3; mepcop1_32_extract_sfmt_cpcmpeqz_b_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 3 : + if ((entire_insn & 0xfffff801) == 0xf0570801) + { itype = MEPCOP1_32_INSN_CPSSDA1_B_C3; mepcop1_32_extract_sfmt_cpcmpeqz_b_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 4 : + if ((entire_insn & 0xfffff801) == 0xf0870801) + { itype = MEPCOP1_32_INSN_CPMULA1U_B_C3; mepcop1_32_extract_sfmt_cpcmpeqz_b_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 5 : + if ((entire_insn & 0xfffff801) == 0xf0970801) + { itype = MEPCOP1_32_INSN_CPMULA1_B_C3; mepcop1_32_extract_sfmt_cpcmpeqz_b_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 6 : + if ((entire_insn & 0xfffff801) == 0xf0c70801) + { itype = MEPCOP1_32_INSN_CPMULUA1U_W_C3; mepcop1_32_extract_sfmt_cpcmpeqz_b_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 7 : + if ((entire_insn & 0xfffff801) == 0xf0d70801) + { itype = MEPCOP1_32_INSN_CPMULLA1U_W_C3; mepcop1_32_extract_sfmt_cpcmpeqz_b_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + default : itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + } + } + case 4 : /* fall through */ + case 68 : /* fall through */ + case 132 : /* fall through */ + case 196 : + if ((entire_insn & 0xfe0ff801) == 0xf0071000) + { itype = MEPCOP1_32_INSN_CPUNPACKU_B_C3; mepcop1_32_extract_sfmt_cpadd3_b_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 5 : + { + unsigned int val = (((insn >> 20) & (1 << 0))); + switch (val) + { + case 0 : + if ((entire_insn & 0xfffff83f) == 0xf0071001) + { itype = MEPCOP1_32_INSN_CPSRLA1_C3; mepcop1_32_extract_sfmt_cpmovtocsar0_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 1 : + if ((entire_insn & 0xfffff83f) == 0xf0171001) + { itype = MEPCOP1_32_INSN_CPSRAA1_C3; mepcop1_32_extract_sfmt_cpmovtocsar0_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + default : itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + } + } + case 7 : /* fall through */ + case 71 : /* fall through */ + case 135 : /* fall through */ + case 199 : /* fall through */ + case 263 : /* fall through */ + case 327 : /* fall through */ + case 391 : /* fall through */ + case 455 : + if ((entire_insn & 0xfc0fffff) == 0xf0071801) + { itype = MEPCOP1_32_INSN_CPSRLIA1_P1; mepcop1_32_extract_sfmt_cpsrlia1_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 8 : /* fall through */ + case 72 : /* fall through */ + case 136 : /* fall through */ + case 200 : + if ((entire_insn & 0xfe0ff801) == 0xf0072000) + { itype = MEPCOP1_32_INSN_CPSRL3_B_C3; mepcop1_32_extract_sfmt_cpadd3_b_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 9 : /* fall through */ + case 73 : /* fall through */ + case 137 : /* fall through */ + case 201 : + { + unsigned int val = (((insn >> 2) & (1 << 3)) | ((insn >> 1) & (7 << 0))); + switch (val) + { + case 0 : + if ((entire_insn & 0xfe0fffff) == 0xf0072001) + { itype = MEPCOP1_32_INSN_CPMOVA1_B_C3; mepcop1_32_extract_sfmt_cpmovfrcsar0_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 2 : + if ((entire_insn & 0xfe0fffff) == 0xf0072005) + { itype = MEPCOP1_32_INSN_CPMOVUA1_H_C3; mepcop1_32_extract_sfmt_cpmovfrcsar0_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 3 : + if ((entire_insn & 0xfe0fffff) == 0xf0072007) + { itype = MEPCOP1_32_INSN_CPMOVLA1_H_C3; mepcop1_32_extract_sfmt_cpmovfrcsar0_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 4 : + if ((entire_insn & 0xfe0fffff) == 0xf0072009) + { itype = MEPCOP1_32_INSN_CPMOVUUA1_W_C3; mepcop1_32_extract_sfmt_cpmovfrcsar0_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 5 : + if ((entire_insn & 0xfe0fffff) == 0xf007200b) + { itype = MEPCOP1_32_INSN_CPMOVULA1_W_C3; mepcop1_32_extract_sfmt_cpmovfrcsar0_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 6 : + if ((entire_insn & 0xfe0fffff) == 0xf007200d) + { itype = MEPCOP1_32_INSN_CPMOVLUA1_W_C3; mepcop1_32_extract_sfmt_cpmovfrcsar0_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 7 : + if ((entire_insn & 0xfe0fffff) == 0xf007200f) + { itype = MEPCOP1_32_INSN_CPMOVLLA1_W_C3; mepcop1_32_extract_sfmt_cpmovfrcsar0_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 8 : + if ((entire_insn & 0xfe0fffff) == 0xf0072021) + { itype = MEPCOP1_32_INSN_CPPACKA1U_B_C3; mepcop1_32_extract_sfmt_cpmovfrcsar0_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 9 : + if ((entire_insn & 0xfe0fffff) == 0xf0072023) + { itype = MEPCOP1_32_INSN_CPPACKA1_B_C3; mepcop1_32_extract_sfmt_cpmovfrcsar0_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 10 : + if ((entire_insn & 0xfe0fffff) == 0xf0072025) + { itype = MEPCOP1_32_INSN_CPPACKUA1_H_C3; mepcop1_32_extract_sfmt_cpmovfrcsar0_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 11 : + if ((entire_insn & 0xfe0fffff) == 0xf0072027) + { itype = MEPCOP1_32_INSN_CPPACKLA1_H_C3; mepcop1_32_extract_sfmt_cpmovfrcsar0_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 12 : + if ((entire_insn & 0xfe0fffff) == 0xf0072029) + { itype = MEPCOP1_32_INSN_CPPACKUA1_W_C3; mepcop1_32_extract_sfmt_cpmovfrcsar0_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 13 : + if ((entire_insn & 0xfe0fffff) == 0xf007202b) + { itype = MEPCOP1_32_INSN_CPPACKLA1_W_C3; mepcop1_32_extract_sfmt_cpmovfrcsar0_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 14 : + if ((entire_insn & 0xfe0fffff) == 0xf007202d) + { itype = MEPCOP1_32_INSN_CPMOVHUA1_W_C3; mepcop1_32_extract_sfmt_cpmovfrcsar0_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 15 : + if ((entire_insn & 0xfe0fffff) == 0xf007202f) + { itype = MEPCOP1_32_INSN_CPMOVHLA1_W_C3; mepcop1_32_extract_sfmt_cpmovfrcsar0_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + default : itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + } + } + case 10 : /* fall through */ + case 74 : /* fall through */ + case 138 : /* fall through */ + case 202 : + if ((entire_insn & 0xfe0ff801) == 0xf0072800) + { itype = MEPCOP1_32_INSN_CPSRA3_B_C3; mepcop1_32_extract_sfmt_cpadd3_b_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 12 : /* fall through */ + case 76 : /* fall through */ + case 140 : /* fall through */ + case 204 : + if ((entire_insn & 0xfe0ff801) == 0xf0073000) + { itype = MEPCOP1_32_INSN_CPSLL3_B_C3; mepcop1_32_extract_sfmt_cpadd3_b_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 18 : /* fall through */ + case 82 : /* fall through */ + case 146 : /* fall through */ + case 210 : + if ((entire_insn & 0xfe0ff801) == 0xf0074800) + { itype = MEPCOP1_32_INSN_CPEXTUADDU3_B_C3; mepcop1_32_extract_sfmt_cpadd3_b_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 20 : /* fall through */ + case 84 : /* fall through */ + case 148 : /* fall through */ + case 212 : + if ((entire_insn & 0xfe0ff801) == 0xf0075000) + { itype = MEPCOP1_32_INSN_CPAVEU3_B_C3; mepcop1_32_extract_sfmt_cpadd3_b_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 22 : /* fall through */ + case 86 : /* fall through */ + case 150 : /* fall through */ + case 214 : + if ((entire_insn & 0xfe0ff801) == 0xf0075800) + { itype = MEPCOP1_32_INSN_CPABSU3_B_C3; mepcop1_32_extract_sfmt_cpadd3_b_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 24 : /* fall through */ + case 88 : /* fall through */ + case 152 : /* fall through */ + case 216 : + if ((entire_insn & 0xfe0ff801) == 0xf0076000) + { itype = MEPCOP1_32_INSN_CPMAXU3_B_C3; mepcop1_32_extract_sfmt_cpadd3_b_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 26 : /* fall through */ + case 90 : /* fall through */ + case 154 : /* fall through */ + case 218 : + if ((entire_insn & 0xfe0ff801) == 0xf0076800) + { itype = MEPCOP1_32_INSN_CPMINU3_B_C3; mepcop1_32_extract_sfmt_cpadd3_b_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 32 : + { + unsigned int val = (((insn >> 1) & (31 << 0))); + switch (val) + { + case 0 : + if ((entire_insn & 0xfe0fffff) == 0xf0078000) + { itype = MEPCOP1_32_INSN_CPMOVFRCSAR0_C3; mepcop1_32_extract_sfmt_cpmovfrcsar0_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 1 : + if ((entire_insn & 0xfe0fffff) == 0xf0078002) + { itype = MEPCOP1_32_INSN_CPMOVFRCC_C3; mepcop1_32_extract_sfmt_cpmovfrcsar0_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 15 : + if ((entire_insn & 0xfe0fffff) == 0xf007801e) + { itype = MEPCOP1_32_INSN_CPMOVFRCSAR1_C3; mepcop1_32_extract_sfmt_cpmovfrcsar0_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 16 : + if ((entire_insn & 0xfffff83f) == 0xf0078020) + { itype = MEPCOP1_32_INSN_CPMOVTOCSAR0_C3; mepcop1_32_extract_sfmt_cpmovtocsar0_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 17 : + if ((entire_insn & 0xfffff83f) == 0xf0078022) + { itype = MEPCOP1_32_INSN_CPMOVTOCC_C3; mepcop1_32_extract_sfmt_cpmovtocsar0_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 31 : + if ((entire_insn & 0xfffff83f) == 0xf007803e) + { itype = MEPCOP1_32_INSN_CPMOVTOCSAR1_C3; mepcop1_32_extract_sfmt_cpmovtocsar0_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + default : itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + } + } + case 34 : /* fall through */ + case 98 : /* fall through */ + case 162 : /* fall through */ + case 226 : + { + unsigned int val = (((insn >> 1) & (31 << 0))); + switch (val) + { + case 0 : + if ((entire_insn & 0xfe0ff83f) == 0xf0078800) + { itype = MEPCOP1_32_INSN_CPMOV_C3; mepcop1_32_extract_sfmt_cpmov_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 1 : + if ((entire_insn & 0xfe0ff83f) == 0xf0078802) + { itype = MEPCOP1_32_INSN_CPABSZ_B_C3; mepcop1_32_extract_sfmt_cpmov_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 2 : + if ((entire_insn & 0xfe0ff83f) == 0xf0078804) + { itype = MEPCOP1_32_INSN_CPABSZ_H_C3; mepcop1_32_extract_sfmt_cpmov_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 3 : + if ((entire_insn & 0xfe0ff83f) == 0xf0078806) + { itype = MEPCOP1_32_INSN_CPABSZ_W_C3; mepcop1_32_extract_sfmt_cpmov_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 4 : + if ((entire_insn & 0xfe0ff83f) == 0xf0078808) + { itype = MEPCOP1_32_INSN_CPLDZ_H_C3; mepcop1_32_extract_sfmt_cpmov_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 5 : + if ((entire_insn & 0xfe0ff83f) == 0xf007880a) + { itype = MEPCOP1_32_INSN_CPLDZ_W_C3; mepcop1_32_extract_sfmt_cpmov_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 6 : + if ((entire_insn & 0xfe0ff83f) == 0xf007880c) + { itype = MEPCOP1_32_INSN_CPNORM_H_C3; mepcop1_32_extract_sfmt_cpmov_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 7 : + if ((entire_insn & 0xfe0ff83f) == 0xf007880e) + { itype = MEPCOP1_32_INSN_CPNORM_W_C3; mepcop1_32_extract_sfmt_cpmov_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 8 : + if ((entire_insn & 0xfe0ff83f) == 0xf0078810) + { itype = MEPCOP1_32_INSN_CPHADDU_B_C3; mepcop1_32_extract_sfmt_cpmov_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 9 : + if ((entire_insn & 0xfe0ff83f) == 0xf0078812) + { itype = MEPCOP1_32_INSN_CPHADD_B_C3; mepcop1_32_extract_sfmt_cpmov_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 10 : + if ((entire_insn & 0xfe0ff83f) == 0xf0078814) + { itype = MEPCOP1_32_INSN_CPHADD_H_C3; mepcop1_32_extract_sfmt_cpmov_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 11 : + if ((entire_insn & 0xfe0ff83f) == 0xf0078816) + { itype = MEPCOP1_32_INSN_CPHADD_W_C3; mepcop1_32_extract_sfmt_cpmov_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 12 : + if ((entire_insn & 0xfe0ff83f) == 0xf0078818) + { itype = MEPCOP1_32_INSN_CPCCADD_B_C3; mepcop1_32_extract_sfmt_cpccadd_b_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 13 : + if ((entire_insn & 0xfe0ff83f) == 0xf007881a) + { itype = MEPCOP1_32_INSN_CPBCAST_B_C3; mepcop1_32_extract_sfmt_cpmov_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 14 : + if ((entire_insn & 0xfe0ff83f) == 0xf007881c) + { itype = MEPCOP1_32_INSN_CPBCAST_H_C3; mepcop1_32_extract_sfmt_cpmov_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 15 : + if ((entire_insn & 0xfe0ff83f) == 0xf007881e) + { itype = MEPCOP1_32_INSN_CPBCAST_W_C3; mepcop1_32_extract_sfmt_cpmov_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 16 : + if ((entire_insn & 0xfe0ff83f) == 0xf0078820) + { itype = MEPCOP1_32_INSN_CPEXTUU_B_C3; mepcop1_32_extract_sfmt_cpmov_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 17 : + if ((entire_insn & 0xfe0ff83f) == 0xf0078822) + { itype = MEPCOP1_32_INSN_CPEXTU_B_C3; mepcop1_32_extract_sfmt_cpmov_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 18 : + if ((entire_insn & 0xfe0ff83f) == 0xf0078824) + { itype = MEPCOP1_32_INSN_CPEXTUU_H_C3; mepcop1_32_extract_sfmt_cpmov_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 19 : + if ((entire_insn & 0xfe0ff83f) == 0xf0078826) + { itype = MEPCOP1_32_INSN_CPEXTU_H_C3; mepcop1_32_extract_sfmt_cpmov_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 20 : + if ((entire_insn & 0xfe0ff83f) == 0xf0078828) + { itype = MEPCOP1_32_INSN_CPEXTLU_B_C3; mepcop1_32_extract_sfmt_cpmov_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 21 : + if ((entire_insn & 0xfe0ff83f) == 0xf007882a) + { itype = MEPCOP1_32_INSN_CPEXTL_B_C3; mepcop1_32_extract_sfmt_cpmov_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 22 : + if ((entire_insn & 0xfe0ff83f) == 0xf007882c) + { itype = MEPCOP1_32_INSN_CPEXTLU_H_C3; mepcop1_32_extract_sfmt_cpmov_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 23 : + if ((entire_insn & 0xfe0ff83f) == 0xf007882e) + { itype = MEPCOP1_32_INSN_CPEXTL_H_C3; mepcop1_32_extract_sfmt_cpmov_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 24 : + if ((entire_insn & 0xfe0ff83f) == 0xf0078830) + { itype = MEPCOP1_32_INSN_CPCASTUB_H_C3; mepcop1_32_extract_sfmt_cpmov_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 25 : + if ((entire_insn & 0xfe0ff83f) == 0xf0078832) + { itype = MEPCOP1_32_INSN_CPCASTB_H_C3; mepcop1_32_extract_sfmt_cpmov_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 26 : + if ((entire_insn & 0xfe0ff83f) == 0xf0078834) + { itype = MEPCOP1_32_INSN_CDCASTUW_C3; mepcop1_32_extract_sfmt_cpmov_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 27 : + if ((entire_insn & 0xfe0ff83f) == 0xf0078836) + { itype = MEPCOP1_32_INSN_CDCASTW_C3; mepcop1_32_extract_sfmt_cpmov_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 28 : + if ((entire_insn & 0xfe0ff83f) == 0xf0078838) + { itype = MEPCOP1_32_INSN_CPCASTUB_W_C3; mepcop1_32_extract_sfmt_cpmov_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 29 : + if ((entire_insn & 0xfe0ff83f) == 0xf007883a) + { itype = MEPCOP1_32_INSN_CPCASTB_W_C3; mepcop1_32_extract_sfmt_cpmov_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 30 : + if ((entire_insn & 0xfe0ff83f) == 0xf007883c) + { itype = MEPCOP1_32_INSN_CPCASTUH_W_C3; mepcop1_32_extract_sfmt_cpmov_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 31 : + if ((entire_insn & 0xfe0ff83f) == 0xf007883e) + { itype = MEPCOP1_32_INSN_CPCASTH_W_C3; mepcop1_32_extract_sfmt_cpmov_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + default : itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + } + } + case 36 : + { + unsigned int val = (((insn >> 21) & (3 << 1)) | ((insn >> 20) & (1 << 0))); + switch (val) + { + case 0 : + if ((entire_insn & 0xfffff801) == 0xf0079000) + { itype = MEPCOP1_32_INSN_CPCMPEQZ_B_C3; mepcop1_32_extract_sfmt_cpcmpeqz_b_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 1 : + if ((entire_insn & 0xfffff801) == 0xf0179000) + { itype = MEPCOP1_32_INSN_CPCMPEQ_B_C3; mepcop1_32_extract_sfmt_cpcmpeqz_b_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 3 : + if ((entire_insn & 0xfffff801) == 0xf0579000) + { itype = MEPCOP1_32_INSN_CPCMPEQ_W_C3; mepcop1_32_extract_sfmt_cpcmpeqz_b_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 5 : + if ((entire_insn & 0xfffff801) == 0xf0979000) + { itype = MEPCOP1_32_INSN_CPCMPNE_B_C3; mepcop1_32_extract_sfmt_cpcmpeqz_b_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 7 : + if ((entire_insn & 0xfffff801) == 0xf0d79000) + { itype = MEPCOP1_32_INSN_CPCMPNE_W_C3; mepcop1_32_extract_sfmt_cpcmpeqz_b_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + default : itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + } + } + case 40 : /* fall through */ + case 104 : /* fall through */ + case 168 : /* fall through */ + case 232 : /* fall through */ + case 296 : /* fall through */ + case 360 : /* fall through */ + case 424 : /* fall through */ + case 488 : + if ((entire_insn & 0xfc0ff801) == 0xf007a000) + { itype = MEPCOP1_32_INSN_CPSRLI3_B_C3; mepcop1_32_extract_sfmt_cpsrli3_b_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 42 : /* fall through */ + case 106 : /* fall through */ + case 170 : /* fall through */ + case 234 : /* fall through */ + case 298 : /* fall through */ + case 362 : /* fall through */ + case 426 : /* fall through */ + case 490 : + if ((entire_insn & 0xfc0ff801) == 0xf007a800) + { itype = MEPCOP1_32_INSN_CPSRAI3_B_C3; mepcop1_32_extract_sfmt_cpsrli3_b_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 44 : /* fall through */ + case 108 : /* fall through */ + case 172 : /* fall through */ + case 236 : /* fall through */ + case 300 : /* fall through */ + case 364 : /* fall through */ + case 428 : /* fall through */ + case 492 : + if ((entire_insn & 0xfc0ff801) == 0xf007b000) + { itype = MEPCOP1_32_INSN_CPSLLI3_B_C3; mepcop1_32_extract_sfmt_cpsrli3_b_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 48 : /* fall through */ + case 112 : /* fall through */ + case 176 : /* fall through */ + case 240 : /* fall through */ + case 304 : /* fall through */ + case 368 : /* fall through */ + case 432 : /* fall through */ + case 496 : + if ((entire_insn & 0xfc0ff801) == 0xf007c000) + { itype = MEPCOP1_32_INSN_CPCLIPIU3_W_C3; mepcop1_32_extract_sfmt_cpsrli3_w_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 50 : /* fall through */ + case 114 : /* fall through */ + case 178 : /* fall through */ + case 242 : /* fall through */ + case 306 : /* fall through */ + case 370 : /* fall through */ + case 434 : /* fall through */ + case 498 : /* fall through */ + case 562 : /* fall through */ + case 626 : /* fall through */ + case 690 : /* fall through */ + case 754 : /* fall through */ + case 818 : /* fall through */ + case 882 : /* fall through */ + case 946 : /* fall through */ + case 1010 : /* fall through */ + case 1074 : /* fall through */ + case 1138 : /* fall through */ + case 1202 : /* fall through */ + case 1266 : /* fall through */ + case 1330 : /* fall through */ + case 1394 : /* fall through */ + case 1458 : /* fall through */ + case 1522 : /* fall through */ + case 1586 : /* fall through */ + case 1650 : /* fall through */ + case 1714 : /* fall through */ + case 1778 : /* fall through */ + case 1842 : /* fall through */ + case 1906 : /* fall through */ + case 1970 : /* fall through */ + case 2034 : + { + unsigned int val = (((insn >> 1) & (7 << 0))); + switch (val) + { + case 0 : + if ((entire_insn & 0xf00ff83f) == 0xf007c800) + { itype = MEPCOP1_32_INSN_CPMOVI_B_C3; mepcop1_32_extract_sfmt_cpmovi_b_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 2 : + if ((entire_insn & 0xf00ff83f) == 0xf007c804) + { itype = MEPCOP1_32_INSN_CPMOVIU_H_C3; mepcop1_32_extract_sfmt_cpmoviu_h_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 3 : + if ((entire_insn & 0xf00ff83f) == 0xf007c806) + { itype = MEPCOP1_32_INSN_CPMOVI_H_C3; mepcop1_32_extract_sfmt_cpmovi_b_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 4 : + if ((entire_insn & 0xf00ff83f) == 0xf007c808) + { itype = MEPCOP1_32_INSN_CPMOVIU_W_C3; mepcop1_32_extract_sfmt_cpmoviu_h_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 5 : + if ((entire_insn & 0xf00ff83f) == 0xf007c80a) + { itype = MEPCOP1_32_INSN_CPMOVI_W_C3; mepcop1_32_extract_sfmt_cpmovi_b_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 6 : + if ((entire_insn & 0xf00ff83f) == 0xf007c80c) + { itype = MEPCOP1_32_INSN_CDMOVIU_C3; mepcop1_32_extract_sfmt_cpmoviu_h_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 7 : + if ((entire_insn & 0xf00ff83f) == 0xf007c80e) + { itype = MEPCOP1_32_INSN_CDMOVI_C3; mepcop1_32_extract_sfmt_cpmovi_b_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + default : itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + } + } + case 58 : /* fall through */ + case 122 : /* fall through */ + case 186 : /* fall through */ + case 250 : /* fall through */ + case 314 : /* fall through */ + case 378 : /* fall through */ + case 442 : /* fall through */ + case 506 : /* fall through */ + case 570 : /* fall through */ + case 634 : /* fall through */ + case 698 : /* fall through */ + case 762 : /* fall through */ + case 826 : /* fall through */ + case 890 : /* fall through */ + case 954 : /* fall through */ + case 1018 : /* fall through */ + case 1082 : /* fall through */ + case 1146 : /* fall through */ + case 1210 : /* fall through */ + case 1274 : /* fall through */ + case 1338 : /* fall through */ + case 1402 : /* fall through */ + case 1466 : /* fall through */ + case 1530 : /* fall through */ + case 1594 : /* fall through */ + case 1658 : /* fall through */ + case 1722 : /* fall through */ + case 1786 : /* fall through */ + case 1850 : /* fall through */ + case 1914 : /* fall through */ + case 1978 : /* fall through */ + case 2042 : + if ((entire_insn & 0xf00ff801) == 0xf007e800) + { itype = MEPCOP1_32_INSN_CPFSFTBI_C3; mepcop1_32_extract_sfmt_cpfsftbi_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 60 : /* fall through */ + case 124 : /* fall through */ + case 188 : /* fall through */ + case 252 : /* fall through */ + case 316 : /* fall through */ + case 380 : /* fall through */ + case 444 : /* fall through */ + case 508 : /* fall through */ + case 572 : /* fall through */ + case 636 : /* fall through */ + case 700 : /* fall through */ + case 764 : /* fall through */ + case 828 : /* fall through */ + case 892 : /* fall through */ + case 956 : /* fall through */ + case 1020 : /* fall through */ + case 1084 : /* fall through */ + case 1148 : /* fall through */ + case 1212 : /* fall through */ + case 1276 : /* fall through */ + case 1340 : /* fall through */ + case 1404 : /* fall through */ + case 1468 : /* fall through */ + case 1532 : /* fall through */ + case 1596 : /* fall through */ + case 1660 : /* fall through */ + case 1724 : /* fall through */ + case 1788 : /* fall through */ + case 1852 : /* fall through */ + case 1916 : /* fall through */ + case 1980 : /* fall through */ + case 2044 : + { + unsigned int val = (((insn >> 7) & (1 << 1)) | ((insn >> 1) & (1 << 0))); + switch (val) + { + case 0 : + if ((entire_insn & 0xf00ffff7) == 0xf007f000) + { itype = MEPCOP1_32_INSN_CMOV_CRN_RM; mepcop1_32_extract_sfmt_cmov_crn_rm (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 1 : + if ((entire_insn & 0xf00ffff3) == 0xf007f002) + { itype = MEPCOP1_32_INSN_CMOVC_CCRN_RM; mepcop1_32_extract_sfmt_cmovc_ccrn_rm (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 2 : + if ((entire_insn & 0xf00ffff7) == 0xf007f100) + { itype = MEPCOP1_32_INSN_CMOVH_CRN_RM; mepcop1_32_extract_sfmt_cmov_crn_rm (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + default : itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + } + } + case 61 : /* fall through */ + case 125 : /* fall through */ + case 189 : /* fall through */ + case 253 : /* fall through */ + case 317 : /* fall through */ + case 381 : /* fall through */ + case 445 : /* fall through */ + case 509 : /* fall through */ + case 573 : /* fall through */ + case 637 : /* fall through */ + case 701 : /* fall through */ + case 765 : /* fall through */ + case 829 : /* fall through */ + case 893 : /* fall through */ + case 957 : /* fall through */ + case 1021 : /* fall through */ + case 1085 : /* fall through */ + case 1149 : /* fall through */ + case 1213 : /* fall through */ + case 1277 : /* fall through */ + case 1341 : /* fall through */ + case 1405 : /* fall through */ + case 1469 : /* fall through */ + case 1533 : /* fall through */ + case 1597 : /* fall through */ + case 1661 : /* fall through */ + case 1725 : /* fall through */ + case 1789 : /* fall through */ + case 1853 : /* fall through */ + case 1917 : /* fall through */ + case 1981 : /* fall through */ + case 2045 : + { + unsigned int val = (((insn >> 7) & (1 << 1)) | ((insn >> 1) & (1 << 0))); + switch (val) + { + case 0 : + if ((entire_insn & 0xf00ffff7) == 0xf007f001) + { itype = MEPCOP1_32_INSN_CMOV_RN_CRM; mepcop1_32_extract_sfmt_cmov_rn_crm (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 1 : + if ((entire_insn & 0xf00ffff3) == 0xf007f003) + { itype = MEPCOP1_32_INSN_CMOVC_RN_CCRM; mepcop1_32_extract_sfmt_cmovc_rn_ccrm (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 2 : + if ((entire_insn & 0xf00ffff7) == 0xf007f101) + { itype = MEPCOP1_32_INSN_CMOVH_RN_CRM; mepcop1_32_extract_sfmt_cmov_rn_crm (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + default : itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + } + } + case 65 : + { + unsigned int val = (((insn >> 21) & (3 << 1)) | ((insn >> 20) & (1 << 0))); + switch (val) + { + case 0 : + if ((entire_insn & 0xfffff801) == 0xf0270001) + { itype = MEPCOP1_32_INSN_CPADDUA1_H_C3; mepcop1_32_extract_sfmt_cpcmpeqz_b_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 1 : + if ((entire_insn & 0xfffff801) == 0xf0370001) + { itype = MEPCOP1_32_INSN_CPADDLA1_H_C3; mepcop1_32_extract_sfmt_cpcmpeqz_b_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 2 : + if ((entire_insn & 0xfffff801) == 0xf0670001) + { itype = MEPCOP1_32_INSN_CPADDACUA1_H_C3; mepcop1_32_extract_sfmt_cpcmpeqz_b_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 3 : + if ((entire_insn & 0xfffff801) == 0xf0770001) + { itype = MEPCOP1_32_INSN_CPADDACLA1_H_C3; mepcop1_32_extract_sfmt_cpcmpeqz_b_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 4 : + if ((entire_insn & 0xfffff801) == 0xf0a70001) + { itype = MEPCOP1_32_INSN_CPSUBUA1_H_C3; mepcop1_32_extract_sfmt_cpcmpeqz_b_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 5 : + if ((entire_insn & 0xfffff801) == 0xf0b70001) + { itype = MEPCOP1_32_INSN_CPSUBLA1_H_C3; mepcop1_32_extract_sfmt_cpcmpeqz_b_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 6 : + if ((entire_insn & 0xfffff801) == 0xf0e70001) + { itype = MEPCOP1_32_INSN_CPSUBACUA1_H_C3; mepcop1_32_extract_sfmt_cpcmpeqz_b_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 7 : + if ((entire_insn & 0xfffff801) == 0xf0f70001) + { itype = MEPCOP1_32_INSN_CPSUBACLA1_H_C3; mepcop1_32_extract_sfmt_cpcmpeqz_b_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + default : itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + } + } + case 67 : + { + unsigned int val = (((insn >> 21) & (1 << 1)) | ((insn >> 20) & (1 << 0))); + switch (val) + { + case 0 : + if ((entire_insn & 0xfffff801) == 0xf0a70801) + { itype = MEPCOP1_32_INSN_CPMULUA1_H_C3; mepcop1_32_extract_sfmt_cpcmpeqz_b_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 1 : + if ((entire_insn & 0xfffff801) == 0xf0b70801) + { itype = MEPCOP1_32_INSN_CPMULLA1_H_C3; mepcop1_32_extract_sfmt_cpcmpeqz_b_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 2 : + if ((entire_insn & 0xfffff801) == 0xf0e70801) + { itype = MEPCOP1_32_INSN_CPMULUA1_W_C3; mepcop1_32_extract_sfmt_cpcmpeqz_b_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 3 : + if ((entire_insn & 0xfffff801) == 0xf0f70801) + { itype = MEPCOP1_32_INSN_CPMULLA1_W_C3; mepcop1_32_extract_sfmt_cpcmpeqz_b_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + default : itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + } + } + case 69 : + if ((entire_insn & 0xfffff83f) == 0xf0271001) + { itype = MEPCOP1_32_INSN_CPSLLA1_C3; mepcop1_32_extract_sfmt_cpmovtocsar0_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 96 : /* fall through */ + case 160 : /* fall through */ + case 224 : + { + unsigned int val = (((insn >> 1) & (15 << 0))); + switch (val) + { + case 0 : + if ((entire_insn & 0xfe0fffff) == 0xf0078000) + { itype = MEPCOP1_32_INSN_CPMOVFRCSAR0_C3; mepcop1_32_extract_sfmt_cpmovfrcsar0_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 1 : + if ((entire_insn & 0xfe0fffff) == 0xf0078002) + { itype = MEPCOP1_32_INSN_CPMOVFRCC_C3; mepcop1_32_extract_sfmt_cpmovfrcsar0_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 15 : + if ((entire_insn & 0xfe0fffff) == 0xf007801e) + { itype = MEPCOP1_32_INSN_CPMOVFRCSAR1_C3; mepcop1_32_extract_sfmt_cpmovfrcsar0_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + default : itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + } + } + case 100 : + { + unsigned int val = (((insn >> 23) & (1 << 0))); + switch (val) + { + case 0 : + if ((entire_insn & 0xfffff801) == 0xf0379000) + { itype = MEPCOP1_32_INSN_CPCMPEQ_H_C3; mepcop1_32_extract_sfmt_cpcmpeqz_b_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 1 : + if ((entire_insn & 0xfffff801) == 0xf0b79000) + { itype = MEPCOP1_32_INSN_CPCMPNE_H_C3; mepcop1_32_extract_sfmt_cpcmpeqz_b_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + default : itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + } + } + case 129 : + { + unsigned int val = (((insn >> 21) & (1 << 1)) | ((insn >> 20) & (1 << 0))); + switch (val) + { + case 0 : + if ((entire_insn & 0xfffff801) == 0xf1070001) + { itype = MEPCOP1_32_INSN_CPABSA1U_B_C3; mepcop1_32_extract_sfmt_cpcmpeqz_b_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 1 : + if ((entire_insn & 0xfffff801) == 0xf1170001) + { itype = MEPCOP1_32_INSN_CPABSA1_B_C3; mepcop1_32_extract_sfmt_cpcmpeqz_b_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 2 : + if ((entire_insn & 0xfffff801) == 0xf1470001) + { itype = MEPCOP1_32_INSN_CPSADA1U_B_C3; mepcop1_32_extract_sfmt_cpcmpeqz_b_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 3 : + if ((entire_insn & 0xfffff801) == 0xf1570001) + { itype = MEPCOP1_32_INSN_CPSADA1_B_C3; mepcop1_32_extract_sfmt_cpcmpeqz_b_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + default : itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + } + } + case 131 : + { + unsigned int val = (((insn >> 21) & (3 << 1)) | ((insn >> 20) & (1 << 0))); + switch (val) + { + case 0 : + if ((entire_insn & 0xfffff801) == 0xf1070801) + { itype = MEPCOP1_32_INSN_CPMADA1U_B_C3; mepcop1_32_extract_sfmt_cpcmpeqz_b_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 1 : + if ((entire_insn & 0xfffff801) == 0xf1170801) + { itype = MEPCOP1_32_INSN_CPMADA1_B_C3; mepcop1_32_extract_sfmt_cpcmpeqz_b_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 2 : + if ((entire_insn & 0xfffff801) == 0xf1470801) + { itype = MEPCOP1_32_INSN_CPMADUA1U_W_C3; mepcop1_32_extract_sfmt_cpcmpeqz_b_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 3 : + if ((entire_insn & 0xfffff801) == 0xf1570801) + { itype = MEPCOP1_32_INSN_CPMADLA1U_W_C3; mepcop1_32_extract_sfmt_cpcmpeqz_b_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 6 : + if ((entire_insn & 0xfffff801) == 0xf1c70801) + { itype = MEPCOP1_32_INSN_CPMSBUA1U_W_C3; mepcop1_32_extract_sfmt_cpcmpeqz_b_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 7 : + if ((entire_insn & 0xfffff801) == 0xf1d70801) + { itype = MEPCOP1_32_INSN_CPMSBLA1U_W_C3; mepcop1_32_extract_sfmt_cpcmpeqz_b_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + default : itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + } + } + case 164 : + { + unsigned int val = (((insn >> 21) & (3 << 1)) | ((insn >> 20) & (1 << 0))); + switch (val) + { + case 0 : + if ((entire_insn & 0xfffff801) == 0xf1079000) + { itype = MEPCOP1_32_INSN_CPCMPGTU_B_C3; mepcop1_32_extract_sfmt_cpcmpeqz_b_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 1 : + if ((entire_insn & 0xfffff801) == 0xf1179000) + { itype = MEPCOP1_32_INSN_CPCMPGT_B_C3; mepcop1_32_extract_sfmt_cpcmpeqz_b_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 2 : + if ((entire_insn & 0xfffff801) == 0xf1479000) + { itype = MEPCOP1_32_INSN_CPCMPGTU_W_C3; mepcop1_32_extract_sfmt_cpcmpeqz_b_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 3 : + if ((entire_insn & 0xfffff801) == 0xf1579000) + { itype = MEPCOP1_32_INSN_CPCMPGT_W_C3; mepcop1_32_extract_sfmt_cpcmpeqz_b_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 4 : + if ((entire_insn & 0xfffff801) == 0xf1879000) + { itype = MEPCOP1_32_INSN_CPCMPGEU_B_C3; mepcop1_32_extract_sfmt_cpcmpeqz_b_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 5 : + if ((entire_insn & 0xfffff801) == 0xf1979000) + { itype = MEPCOP1_32_INSN_CPCMPGE_B_C3; mepcop1_32_extract_sfmt_cpcmpeqz_b_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 6 : + if ((entire_insn & 0xfffff801) == 0xf1c79000) + { itype = MEPCOP1_32_INSN_CPCMPGEU_W_C3; mepcop1_32_extract_sfmt_cpcmpeqz_b_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 7 : + if ((entire_insn & 0xfffff801) == 0xf1d79000) + { itype = MEPCOP1_32_INSN_CPCMPGE_W_C3; mepcop1_32_extract_sfmt_cpcmpeqz_b_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + default : itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + } + } + case 193 : + { + unsigned int val = (((insn >> 21) & (1 << 1)) | ((insn >> 20) & (1 << 0))); + switch (val) + { + case 0 : + if ((entire_insn & 0xfffff801) == 0xf1270001) + { itype = MEPCOP1_32_INSN_CPABSUA1_H_C3; mepcop1_32_extract_sfmt_cpcmpeqz_b_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 1 : + if ((entire_insn & 0xfffff801) == 0xf1370001) + { itype = MEPCOP1_32_INSN_CPABSLA1_H_C3; mepcop1_32_extract_sfmt_cpcmpeqz_b_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 2 : + if ((entire_insn & 0xfffff801) == 0xf1670001) + { itype = MEPCOP1_32_INSN_CPSADUA1_H_C3; mepcop1_32_extract_sfmt_cpcmpeqz_b_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 3 : + if ((entire_insn & 0xfffff801) == 0xf1770001) + { itype = MEPCOP1_32_INSN_CPSADLA1_H_C3; mepcop1_32_extract_sfmt_cpcmpeqz_b_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + default : itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + } + } + case 195 : + { + unsigned int val = (((insn >> 21) & (3 << 1)) | ((insn >> 20) & (1 << 0))); + switch (val) + { + case 0 : + if ((entire_insn & 0xfffff801) == 0xf1270801) + { itype = MEPCOP1_32_INSN_CPMADUA1_H_C3; mepcop1_32_extract_sfmt_cpcmpeqz_b_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 1 : + if ((entire_insn & 0xfffff801) == 0xf1370801) + { itype = MEPCOP1_32_INSN_CPMADLA1_H_C3; mepcop1_32_extract_sfmt_cpcmpeqz_b_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 2 : + if ((entire_insn & 0xfffff801) == 0xf1670801) + { itype = MEPCOP1_32_INSN_CPMADUA1_W_C3; mepcop1_32_extract_sfmt_cpcmpeqz_b_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 3 : + if ((entire_insn & 0xfffff801) == 0xf1770801) + { itype = MEPCOP1_32_INSN_CPMADLA1_W_C3; mepcop1_32_extract_sfmt_cpcmpeqz_b_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 4 : + if ((entire_insn & 0xfffff801) == 0xf1a70801) + { itype = MEPCOP1_32_INSN_CPMSBUA1_H_C3; mepcop1_32_extract_sfmt_cpcmpeqz_b_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 5 : + if ((entire_insn & 0xfffff801) == 0xf1b70801) + { itype = MEPCOP1_32_INSN_CPMSBLA1_H_C3; mepcop1_32_extract_sfmt_cpcmpeqz_b_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 6 : + if ((entire_insn & 0xfffff801) == 0xf1e70801) + { itype = MEPCOP1_32_INSN_CPMSBUA1_W_C3; mepcop1_32_extract_sfmt_cpcmpeqz_b_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 7 : + if ((entire_insn & 0xfffff801) == 0xf1f70801) + { itype = MEPCOP1_32_INSN_CPMSBLA1_W_C3; mepcop1_32_extract_sfmt_cpcmpeqz_b_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + default : itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + } + } + case 228 : + { + unsigned int val = (((insn >> 23) & (1 << 0))); + switch (val) + { + case 0 : + if ((entire_insn & 0xfffff801) == 0xf1379000) + { itype = MEPCOP1_32_INSN_CPCMPGT_H_C3; mepcop1_32_extract_sfmt_cpcmpeqz_b_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 1 : + if ((entire_insn & 0xfffff801) == 0xf1b79000) + { itype = MEPCOP1_32_INSN_CPCMPGE_H_C3; mepcop1_32_extract_sfmt_cpcmpeqz_b_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + default : itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + } + } + case 256 : /* fall through */ + case 320 : /* fall through */ + case 384 : /* fall through */ + case 448 : + if ((entire_insn & 0xfe0ff801) == 0xf2070000) + { itype = MEPCOP1_32_INSN_CPADD3_H_C3; mepcop1_32_extract_sfmt_cpadd3_b_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 257 : + if ((entire_insn & 0xfffff801) == 0xf2070001) + { itype = MEPCOP1_32_INSN_CPSETA1_H_C3; mepcop1_32_extract_sfmt_cpcmpeqz_b_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 258 : /* fall through */ + case 322 : /* fall through */ + case 386 : /* fall through */ + case 450 : + if ((entire_insn & 0xfe0ff801) == 0xf2070800) + { itype = MEPCOP1_32_INSN_CPOR3_C3; mepcop1_32_extract_sfmt_cpadd3_b_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 260 : /* fall through */ + case 324 : /* fall through */ + case 388 : /* fall through */ + case 452 : + if ((entire_insn & 0xfe0ff801) == 0xf2071000) + { itype = MEPCOP1_32_INSN_CPUNPACKU_H_C3; mepcop1_32_extract_sfmt_cpadd3_b_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 264 : /* fall through */ + case 328 : /* fall through */ + case 392 : /* fall through */ + case 456 : + if ((entire_insn & 0xfe0ff801) == 0xf2072000) + { itype = MEPCOP1_32_INSN_CPSSRL3_B_C3; mepcop1_32_extract_sfmt_cpadd3_b_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 266 : /* fall through */ + case 330 : /* fall through */ + case 394 : /* fall through */ + case 458 : + if ((entire_insn & 0xfe0ff801) == 0xf2072800) + { itype = MEPCOP1_32_INSN_CPSSRA3_B_C3; mepcop1_32_extract_sfmt_cpadd3_b_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 268 : /* fall through */ + case 332 : /* fall through */ + case 396 : /* fall through */ + case 460 : + if ((entire_insn & 0xfe0ff801) == 0xf2073000) + { itype = MEPCOP1_32_INSN_CPSSLL3_B_C3; mepcop1_32_extract_sfmt_cpadd3_b_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 274 : /* fall through */ + case 338 : /* fall through */ + case 402 : /* fall through */ + case 466 : + if ((entire_insn & 0xfe0ff801) == 0xf2074800) + { itype = MEPCOP1_32_INSN_CPEXTUADD3_B_C3; mepcop1_32_extract_sfmt_cpadd3_b_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 276 : /* fall through */ + case 340 : /* fall through */ + case 404 : /* fall through */ + case 468 : + if ((entire_insn & 0xfe0ff801) == 0xf2075000) + { itype = MEPCOP1_32_INSN_CPAVE3_B_C3; mepcop1_32_extract_sfmt_cpadd3_b_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 278 : /* fall through */ + case 342 : /* fall through */ + case 406 : /* fall through */ + case 470 : + if ((entire_insn & 0xfe0ff801) == 0xf2075800) + { itype = MEPCOP1_32_INSN_CPABS3_B_C3; mepcop1_32_extract_sfmt_cpadd3_b_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 280 : /* fall through */ + case 344 : /* fall through */ + case 408 : /* fall through */ + case 472 : + if ((entire_insn & 0xfe0ff801) == 0xf2076000) + { itype = MEPCOP1_32_INSN_CPMAX3_B_C3; mepcop1_32_extract_sfmt_cpadd3_b_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 282 : /* fall through */ + case 346 : /* fall through */ + case 410 : /* fall through */ + case 474 : + if ((entire_insn & 0xfe0ff801) == 0xf2076800) + { itype = MEPCOP1_32_INSN_CPMIN3_B_C3; mepcop1_32_extract_sfmt_cpadd3_b_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 292 : + { + unsigned int val = (((insn >> 22) & (3 << 0))); + switch (val) + { + case 0 : + if ((entire_insn & 0xfffff801) == 0xf2179000) + { itype = MEPCOP1_32_INSN_CPACMPEQ_B_C3; mepcop1_32_extract_sfmt_cpcmpeqz_b_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 1 : + if ((entire_insn & 0xfffff801) == 0xf2579000) + { itype = MEPCOP1_32_INSN_CPACMPEQ_W_C3; mepcop1_32_extract_sfmt_cpcmpeqz_b_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 2 : + if ((entire_insn & 0xfffff801) == 0xf2979000) + { itype = MEPCOP1_32_INSN_CPACMPNE_B_C3; mepcop1_32_extract_sfmt_cpcmpeqz_b_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 3 : + if ((entire_insn & 0xfffff801) == 0xf2d79000) + { itype = MEPCOP1_32_INSN_CPACMPNE_W_C3; mepcop1_32_extract_sfmt_cpcmpeqz_b_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + default : itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + } + } + case 321 : + { + unsigned int val = (((insn >> 20) & (1 << 0))); + switch (val) + { + case 0 : + if ((entire_insn & 0xfffff801) == 0xf2270001) + { itype = MEPCOP1_32_INSN_CPSETUA1_W_C3; mepcop1_32_extract_sfmt_cpcmpeqz_b_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 1 : + if ((entire_insn & 0xfffff801) == 0xf2370001) + { itype = MEPCOP1_32_INSN_CPSETLA1_W_C3; mepcop1_32_extract_sfmt_cpcmpeqz_b_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + default : itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + } + } + case 356 : + { + unsigned int val = (((insn >> 23) & (1 << 0))); + switch (val) + { + case 0 : + if ((entire_insn & 0xfffff801) == 0xf2379000) + { itype = MEPCOP1_32_INSN_CPACMPEQ_H_C3; mepcop1_32_extract_sfmt_cpcmpeqz_b_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 1 : + if ((entire_insn & 0xfffff801) == 0xf2b79000) + { itype = MEPCOP1_32_INSN_CPACMPNE_H_C3; mepcop1_32_extract_sfmt_cpcmpeqz_b_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + default : itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + } + } + case 420 : + { + unsigned int val = (((insn >> 21) & (3 << 1)) | ((insn >> 20) & (1 << 0))); + switch (val) + { + case 0 : + if ((entire_insn & 0xfffff801) == 0xf3079000) + { itype = MEPCOP1_32_INSN_CPACMPGTU_B_C3; mepcop1_32_extract_sfmt_cpcmpeqz_b_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 1 : + if ((entire_insn & 0xfffff801) == 0xf3179000) + { itype = MEPCOP1_32_INSN_CPACMPGT_B_C3; mepcop1_32_extract_sfmt_cpcmpeqz_b_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 2 : + if ((entire_insn & 0xfffff801) == 0xf3479000) + { itype = MEPCOP1_32_INSN_CPACMPGTU_W_C3; mepcop1_32_extract_sfmt_cpcmpeqz_b_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 3 : + if ((entire_insn & 0xfffff801) == 0xf3579000) + { itype = MEPCOP1_32_INSN_CPACMPGT_W_C3; mepcop1_32_extract_sfmt_cpcmpeqz_b_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 4 : + if ((entire_insn & 0xfffff801) == 0xf3879000) + { itype = MEPCOP1_32_INSN_CPACMPGEU_B_C3; mepcop1_32_extract_sfmt_cpcmpeqz_b_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 5 : + if ((entire_insn & 0xfffff801) == 0xf3979000) + { itype = MEPCOP1_32_INSN_CPACMPGE_B_C3; mepcop1_32_extract_sfmt_cpcmpeqz_b_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 6 : + if ((entire_insn & 0xfffff801) == 0xf3c79000) + { itype = MEPCOP1_32_INSN_CPACMPGEU_W_C3; mepcop1_32_extract_sfmt_cpcmpeqz_b_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 7 : + if ((entire_insn & 0xfffff801) == 0xf3d79000) + { itype = MEPCOP1_32_INSN_CPACMPGE_W_C3; mepcop1_32_extract_sfmt_cpcmpeqz_b_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + default : itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + } + } + case 451 : + { + unsigned int val = (((insn >> 21) & (3 << 1)) | ((insn >> 20) & (1 << 0))); + switch (val) + { + case 0 : + if ((entire_insn & 0xfffff801) == 0xf3270801) + { itype = MEPCOP1_32_INSN_CPSMADUA1_H_C3; mepcop1_32_extract_sfmt_cpcmpeqz_b_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 1 : + if ((entire_insn & 0xfffff801) == 0xf3370801) + { itype = MEPCOP1_32_INSN_CPSMADLA1_H_C3; mepcop1_32_extract_sfmt_cpcmpeqz_b_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 2 : + if ((entire_insn & 0xfffff801) == 0xf3670801) + { itype = MEPCOP1_32_INSN_CPSMADUA1_W_C3; mepcop1_32_extract_sfmt_cpcmpeqz_b_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 3 : + if ((entire_insn & 0xfffff801) == 0xf3770801) + { itype = MEPCOP1_32_INSN_CPSMADLA1_W_C3; mepcop1_32_extract_sfmt_cpcmpeqz_b_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 4 : + if ((entire_insn & 0xfffff801) == 0xf3a70801) + { itype = MEPCOP1_32_INSN_CPSMSBUA1_H_C3; mepcop1_32_extract_sfmt_cpcmpeqz_b_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 5 : + if ((entire_insn & 0xfffff801) == 0xf3b70801) + { itype = MEPCOP1_32_INSN_CPSMSBLA1_H_C3; mepcop1_32_extract_sfmt_cpcmpeqz_b_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 6 : + if ((entire_insn & 0xfffff801) == 0xf3e70801) + { itype = MEPCOP1_32_INSN_CPSMSBUA1_W_C3; mepcop1_32_extract_sfmt_cpcmpeqz_b_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 7 : + if ((entire_insn & 0xfffff801) == 0xf3f70801) + { itype = MEPCOP1_32_INSN_CPSMSBLA1_W_C3; mepcop1_32_extract_sfmt_cpcmpeqz_b_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + default : itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + } + } + case 484 : + { + unsigned int val = (((insn >> 23) & (1 << 0))); + switch (val) + { + case 0 : + if ((entire_insn & 0xfffff801) == 0xf3379000) + { itype = MEPCOP1_32_INSN_CPACMPGT_H_C3; mepcop1_32_extract_sfmt_cpcmpeqz_b_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 1 : + if ((entire_insn & 0xfffff801) == 0xf3b79000) + { itype = MEPCOP1_32_INSN_CPACMPGE_H_C3; mepcop1_32_extract_sfmt_cpcmpeqz_b_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + default : itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + } + } + case 512 : /* fall through */ + case 576 : /* fall through */ + case 640 : /* fall through */ + case 704 : + if ((entire_insn & 0xfe0ff801) == 0xf4070000) + { itype = MEPCOP1_32_INSN_CPADD3_W_C3; mepcop1_32_extract_sfmt_cpadd3_b_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 514 : /* fall through */ + case 578 : /* fall through */ + case 642 : /* fall through */ + case 706 : + if ((entire_insn & 0xfe0ff801) == 0xf4070800) + { itype = MEPCOP1_32_INSN_CPNOR3_C3; mepcop1_32_extract_sfmt_cpadd3_b_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 516 : /* fall through */ + case 580 : /* fall through */ + case 644 : /* fall through */ + case 708 : + if ((entire_insn & 0xfe0ff801) == 0xf4071000) + { itype = MEPCOP1_32_INSN_CPUNPACKU_W_C3; mepcop1_32_extract_sfmt_cpadd3_b_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 519 : /* fall through */ + case 583 : /* fall through */ + case 647 : /* fall through */ + case 711 : /* fall through */ + case 775 : /* fall through */ + case 839 : /* fall through */ + case 903 : /* fall through */ + case 967 : + if ((entire_insn & 0xfc0fffff) == 0xf4071801) + { itype = MEPCOP1_32_INSN_CPSRAIA1_P1; mepcop1_32_extract_sfmt_cpsrlia1_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 520 : /* fall through */ + case 584 : /* fall through */ + case 648 : /* fall through */ + case 712 : + if ((entire_insn & 0xfe0ff801) == 0xf4072000) + { itype = MEPCOP1_32_INSN_CPSRL3_H_C3; mepcop1_32_extract_sfmt_cpadd3_b_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 522 : /* fall through */ + case 586 : /* fall through */ + case 650 : /* fall through */ + case 714 : + if ((entire_insn & 0xfe0ff801) == 0xf4072800) + { itype = MEPCOP1_32_INSN_CPSRA3_H_C3; mepcop1_32_extract_sfmt_cpadd3_b_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 524 : /* fall through */ + case 588 : /* fall through */ + case 652 : /* fall through */ + case 716 : + if ((entire_insn & 0xfe0ff801) == 0xf4073000) + { itype = MEPCOP1_32_INSN_CPSLL3_H_C3; mepcop1_32_extract_sfmt_cpadd3_b_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 526 : /* fall through */ + case 590 : /* fall through */ + case 654 : /* fall through */ + case 718 : + if ((entire_insn & 0xfe0ff801) == 0xf4073800) + { itype = MEPCOP1_32_INSN_CPSLA3_H_C3; mepcop1_32_extract_sfmt_cpadd3_b_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 528 : /* fall through */ + case 592 : /* fall through */ + case 656 : /* fall through */ + case 720 : + if ((entire_insn & 0xfe0ff801) == 0xf4074000) + { itype = MEPCOP1_32_INSN_CPSADD3_H_C3; mepcop1_32_extract_sfmt_cpadd3_b_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 530 : /* fall through */ + case 594 : /* fall through */ + case 658 : /* fall through */ + case 722 : + if ((entire_insn & 0xfe0ff801) == 0xf4074800) + { itype = MEPCOP1_32_INSN_CPEXTLADDU3_B_C3; mepcop1_32_extract_sfmt_cpadd3_b_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 532 : /* fall through */ + case 596 : /* fall through */ + case 660 : /* fall through */ + case 724 : + if ((entire_insn & 0xfe0ff801) == 0xf4075000) + { itype = MEPCOP1_32_INSN_CPAVE3_H_C3; mepcop1_32_extract_sfmt_cpadd3_b_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 534 : /* fall through */ + case 598 : /* fall through */ + case 662 : /* fall through */ + case 726 : + if ((entire_insn & 0xfe0ff801) == 0xf4075800) + { itype = MEPCOP1_32_INSN_CPABS3_H_C3; mepcop1_32_extract_sfmt_cpadd3_b_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 548 : + { + unsigned int val = (((insn >> 22) & (3 << 0))); + switch (val) + { + case 0 : + if ((entire_insn & 0xfffff801) == 0xf4179000) + { itype = MEPCOP1_32_INSN_CPOCMPEQ_B_C3; mepcop1_32_extract_sfmt_cpcmpeqz_b_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 1 : + if ((entire_insn & 0xfffff801) == 0xf4579000) + { itype = MEPCOP1_32_INSN_CPOCMPEQ_W_C3; mepcop1_32_extract_sfmt_cpcmpeqz_b_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 2 : + if ((entire_insn & 0xfffff801) == 0xf4979000) + { itype = MEPCOP1_32_INSN_CPOCMPNE_B_C3; mepcop1_32_extract_sfmt_cpcmpeqz_b_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 3 : + if ((entire_insn & 0xfffff801) == 0xf4d79000) + { itype = MEPCOP1_32_INSN_CPOCMPNE_W_C3; mepcop1_32_extract_sfmt_cpcmpeqz_b_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + default : itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + } + } + case 552 : /* fall through */ + case 616 : /* fall through */ + case 680 : /* fall through */ + case 744 : /* fall through */ + case 808 : /* fall through */ + case 872 : /* fall through */ + case 936 : /* fall through */ + case 1000 : + if ((entire_insn & 0xfc0ff801) == 0xf407a000) + { itype = MEPCOP1_32_INSN_CPSRLI3_H_C3; mepcop1_32_extract_sfmt_cpsrli3_h_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 554 : /* fall through */ + case 618 : /* fall through */ + case 682 : /* fall through */ + case 746 : /* fall through */ + case 810 : /* fall through */ + case 874 : /* fall through */ + case 938 : /* fall through */ + case 1002 : + if ((entire_insn & 0xfc0ff801) == 0xf407a800) + { itype = MEPCOP1_32_INSN_CPSRAI3_H_C3; mepcop1_32_extract_sfmt_cpsrli3_h_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 556 : /* fall through */ + case 620 : /* fall through */ + case 684 : /* fall through */ + case 748 : /* fall through */ + case 812 : /* fall through */ + case 876 : /* fall through */ + case 940 : /* fall through */ + case 1004 : + if ((entire_insn & 0xfc0ff801) == 0xf407b000) + { itype = MEPCOP1_32_INSN_CPSLLI3_H_C3; mepcop1_32_extract_sfmt_cpsrli3_h_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 558 : /* fall through */ + case 622 : /* fall through */ + case 686 : /* fall through */ + case 750 : /* fall through */ + case 814 : /* fall through */ + case 878 : /* fall through */ + case 942 : /* fall through */ + case 1006 : + if ((entire_insn & 0xfc0ff801) == 0xf407b800) + { itype = MEPCOP1_32_INSN_CPSLAI3_H_C3; mepcop1_32_extract_sfmt_cpsrli3_h_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 560 : /* fall through */ + case 624 : /* fall through */ + case 688 : /* fall through */ + case 752 : /* fall through */ + case 816 : /* fall through */ + case 880 : /* fall through */ + case 944 : /* fall through */ + case 1008 : + if ((entire_insn & 0xfc0ff801) == 0xf407c000) + { itype = MEPCOP1_32_INSN_CPCLIPI3_W_C3; mepcop1_32_extract_sfmt_cpsrli3_w_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 579 : + { + unsigned int val = (((insn >> 21) & (1 << 1)) | ((insn >> 20) & (1 << 0))); + switch (val) + { + case 0 : + if ((entire_insn & 0xfffff801) == 0xf4a70801) + { itype = MEPCOP1_32_INSN_CPMULSLUA1_H_C3; mepcop1_32_extract_sfmt_cpcmpeqz_b_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 1 : + if ((entire_insn & 0xfffff801) == 0xf4b70801) + { itype = MEPCOP1_32_INSN_CPMULSLLA1_H_C3; mepcop1_32_extract_sfmt_cpcmpeqz_b_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 2 : + if ((entire_insn & 0xfffff801) == 0xf4e70801) + { itype = MEPCOP1_32_INSN_CPMULSLUA1_W_C3; mepcop1_32_extract_sfmt_cpcmpeqz_b_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 3 : + if ((entire_insn & 0xfffff801) == 0xf4f70801) + { itype = MEPCOP1_32_INSN_CPMULSLLA1_W_C3; mepcop1_32_extract_sfmt_cpcmpeqz_b_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + default : itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + } + } + case 612 : + { + unsigned int val = (((insn >> 23) & (1 << 0))); + switch (val) + { + case 0 : + if ((entire_insn & 0xfffff801) == 0xf4379000) + { itype = MEPCOP1_32_INSN_CPOCMPEQ_H_C3; mepcop1_32_extract_sfmt_cpcmpeqz_b_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 1 : + if ((entire_insn & 0xfffff801) == 0xf4b79000) + { itype = MEPCOP1_32_INSN_CPOCMPNE_H_C3; mepcop1_32_extract_sfmt_cpcmpeqz_b_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + default : itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + } + } + case 676 : + { + unsigned int val = (((insn >> 21) & (3 << 1)) | ((insn >> 20) & (1 << 0))); + switch (val) + { + case 0 : + if ((entire_insn & 0xfffff801) == 0xf5079000) + { itype = MEPCOP1_32_INSN_CPOCMPGTU_B_C3; mepcop1_32_extract_sfmt_cpcmpeqz_b_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 1 : + if ((entire_insn & 0xfffff801) == 0xf5179000) + { itype = MEPCOP1_32_INSN_CPOCMPGT_B_C3; mepcop1_32_extract_sfmt_cpcmpeqz_b_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 2 : + if ((entire_insn & 0xfffff801) == 0xf5479000) + { itype = MEPCOP1_32_INSN_CPOCMPGTU_W_C3; mepcop1_32_extract_sfmt_cpcmpeqz_b_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 3 : + if ((entire_insn & 0xfffff801) == 0xf5579000) + { itype = MEPCOP1_32_INSN_CPOCMPGT_W_C3; mepcop1_32_extract_sfmt_cpcmpeqz_b_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 4 : + if ((entire_insn & 0xfffff801) == 0xf5879000) + { itype = MEPCOP1_32_INSN_CPOCMPGEU_B_C3; mepcop1_32_extract_sfmt_cpcmpeqz_b_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 5 : + if ((entire_insn & 0xfffff801) == 0xf5979000) + { itype = MEPCOP1_32_INSN_CPOCMPGE_B_C3; mepcop1_32_extract_sfmt_cpcmpeqz_b_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 6 : + if ((entire_insn & 0xfffff801) == 0xf5c79000) + { itype = MEPCOP1_32_INSN_CPOCMPGEU_W_C3; mepcop1_32_extract_sfmt_cpcmpeqz_b_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 7 : + if ((entire_insn & 0xfffff801) == 0xf5d79000) + { itype = MEPCOP1_32_INSN_CPOCMPGE_W_C3; mepcop1_32_extract_sfmt_cpcmpeqz_b_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + default : itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + } + } + case 740 : + { + unsigned int val = (((insn >> 23) & (1 << 0))); + switch (val) + { + case 0 : + if ((entire_insn & 0xfffff801) == 0xf5379000) + { itype = MEPCOP1_32_INSN_CPOCMPGT_H_C3; mepcop1_32_extract_sfmt_cpcmpeqz_b_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 1 : + if ((entire_insn & 0xfffff801) == 0xf5b79000) + { itype = MEPCOP1_32_INSN_CPOCMPGE_H_C3; mepcop1_32_extract_sfmt_cpcmpeqz_b_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + default : itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + } + } + case 768 : /* fall through */ + case 832 : /* fall through */ + case 896 : /* fall through */ + case 960 : + if ((entire_insn & 0xfe0ff801) == 0xf6070000) + { itype = MEPCOP1_32_INSN_CDADD3_C3; mepcop1_32_extract_sfmt_cpadd3_b_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 770 : /* fall through */ + case 834 : /* fall through */ + case 898 : /* fall through */ + case 962 : + if ((entire_insn & 0xfe0ff801) == 0xf6070800) + { itype = MEPCOP1_32_INSN_CPXOR3_C3; mepcop1_32_extract_sfmt_cpadd3_b_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 776 : /* fall through */ + case 840 : /* fall through */ + case 904 : /* fall through */ + case 968 : + if ((entire_insn & 0xfe0ff801) == 0xf6072000) + { itype = MEPCOP1_32_INSN_CPSSRL3_H_C3; mepcop1_32_extract_sfmt_cpadd3_b_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 778 : /* fall through */ + case 842 : /* fall through */ + case 906 : /* fall through */ + case 970 : + if ((entire_insn & 0xfe0ff801) == 0xf6072800) + { itype = MEPCOP1_32_INSN_CPSSRA3_H_C3; mepcop1_32_extract_sfmt_cpadd3_b_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 780 : /* fall through */ + case 844 : /* fall through */ + case 908 : /* fall through */ + case 972 : + if ((entire_insn & 0xfe0ff801) == 0xf6073000) + { itype = MEPCOP1_32_INSN_CPSSLL3_H_C3; mepcop1_32_extract_sfmt_cpadd3_b_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 784 : /* fall through */ + case 848 : /* fall through */ + case 912 : /* fall through */ + case 976 : + if ((entire_insn & 0xfe0ff801) == 0xf6074000) + { itype = MEPCOP1_32_INSN_CPSADD3_W_C3; mepcop1_32_extract_sfmt_cpadd3_b_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 786 : /* fall through */ + case 850 : /* fall through */ + case 914 : /* fall through */ + case 978 : + if ((entire_insn & 0xfe0ff801) == 0xf6074800) + { itype = MEPCOP1_32_INSN_CPEXTLADD3_B_C3; mepcop1_32_extract_sfmt_cpadd3_b_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 788 : /* fall through */ + case 852 : /* fall through */ + case 916 : /* fall through */ + case 980 : + if ((entire_insn & 0xfe0ff801) == 0xf6075000) + { itype = MEPCOP1_32_INSN_CPAVE3_W_C3; mepcop1_32_extract_sfmt_cpadd3_b_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 792 : /* fall through */ + case 856 : /* fall through */ + case 920 : /* fall through */ + case 984 : + if ((entire_insn & 0xfe0ff801) == 0xf6076000) + { itype = MEPCOP1_32_INSN_CPMAX3_H_C3; mepcop1_32_extract_sfmt_cpadd3_b_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 794 : /* fall through */ + case 858 : /* fall through */ + case 922 : /* fall through */ + case 986 : + if ((entire_insn & 0xfe0ff801) == 0xf6076800) + { itype = MEPCOP1_32_INSN_CPMIN3_H_C3; mepcop1_32_extract_sfmt_cpadd3_b_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 963 : + { + unsigned int val = (((insn >> 21) & (3 << 1)) | ((insn >> 20) & (1 << 0))); + switch (val) + { + case 0 : + if ((entire_insn & 0xfffff801) == 0xf7270801) + { itype = MEPCOP1_32_INSN_CPSMADSLUA1_H_C3; mepcop1_32_extract_sfmt_cpcmpeqz_b_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 1 : + if ((entire_insn & 0xfffff801) == 0xf7370801) + { itype = MEPCOP1_32_INSN_CPSMADSLLA1_H_C3; mepcop1_32_extract_sfmt_cpcmpeqz_b_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 2 : + if ((entire_insn & 0xfffff801) == 0xf7670801) + { itype = MEPCOP1_32_INSN_CPSMADSLUA1_W_C3; mepcop1_32_extract_sfmt_cpcmpeqz_b_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 3 : + if ((entire_insn & 0xfffff801) == 0xf7770801) + { itype = MEPCOP1_32_INSN_CPSMADSLLA1_W_C3; mepcop1_32_extract_sfmt_cpcmpeqz_b_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 4 : + if ((entire_insn & 0xfffff801) == 0xf7a70801) + { itype = MEPCOP1_32_INSN_CPSMSBSLUA1_H_C3; mepcop1_32_extract_sfmt_cpcmpeqz_b_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 5 : + if ((entire_insn & 0xfffff801) == 0xf7b70801) + { itype = MEPCOP1_32_INSN_CPSMSBSLLA1_H_C3; mepcop1_32_extract_sfmt_cpcmpeqz_b_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 6 : + if ((entire_insn & 0xfffff801) == 0xf7e70801) + { itype = MEPCOP1_32_INSN_CPSMSBSLUA1_W_C3; mepcop1_32_extract_sfmt_cpcmpeqz_b_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 7 : + if ((entire_insn & 0xfffff801) == 0xf7f70801) + { itype = MEPCOP1_32_INSN_CPSMSBSLLA1_W_C3; mepcop1_32_extract_sfmt_cpcmpeqz_b_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + default : itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + } + } + case 1024 : /* fall through */ + case 1088 : /* fall through */ + case 1152 : /* fall through */ + case 1216 : + if ((entire_insn & 0xfe0ff801) == 0xf8070000) + { itype = MEPCOP1_32_INSN_CPSUB3_B_C3; mepcop1_32_extract_sfmt_cpadd3_b_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 1026 : /* fall through */ + case 1090 : /* fall through */ + case 1154 : /* fall through */ + case 1218 : + if ((entire_insn & 0xfe0ff801) == 0xf8070800) + { itype = MEPCOP1_32_INSN_CPSEL_C3; mepcop1_32_extract_sfmt_cpadd3_b_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 1028 : /* fall through */ + case 1092 : /* fall through */ + case 1156 : /* fall through */ + case 1220 : + if ((entire_insn & 0xfe0ff801) == 0xf8071000) + { itype = MEPCOP1_32_INSN_CPUNPACKL_B_C3; mepcop1_32_extract_sfmt_cpadd3_b_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 1030 : /* fall through */ + case 1094 : /* fall through */ + case 1158 : /* fall through */ + case 1222 : + if ((entire_insn & 0xfe0ff801) == 0xf8071800) + { itype = MEPCOP1_32_INSN_CPPACKU_B_C3; mepcop1_32_extract_sfmt_cpadd3_b_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 1031 : /* fall through */ + case 1095 : /* fall through */ + case 1159 : /* fall through */ + case 1223 : /* fall through */ + case 1287 : /* fall through */ + case 1351 : /* fall through */ + case 1415 : /* fall through */ + case 1479 : + if ((entire_insn & 0xfc0fffff) == 0xf8071801) + { itype = MEPCOP1_32_INSN_CPSLLIA1_P1; mepcop1_32_extract_sfmt_cpsrlia1_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 1032 : /* fall through */ + case 1096 : /* fall through */ + case 1160 : /* fall through */ + case 1224 : + if ((entire_insn & 0xfe0ff801) == 0xf8072000) + { itype = MEPCOP1_32_INSN_CPSRL3_W_C3; mepcop1_32_extract_sfmt_cpadd3_b_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 1034 : /* fall through */ + case 1098 : /* fall through */ + case 1162 : /* fall through */ + case 1226 : + if ((entire_insn & 0xfe0ff801) == 0xf8072800) + { itype = MEPCOP1_32_INSN_CPSRA3_W_C3; mepcop1_32_extract_sfmt_cpadd3_b_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 1036 : /* fall through */ + case 1100 : /* fall through */ + case 1164 : /* fall through */ + case 1228 : + if ((entire_insn & 0xfe0ff801) == 0xf8073000) + { itype = MEPCOP1_32_INSN_CPSLL3_W_C3; mepcop1_32_extract_sfmt_cpadd3_b_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 1038 : /* fall through */ + case 1102 : /* fall through */ + case 1166 : /* fall through */ + case 1230 : + if ((entire_insn & 0xfe0ff801) == 0xf8073800) + { itype = MEPCOP1_32_INSN_CPSLA3_W_C3; mepcop1_32_extract_sfmt_cpadd3_b_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 1042 : /* fall through */ + case 1106 : /* fall through */ + case 1170 : /* fall through */ + case 1234 : + if ((entire_insn & 0xfe0ff801) == 0xf8074800) + { itype = MEPCOP1_32_INSN_CPEXTUSUBU3_B_C3; mepcop1_32_extract_sfmt_cpadd3_b_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 1044 : /* fall through */ + case 1108 : /* fall through */ + case 1172 : /* fall through */ + case 1236 : + if ((entire_insn & 0xfe0ff801) == 0xf8075000) + { itype = MEPCOP1_32_INSN_CPADDSRU3_B_C3; mepcop1_32_extract_sfmt_cpadd3_b_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 1048 : /* fall through */ + case 1112 : /* fall through */ + case 1176 : /* fall through */ + case 1240 : + if ((entire_insn & 0xfe0ff801) == 0xf8076000) + { itype = MEPCOP1_32_INSN_CPMAXU3_W_C3; mepcop1_32_extract_sfmt_cpadd3_b_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 1050 : /* fall through */ + case 1114 : /* fall through */ + case 1178 : /* fall through */ + case 1242 : + if ((entire_insn & 0xfe0ff801) == 0xf8076800) + { itype = MEPCOP1_32_INSN_CPMINU3_W_C3; mepcop1_32_extract_sfmt_cpadd3_b_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 1064 : /* fall through */ + case 1128 : /* fall through */ + case 1192 : /* fall through */ + case 1256 : /* fall through */ + case 1320 : /* fall through */ + case 1384 : /* fall through */ + case 1448 : /* fall through */ + case 1512 : + if ((entire_insn & 0xfc0ff801) == 0xf807a000) + { itype = MEPCOP1_32_INSN_CPSRLI3_W_C3; mepcop1_32_extract_sfmt_cpsrli3_w_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 1066 : /* fall through */ + case 1130 : /* fall through */ + case 1194 : /* fall through */ + case 1258 : /* fall through */ + case 1322 : /* fall through */ + case 1386 : /* fall through */ + case 1450 : /* fall through */ + case 1514 : + if ((entire_insn & 0xfc0ff801) == 0xf807a800) + { itype = MEPCOP1_32_INSN_CPSRAI3_W_C3; mepcop1_32_extract_sfmt_cpsrli3_w_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 1068 : /* fall through */ + case 1132 : /* fall through */ + case 1196 : /* fall through */ + case 1260 : /* fall through */ + case 1324 : /* fall through */ + case 1388 : /* fall through */ + case 1452 : /* fall through */ + case 1516 : + if ((entire_insn & 0xfc0ff801) == 0xf807b000) + { itype = MEPCOP1_32_INSN_CPSLLI3_W_C3; mepcop1_32_extract_sfmt_cpsrli3_w_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 1070 : /* fall through */ + case 1134 : /* fall through */ + case 1198 : /* fall through */ + case 1262 : /* fall through */ + case 1326 : /* fall through */ + case 1390 : /* fall through */ + case 1454 : /* fall through */ + case 1518 : + if ((entire_insn & 0xfc0ff801) == 0xf807b800) + { itype = MEPCOP1_32_INSN_CPSLAI3_W_C3; mepcop1_32_extract_sfmt_cpsrli3_w_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 1072 : /* fall through */ + case 1136 : /* fall through */ + case 1200 : /* fall through */ + case 1264 : /* fall through */ + case 1328 : /* fall through */ + case 1392 : /* fall through */ + case 1456 : /* fall through */ + case 1520 : + if ((entire_insn & 0xfc0ff801) == 0xf807c000) + { itype = MEPCOP1_32_INSN_CDCLIPIU3_C3; mepcop1_32_extract_sfmt_cdsrli3_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 1280 : /* fall through */ + case 1344 : /* fall through */ + case 1408 : /* fall through */ + case 1472 : + if ((entire_insn & 0xfe0ff801) == 0xfa070000) + { itype = MEPCOP1_32_INSN_CPSUB3_H_C3; mepcop1_32_extract_sfmt_cpadd3_b_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 1284 : /* fall through */ + case 1348 : /* fall through */ + case 1412 : /* fall through */ + case 1476 : + if ((entire_insn & 0xfe0ff801) == 0xfa071000) + { itype = MEPCOP1_32_INSN_CPUNPACKL_H_C3; mepcop1_32_extract_sfmt_cpadd3_b_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 1286 : /* fall through */ + case 1350 : /* fall through */ + case 1414 : /* fall through */ + case 1478 : + if ((entire_insn & 0xfe0ff801) == 0xfa071800) + { itype = MEPCOP1_32_INSN_CPPACK_B_C3; mepcop1_32_extract_sfmt_cpadd3_b_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 1288 : /* fall through */ + case 1352 : /* fall through */ + case 1416 : /* fall through */ + case 1480 : + if ((entire_insn & 0xfe0ff801) == 0xfa072000) + { itype = MEPCOP1_32_INSN_CPSSRL3_W_C3; mepcop1_32_extract_sfmt_cpadd3_b_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 1290 : /* fall through */ + case 1354 : /* fall through */ + case 1418 : /* fall through */ + case 1482 : + if ((entire_insn & 0xfe0ff801) == 0xfa072800) + { itype = MEPCOP1_32_INSN_CPSSRA3_W_C3; mepcop1_32_extract_sfmt_cpadd3_b_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 1292 : /* fall through */ + case 1356 : /* fall through */ + case 1420 : /* fall through */ + case 1484 : + if ((entire_insn & 0xfe0ff801) == 0xfa073000) + { itype = MEPCOP1_32_INSN_CPSSLL3_W_C3; mepcop1_32_extract_sfmt_cpadd3_b_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 1298 : /* fall through */ + case 1362 : /* fall through */ + case 1426 : /* fall through */ + case 1490 : + if ((entire_insn & 0xfe0ff801) == 0xfa074800) + { itype = MEPCOP1_32_INSN_CPEXTUSUB3_B_C3; mepcop1_32_extract_sfmt_cpadd3_b_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 1300 : /* fall through */ + case 1364 : /* fall through */ + case 1428 : /* fall through */ + case 1492 : + if ((entire_insn & 0xfe0ff801) == 0xfa075000) + { itype = MEPCOP1_32_INSN_CPADDSR3_B_C3; mepcop1_32_extract_sfmt_cpadd3_b_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 1304 : /* fall through */ + case 1368 : /* fall through */ + case 1432 : /* fall through */ + case 1496 : + if ((entire_insn & 0xfe0ff801) == 0xfa076000) + { itype = MEPCOP1_32_INSN_CPMAX3_W_C3; mepcop1_32_extract_sfmt_cpadd3_b_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 1306 : /* fall through */ + case 1370 : /* fall through */ + case 1434 : /* fall through */ + case 1498 : + if ((entire_insn & 0xfe0ff801) == 0xfa076800) + { itype = MEPCOP1_32_INSN_CPMIN3_W_C3; mepcop1_32_extract_sfmt_cpadd3_b_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 1536 : /* fall through */ + case 1600 : /* fall through */ + case 1664 : /* fall through */ + case 1728 : + if ((entire_insn & 0xfe0ff801) == 0xfc070000) + { itype = MEPCOP1_32_INSN_CPSUB3_W_C3; mepcop1_32_extract_sfmt_cpadd3_b_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 1538 : /* fall through */ + case 1602 : /* fall through */ + case 1666 : /* fall through */ + case 1730 : + if ((entire_insn & 0xfe0ff801) == 0xfc070800) + { itype = MEPCOP1_32_INSN_CPFSFTBS0_C3; mepcop1_32_extract_sfmt_cpadd3_b_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 1540 : /* fall through */ + case 1604 : /* fall through */ + case 1668 : /* fall through */ + case 1732 : + if ((entire_insn & 0xfe0ff801) == 0xfc071000) + { itype = MEPCOP1_32_INSN_CPUNPACKL_W_C3; mepcop1_32_extract_sfmt_cpadd3_b_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 1544 : /* fall through */ + case 1608 : /* fall through */ + case 1672 : /* fall through */ + case 1736 : + if ((entire_insn & 0xfe0ff801) == 0xfc072000) + { itype = MEPCOP1_32_INSN_CDSRL3_C3; mepcop1_32_extract_sfmt_cpadd3_b_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 1546 : /* fall through */ + case 1610 : /* fall through */ + case 1674 : /* fall through */ + case 1738 : + if ((entire_insn & 0xfe0ff801) == 0xfc072800) + { itype = MEPCOP1_32_INSN_CDSRA3_C3; mepcop1_32_extract_sfmt_cpadd3_b_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 1548 : /* fall through */ + case 1612 : /* fall through */ + case 1676 : /* fall through */ + case 1740 : + if ((entire_insn & 0xfe0ff801) == 0xfc073000) + { itype = MEPCOP1_32_INSN_CDSLL3_C3; mepcop1_32_extract_sfmt_cpadd3_b_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 1552 : /* fall through */ + case 1616 : /* fall through */ + case 1680 : /* fall through */ + case 1744 : + if ((entire_insn & 0xfe0ff801) == 0xfc074000) + { itype = MEPCOP1_32_INSN_CPSSUB3_H_C3; mepcop1_32_extract_sfmt_cpadd3_b_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 1554 : /* fall through */ + case 1618 : /* fall through */ + case 1682 : /* fall through */ + case 1746 : + if ((entire_insn & 0xfe0ff801) == 0xfc074800) + { itype = MEPCOP1_32_INSN_CPEXTLSUBU3_B_C3; mepcop1_32_extract_sfmt_cpadd3_b_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 1556 : /* fall through */ + case 1620 : /* fall through */ + case 1684 : /* fall through */ + case 1748 : + if ((entire_insn & 0xfe0ff801) == 0xfc075000) + { itype = MEPCOP1_32_INSN_CPADDSR3_H_C3; mepcop1_32_extract_sfmt_cpadd3_b_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 1576 : /* fall through */ + case 1640 : /* fall through */ + case 1704 : /* fall through */ + case 1768 : /* fall through */ + case 1832 : /* fall through */ + case 1896 : /* fall through */ + case 1960 : /* fall through */ + case 2024 : + if ((entire_insn & 0xfc0ff801) == 0xfc07a000) + { itype = MEPCOP1_32_INSN_CDSRLI3_C3; mepcop1_32_extract_sfmt_cdsrli3_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 1578 : /* fall through */ + case 1642 : /* fall through */ + case 1706 : /* fall through */ + case 1770 : /* fall through */ + case 1834 : /* fall through */ + case 1898 : /* fall through */ + case 1962 : /* fall through */ + case 2026 : + if ((entire_insn & 0xfc0ff801) == 0xfc07a800) + { itype = MEPCOP1_32_INSN_CDSRAI3_C3; mepcop1_32_extract_sfmt_cdsrli3_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 1580 : /* fall through */ + case 1644 : /* fall through */ + case 1708 : /* fall through */ + case 1772 : /* fall through */ + case 1836 : /* fall through */ + case 1900 : /* fall through */ + case 1964 : /* fall through */ + case 2028 : + if ((entire_insn & 0xfc0ff801) == 0xfc07b000) + { itype = MEPCOP1_32_INSN_CDSLLI3_C3; mepcop1_32_extract_sfmt_cdsrli3_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 1584 : /* fall through */ + case 1648 : /* fall through */ + case 1712 : /* fall through */ + case 1776 : /* fall through */ + case 1840 : /* fall through */ + case 1904 : /* fall through */ + case 1968 : /* fall through */ + case 2032 : + if ((entire_insn & 0xfc0ff801) == 0xfc07c000) + { itype = MEPCOP1_32_INSN_CDCLIPI3_C3; mepcop1_32_extract_sfmt_cdsrli3_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 1792 : /* fall through */ + case 1856 : /* fall through */ + case 1920 : /* fall through */ + case 1984 : + if ((entire_insn & 0xfe0ff801) == 0xfe070000) + { itype = MEPCOP1_32_INSN_CDSUB3_C3; mepcop1_32_extract_sfmt_cpadd3_b_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 1794 : /* fall through */ + case 1858 : /* fall through */ + case 1922 : /* fall through */ + case 1986 : + if ((entire_insn & 0xfe0ff801) == 0xfe070800) + { itype = MEPCOP1_32_INSN_CPFSFTBS1_C3; mepcop1_32_extract_sfmt_cpadd3_b_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 1798 : /* fall through */ + case 1862 : /* fall through */ + case 1926 : /* fall through */ + case 1990 : + if ((entire_insn & 0xfe0ff801) == 0xfe071800) + { itype = MEPCOP1_32_INSN_CPPACK_H_C3; mepcop1_32_extract_sfmt_cpadd3_b_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 1808 : /* fall through */ + case 1872 : /* fall through */ + case 1936 : /* fall through */ + case 2000 : + if ((entire_insn & 0xfe0ff801) == 0xfe074000) + { itype = MEPCOP1_32_INSN_CPSSUB3_W_C3; mepcop1_32_extract_sfmt_cpadd3_b_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 1810 : /* fall through */ + case 1874 : /* fall through */ + case 1938 : /* fall through */ + case 2002 : + if ((entire_insn & 0xfe0ff801) == 0xfe074800) + { itype = MEPCOP1_32_INSN_CPEXTLSUB3_B_C3; mepcop1_32_extract_sfmt_cpadd3_b_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 1812 : /* fall through */ + case 1876 : /* fall through */ + case 1940 : /* fall through */ + case 2004 : + if ((entire_insn & 0xfe0ff801) == 0xfe075000) + { itype = MEPCOP1_32_INSN_CPADDSR3_W_C3; mepcop1_32_extract_sfmt_cpadd3_b_C3 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + default : itype = MEPCOP1_32_INSN_X_INVALID; mepcop1_32_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + } + } + + } + + /* The instruction has been decoded and fields extracted. */ + done: + + this->addr = pc; + // FIXME: To be redone (to handle ISA variants). + this->idesc = & mepcop1_32_idesc::idesc_table[itype]; + // ??? record semantic handler? + assert(this->idesc->sem_index == itype); +} + +void +mepcop1_32_extract_sfmt_empty (mepcop1_32_scache* abuf, mep_ext1_cpu* current_cpu, PCADDR pc, mepcop1_32_insn_word base_insn, mepcop1_32_insn_word entire_insn){ + mepcop1_32_insn_word insn = entire_insn; +#define FLD(f) abuf->fields.fmt_empty.f + + + /* Record the fields for the semantic handler. */ + if (UNLIKELY(current_cpu->trace_extract_p)) + { + current_cpu->trace_stream + << "0x" << hex << pc << dec << " (sfmt_empty)\t" + << endl; + } + +#undef FLD +} + +void +mepcop1_32_extract_sfmt_cmov_crn_rm (mepcop1_32_scache* abuf, mep_ext1_cpu* current_cpu, PCADDR pc, mepcop1_32_insn_word base_insn, mepcop1_32_insn_word entire_insn){ + mepcop1_32_insn_word insn = entire_insn; +#define FLD(f) abuf->fields.sfmt_cmov_crn_rm.f + UINT f_crnx_lo; + UINT f_rm; + UINT f_crnx_hi; + UINT f_crnx; + + f_crnx_lo = EXTRACT_MSB0_UINT (insn, 32, 4, 4); + f_rm = EXTRACT_MSB0_UINT (insn, 32, 8, 4); + f_crnx_hi = EXTRACT_MSB0_UINT (insn, 32, 28, 1); + f_crnx = ((((f_crnx_hi) << (4))) | (f_crnx_lo)); + + /* Record the fields for the semantic handler. */ + FLD (f_crnx) = f_crnx; + FLD (f_rm) = f_rm; + FLD (i_rm) = & current_cpu->hardware.h_gpr[f_rm]; + if (UNLIKELY(current_cpu->trace_extract_p)) + { + current_cpu->trace_stream + << "0x" << hex << pc << dec << " (sfmt_cmov_crn_rm)\t" + << " f_crnx:0x" << hex << f_crnx << dec + << " f_rm:0x" << hex << f_rm << dec + << endl; + } + + /* Record the fields for profiling. */ + if (UNLIKELY (current_cpu->trace_counter_p || current_cpu->final_insn_count_p)) + { + FLD (in_rm) = f_rm; + } +#undef FLD +} + +void +mepcop1_32_extract_sfmt_cmov_rn_crm (mepcop1_32_scache* abuf, mep_ext1_cpu* current_cpu, PCADDR pc, mepcop1_32_insn_word base_insn, mepcop1_32_insn_word entire_insn){ + mepcop1_32_insn_word insn = entire_insn; +#define FLD(f) abuf->fields.sfmt_cmov_rn_crm.f + UINT f_crnx_lo; + UINT f_rm; + UINT f_crnx_hi; + UINT f_crnx; + + f_crnx_lo = EXTRACT_MSB0_UINT (insn, 32, 4, 4); + f_rm = EXTRACT_MSB0_UINT (insn, 32, 8, 4); + f_crnx_hi = EXTRACT_MSB0_UINT (insn, 32, 28, 1); + f_crnx = ((((f_crnx_hi) << (4))) | (f_crnx_lo)); + + /* Record the fields for the semantic handler. */ + FLD (f_crnx) = f_crnx; + FLD (f_rm) = f_rm; + FLD (i_rm) = & current_cpu->hardware.h_gpr[f_rm]; + if (UNLIKELY(current_cpu->trace_extract_p)) + { + current_cpu->trace_stream + << "0x" << hex << pc << dec << " (sfmt_cmov_rn_crm)\t" + << " f_crnx:0x" << hex << f_crnx << dec + << " f_rm:0x" << hex << f_rm << dec + << endl; + } + + /* Record the fields for profiling. */ + if (UNLIKELY (current_cpu->trace_counter_p || current_cpu->final_insn_count_p)) + { + FLD (out_rm) = f_rm; + } +#undef FLD +} + +void +mepcop1_32_extract_sfmt_cmovc_ccrn_rm (mepcop1_32_scache* abuf, mep_ext1_cpu* current_cpu, PCADDR pc, mepcop1_32_insn_word base_insn, mepcop1_32_insn_word entire_insn){ + mepcop1_32_insn_word insn = entire_insn; +#define FLD(f) abuf->fields.sfmt_cmovc_ccrn_rm.f + UINT f_ccrn_lo; + UINT f_rm; + UINT f_ccrn_hi; + UINT f_ccrn; + + f_ccrn_lo = EXTRACT_MSB0_UINT (insn, 32, 4, 4); + f_rm = EXTRACT_MSB0_UINT (insn, 32, 8, 4); + f_ccrn_hi = EXTRACT_MSB0_UINT (insn, 32, 28, 2); + f_ccrn = ((((f_ccrn_hi) << (4))) | (f_ccrn_lo)); + + /* Record the fields for the semantic handler. */ + FLD (f_rm) = f_rm; + FLD (f_ccrn) = f_ccrn; + FLD (i_rm) = & current_cpu->hardware.h_gpr[f_rm]; + if (UNLIKELY(current_cpu->trace_extract_p)) + { + current_cpu->trace_stream + << "0x" << hex << pc << dec << " (sfmt_cmovc_ccrn_rm)\t" + << " f_rm:0x" << hex << f_rm << dec + << " f_ccrn:0x" << hex << f_ccrn << dec + << endl; + } + + /* Record the fields for profiling. */ + if (UNLIKELY (current_cpu->trace_counter_p || current_cpu->final_insn_count_p)) + { + FLD (in_rm) = f_rm; + } +#undef FLD +} + +void +mepcop1_32_extract_sfmt_cmovc_rn_ccrm (mepcop1_32_scache* abuf, mep_ext1_cpu* current_cpu, PCADDR pc, mepcop1_32_insn_word base_insn, mepcop1_32_insn_word entire_insn){ + mepcop1_32_insn_word insn = entire_insn; +#define FLD(f) abuf->fields.sfmt_cmovc_rn_ccrm.f + UINT f_ccrn_lo; + UINT f_rm; + UINT f_ccrn_hi; + UINT f_ccrn; + + f_ccrn_lo = EXTRACT_MSB0_UINT (insn, 32, 4, 4); + f_rm = EXTRACT_MSB0_UINT (insn, 32, 8, 4); + f_ccrn_hi = EXTRACT_MSB0_UINT (insn, 32, 28, 2); + f_ccrn = ((((f_ccrn_hi) << (4))) | (f_ccrn_lo)); + + /* Record the fields for the semantic handler. */ + FLD (f_ccrn) = f_ccrn; + FLD (f_rm) = f_rm; + FLD (i_rm) = & current_cpu->hardware.h_gpr[f_rm]; + if (UNLIKELY(current_cpu->trace_extract_p)) + { + current_cpu->trace_stream + << "0x" << hex << pc << dec << " (sfmt_cmovc_rn_ccrm)\t" + << " f_ccrn:0x" << hex << f_ccrn << dec + << " f_rm:0x" << hex << f_rm << dec + << endl; + } + + /* Record the fields for profiling. */ + if (UNLIKELY (current_cpu->trace_counter_p || current_cpu->final_insn_count_p)) + { + FLD (out_rm) = f_rm; + } +#undef FLD +} + +void +mepcop1_32_extract_sfmt_cpadd3_b_C3 (mepcop1_32_scache* abuf, mep_ext1_cpu* current_cpu, PCADDR pc, mepcop1_32_insn_word base_insn, mepcop1_32_insn_word entire_insn){ + mepcop1_32_insn_word insn = entire_insn; +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + UINT f_ivc2_5u7; + UINT f_ivc2_5u21; + UINT f_ivc2_5u26; + + f_ivc2_5u7 = EXTRACT_MSB0_UINT (insn, 32, 7, 5); + f_ivc2_5u21 = EXTRACT_MSB0_UINT (insn, 32, 21, 5); + f_ivc2_5u26 = EXTRACT_MSB0_UINT (insn, 32, 26, 5); + + /* Record the fields for the semantic handler. */ + FLD (f_ivc2_5u26) = f_ivc2_5u26; + FLD (f_ivc2_5u21) = f_ivc2_5u21; + FLD (f_ivc2_5u7) = f_ivc2_5u7; + if (UNLIKELY(current_cpu->trace_extract_p)) + { + current_cpu->trace_stream + << "0x" << hex << pc << dec << " (sfmt_cpadd3_b_C3)\t" + << " f_ivc2_5u26:0x" << hex << f_ivc2_5u26 << dec + << " f_ivc2_5u21:0x" << hex << f_ivc2_5u21 << dec + << " f_ivc2_5u7:0x" << hex << f_ivc2_5u7 << dec + << endl; + } + + /* Record the fields for profiling. */ + if (UNLIKELY (current_cpu->trace_counter_p || current_cpu->final_insn_count_p)) + { + } +#undef FLD +} + +void +mepcop1_32_extract_sfmt_cpfsftbi_C3 (mepcop1_32_scache* abuf, mep_ext1_cpu* current_cpu, PCADDR pc, mepcop1_32_insn_word base_insn, mepcop1_32_insn_word entire_insn){ + mepcop1_32_insn_word insn = entire_insn; +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + UINT f_ivc2_3u4; + UINT f_ivc2_5u7; + UINT f_ivc2_5u21; + UINT f_ivc2_5u26; + + f_ivc2_3u4 = EXTRACT_MSB0_UINT (insn, 32, 4, 3); + f_ivc2_5u7 = EXTRACT_MSB0_UINT (insn, 32, 7, 5); + f_ivc2_5u21 = EXTRACT_MSB0_UINT (insn, 32, 21, 5); + f_ivc2_5u26 = EXTRACT_MSB0_UINT (insn, 32, 26, 5); + + /* Record the fields for the semantic handler. */ + FLD (f_ivc2_5u26) = f_ivc2_5u26; + FLD (f_ivc2_5u21) = f_ivc2_5u21; + FLD (f_ivc2_3u4) = f_ivc2_3u4; + FLD (f_ivc2_5u7) = f_ivc2_5u7; + if (UNLIKELY(current_cpu->trace_extract_p)) + { + current_cpu->trace_stream + << "0x" << hex << pc << dec << " (sfmt_cpfsftbi_C3)\t" + << " f_ivc2_5u26:0x" << hex << f_ivc2_5u26 << dec + << " f_ivc2_5u21:0x" << hex << f_ivc2_5u21 << dec + << " f_ivc2_3u4:0x" << hex << f_ivc2_3u4 << dec + << " f_ivc2_5u7:0x" << hex << f_ivc2_5u7 << dec + << endl; + } + + /* Record the fields for profiling. */ + if (UNLIKELY (current_cpu->trace_counter_p || current_cpu->final_insn_count_p)) + { + } +#undef FLD +} + +void +mepcop1_32_extract_sfmt_cpmovfrcsar0_C3 (mepcop1_32_scache* abuf, mep_ext1_cpu* current_cpu, PCADDR pc, mepcop1_32_insn_word base_insn, mepcop1_32_insn_word entire_insn){ + mepcop1_32_insn_word insn = entire_insn; +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + UINT f_ivc2_5u7; + + f_ivc2_5u7 = EXTRACT_MSB0_UINT (insn, 32, 7, 5); + + /* Record the fields for the semantic handler. */ + FLD (f_ivc2_5u7) = f_ivc2_5u7; + if (UNLIKELY(current_cpu->trace_extract_p)) + { + current_cpu->trace_stream + << "0x" << hex << pc << dec << " (sfmt_cpmovfrcsar0_C3)\t" + << " f_ivc2_5u7:0x" << hex << f_ivc2_5u7 << dec + << endl; + } + + /* Record the fields for profiling. */ + if (UNLIKELY (current_cpu->trace_counter_p || current_cpu->final_insn_count_p)) + { + } +#undef FLD +} + +void +mepcop1_32_extract_sfmt_cpmovtocsar0_C3 (mepcop1_32_scache* abuf, mep_ext1_cpu* current_cpu, PCADDR pc, mepcop1_32_insn_word base_insn, mepcop1_32_insn_word entire_insn){ + mepcop1_32_insn_word insn = entire_insn; +#define FLD(f) abuf->fields.sfmt_cpmoviu_h_C3.f + UINT f_ivc2_5u21; + + f_ivc2_5u21 = EXTRACT_MSB0_UINT (insn, 32, 21, 5); + + /* Record the fields for the semantic handler. */ + FLD (f_ivc2_5u21) = f_ivc2_5u21; + if (UNLIKELY(current_cpu->trace_extract_p)) + { + current_cpu->trace_stream + << "0x" << hex << pc << dec << " (sfmt_cpmovtocsar0_C3)\t" + << " f_ivc2_5u21:0x" << hex << f_ivc2_5u21 << dec + << endl; + } + + /* Record the fields for profiling. */ + if (UNLIKELY (current_cpu->trace_counter_p || current_cpu->final_insn_count_p)) + { + } +#undef FLD +} + +void +mepcop1_32_extract_sfmt_cpmov_C3 (mepcop1_32_scache* abuf, mep_ext1_cpu* current_cpu, PCADDR pc, mepcop1_32_insn_word base_insn, mepcop1_32_insn_word entire_insn){ + mepcop1_32_insn_word insn = entire_insn; +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + UINT f_ivc2_5u7; + UINT f_ivc2_5u21; + + f_ivc2_5u7 = EXTRACT_MSB0_UINT (insn, 32, 7, 5); + f_ivc2_5u21 = EXTRACT_MSB0_UINT (insn, 32, 21, 5); + + /* Record the fields for the semantic handler. */ + FLD (f_ivc2_5u21) = f_ivc2_5u21; + FLD (f_ivc2_5u7) = f_ivc2_5u7; + if (UNLIKELY(current_cpu->trace_extract_p)) + { + current_cpu->trace_stream + << "0x" << hex << pc << dec << " (sfmt_cpmov_C3)\t" + << " f_ivc2_5u21:0x" << hex << f_ivc2_5u21 << dec + << " f_ivc2_5u7:0x" << hex << f_ivc2_5u7 << dec + << endl; + } + + /* Record the fields for profiling. */ + if (UNLIKELY (current_cpu->trace_counter_p || current_cpu->final_insn_count_p)) + { + } +#undef FLD +} + +void +mepcop1_32_extract_sfmt_cpccadd_b_C3 (mepcop1_32_scache* abuf, mep_ext1_cpu* current_cpu, PCADDR pc, mepcop1_32_insn_word base_insn, mepcop1_32_insn_word entire_insn){ + mepcop1_32_insn_word insn = entire_insn; +#define FLD(f) abuf->fields.sfmt_cpmoviu_h_C3.f + UINT f_ivc2_5u21; + + f_ivc2_5u21 = EXTRACT_MSB0_UINT (insn, 32, 21, 5); + + /* Record the fields for the semantic handler. */ + FLD (f_ivc2_5u21) = f_ivc2_5u21; + if (UNLIKELY(current_cpu->trace_extract_p)) + { + current_cpu->trace_stream + << "0x" << hex << pc << dec << " (sfmt_cpccadd_b_C3)\t" + << " f_ivc2_5u21:0x" << hex << f_ivc2_5u21 << dec + << endl; + } + + /* Record the fields for profiling. */ + if (UNLIKELY (current_cpu->trace_counter_p || current_cpu->final_insn_count_p)) + { + } +#undef FLD +} + +void +mepcop1_32_extract_sfmt_cpcmpeqz_b_C3 (mepcop1_32_scache* abuf, mep_ext1_cpu* current_cpu, PCADDR pc, mepcop1_32_insn_word base_insn, mepcop1_32_insn_word entire_insn){ + mepcop1_32_insn_word insn = entire_insn; +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + UINT f_ivc2_5u21; + UINT f_ivc2_5u26; + + f_ivc2_5u21 = EXTRACT_MSB0_UINT (insn, 32, 21, 5); + f_ivc2_5u26 = EXTRACT_MSB0_UINT (insn, 32, 26, 5); + + /* Record the fields for the semantic handler. */ + FLD (f_ivc2_5u26) = f_ivc2_5u26; + FLD (f_ivc2_5u21) = f_ivc2_5u21; + if (UNLIKELY(current_cpu->trace_extract_p)) + { + current_cpu->trace_stream + << "0x" << hex << pc << dec << " (sfmt_cpcmpeqz_b_C3)\t" + << " f_ivc2_5u26:0x" << hex << f_ivc2_5u26 << dec + << " f_ivc2_5u21:0x" << hex << f_ivc2_5u21 << dec + << endl; + } + + /* Record the fields for profiling. */ + if (UNLIKELY (current_cpu->trace_counter_p || current_cpu->final_insn_count_p)) + { + } +#undef FLD +} + +void +mepcop1_32_extract_sfmt_cpsrli3_b_C3 (mepcop1_32_scache* abuf, mep_ext1_cpu* current_cpu, PCADDR pc, mepcop1_32_insn_word base_insn, mepcop1_32_insn_word entire_insn){ + mepcop1_32_insn_word insn = entire_insn; +#define FLD(f) abuf->fields.sfmt_cpsrli3_b_C3.f + UINT f_ivc2_3u9; + UINT f_ivc2_5u21; + UINT f_ivc2_5u26; + + f_ivc2_3u9 = EXTRACT_MSB0_UINT (insn, 32, 9, 3); + f_ivc2_5u21 = EXTRACT_MSB0_UINT (insn, 32, 21, 5); + f_ivc2_5u26 = EXTRACT_MSB0_UINT (insn, 32, 26, 5); + + /* Record the fields for the semantic handler. */ + FLD (f_ivc2_5u26) = f_ivc2_5u26; + FLD (f_ivc2_3u9) = f_ivc2_3u9; + FLD (f_ivc2_5u21) = f_ivc2_5u21; + if (UNLIKELY(current_cpu->trace_extract_p)) + { + current_cpu->trace_stream + << "0x" << hex << pc << dec << " (sfmt_cpsrli3_b_C3)\t" + << " f_ivc2_5u26:0x" << hex << f_ivc2_5u26 << dec + << " f_ivc2_3u9:0x" << hex << f_ivc2_3u9 << dec + << " f_ivc2_5u21:0x" << hex << f_ivc2_5u21 << dec + << endl; + } + + /* Record the fields for profiling. */ + if (UNLIKELY (current_cpu->trace_counter_p || current_cpu->final_insn_count_p)) + { + } +#undef FLD +} + +void +mepcop1_32_extract_sfmt_cpsrli3_h_C3 (mepcop1_32_scache* abuf, mep_ext1_cpu* current_cpu, PCADDR pc, mepcop1_32_insn_word base_insn, mepcop1_32_insn_word entire_insn){ + mepcop1_32_insn_word insn = entire_insn; +#define FLD(f) abuf->fields.sfmt_cpsrli3_h_C3.f + UINT f_ivc2_4u8; + UINT f_ivc2_5u21; + UINT f_ivc2_5u26; + + f_ivc2_4u8 = EXTRACT_MSB0_UINT (insn, 32, 8, 4); + f_ivc2_5u21 = EXTRACT_MSB0_UINT (insn, 32, 21, 5); + f_ivc2_5u26 = EXTRACT_MSB0_UINT (insn, 32, 26, 5); + + /* Record the fields for the semantic handler. */ + FLD (f_ivc2_5u26) = f_ivc2_5u26; + FLD (f_ivc2_4u8) = f_ivc2_4u8; + FLD (f_ivc2_5u21) = f_ivc2_5u21; + if (UNLIKELY(current_cpu->trace_extract_p)) + { + current_cpu->trace_stream + << "0x" << hex << pc << dec << " (sfmt_cpsrli3_h_C3)\t" + << " f_ivc2_5u26:0x" << hex << f_ivc2_5u26 << dec + << " f_ivc2_4u8:0x" << hex << f_ivc2_4u8 << dec + << " f_ivc2_5u21:0x" << hex << f_ivc2_5u21 << dec + << endl; + } + + /* Record the fields for profiling. */ + if (UNLIKELY (current_cpu->trace_counter_p || current_cpu->final_insn_count_p)) + { + } +#undef FLD +} + +void +mepcop1_32_extract_sfmt_cpsrli3_w_C3 (mepcop1_32_scache* abuf, mep_ext1_cpu* current_cpu, PCADDR pc, mepcop1_32_insn_word base_insn, mepcop1_32_insn_word entire_insn){ + mepcop1_32_insn_word insn = entire_insn; +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + UINT f_ivc2_5u7; + UINT f_ivc2_5u21; + UINT f_ivc2_5u26; + + f_ivc2_5u7 = EXTRACT_MSB0_UINT (insn, 32, 7, 5); + f_ivc2_5u21 = EXTRACT_MSB0_UINT (insn, 32, 21, 5); + f_ivc2_5u26 = EXTRACT_MSB0_UINT (insn, 32, 26, 5); + + /* Record the fields for the semantic handler. */ + FLD (f_ivc2_5u26) = f_ivc2_5u26; + FLD (f_ivc2_5u7) = f_ivc2_5u7; + FLD (f_ivc2_5u21) = f_ivc2_5u21; + if (UNLIKELY(current_cpu->trace_extract_p)) + { + current_cpu->trace_stream + << "0x" << hex << pc << dec << " (sfmt_cpsrli3_w_C3)\t" + << " f_ivc2_5u26:0x" << hex << f_ivc2_5u26 << dec + << " f_ivc2_5u7:0x" << hex << f_ivc2_5u7 << dec + << " f_ivc2_5u21:0x" << hex << f_ivc2_5u21 << dec + << endl; + } + + /* Record the fields for profiling. */ + if (UNLIKELY (current_cpu->trace_counter_p || current_cpu->final_insn_count_p)) + { + } +#undef FLD +} + +void +mepcop1_32_extract_sfmt_cdsrli3_C3 (mepcop1_32_scache* abuf, mep_ext1_cpu* current_cpu, PCADDR pc, mepcop1_32_insn_word base_insn, mepcop1_32_insn_word entire_insn){ + mepcop1_32_insn_word insn = entire_insn; +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + UINT f_ivc2_6u6; + UINT f_ivc2_5u21; + UINT f_ivc2_5u26; + + f_ivc2_6u6 = EXTRACT_MSB0_UINT (insn, 32, 6, 6); + f_ivc2_5u21 = EXTRACT_MSB0_UINT (insn, 32, 21, 5); + f_ivc2_5u26 = EXTRACT_MSB0_UINT (insn, 32, 26, 5); + + /* Record the fields for the semantic handler. */ + FLD (f_ivc2_5u26) = f_ivc2_5u26; + FLD (f_ivc2_6u6) = f_ivc2_6u6; + FLD (f_ivc2_5u21) = f_ivc2_5u21; + if (UNLIKELY(current_cpu->trace_extract_p)) + { + current_cpu->trace_stream + << "0x" << hex << pc << dec << " (sfmt_cdsrli3_C3)\t" + << " f_ivc2_5u26:0x" << hex << f_ivc2_5u26 << dec + << " f_ivc2_6u6:0x" << hex << f_ivc2_6u6 << dec + << " f_ivc2_5u21:0x" << hex << f_ivc2_5u21 << dec + << endl; + } + + /* Record the fields for profiling. */ + if (UNLIKELY (current_cpu->trace_counter_p || current_cpu->final_insn_count_p)) + { + } +#undef FLD +} + +void +mepcop1_32_extract_sfmt_cpmovi_b_C3 (mepcop1_32_scache* abuf, mep_ext1_cpu* current_cpu, PCADDR pc, mepcop1_32_insn_word base_insn, mepcop1_32_insn_word entire_insn){ + mepcop1_32_insn_word insn = entire_insn; +#define FLD(f) abuf->fields.sfmt_cpmovi_b_C3.f + INT f_ivc2_8s4; + UINT f_ivc2_5u21; + + f_ivc2_8s4 = EXTRACT_MSB0_INT (insn, 32, 4, 8); + f_ivc2_5u21 = EXTRACT_MSB0_UINT (insn, 32, 21, 5); + + /* Record the fields for the semantic handler. */ + FLD (f_ivc2_8s4) = f_ivc2_8s4; + FLD (f_ivc2_5u21) = f_ivc2_5u21; + if (UNLIKELY(current_cpu->trace_extract_p)) + { + current_cpu->trace_stream + << "0x" << hex << pc << dec << " (sfmt_cpmovi_b_C3)\t" + << " f_ivc2_8s4:0x" << hex << f_ivc2_8s4 << dec + << " f_ivc2_5u21:0x" << hex << f_ivc2_5u21 << dec + << endl; + } + + /* Record the fields for profiling. */ + if (UNLIKELY (current_cpu->trace_counter_p || current_cpu->final_insn_count_p)) + { + } +#undef FLD +} + +void +mepcop1_32_extract_sfmt_cpmoviu_h_C3 (mepcop1_32_scache* abuf, mep_ext1_cpu* current_cpu, PCADDR pc, mepcop1_32_insn_word base_insn, mepcop1_32_insn_word entire_insn){ + mepcop1_32_insn_word insn = entire_insn; +#define FLD(f) abuf->fields.sfmt_cpmoviu_h_C3.f + UINT f_ivc2_8u4; + UINT f_ivc2_5u21; + + f_ivc2_8u4 = EXTRACT_MSB0_UINT (insn, 32, 4, 8); + f_ivc2_5u21 = EXTRACT_MSB0_UINT (insn, 32, 21, 5); + + /* Record the fields for the semantic handler. */ + FLD (f_ivc2_8u4) = f_ivc2_8u4; + FLD (f_ivc2_5u21) = f_ivc2_5u21; + if (UNLIKELY(current_cpu->trace_extract_p)) + { + current_cpu->trace_stream + << "0x" << hex << pc << dec << " (sfmt_cpmoviu_h_C3)\t" + << " f_ivc2_8u4:0x" << hex << f_ivc2_8u4 << dec + << " f_ivc2_5u21:0x" << hex << f_ivc2_5u21 << dec + << endl; + } + + /* Record the fields for profiling. */ + if (UNLIKELY (current_cpu->trace_counter_p || current_cpu->final_insn_count_p)) + { + } +#undef FLD +} + +void +mepcop1_32_extract_sfmt_cpsrlia1_P1 (mepcop1_32_scache* abuf, mep_ext1_cpu* current_cpu, PCADDR pc, mepcop1_32_insn_word base_insn, mepcop1_32_insn_word entire_insn){ + mepcop1_32_insn_word insn = entire_insn; +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + UINT f_ivc2_5u7; + + f_ivc2_5u7 = EXTRACT_MSB0_UINT (insn, 32, 7, 5); + + /* Record the fields for the semantic handler. */ + FLD (f_ivc2_5u7) = f_ivc2_5u7; + if (UNLIKELY(current_cpu->trace_extract_p)) + { + current_cpu->trace_stream + << "0x" << hex << pc << dec << " (sfmt_cpsrlia1_P1)\t" + << " f_ivc2_5u7:0x" << hex << f_ivc2_5u7 << dec + << endl; + } + + /* Record the fields for profiling. */ + if (UNLIKELY (current_cpu->trace_counter_p || current_cpu->final_insn_count_p)) + { + } +#undef FLD +} + diff --git a/sid/component/cgen-cpu/mep/mep-cop1-32-decode.h b/sid/component/cgen-cpu/mep/mep-cop1-32-decode.h new file mode 100644 index 0000000000..e442990141 --- /dev/null +++ b/sid/component/cgen-cpu/mep/mep-cop1-32-decode.h @@ -0,0 +1,527 @@ +/* Decode header for mepcop1_32. + +THIS FILE IS MACHINE GENERATED WITH CGEN. + +Copyright (C) 2000-2007 Red Hat, Inc. + +This file is part of the Red Hat simulators. + + +*/ + +#ifndef MEPCOP1_32_DECODE_H +#define MEPCOP1_32_DECODE_H + +namespace mep_ext1 { + +using namespace cgen; +using namespace mep; + +typedef UINT mepcop1_32_insn_word; + +/* Enum declaration for instructions in cpu family mepcop1_32. */ +typedef enum mepcop1_32_insn_type { + MEPCOP1_32_INSN_X_INVALID, MEPCOP1_32_INSN_CMOV_CRN_RM, MEPCOP1_32_INSN_CMOV_RN_CRM, MEPCOP1_32_INSN_CMOVC_CCRN_RM + , MEPCOP1_32_INSN_CMOVC_RN_CCRM, MEPCOP1_32_INSN_CMOVH_CRN_RM, MEPCOP1_32_INSN_CMOVH_RN_CRM, MEPCOP1_32_INSN_CPADD3_B_C3 + , MEPCOP1_32_INSN_CPADD3_H_C3, MEPCOP1_32_INSN_CPADD3_W_C3, MEPCOP1_32_INSN_CDADD3_C3, MEPCOP1_32_INSN_CPSUB3_B_C3 + , MEPCOP1_32_INSN_CPSUB3_H_C3, MEPCOP1_32_INSN_CPSUB3_W_C3, MEPCOP1_32_INSN_CDSUB3_C3, MEPCOP1_32_INSN_CPAND3_C3 + , MEPCOP1_32_INSN_CPOR3_C3, MEPCOP1_32_INSN_CPNOR3_C3, MEPCOP1_32_INSN_CPXOR3_C3, MEPCOP1_32_INSN_CPSEL_C3 + , MEPCOP1_32_INSN_CPFSFTBI_C3, MEPCOP1_32_INSN_CPFSFTBS0_C3, MEPCOP1_32_INSN_CPFSFTBS1_C3, MEPCOP1_32_INSN_CPUNPACKU_B_C3 + , MEPCOP1_32_INSN_CPUNPACKU_H_C3, MEPCOP1_32_INSN_CPUNPACKU_W_C3, MEPCOP1_32_INSN_CPUNPACKL_B_C3, MEPCOP1_32_INSN_CPUNPACKL_H_C3 + , MEPCOP1_32_INSN_CPUNPACKL_W_C3, MEPCOP1_32_INSN_CPPACKU_B_C3, MEPCOP1_32_INSN_CPPACK_B_C3, MEPCOP1_32_INSN_CPPACK_H_C3 + , MEPCOP1_32_INSN_CPSRL3_B_C3, MEPCOP1_32_INSN_CPSSRL3_B_C3, MEPCOP1_32_INSN_CPSRL3_H_C3, MEPCOP1_32_INSN_CPSSRL3_H_C3 + , MEPCOP1_32_INSN_CPSRL3_W_C3, MEPCOP1_32_INSN_CPSSRL3_W_C3, MEPCOP1_32_INSN_CDSRL3_C3, MEPCOP1_32_INSN_CPSRA3_B_C3 + , MEPCOP1_32_INSN_CPSSRA3_B_C3, MEPCOP1_32_INSN_CPSRA3_H_C3, MEPCOP1_32_INSN_CPSSRA3_H_C3, MEPCOP1_32_INSN_CPSRA3_W_C3 + , MEPCOP1_32_INSN_CPSSRA3_W_C3, MEPCOP1_32_INSN_CDSRA3_C3, MEPCOP1_32_INSN_CPSLL3_B_C3, MEPCOP1_32_INSN_CPSSLL3_B_C3 + , MEPCOP1_32_INSN_CPSLL3_H_C3, MEPCOP1_32_INSN_CPSSLL3_H_C3, MEPCOP1_32_INSN_CPSLL3_W_C3, MEPCOP1_32_INSN_CPSSLL3_W_C3 + , MEPCOP1_32_INSN_CDSLL3_C3, MEPCOP1_32_INSN_CPSLA3_H_C3, MEPCOP1_32_INSN_CPSLA3_W_C3, MEPCOP1_32_INSN_CPSADD3_H_C3 + , MEPCOP1_32_INSN_CPSADD3_W_C3, MEPCOP1_32_INSN_CPSSUB3_H_C3, MEPCOP1_32_INSN_CPSSUB3_W_C3, MEPCOP1_32_INSN_CPEXTUADDU3_B_C3 + , MEPCOP1_32_INSN_CPEXTUADD3_B_C3, MEPCOP1_32_INSN_CPEXTLADDU3_B_C3, MEPCOP1_32_INSN_CPEXTLADD3_B_C3, MEPCOP1_32_INSN_CPEXTUSUBU3_B_C3 + , MEPCOP1_32_INSN_CPEXTUSUB3_B_C3, MEPCOP1_32_INSN_CPEXTLSUBU3_B_C3, MEPCOP1_32_INSN_CPEXTLSUB3_B_C3, MEPCOP1_32_INSN_CPAVEU3_B_C3 + , MEPCOP1_32_INSN_CPAVE3_B_C3, MEPCOP1_32_INSN_CPAVE3_H_C3, MEPCOP1_32_INSN_CPAVE3_W_C3, MEPCOP1_32_INSN_CPADDSRU3_B_C3 + , MEPCOP1_32_INSN_CPADDSR3_B_C3, MEPCOP1_32_INSN_CPADDSR3_H_C3, MEPCOP1_32_INSN_CPADDSR3_W_C3, MEPCOP1_32_INSN_CPABSU3_B_C3 + , MEPCOP1_32_INSN_CPABS3_B_C3, MEPCOP1_32_INSN_CPABS3_H_C3, MEPCOP1_32_INSN_CPMAXU3_B_C3, MEPCOP1_32_INSN_CPMAX3_B_C3 + , MEPCOP1_32_INSN_CPMAX3_H_C3, MEPCOP1_32_INSN_CPMAXU3_W_C3, MEPCOP1_32_INSN_CPMAX3_W_C3, MEPCOP1_32_INSN_CPMINU3_B_C3 + , MEPCOP1_32_INSN_CPMIN3_B_C3, MEPCOP1_32_INSN_CPMIN3_H_C3, MEPCOP1_32_INSN_CPMINU3_W_C3, MEPCOP1_32_INSN_CPMIN3_W_C3 + , MEPCOP1_32_INSN_CPMOVFRCSAR0_C3, MEPCOP1_32_INSN_CPMOVFRCSAR1_C3, MEPCOP1_32_INSN_CPMOVFRCC_C3, MEPCOP1_32_INSN_CPMOVTOCSAR0_C3 + , MEPCOP1_32_INSN_CPMOVTOCSAR1_C3, MEPCOP1_32_INSN_CPMOVTOCC_C3, MEPCOP1_32_INSN_CPMOV_C3, MEPCOP1_32_INSN_CPABSZ_B_C3 + , MEPCOP1_32_INSN_CPABSZ_H_C3, MEPCOP1_32_INSN_CPABSZ_W_C3, MEPCOP1_32_INSN_CPLDZ_H_C3, MEPCOP1_32_INSN_CPLDZ_W_C3 + , MEPCOP1_32_INSN_CPNORM_H_C3, MEPCOP1_32_INSN_CPNORM_W_C3, MEPCOP1_32_INSN_CPHADDU_B_C3, MEPCOP1_32_INSN_CPHADD_B_C3 + , MEPCOP1_32_INSN_CPHADD_H_C3, MEPCOP1_32_INSN_CPHADD_W_C3, MEPCOP1_32_INSN_CPCCADD_B_C3, MEPCOP1_32_INSN_CPBCAST_B_C3 + , MEPCOP1_32_INSN_CPBCAST_H_C3, MEPCOP1_32_INSN_CPBCAST_W_C3, MEPCOP1_32_INSN_CPEXTUU_B_C3, MEPCOP1_32_INSN_CPEXTU_B_C3 + , MEPCOP1_32_INSN_CPEXTUU_H_C3, MEPCOP1_32_INSN_CPEXTU_H_C3, MEPCOP1_32_INSN_CPEXTLU_B_C3, MEPCOP1_32_INSN_CPEXTL_B_C3 + , MEPCOP1_32_INSN_CPEXTLU_H_C3, MEPCOP1_32_INSN_CPEXTL_H_C3, MEPCOP1_32_INSN_CPCASTUB_H_C3, MEPCOP1_32_INSN_CPCASTB_H_C3 + , MEPCOP1_32_INSN_CPCASTUB_W_C3, MEPCOP1_32_INSN_CPCASTB_W_C3, MEPCOP1_32_INSN_CPCASTUH_W_C3, MEPCOP1_32_INSN_CPCASTH_W_C3 + , MEPCOP1_32_INSN_CDCASTUW_C3, MEPCOP1_32_INSN_CDCASTW_C3, MEPCOP1_32_INSN_CPCMPEQZ_B_C3, MEPCOP1_32_INSN_CPCMPEQ_B_C3 + , MEPCOP1_32_INSN_CPCMPEQ_H_C3, MEPCOP1_32_INSN_CPCMPEQ_W_C3, MEPCOP1_32_INSN_CPCMPNE_B_C3, MEPCOP1_32_INSN_CPCMPNE_H_C3 + , MEPCOP1_32_INSN_CPCMPNE_W_C3, MEPCOP1_32_INSN_CPCMPGTU_B_C3, MEPCOP1_32_INSN_CPCMPGT_B_C3, MEPCOP1_32_INSN_CPCMPGT_H_C3 + , MEPCOP1_32_INSN_CPCMPGTU_W_C3, MEPCOP1_32_INSN_CPCMPGT_W_C3, MEPCOP1_32_INSN_CPCMPGEU_B_C3, MEPCOP1_32_INSN_CPCMPGE_B_C3 + , MEPCOP1_32_INSN_CPCMPGE_H_C3, MEPCOP1_32_INSN_CPCMPGEU_W_C3, MEPCOP1_32_INSN_CPCMPGE_W_C3, MEPCOP1_32_INSN_CPACMPEQ_B_C3 + , MEPCOP1_32_INSN_CPACMPEQ_H_C3, MEPCOP1_32_INSN_CPACMPEQ_W_C3, MEPCOP1_32_INSN_CPACMPNE_B_C3, MEPCOP1_32_INSN_CPACMPNE_H_C3 + , MEPCOP1_32_INSN_CPACMPNE_W_C3, MEPCOP1_32_INSN_CPACMPGTU_B_C3, MEPCOP1_32_INSN_CPACMPGT_B_C3, MEPCOP1_32_INSN_CPACMPGT_H_C3 + , MEPCOP1_32_INSN_CPACMPGTU_W_C3, MEPCOP1_32_INSN_CPACMPGT_W_C3, MEPCOP1_32_INSN_CPACMPGEU_B_C3, MEPCOP1_32_INSN_CPACMPGE_B_C3 + , MEPCOP1_32_INSN_CPACMPGE_H_C3, MEPCOP1_32_INSN_CPACMPGEU_W_C3, MEPCOP1_32_INSN_CPACMPGE_W_C3, MEPCOP1_32_INSN_CPOCMPEQ_B_C3 + , MEPCOP1_32_INSN_CPOCMPEQ_H_C3, MEPCOP1_32_INSN_CPOCMPEQ_W_C3, MEPCOP1_32_INSN_CPOCMPNE_B_C3, MEPCOP1_32_INSN_CPOCMPNE_H_C3 + , MEPCOP1_32_INSN_CPOCMPNE_W_C3, MEPCOP1_32_INSN_CPOCMPGTU_B_C3, MEPCOP1_32_INSN_CPOCMPGT_B_C3, MEPCOP1_32_INSN_CPOCMPGT_H_C3 + , MEPCOP1_32_INSN_CPOCMPGTU_W_C3, MEPCOP1_32_INSN_CPOCMPGT_W_C3, MEPCOP1_32_INSN_CPOCMPGEU_B_C3, MEPCOP1_32_INSN_CPOCMPGE_B_C3 + , MEPCOP1_32_INSN_CPOCMPGE_H_C3, MEPCOP1_32_INSN_CPOCMPGEU_W_C3, MEPCOP1_32_INSN_CPOCMPGE_W_C3, MEPCOP1_32_INSN_CPSRLI3_B_C3 + , MEPCOP1_32_INSN_CPSRLI3_H_C3, MEPCOP1_32_INSN_CPSRLI3_W_C3, MEPCOP1_32_INSN_CDSRLI3_C3, MEPCOP1_32_INSN_CPSRAI3_B_C3 + , MEPCOP1_32_INSN_CPSRAI3_H_C3, MEPCOP1_32_INSN_CPSRAI3_W_C3, MEPCOP1_32_INSN_CDSRAI3_C3, MEPCOP1_32_INSN_CPSLLI3_B_C3 + , MEPCOP1_32_INSN_CPSLLI3_H_C3, MEPCOP1_32_INSN_CPSLLI3_W_C3, MEPCOP1_32_INSN_CDSLLI3_C3, MEPCOP1_32_INSN_CPSLAI3_H_C3 + , MEPCOP1_32_INSN_CPSLAI3_W_C3, MEPCOP1_32_INSN_CPCLIPIU3_W_C3, MEPCOP1_32_INSN_CPCLIPI3_W_C3, MEPCOP1_32_INSN_CDCLIPIU3_C3 + , MEPCOP1_32_INSN_CDCLIPI3_C3, MEPCOP1_32_INSN_CPMOVI_B_C3, MEPCOP1_32_INSN_CPMOVIU_H_C3, MEPCOP1_32_INSN_CPMOVI_H_C3 + , MEPCOP1_32_INSN_CPMOVIU_W_C3, MEPCOP1_32_INSN_CPMOVI_W_C3, MEPCOP1_32_INSN_CDMOVIU_C3, MEPCOP1_32_INSN_CDMOVI_C3 + , MEPCOP1_32_INSN_CPADDA1U_B_C3, MEPCOP1_32_INSN_CPADDA1_B_C3, MEPCOP1_32_INSN_CPADDUA1_H_C3, MEPCOP1_32_INSN_CPADDLA1_H_C3 + , MEPCOP1_32_INSN_CPADDACA1U_B_C3, MEPCOP1_32_INSN_CPADDACA1_B_C3, MEPCOP1_32_INSN_CPADDACUA1_H_C3, MEPCOP1_32_INSN_CPADDACLA1_H_C3 + , MEPCOP1_32_INSN_CPSUBA1U_B_C3, MEPCOP1_32_INSN_CPSUBA1_B_C3, MEPCOP1_32_INSN_CPSUBUA1_H_C3, MEPCOP1_32_INSN_CPSUBLA1_H_C3 + , MEPCOP1_32_INSN_CPSUBACA1U_B_C3, MEPCOP1_32_INSN_CPSUBACA1_B_C3, MEPCOP1_32_INSN_CPSUBACUA1_H_C3, MEPCOP1_32_INSN_CPSUBACLA1_H_C3 + , MEPCOP1_32_INSN_CPABSA1U_B_C3, MEPCOP1_32_INSN_CPABSA1_B_C3, MEPCOP1_32_INSN_CPABSUA1_H_C3, MEPCOP1_32_INSN_CPABSLA1_H_C3 + , MEPCOP1_32_INSN_CPSADA1U_B_C3, MEPCOP1_32_INSN_CPSADA1_B_C3, MEPCOP1_32_INSN_CPSADUA1_H_C3, MEPCOP1_32_INSN_CPSADLA1_H_C3 + , MEPCOP1_32_INSN_CPSETA1_H_C3, MEPCOP1_32_INSN_CPSETUA1_W_C3, MEPCOP1_32_INSN_CPSETLA1_W_C3, MEPCOP1_32_INSN_CPMOVA1_B_C3 + , MEPCOP1_32_INSN_CPMOVUA1_H_C3, MEPCOP1_32_INSN_CPMOVLA1_H_C3, MEPCOP1_32_INSN_CPMOVUUA1_W_C3, MEPCOP1_32_INSN_CPMOVULA1_W_C3 + , MEPCOP1_32_INSN_CPMOVLUA1_W_C3, MEPCOP1_32_INSN_CPMOVLLA1_W_C3, MEPCOP1_32_INSN_CPPACKA1U_B_C3, MEPCOP1_32_INSN_CPPACKA1_B_C3 + , MEPCOP1_32_INSN_CPPACKUA1_H_C3, MEPCOP1_32_INSN_CPPACKLA1_H_C3, MEPCOP1_32_INSN_CPPACKUA1_W_C3, MEPCOP1_32_INSN_CPPACKLA1_W_C3 + , MEPCOP1_32_INSN_CPMOVHUA1_W_C3, MEPCOP1_32_INSN_CPMOVHLA1_W_C3, MEPCOP1_32_INSN_CPSRLA1_C3, MEPCOP1_32_INSN_CPSRAA1_C3 + , MEPCOP1_32_INSN_CPSLLA1_C3, MEPCOP1_32_INSN_CPSRLIA1_P1, MEPCOP1_32_INSN_CPSRAIA1_P1, MEPCOP1_32_INSN_CPSLLIA1_P1 + , MEPCOP1_32_INSN_CPSSQA1U_B_C3, MEPCOP1_32_INSN_CPSSQA1_B_C3, MEPCOP1_32_INSN_CPSSDA1U_B_C3, MEPCOP1_32_INSN_CPSSDA1_B_C3 + , MEPCOP1_32_INSN_CPMULA1U_B_C3, MEPCOP1_32_INSN_CPMULA1_B_C3, MEPCOP1_32_INSN_CPMULUA1_H_C3, MEPCOP1_32_INSN_CPMULLA1_H_C3 + , MEPCOP1_32_INSN_CPMULUA1U_W_C3, MEPCOP1_32_INSN_CPMULLA1U_W_C3, MEPCOP1_32_INSN_CPMULUA1_W_C3, MEPCOP1_32_INSN_CPMULLA1_W_C3 + , MEPCOP1_32_INSN_CPMADA1U_B_C3, MEPCOP1_32_INSN_CPMADA1_B_C3, MEPCOP1_32_INSN_CPMADUA1_H_C3, MEPCOP1_32_INSN_CPMADLA1_H_C3 + , MEPCOP1_32_INSN_CPMADUA1U_W_C3, MEPCOP1_32_INSN_CPMADLA1U_W_C3, MEPCOP1_32_INSN_CPMADUA1_W_C3, MEPCOP1_32_INSN_CPMADLA1_W_C3 + , MEPCOP1_32_INSN_CPMSBUA1_H_C3, MEPCOP1_32_INSN_CPMSBLA1_H_C3, MEPCOP1_32_INSN_CPMSBUA1U_W_C3, MEPCOP1_32_INSN_CPMSBLA1U_W_C3 + , MEPCOP1_32_INSN_CPMSBUA1_W_C3, MEPCOP1_32_INSN_CPMSBLA1_W_C3, MEPCOP1_32_INSN_CPSMADUA1_H_C3, MEPCOP1_32_INSN_CPSMADLA1_H_C3 + , MEPCOP1_32_INSN_CPSMADUA1_W_C3, MEPCOP1_32_INSN_CPSMADLA1_W_C3, MEPCOP1_32_INSN_CPSMSBUA1_H_C3, MEPCOP1_32_INSN_CPSMSBLA1_H_C3 + , MEPCOP1_32_INSN_CPSMSBUA1_W_C3, MEPCOP1_32_INSN_CPSMSBLA1_W_C3, MEPCOP1_32_INSN_CPMULSLUA1_H_C3, MEPCOP1_32_INSN_CPMULSLLA1_H_C3 + , MEPCOP1_32_INSN_CPMULSLUA1_W_C3, MEPCOP1_32_INSN_CPMULSLLA1_W_C3, MEPCOP1_32_INSN_CPSMADSLUA1_H_C3, MEPCOP1_32_INSN_CPSMADSLLA1_H_C3 + , MEPCOP1_32_INSN_CPSMADSLUA1_W_C3, MEPCOP1_32_INSN_CPSMADSLLA1_W_C3, MEPCOP1_32_INSN_CPSMSBSLUA1_H_C3, MEPCOP1_32_INSN_CPSMSBSLLA1_H_C3 + , MEPCOP1_32_INSN_CPSMSBSLUA1_W_C3, MEPCOP1_32_INSN_CPSMSBSLLA1_W_C3 +} MEPCOP1_32_INSN_TYPE; + + +// Forward decls. +struct mep_ext1_cpu; +struct mepcop1_32_scache; +typedef sem_status (mepcop1_32_sem_fn) (mep_ext1_cpu* cpu, mepcop1_32_scache* sem); + + +// Instruction descriptor. + +struct mepcop1_32_idesc { + + // scache engine executor for this insn + mepcop1_32_sem_fn* execute; + + const char* insn_name; + enum mepcop1_32_insn_type sem_index; + mep_insn_attr attrs; + + // idesc table: indexed by sem_index + static mepcop1_32_idesc idesc_table[]; + + static mepcop1_32_insn_type lookup_virtual (virtual_insn_type vit); +}; + +// Instruction argument buffer. + +union mepcop1_32_sem_fields { + struct { /* no operands */ + int empty; + } fmt_empty; + struct { /* */ + UINT f_ivc2_5u21; + UINT f_ivc2_8u4; + } sfmt_cpmoviu_h_C3; + struct { /* */ + INT f_ivc2_8s4; + UINT f_ivc2_5u21; + } sfmt_cpmovi_b_C3; + struct { /* */ + UINT f_ivc2_5u21; + UINT f_ivc2_5u26; + UINT f_ivc2_6u6; + } sfmt_cdsrli3_C3; + struct { /* */ + UINT f_ivc2_4u8; + UINT f_ivc2_5u21; + UINT f_ivc2_5u26; + } sfmt_cpsrli3_h_C3; + struct { /* */ + UINT f_ivc2_3u9; + UINT f_ivc2_5u21; + UINT f_ivc2_5u26; + } sfmt_cpsrli3_b_C3; + struct { /* */ + UINT f_ivc2_3u4; + UINT f_ivc2_5u21; + UINT f_ivc2_5u26; + UINT f_ivc2_5u7; + } sfmt_cpfsftbi_C3; + struct { /* */ + SI* i_rm; + UINT f_ccrn; + UINT f_rm; + unsigned char out_rm; + } sfmt_cmovc_rn_ccrm; + struct { /* */ + SI* i_rm; + UINT f_ccrn; + UINT f_rm; + unsigned char in_rm; + } sfmt_cmovc_ccrn_rm; + struct { /* */ + SI* i_rm; + UINT f_crnx; + UINT f_rm; + unsigned char out_rm; + } sfmt_cmov_rn_crm; + struct { /* */ + SI* i_rm; + UINT f_crnx; + UINT f_rm; + unsigned char in_rm; + } sfmt_cmov_crn_rm; + // This one is for chain/cti-chain virtual insns. + struct { + // Number of insns in pbb. + unsigned insn_count; + // This is used by chain insns and by untaken conditional branches. + mepcop1_32_scache* next; + mepcop1_32_scache* branch_target; + } chain; + // This one is for `before' virtual insns. + struct { + // The cache entry of the real insn. + mepcop1_32_scache* insn; + } before; +}; + +// Simulator instruction cache. + +struct mepcop1_32_scache { + // executor + union { + cgoto_label cgoto; + mepcop1_32_sem_fn* fn; + } execute; + + // PC of this instruction. + PCADDR addr; + + // instruction class + mepcop1_32_idesc* idesc; + + // argument buffer + mepcop1_32_sem_fields fields; + + + // writeback flags + // Only used if profiling or parallel execution support enabled during + // file generation. + unsigned long long written; + + + // decode given instruction + void decode (mep_ext1_cpu* current_cpu, PCADDR pc, mepcop1_32_insn_word base_insn, mepcop1_32_insn_word entire_insn); +}; + +} // end mep_ext1 namespace + +// Decls of each semantic fn. + +using mep_ext1::mepcop1_32_sem_fn; +extern mepcop1_32_sem_fn mepcop1_32_sem_x_invalid; +extern mepcop1_32_sem_fn mepcop1_32_sem_cmov_crn_rm; +extern mepcop1_32_sem_fn mepcop1_32_sem_cmov_rn_crm; +extern mepcop1_32_sem_fn mepcop1_32_sem_cmovc_ccrn_rm; +extern mepcop1_32_sem_fn mepcop1_32_sem_cmovc_rn_ccrm; +extern mepcop1_32_sem_fn mepcop1_32_sem_cmovh_crn_rm; +extern mepcop1_32_sem_fn mepcop1_32_sem_cmovh_rn_crm; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpadd3_b_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpadd3_h_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpadd3_w_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cdadd3_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpsub3_b_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpsub3_h_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpsub3_w_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cdsub3_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpand3_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpor3_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpnor3_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpxor3_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpsel_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpfsftbi_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpfsftbs0_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpfsftbs1_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpunpacku_b_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpunpacku_h_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpunpacku_w_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpunpackl_b_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpunpackl_h_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpunpackl_w_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cppacku_b_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cppack_b_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cppack_h_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpsrl3_b_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpssrl3_b_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpsrl3_h_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpssrl3_h_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpsrl3_w_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpssrl3_w_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cdsrl3_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpsra3_b_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpssra3_b_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpsra3_h_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpssra3_h_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpsra3_w_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpssra3_w_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cdsra3_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpsll3_b_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpssll3_b_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpsll3_h_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpssll3_h_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpsll3_w_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpssll3_w_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cdsll3_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpsla3_h_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpsla3_w_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpsadd3_h_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpsadd3_w_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpssub3_h_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpssub3_w_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpextuaddu3_b_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpextuadd3_b_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpextladdu3_b_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpextladd3_b_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpextusubu3_b_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpextusub3_b_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpextlsubu3_b_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpextlsub3_b_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpaveu3_b_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpave3_b_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpave3_h_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpave3_w_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpaddsru3_b_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpaddsr3_b_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpaddsr3_h_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpaddsr3_w_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpabsu3_b_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpabs3_b_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpabs3_h_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpmaxu3_b_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpmax3_b_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpmax3_h_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpmaxu3_w_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpmax3_w_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpminu3_b_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpmin3_b_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpmin3_h_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpminu3_w_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpmin3_w_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpmovfrcsar0_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpmovfrcsar1_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpmovfrcc_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpmovtocsar0_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpmovtocsar1_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpmovtocc_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpmov_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpabsz_b_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpabsz_h_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpabsz_w_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpldz_h_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpldz_w_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpnorm_h_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpnorm_w_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cphaddu_b_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cphadd_b_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cphadd_h_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cphadd_w_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpccadd_b_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpbcast_b_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpbcast_h_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpbcast_w_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpextuu_b_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpextu_b_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpextuu_h_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpextu_h_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpextlu_b_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpextl_b_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpextlu_h_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpextl_h_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpcastub_h_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpcastb_h_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpcastub_w_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpcastb_w_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpcastuh_w_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpcasth_w_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cdcastuw_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cdcastw_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpcmpeqz_b_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpcmpeq_b_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpcmpeq_h_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpcmpeq_w_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpcmpne_b_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpcmpne_h_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpcmpne_w_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpcmpgtu_b_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpcmpgt_b_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpcmpgt_h_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpcmpgtu_w_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpcmpgt_w_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpcmpgeu_b_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpcmpge_b_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpcmpge_h_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpcmpgeu_w_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpcmpge_w_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpacmpeq_b_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpacmpeq_h_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpacmpeq_w_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpacmpne_b_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpacmpne_h_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpacmpne_w_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpacmpgtu_b_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpacmpgt_b_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpacmpgt_h_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpacmpgtu_w_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpacmpgt_w_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpacmpgeu_b_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpacmpge_b_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpacmpge_h_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpacmpgeu_w_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpacmpge_w_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpocmpeq_b_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpocmpeq_h_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpocmpeq_w_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpocmpne_b_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpocmpne_h_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpocmpne_w_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpocmpgtu_b_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpocmpgt_b_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpocmpgt_h_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpocmpgtu_w_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpocmpgt_w_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpocmpgeu_b_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpocmpge_b_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpocmpge_h_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpocmpgeu_w_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpocmpge_w_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpsrli3_b_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpsrli3_h_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpsrli3_w_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cdsrli3_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpsrai3_b_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpsrai3_h_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpsrai3_w_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cdsrai3_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpslli3_b_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpslli3_h_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpslli3_w_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cdslli3_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpslai3_h_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpslai3_w_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpclipiu3_w_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpclipi3_w_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cdclipiu3_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cdclipi3_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpmovi_b_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpmoviu_h_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpmovi_h_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpmoviu_w_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpmovi_w_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cdmoviu_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cdmovi_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpadda1u_b_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpadda1_b_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpaddua1_h_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpaddla1_h_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpaddaca1u_b_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpaddaca1_b_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpaddacua1_h_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpaddacla1_h_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpsuba1u_b_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpsuba1_b_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpsubua1_h_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpsubla1_h_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpsubaca1u_b_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpsubaca1_b_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpsubacua1_h_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpsubacla1_h_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpabsa1u_b_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpabsa1_b_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpabsua1_h_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpabsla1_h_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpsada1u_b_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpsada1_b_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpsadua1_h_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpsadla1_h_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpseta1_h_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpsetua1_w_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpsetla1_w_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpmova1_b_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpmovua1_h_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpmovla1_h_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpmovuua1_w_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpmovula1_w_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpmovlua1_w_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpmovlla1_w_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cppacka1u_b_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cppacka1_b_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cppackua1_h_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cppackla1_h_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cppackua1_w_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cppackla1_w_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpmovhua1_w_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpmovhla1_w_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpsrla1_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpsraa1_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpslla1_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpsrlia1_P1; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpsraia1_P1; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpsllia1_P1; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpssqa1u_b_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpssqa1_b_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpssda1u_b_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpssda1_b_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpmula1u_b_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpmula1_b_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpmulua1_h_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpmulla1_h_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpmulua1u_w_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpmulla1u_w_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpmulua1_w_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpmulla1_w_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpmada1u_b_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpmada1_b_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpmadua1_h_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpmadla1_h_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpmadua1u_w_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpmadla1u_w_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpmadua1_w_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpmadla1_w_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpmsbua1_h_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpmsbla1_h_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpmsbua1u_w_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpmsbla1u_w_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpmsbua1_w_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpmsbla1_w_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpsmadua1_h_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpsmadla1_h_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpsmadua1_w_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpsmadla1_w_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpsmsbua1_h_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpsmsbla1_h_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpsmsbua1_w_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpsmsbla1_w_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpmulslua1_h_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpmulslla1_h_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpmulslua1_w_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpmulslla1_w_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpsmadslua1_h_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpsmadslla1_h_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpsmadslua1_w_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpsmadslla1_w_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpsmsbslua1_h_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpsmsbslla1_h_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpsmsbslua1_w_C3; +extern mepcop1_32_sem_fn mepcop1_32_sem_cpsmsbslla1_w_C3; + +#endif /* MEPCOP1_32_DECODE_H */ diff --git a/sid/component/cgen-cpu/mep/mep-cop1-32-defs.h b/sid/component/cgen-cpu/mep/mep-cop1-32-defs.h new file mode 100644 index 0000000000..9dbdab6aa0 --- /dev/null +++ b/sid/component/cgen-cpu/mep/mep-cop1-32-defs.h @@ -0,0 +1,16 @@ +/* CPU family header for mep_ext1 / mepcop1_32. + +THIS FILE IS MACHINE GENERATED WITH CGEN. + +Copyright (C) 2000-2007 Red Hat, Inc. + +This file is part of the Red Hat simulators. + + +*/ + +#ifndef DEFS_MEPCOP1_32_H +#define DEFS_MEPCOP1_32_H + + +#endif /* DEFS_MEPCOP1_32_H */ diff --git a/sid/component/cgen-cpu/mep/mep-cop1-32-model.cxx b/sid/component/cgen-cpu/mep/mep-cop1-32-model.cxx new file mode 100644 index 0000000000..22a59e706c --- /dev/null +++ b/sid/component/cgen-cpu/mep/mep-cop1-32-model.cxx @@ -0,0 +1,9121 @@ +/* Simulator model support for mepcop1_32. + +THIS FILE IS MACHINE GENERATED WITH CGEN. + +Copyright (C) 2000-2007 Red Hat, Inc. + +This file is part of the Red Hat simulators. + + +*/ + + +#if HAVE_CONFIG_H +#include "config.h" +#endif +#include "mep_ext1.h" + +using namespace mep_ext1; // FIXME: namespace organization still wip + +/* The profiling data is recorded here, but is accessed via the profiling + mechanism. After all, this is information for profiling. */ + +/* Model handlers for each insn. */ + +mepcop1_32_mep_model::mepcop1_32_mep_model (mep_ext1_cpu *cpu) + : cgen_model (cpu) +{ +} + +UINT +mepcop1_32_mep_model::model_cmov_crn_rm_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cmov_crn_rm.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cmov_crn_rm_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cmov_crn_rm.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cmov_rn_crm_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cmov_rn_crm.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cmov_rn_crm_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cmov_rn_crm.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cmovc_ccrn_rm_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cmovc_ccrn_rm.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cmovc_ccrn_rm_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cmovc_ccrn_rm.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cmovc_rn_ccrm_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cmovc_rn_ccrm.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cmovc_rn_ccrm_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cmovc_rn_ccrm.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cmovh_crn_rm_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cmov_crn_rm.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cmovh_crn_rm_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cmov_crn_rm.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cmovh_rn_crm_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cmov_rn_crm.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cmovh_rn_crm_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cmov_rn_crm.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpadd3_b_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpadd3_b_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpadd3_h_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpadd3_h_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpadd3_w_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpadd3_w_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cdadd3_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cdadd3_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpsub3_b_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpsub3_b_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpsub3_h_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpsub3_h_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpsub3_w_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpsub3_w_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cdsub3_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cdsub3_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpand3_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpand3_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpor3_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpor3_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpnor3_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpnor3_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpxor3_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpxor3_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpsel_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpsel_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpfsftbi_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpfsftbi_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpfsftbs0_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpfsftbs0_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpfsftbs1_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpfsftbs1_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpunpacku_b_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpunpacku_b_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpunpacku_h_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpunpacku_h_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpunpacku_w_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpunpacku_w_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpunpackl_b_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpunpackl_b_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpunpackl_h_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpunpackl_h_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpunpackl_w_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpunpackl_w_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cppacku_b_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cppacku_b_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cppack_b_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cppack_b_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cppack_h_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cppack_h_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpsrl3_b_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpsrl3_b_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpssrl3_b_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpssrl3_b_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpsrl3_h_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpsrl3_h_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpssrl3_h_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpssrl3_h_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpsrl3_w_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpsrl3_w_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpssrl3_w_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpssrl3_w_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cdsrl3_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cdsrl3_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpsra3_b_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpsra3_b_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpssra3_b_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpssra3_b_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpsra3_h_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpsra3_h_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpssra3_h_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpssra3_h_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpsra3_w_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpsra3_w_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpssra3_w_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpssra3_w_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cdsra3_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cdsra3_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpsll3_b_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpsll3_b_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpssll3_b_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpssll3_b_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpsll3_h_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpsll3_h_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpssll3_h_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpssll3_h_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpsll3_w_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpsll3_w_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpssll3_w_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpssll3_w_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cdsll3_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cdsll3_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpsla3_h_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpsla3_h_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpsla3_w_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpsla3_w_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpsadd3_h_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpsadd3_h_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpsadd3_w_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpsadd3_w_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpssub3_h_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpssub3_h_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpssub3_w_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpssub3_w_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpextuaddu3_b_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpextuaddu3_b_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpextuadd3_b_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpextuadd3_b_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpextladdu3_b_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpextladdu3_b_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpextladd3_b_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpextladd3_b_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpextusubu3_b_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpextusubu3_b_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpextusub3_b_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpextusub3_b_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpextlsubu3_b_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpextlsubu3_b_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpextlsub3_b_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpextlsub3_b_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpaveu3_b_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpaveu3_b_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpave3_b_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpave3_b_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpave3_h_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpave3_h_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpave3_w_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpave3_w_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpaddsru3_b_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpaddsru3_b_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpaddsr3_b_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpaddsr3_b_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpaddsr3_h_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpaddsr3_h_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpaddsr3_w_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpaddsr3_w_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpabsu3_b_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpabsu3_b_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpabs3_b_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpabs3_b_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpabs3_h_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpabs3_h_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpmaxu3_b_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpmaxu3_b_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpmax3_b_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpmax3_b_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpmax3_h_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpmax3_h_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpmaxu3_w_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpmaxu3_w_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpmax3_w_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpmax3_w_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpminu3_b_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpminu3_b_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpmin3_b_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpmin3_b_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpmin3_h_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpmin3_h_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpminu3_w_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpminu3_w_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpmin3_w_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpmin3_w_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpmovfrcsar0_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpmovfrcsar0_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpmovfrcsar1_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpmovfrcsar1_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpmovfrcc_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpmovfrcc_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpmovtocsar0_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpmoviu_h_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpmovtocsar0_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpmoviu_h_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpmovtocsar1_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpmoviu_h_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpmovtocsar1_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpmoviu_h_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpmovtocc_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpmoviu_h_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpmovtocc_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpmoviu_h_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpmov_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpmov_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpabsz_b_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpabsz_b_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpabsz_h_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpabsz_h_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpabsz_w_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpabsz_w_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpldz_h_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpldz_h_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpldz_w_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpldz_w_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpnorm_h_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpnorm_h_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpnorm_w_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpnorm_w_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cphaddu_b_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cphaddu_b_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cphadd_b_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cphadd_b_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cphadd_h_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cphadd_h_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cphadd_w_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cphadd_w_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpccadd_b_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpmoviu_h_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpccadd_b_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpmoviu_h_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpbcast_b_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpbcast_b_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpbcast_h_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpbcast_h_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpbcast_w_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpbcast_w_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpextuu_b_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpextuu_b_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpextu_b_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpextu_b_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpextuu_h_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpextuu_h_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpextu_h_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpextu_h_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpextlu_b_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpextlu_b_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpextl_b_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpextl_b_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpextlu_h_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpextlu_h_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpextl_h_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpextl_h_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpcastub_h_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpcastub_h_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpcastb_h_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpcastb_h_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpcastub_w_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpcastub_w_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpcastb_w_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpcastb_w_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpcastuh_w_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpcastuh_w_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpcasth_w_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpcasth_w_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cdcastuw_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cdcastuw_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cdcastw_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cdcastw_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpcmpeqz_b_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpcmpeqz_b_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpcmpeq_b_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpcmpeq_b_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpcmpeq_h_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpcmpeq_h_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpcmpeq_w_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpcmpeq_w_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpcmpne_b_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpcmpne_b_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpcmpne_h_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpcmpne_h_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpcmpne_w_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpcmpne_w_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpcmpgtu_b_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpcmpgtu_b_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpcmpgt_b_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpcmpgt_b_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpcmpgt_h_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpcmpgt_h_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpcmpgtu_w_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpcmpgtu_w_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpcmpgt_w_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpcmpgt_w_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpcmpgeu_b_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpcmpgeu_b_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpcmpge_b_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpcmpge_b_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpcmpge_h_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpcmpge_h_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpcmpgeu_w_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpcmpgeu_w_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpcmpge_w_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpcmpge_w_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpacmpeq_b_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpacmpeq_b_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpacmpeq_h_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpacmpeq_h_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpacmpeq_w_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpacmpeq_w_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpacmpne_b_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpacmpne_b_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpacmpne_h_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpacmpne_h_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpacmpne_w_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpacmpne_w_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpacmpgtu_b_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpacmpgtu_b_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpacmpgt_b_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpacmpgt_b_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpacmpgt_h_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpacmpgt_h_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpacmpgtu_w_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpacmpgtu_w_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpacmpgt_w_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpacmpgt_w_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpacmpgeu_b_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpacmpgeu_b_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpacmpge_b_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpacmpge_b_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpacmpge_h_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpacmpge_h_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpacmpgeu_w_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpacmpgeu_w_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpacmpge_w_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpacmpge_w_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpocmpeq_b_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpocmpeq_b_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpocmpeq_h_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpocmpeq_h_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpocmpeq_w_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpocmpeq_w_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpocmpne_b_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpocmpne_b_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpocmpne_h_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpocmpne_h_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpocmpne_w_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpocmpne_w_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpocmpgtu_b_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpocmpgtu_b_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpocmpgt_b_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpocmpgt_b_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpocmpgt_h_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpocmpgt_h_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpocmpgtu_w_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpocmpgtu_w_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpocmpgt_w_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpocmpgt_w_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpocmpgeu_b_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpocmpgeu_b_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpocmpge_b_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpocmpge_b_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpocmpge_h_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpocmpge_h_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpocmpgeu_w_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpocmpgeu_w_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpocmpge_w_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpocmpge_w_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpsrli3_b_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpsrli3_b_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpsrli3_b_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpsrli3_b_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpsrli3_h_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpsrli3_h_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpsrli3_h_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpsrli3_h_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpsrli3_w_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpsrli3_w_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cdsrli3_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cdsrli3_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpsrai3_b_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpsrli3_b_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpsrai3_b_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpsrli3_b_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpsrai3_h_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpsrli3_h_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpsrai3_h_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpsrli3_h_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpsrai3_w_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpsrai3_w_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cdsrai3_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cdsrai3_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpslli3_b_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpsrli3_b_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpslli3_b_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpsrli3_b_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpslli3_h_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpsrli3_h_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpslli3_h_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpsrli3_h_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpslli3_w_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpslli3_w_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cdslli3_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cdslli3_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpslai3_h_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpsrli3_h_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpslai3_h_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpsrli3_h_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpslai3_w_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpslai3_w_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpclipiu3_w_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpclipiu3_w_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpclipi3_w_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpclipi3_w_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cdclipiu3_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cdclipiu3_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cdclipi3_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cdclipi3_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpmovi_b_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpmovi_b_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpmovi_b_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpmovi_b_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpmoviu_h_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpmoviu_h_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpmoviu_h_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpmoviu_h_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpmovi_h_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpmovi_b_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpmovi_h_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpmovi_b_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpmoviu_w_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpmoviu_h_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpmoviu_w_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpmoviu_h_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpmovi_w_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpmovi_b_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpmovi_w_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpmovi_b_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cdmoviu_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpmoviu_h_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cdmoviu_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpmoviu_h_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cdmovi_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpmovi_b_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cdmovi_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpmovi_b_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpadda1u_b_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpadda1u_b_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpadda1_b_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpadda1_b_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpaddua1_h_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpaddua1_h_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpaddla1_h_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpaddla1_h_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpaddaca1u_b_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpaddaca1u_b_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpaddaca1_b_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpaddaca1_b_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpaddacua1_h_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpaddacua1_h_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpaddacla1_h_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpaddacla1_h_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpsuba1u_b_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpsuba1u_b_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpsuba1_b_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpsuba1_b_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpsubua1_h_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpsubua1_h_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpsubla1_h_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpsubla1_h_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpsubaca1u_b_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpsubaca1u_b_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpsubaca1_b_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpsubaca1_b_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpsubacua1_h_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpsubacua1_h_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpsubacla1_h_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpsubacla1_h_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpabsa1u_b_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpabsa1u_b_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpabsa1_b_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpabsa1_b_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpabsua1_h_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpabsua1_h_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpabsla1_h_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpabsla1_h_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpsada1u_b_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpsada1u_b_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpsada1_b_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpsada1_b_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpsadua1_h_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpsadua1_h_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpsadla1_h_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpsadla1_h_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpseta1_h_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpseta1_h_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpsetua1_w_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpsetua1_w_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpsetla1_w_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpsetla1_w_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpmova1_b_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpmova1_b_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpmovua1_h_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpmovua1_h_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpmovla1_h_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpmovla1_h_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpmovuua1_w_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpmovuua1_w_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpmovula1_w_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpmovula1_w_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpmovlua1_w_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpmovlua1_w_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpmovlla1_w_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpmovlla1_w_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cppacka1u_b_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cppacka1u_b_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cppacka1_b_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cppacka1_b_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cppackua1_h_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cppackua1_h_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cppackla1_h_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cppackla1_h_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cppackua1_w_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cppackua1_w_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cppackla1_w_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cppackla1_w_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpmovhua1_w_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpmovhua1_w_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpmovhla1_w_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpmovhla1_w_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpsrla1_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpmoviu_h_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpsrla1_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpmoviu_h_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpsraa1_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpmoviu_h_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpsraa1_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpmoviu_h_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpslla1_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpmoviu_h_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpslla1_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpmoviu_h_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpsrlia1_P1_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpsrlia1_P1_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpsraia1_P1_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpsraia1_P1_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpsllia1_P1_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpsllia1_P1_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpssqa1u_b_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpssqa1u_b_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpssqa1_b_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpssqa1_b_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpssda1u_b_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpssda1u_b_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpssda1_b_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpssda1_b_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpmula1u_b_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpmula1u_b_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpmula1_b_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpmula1_b_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpmulua1_h_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpmulua1_h_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpmulla1_h_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpmulla1_h_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpmulua1u_w_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpmulua1u_w_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpmulla1u_w_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpmulla1u_w_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpmulua1_w_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpmulua1_w_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpmulla1_w_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpmulla1_w_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpmada1u_b_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpmada1u_b_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpmada1_b_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpmada1_b_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpmadua1_h_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpmadua1_h_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpmadla1_h_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpmadla1_h_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpmadua1u_w_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpmadua1u_w_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpmadla1u_w_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpmadla1u_w_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpmadua1_w_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpmadua1_w_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpmadla1_w_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpmadla1_w_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpmsbua1_h_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpmsbua1_h_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpmsbla1_h_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpmsbla1_h_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpmsbua1u_w_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpmsbua1u_w_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpmsbla1u_w_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpmsbla1u_w_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpmsbua1_w_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpmsbua1_w_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpmsbla1_w_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpmsbla1_w_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpsmadua1_h_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpsmadua1_h_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpsmadla1_h_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpsmadla1_h_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpsmadua1_w_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpsmadua1_w_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpsmadla1_w_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpsmadla1_w_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpsmsbua1_h_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpsmsbua1_h_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpsmsbla1_h_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpsmsbla1_h_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpsmsbua1_w_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpsmsbua1_w_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpsmsbla1_w_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpsmsbla1_w_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpmulslua1_h_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpmulslua1_h_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpmulslla1_h_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpmulslla1_h_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpmulslua1_w_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpmulslua1_w_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpmulslla1_w_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpmulslla1_w_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpsmadslua1_h_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpsmadslua1_h_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpsmadslla1_h_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpsmadslla1_h_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpsmadslua1_w_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpsmadslua1_w_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpsmadslla1_w_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpsmadslla1_w_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpsmsbslua1_h_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpsmsbslua1_h_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpsmsbslla1_h_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpsmsbslla1_h_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpsmsbslua1_w_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpsmsbslua1_w_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpsmsbslla1_w_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_32_mep_model::model_cpsmsbslla1_w_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + const mepcop1_32_scache* abuf = sem; + const mepcop1_32_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +/* We assume UNIT_NONE == 0 because the tables don't always terminate + entries with it. */ + +/* Model timing data for `mep'. */ + +const mepcop1_32_mep_model::insn_timing mepcop1_32_mep_model::timing[] = { + { MEPCOP1_32_INSN_X_INVALID, 0, 0, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CMOV_CRN_RM, & mepcop1_32_mep_model::model_cmov_crn_rm_before, & mepcop1_32_mep_model::model_cmov_crn_rm_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CMOV_RN_CRM, & mepcop1_32_mep_model::model_cmov_rn_crm_before, & mepcop1_32_mep_model::model_cmov_rn_crm_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CMOVC_CCRN_RM, & mepcop1_32_mep_model::model_cmovc_ccrn_rm_before, & mepcop1_32_mep_model::model_cmovc_ccrn_rm_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CMOVC_RN_CCRM, & mepcop1_32_mep_model::model_cmovc_rn_ccrm_before, & mepcop1_32_mep_model::model_cmovc_rn_ccrm_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CMOVH_CRN_RM, & mepcop1_32_mep_model::model_cmovh_crn_rm_before, & mepcop1_32_mep_model::model_cmovh_crn_rm_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CMOVH_RN_CRM, & mepcop1_32_mep_model::model_cmovh_rn_crm_before, & mepcop1_32_mep_model::model_cmovh_rn_crm_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPADD3_B_C3, & mepcop1_32_mep_model::model_cpadd3_b_C3_before, & mepcop1_32_mep_model::model_cpadd3_b_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPADD3_H_C3, & mepcop1_32_mep_model::model_cpadd3_h_C3_before, & mepcop1_32_mep_model::model_cpadd3_h_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPADD3_W_C3, & mepcop1_32_mep_model::model_cpadd3_w_C3_before, & mepcop1_32_mep_model::model_cpadd3_w_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CDADD3_C3, & mepcop1_32_mep_model::model_cdadd3_C3_before, & mepcop1_32_mep_model::model_cdadd3_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPSUB3_B_C3, & mepcop1_32_mep_model::model_cpsub3_b_C3_before, & mepcop1_32_mep_model::model_cpsub3_b_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPSUB3_H_C3, & mepcop1_32_mep_model::model_cpsub3_h_C3_before, & mepcop1_32_mep_model::model_cpsub3_h_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPSUB3_W_C3, & mepcop1_32_mep_model::model_cpsub3_w_C3_before, & mepcop1_32_mep_model::model_cpsub3_w_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CDSUB3_C3, & mepcop1_32_mep_model::model_cdsub3_C3_before, & mepcop1_32_mep_model::model_cdsub3_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPAND3_C3, & mepcop1_32_mep_model::model_cpand3_C3_before, & mepcop1_32_mep_model::model_cpand3_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPOR3_C3, & mepcop1_32_mep_model::model_cpor3_C3_before, & mepcop1_32_mep_model::model_cpor3_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPNOR3_C3, & mepcop1_32_mep_model::model_cpnor3_C3_before, & mepcop1_32_mep_model::model_cpnor3_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPXOR3_C3, & mepcop1_32_mep_model::model_cpxor3_C3_before, & mepcop1_32_mep_model::model_cpxor3_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPSEL_C3, & mepcop1_32_mep_model::model_cpsel_C3_before, & mepcop1_32_mep_model::model_cpsel_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPFSFTBI_C3, & mepcop1_32_mep_model::model_cpfsftbi_C3_before, & mepcop1_32_mep_model::model_cpfsftbi_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPFSFTBS0_C3, & mepcop1_32_mep_model::model_cpfsftbs0_C3_before, & mepcop1_32_mep_model::model_cpfsftbs0_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPFSFTBS1_C3, & mepcop1_32_mep_model::model_cpfsftbs1_C3_before, & mepcop1_32_mep_model::model_cpfsftbs1_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPUNPACKU_B_C3, & mepcop1_32_mep_model::model_cpunpacku_b_C3_before, & mepcop1_32_mep_model::model_cpunpacku_b_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPUNPACKU_H_C3, & mepcop1_32_mep_model::model_cpunpacku_h_C3_before, & mepcop1_32_mep_model::model_cpunpacku_h_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPUNPACKU_W_C3, & mepcop1_32_mep_model::model_cpunpacku_w_C3_before, & mepcop1_32_mep_model::model_cpunpacku_w_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPUNPACKL_B_C3, & mepcop1_32_mep_model::model_cpunpackl_b_C3_before, & mepcop1_32_mep_model::model_cpunpackl_b_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPUNPACKL_H_C3, & mepcop1_32_mep_model::model_cpunpackl_h_C3_before, & mepcop1_32_mep_model::model_cpunpackl_h_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPUNPACKL_W_C3, & mepcop1_32_mep_model::model_cpunpackl_w_C3_before, & mepcop1_32_mep_model::model_cpunpackl_w_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPPACKU_B_C3, & mepcop1_32_mep_model::model_cppacku_b_C3_before, & mepcop1_32_mep_model::model_cppacku_b_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPPACK_B_C3, & mepcop1_32_mep_model::model_cppack_b_C3_before, & mepcop1_32_mep_model::model_cppack_b_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPPACK_H_C3, & mepcop1_32_mep_model::model_cppack_h_C3_before, & mepcop1_32_mep_model::model_cppack_h_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPSRL3_B_C3, & mepcop1_32_mep_model::model_cpsrl3_b_C3_before, & mepcop1_32_mep_model::model_cpsrl3_b_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPSSRL3_B_C3, & mepcop1_32_mep_model::model_cpssrl3_b_C3_before, & mepcop1_32_mep_model::model_cpssrl3_b_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPSRL3_H_C3, & mepcop1_32_mep_model::model_cpsrl3_h_C3_before, & mepcop1_32_mep_model::model_cpsrl3_h_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPSSRL3_H_C3, & mepcop1_32_mep_model::model_cpssrl3_h_C3_before, & mepcop1_32_mep_model::model_cpssrl3_h_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPSRL3_W_C3, & mepcop1_32_mep_model::model_cpsrl3_w_C3_before, & mepcop1_32_mep_model::model_cpsrl3_w_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPSSRL3_W_C3, & mepcop1_32_mep_model::model_cpssrl3_w_C3_before, & mepcop1_32_mep_model::model_cpssrl3_w_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CDSRL3_C3, & mepcop1_32_mep_model::model_cdsrl3_C3_before, & mepcop1_32_mep_model::model_cdsrl3_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPSRA3_B_C3, & mepcop1_32_mep_model::model_cpsra3_b_C3_before, & mepcop1_32_mep_model::model_cpsra3_b_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPSSRA3_B_C3, & mepcop1_32_mep_model::model_cpssra3_b_C3_before, & mepcop1_32_mep_model::model_cpssra3_b_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPSRA3_H_C3, & mepcop1_32_mep_model::model_cpsra3_h_C3_before, & mepcop1_32_mep_model::model_cpsra3_h_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPSSRA3_H_C3, & mepcop1_32_mep_model::model_cpssra3_h_C3_before, & mepcop1_32_mep_model::model_cpssra3_h_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPSRA3_W_C3, & mepcop1_32_mep_model::model_cpsra3_w_C3_before, & mepcop1_32_mep_model::model_cpsra3_w_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPSSRA3_W_C3, & mepcop1_32_mep_model::model_cpssra3_w_C3_before, & mepcop1_32_mep_model::model_cpssra3_w_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CDSRA3_C3, & mepcop1_32_mep_model::model_cdsra3_C3_before, & mepcop1_32_mep_model::model_cdsra3_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPSLL3_B_C3, & mepcop1_32_mep_model::model_cpsll3_b_C3_before, & mepcop1_32_mep_model::model_cpsll3_b_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPSSLL3_B_C3, & mepcop1_32_mep_model::model_cpssll3_b_C3_before, & mepcop1_32_mep_model::model_cpssll3_b_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPSLL3_H_C3, & mepcop1_32_mep_model::model_cpsll3_h_C3_before, & mepcop1_32_mep_model::model_cpsll3_h_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPSSLL3_H_C3, & mepcop1_32_mep_model::model_cpssll3_h_C3_before, & mepcop1_32_mep_model::model_cpssll3_h_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPSLL3_W_C3, & mepcop1_32_mep_model::model_cpsll3_w_C3_before, & mepcop1_32_mep_model::model_cpsll3_w_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPSSLL3_W_C3, & mepcop1_32_mep_model::model_cpssll3_w_C3_before, & mepcop1_32_mep_model::model_cpssll3_w_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CDSLL3_C3, & mepcop1_32_mep_model::model_cdsll3_C3_before, & mepcop1_32_mep_model::model_cdsll3_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPSLA3_H_C3, & mepcop1_32_mep_model::model_cpsla3_h_C3_before, & mepcop1_32_mep_model::model_cpsla3_h_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPSLA3_W_C3, & mepcop1_32_mep_model::model_cpsla3_w_C3_before, & mepcop1_32_mep_model::model_cpsla3_w_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPSADD3_H_C3, & mepcop1_32_mep_model::model_cpsadd3_h_C3_before, & mepcop1_32_mep_model::model_cpsadd3_h_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPSADD3_W_C3, & mepcop1_32_mep_model::model_cpsadd3_w_C3_before, & mepcop1_32_mep_model::model_cpsadd3_w_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPSSUB3_H_C3, & mepcop1_32_mep_model::model_cpssub3_h_C3_before, & mepcop1_32_mep_model::model_cpssub3_h_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPSSUB3_W_C3, & mepcop1_32_mep_model::model_cpssub3_w_C3_before, & mepcop1_32_mep_model::model_cpssub3_w_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPEXTUADDU3_B_C3, & mepcop1_32_mep_model::model_cpextuaddu3_b_C3_before, & mepcop1_32_mep_model::model_cpextuaddu3_b_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPEXTUADD3_B_C3, & mepcop1_32_mep_model::model_cpextuadd3_b_C3_before, & mepcop1_32_mep_model::model_cpextuadd3_b_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPEXTLADDU3_B_C3, & mepcop1_32_mep_model::model_cpextladdu3_b_C3_before, & mepcop1_32_mep_model::model_cpextladdu3_b_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPEXTLADD3_B_C3, & mepcop1_32_mep_model::model_cpextladd3_b_C3_before, & mepcop1_32_mep_model::model_cpextladd3_b_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPEXTUSUBU3_B_C3, & mepcop1_32_mep_model::model_cpextusubu3_b_C3_before, & mepcop1_32_mep_model::model_cpextusubu3_b_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPEXTUSUB3_B_C3, & mepcop1_32_mep_model::model_cpextusub3_b_C3_before, & mepcop1_32_mep_model::model_cpextusub3_b_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPEXTLSUBU3_B_C3, & mepcop1_32_mep_model::model_cpextlsubu3_b_C3_before, & mepcop1_32_mep_model::model_cpextlsubu3_b_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPEXTLSUB3_B_C3, & mepcop1_32_mep_model::model_cpextlsub3_b_C3_before, & mepcop1_32_mep_model::model_cpextlsub3_b_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPAVEU3_B_C3, & mepcop1_32_mep_model::model_cpaveu3_b_C3_before, & mepcop1_32_mep_model::model_cpaveu3_b_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPAVE3_B_C3, & mepcop1_32_mep_model::model_cpave3_b_C3_before, & mepcop1_32_mep_model::model_cpave3_b_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPAVE3_H_C3, & mepcop1_32_mep_model::model_cpave3_h_C3_before, & mepcop1_32_mep_model::model_cpave3_h_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPAVE3_W_C3, & mepcop1_32_mep_model::model_cpave3_w_C3_before, & mepcop1_32_mep_model::model_cpave3_w_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPADDSRU3_B_C3, & mepcop1_32_mep_model::model_cpaddsru3_b_C3_before, & mepcop1_32_mep_model::model_cpaddsru3_b_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPADDSR3_B_C3, & mepcop1_32_mep_model::model_cpaddsr3_b_C3_before, & mepcop1_32_mep_model::model_cpaddsr3_b_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPADDSR3_H_C3, & mepcop1_32_mep_model::model_cpaddsr3_h_C3_before, & mepcop1_32_mep_model::model_cpaddsr3_h_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPADDSR3_W_C3, & mepcop1_32_mep_model::model_cpaddsr3_w_C3_before, & mepcop1_32_mep_model::model_cpaddsr3_w_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPABSU3_B_C3, & mepcop1_32_mep_model::model_cpabsu3_b_C3_before, & mepcop1_32_mep_model::model_cpabsu3_b_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPABS3_B_C3, & mepcop1_32_mep_model::model_cpabs3_b_C3_before, & mepcop1_32_mep_model::model_cpabs3_b_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPABS3_H_C3, & mepcop1_32_mep_model::model_cpabs3_h_C3_before, & mepcop1_32_mep_model::model_cpabs3_h_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPMAXU3_B_C3, & mepcop1_32_mep_model::model_cpmaxu3_b_C3_before, & mepcop1_32_mep_model::model_cpmaxu3_b_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPMAX3_B_C3, & mepcop1_32_mep_model::model_cpmax3_b_C3_before, & mepcop1_32_mep_model::model_cpmax3_b_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPMAX3_H_C3, & mepcop1_32_mep_model::model_cpmax3_h_C3_before, & mepcop1_32_mep_model::model_cpmax3_h_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPMAXU3_W_C3, & mepcop1_32_mep_model::model_cpmaxu3_w_C3_before, & mepcop1_32_mep_model::model_cpmaxu3_w_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPMAX3_W_C3, & mepcop1_32_mep_model::model_cpmax3_w_C3_before, & mepcop1_32_mep_model::model_cpmax3_w_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPMINU3_B_C3, & mepcop1_32_mep_model::model_cpminu3_b_C3_before, & mepcop1_32_mep_model::model_cpminu3_b_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPMIN3_B_C3, & mepcop1_32_mep_model::model_cpmin3_b_C3_before, & mepcop1_32_mep_model::model_cpmin3_b_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPMIN3_H_C3, & mepcop1_32_mep_model::model_cpmin3_h_C3_before, & mepcop1_32_mep_model::model_cpmin3_h_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPMINU3_W_C3, & mepcop1_32_mep_model::model_cpminu3_w_C3_before, & mepcop1_32_mep_model::model_cpminu3_w_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPMIN3_W_C3, & mepcop1_32_mep_model::model_cpmin3_w_C3_before, & mepcop1_32_mep_model::model_cpmin3_w_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPMOVFRCSAR0_C3, & mepcop1_32_mep_model::model_cpmovfrcsar0_C3_before, & mepcop1_32_mep_model::model_cpmovfrcsar0_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPMOVFRCSAR1_C3, & mepcop1_32_mep_model::model_cpmovfrcsar1_C3_before, & mepcop1_32_mep_model::model_cpmovfrcsar1_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPMOVFRCC_C3, & mepcop1_32_mep_model::model_cpmovfrcc_C3_before, & mepcop1_32_mep_model::model_cpmovfrcc_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPMOVTOCSAR0_C3, & mepcop1_32_mep_model::model_cpmovtocsar0_C3_before, & mepcop1_32_mep_model::model_cpmovtocsar0_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPMOVTOCSAR1_C3, & mepcop1_32_mep_model::model_cpmovtocsar1_C3_before, & mepcop1_32_mep_model::model_cpmovtocsar1_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPMOVTOCC_C3, & mepcop1_32_mep_model::model_cpmovtocc_C3_before, & mepcop1_32_mep_model::model_cpmovtocc_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPMOV_C3, & mepcop1_32_mep_model::model_cpmov_C3_before, & mepcop1_32_mep_model::model_cpmov_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPABSZ_B_C3, & mepcop1_32_mep_model::model_cpabsz_b_C3_before, & mepcop1_32_mep_model::model_cpabsz_b_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPABSZ_H_C3, & mepcop1_32_mep_model::model_cpabsz_h_C3_before, & mepcop1_32_mep_model::model_cpabsz_h_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPABSZ_W_C3, & mepcop1_32_mep_model::model_cpabsz_w_C3_before, & mepcop1_32_mep_model::model_cpabsz_w_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPLDZ_H_C3, & mepcop1_32_mep_model::model_cpldz_h_C3_before, & mepcop1_32_mep_model::model_cpldz_h_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPLDZ_W_C3, & mepcop1_32_mep_model::model_cpldz_w_C3_before, & mepcop1_32_mep_model::model_cpldz_w_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPNORM_H_C3, & mepcop1_32_mep_model::model_cpnorm_h_C3_before, & mepcop1_32_mep_model::model_cpnorm_h_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPNORM_W_C3, & mepcop1_32_mep_model::model_cpnorm_w_C3_before, & mepcop1_32_mep_model::model_cpnorm_w_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPHADDU_B_C3, & mepcop1_32_mep_model::model_cphaddu_b_C3_before, & mepcop1_32_mep_model::model_cphaddu_b_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPHADD_B_C3, & mepcop1_32_mep_model::model_cphadd_b_C3_before, & mepcop1_32_mep_model::model_cphadd_b_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPHADD_H_C3, & mepcop1_32_mep_model::model_cphadd_h_C3_before, & mepcop1_32_mep_model::model_cphadd_h_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPHADD_W_C3, & mepcop1_32_mep_model::model_cphadd_w_C3_before, & mepcop1_32_mep_model::model_cphadd_w_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPCCADD_B_C3, & mepcop1_32_mep_model::model_cpccadd_b_C3_before, & mepcop1_32_mep_model::model_cpccadd_b_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPBCAST_B_C3, & mepcop1_32_mep_model::model_cpbcast_b_C3_before, & mepcop1_32_mep_model::model_cpbcast_b_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPBCAST_H_C3, & mepcop1_32_mep_model::model_cpbcast_h_C3_before, & mepcop1_32_mep_model::model_cpbcast_h_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPBCAST_W_C3, & mepcop1_32_mep_model::model_cpbcast_w_C3_before, & mepcop1_32_mep_model::model_cpbcast_w_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPEXTUU_B_C3, & mepcop1_32_mep_model::model_cpextuu_b_C3_before, & mepcop1_32_mep_model::model_cpextuu_b_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPEXTU_B_C3, & mepcop1_32_mep_model::model_cpextu_b_C3_before, & mepcop1_32_mep_model::model_cpextu_b_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPEXTUU_H_C3, & mepcop1_32_mep_model::model_cpextuu_h_C3_before, & mepcop1_32_mep_model::model_cpextuu_h_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPEXTU_H_C3, & mepcop1_32_mep_model::model_cpextu_h_C3_before, & mepcop1_32_mep_model::model_cpextu_h_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPEXTLU_B_C3, & mepcop1_32_mep_model::model_cpextlu_b_C3_before, & mepcop1_32_mep_model::model_cpextlu_b_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPEXTL_B_C3, & mepcop1_32_mep_model::model_cpextl_b_C3_before, & mepcop1_32_mep_model::model_cpextl_b_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPEXTLU_H_C3, & mepcop1_32_mep_model::model_cpextlu_h_C3_before, & mepcop1_32_mep_model::model_cpextlu_h_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPEXTL_H_C3, & mepcop1_32_mep_model::model_cpextl_h_C3_before, & mepcop1_32_mep_model::model_cpextl_h_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPCASTUB_H_C3, & mepcop1_32_mep_model::model_cpcastub_h_C3_before, & mepcop1_32_mep_model::model_cpcastub_h_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPCASTB_H_C3, & mepcop1_32_mep_model::model_cpcastb_h_C3_before, & mepcop1_32_mep_model::model_cpcastb_h_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPCASTUB_W_C3, & mepcop1_32_mep_model::model_cpcastub_w_C3_before, & mepcop1_32_mep_model::model_cpcastub_w_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPCASTB_W_C3, & mepcop1_32_mep_model::model_cpcastb_w_C3_before, & mepcop1_32_mep_model::model_cpcastb_w_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPCASTUH_W_C3, & mepcop1_32_mep_model::model_cpcastuh_w_C3_before, & mepcop1_32_mep_model::model_cpcastuh_w_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPCASTH_W_C3, & mepcop1_32_mep_model::model_cpcasth_w_C3_before, & mepcop1_32_mep_model::model_cpcasth_w_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CDCASTUW_C3, & mepcop1_32_mep_model::model_cdcastuw_C3_before, & mepcop1_32_mep_model::model_cdcastuw_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CDCASTW_C3, & mepcop1_32_mep_model::model_cdcastw_C3_before, & mepcop1_32_mep_model::model_cdcastw_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPCMPEQZ_B_C3, & mepcop1_32_mep_model::model_cpcmpeqz_b_C3_before, & mepcop1_32_mep_model::model_cpcmpeqz_b_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPCMPEQ_B_C3, & mepcop1_32_mep_model::model_cpcmpeq_b_C3_before, & mepcop1_32_mep_model::model_cpcmpeq_b_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPCMPEQ_H_C3, & mepcop1_32_mep_model::model_cpcmpeq_h_C3_before, & mepcop1_32_mep_model::model_cpcmpeq_h_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPCMPEQ_W_C3, & mepcop1_32_mep_model::model_cpcmpeq_w_C3_before, & mepcop1_32_mep_model::model_cpcmpeq_w_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPCMPNE_B_C3, & mepcop1_32_mep_model::model_cpcmpne_b_C3_before, & mepcop1_32_mep_model::model_cpcmpne_b_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPCMPNE_H_C3, & mepcop1_32_mep_model::model_cpcmpne_h_C3_before, & mepcop1_32_mep_model::model_cpcmpne_h_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPCMPNE_W_C3, & mepcop1_32_mep_model::model_cpcmpne_w_C3_before, & mepcop1_32_mep_model::model_cpcmpne_w_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPCMPGTU_B_C3, & mepcop1_32_mep_model::model_cpcmpgtu_b_C3_before, & mepcop1_32_mep_model::model_cpcmpgtu_b_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPCMPGT_B_C3, & mepcop1_32_mep_model::model_cpcmpgt_b_C3_before, & mepcop1_32_mep_model::model_cpcmpgt_b_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPCMPGT_H_C3, & mepcop1_32_mep_model::model_cpcmpgt_h_C3_before, & mepcop1_32_mep_model::model_cpcmpgt_h_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPCMPGTU_W_C3, & mepcop1_32_mep_model::model_cpcmpgtu_w_C3_before, & mepcop1_32_mep_model::model_cpcmpgtu_w_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPCMPGT_W_C3, & mepcop1_32_mep_model::model_cpcmpgt_w_C3_before, & mepcop1_32_mep_model::model_cpcmpgt_w_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPCMPGEU_B_C3, & mepcop1_32_mep_model::model_cpcmpgeu_b_C3_before, & mepcop1_32_mep_model::model_cpcmpgeu_b_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPCMPGE_B_C3, & mepcop1_32_mep_model::model_cpcmpge_b_C3_before, & mepcop1_32_mep_model::model_cpcmpge_b_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPCMPGE_H_C3, & mepcop1_32_mep_model::model_cpcmpge_h_C3_before, & mepcop1_32_mep_model::model_cpcmpge_h_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPCMPGEU_W_C3, & mepcop1_32_mep_model::model_cpcmpgeu_w_C3_before, & mepcop1_32_mep_model::model_cpcmpgeu_w_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPCMPGE_W_C3, & mepcop1_32_mep_model::model_cpcmpge_w_C3_before, & mepcop1_32_mep_model::model_cpcmpge_w_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPACMPEQ_B_C3, & mepcop1_32_mep_model::model_cpacmpeq_b_C3_before, & mepcop1_32_mep_model::model_cpacmpeq_b_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPACMPEQ_H_C3, & mepcop1_32_mep_model::model_cpacmpeq_h_C3_before, & mepcop1_32_mep_model::model_cpacmpeq_h_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPACMPEQ_W_C3, & mepcop1_32_mep_model::model_cpacmpeq_w_C3_before, & mepcop1_32_mep_model::model_cpacmpeq_w_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPACMPNE_B_C3, & mepcop1_32_mep_model::model_cpacmpne_b_C3_before, & mepcop1_32_mep_model::model_cpacmpne_b_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPACMPNE_H_C3, & mepcop1_32_mep_model::model_cpacmpne_h_C3_before, & mepcop1_32_mep_model::model_cpacmpne_h_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPACMPNE_W_C3, & mepcop1_32_mep_model::model_cpacmpne_w_C3_before, & mepcop1_32_mep_model::model_cpacmpne_w_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPACMPGTU_B_C3, & mepcop1_32_mep_model::model_cpacmpgtu_b_C3_before, & mepcop1_32_mep_model::model_cpacmpgtu_b_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPACMPGT_B_C3, & mepcop1_32_mep_model::model_cpacmpgt_b_C3_before, & mepcop1_32_mep_model::model_cpacmpgt_b_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPACMPGT_H_C3, & mepcop1_32_mep_model::model_cpacmpgt_h_C3_before, & mepcop1_32_mep_model::model_cpacmpgt_h_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPACMPGTU_W_C3, & mepcop1_32_mep_model::model_cpacmpgtu_w_C3_before, & mepcop1_32_mep_model::model_cpacmpgtu_w_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPACMPGT_W_C3, & mepcop1_32_mep_model::model_cpacmpgt_w_C3_before, & mepcop1_32_mep_model::model_cpacmpgt_w_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPACMPGEU_B_C3, & mepcop1_32_mep_model::model_cpacmpgeu_b_C3_before, & mepcop1_32_mep_model::model_cpacmpgeu_b_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPACMPGE_B_C3, & mepcop1_32_mep_model::model_cpacmpge_b_C3_before, & mepcop1_32_mep_model::model_cpacmpge_b_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPACMPGE_H_C3, & mepcop1_32_mep_model::model_cpacmpge_h_C3_before, & mepcop1_32_mep_model::model_cpacmpge_h_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPACMPGEU_W_C3, & mepcop1_32_mep_model::model_cpacmpgeu_w_C3_before, & mepcop1_32_mep_model::model_cpacmpgeu_w_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPACMPGE_W_C3, & mepcop1_32_mep_model::model_cpacmpge_w_C3_before, & mepcop1_32_mep_model::model_cpacmpge_w_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPOCMPEQ_B_C3, & mepcop1_32_mep_model::model_cpocmpeq_b_C3_before, & mepcop1_32_mep_model::model_cpocmpeq_b_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPOCMPEQ_H_C3, & mepcop1_32_mep_model::model_cpocmpeq_h_C3_before, & mepcop1_32_mep_model::model_cpocmpeq_h_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPOCMPEQ_W_C3, & mepcop1_32_mep_model::model_cpocmpeq_w_C3_before, & mepcop1_32_mep_model::model_cpocmpeq_w_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPOCMPNE_B_C3, & mepcop1_32_mep_model::model_cpocmpne_b_C3_before, & mepcop1_32_mep_model::model_cpocmpne_b_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPOCMPNE_H_C3, & mepcop1_32_mep_model::model_cpocmpne_h_C3_before, & mepcop1_32_mep_model::model_cpocmpne_h_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPOCMPNE_W_C3, & mepcop1_32_mep_model::model_cpocmpne_w_C3_before, & mepcop1_32_mep_model::model_cpocmpne_w_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPOCMPGTU_B_C3, & mepcop1_32_mep_model::model_cpocmpgtu_b_C3_before, & mepcop1_32_mep_model::model_cpocmpgtu_b_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPOCMPGT_B_C3, & mepcop1_32_mep_model::model_cpocmpgt_b_C3_before, & mepcop1_32_mep_model::model_cpocmpgt_b_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPOCMPGT_H_C3, & mepcop1_32_mep_model::model_cpocmpgt_h_C3_before, & mepcop1_32_mep_model::model_cpocmpgt_h_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPOCMPGTU_W_C3, & mepcop1_32_mep_model::model_cpocmpgtu_w_C3_before, & mepcop1_32_mep_model::model_cpocmpgtu_w_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPOCMPGT_W_C3, & mepcop1_32_mep_model::model_cpocmpgt_w_C3_before, & mepcop1_32_mep_model::model_cpocmpgt_w_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPOCMPGEU_B_C3, & mepcop1_32_mep_model::model_cpocmpgeu_b_C3_before, & mepcop1_32_mep_model::model_cpocmpgeu_b_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPOCMPGE_B_C3, & mepcop1_32_mep_model::model_cpocmpge_b_C3_before, & mepcop1_32_mep_model::model_cpocmpge_b_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPOCMPGE_H_C3, & mepcop1_32_mep_model::model_cpocmpge_h_C3_before, & mepcop1_32_mep_model::model_cpocmpge_h_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPOCMPGEU_W_C3, & mepcop1_32_mep_model::model_cpocmpgeu_w_C3_before, & mepcop1_32_mep_model::model_cpocmpgeu_w_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPOCMPGE_W_C3, & mepcop1_32_mep_model::model_cpocmpge_w_C3_before, & mepcop1_32_mep_model::model_cpocmpge_w_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPSRLI3_B_C3, & mepcop1_32_mep_model::model_cpsrli3_b_C3_before, & mepcop1_32_mep_model::model_cpsrli3_b_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPSRLI3_H_C3, & mepcop1_32_mep_model::model_cpsrli3_h_C3_before, & mepcop1_32_mep_model::model_cpsrli3_h_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPSRLI3_W_C3, & mepcop1_32_mep_model::model_cpsrli3_w_C3_before, & mepcop1_32_mep_model::model_cpsrli3_w_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CDSRLI3_C3, & mepcop1_32_mep_model::model_cdsrli3_C3_before, & mepcop1_32_mep_model::model_cdsrli3_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPSRAI3_B_C3, & mepcop1_32_mep_model::model_cpsrai3_b_C3_before, & mepcop1_32_mep_model::model_cpsrai3_b_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPSRAI3_H_C3, & mepcop1_32_mep_model::model_cpsrai3_h_C3_before, & mepcop1_32_mep_model::model_cpsrai3_h_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPSRAI3_W_C3, & mepcop1_32_mep_model::model_cpsrai3_w_C3_before, & mepcop1_32_mep_model::model_cpsrai3_w_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CDSRAI3_C3, & mepcop1_32_mep_model::model_cdsrai3_C3_before, & mepcop1_32_mep_model::model_cdsrai3_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPSLLI3_B_C3, & mepcop1_32_mep_model::model_cpslli3_b_C3_before, & mepcop1_32_mep_model::model_cpslli3_b_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPSLLI3_H_C3, & mepcop1_32_mep_model::model_cpslli3_h_C3_before, & mepcop1_32_mep_model::model_cpslli3_h_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPSLLI3_W_C3, & mepcop1_32_mep_model::model_cpslli3_w_C3_before, & mepcop1_32_mep_model::model_cpslli3_w_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CDSLLI3_C3, & mepcop1_32_mep_model::model_cdslli3_C3_before, & mepcop1_32_mep_model::model_cdslli3_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPSLAI3_H_C3, & mepcop1_32_mep_model::model_cpslai3_h_C3_before, & mepcop1_32_mep_model::model_cpslai3_h_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPSLAI3_W_C3, & mepcop1_32_mep_model::model_cpslai3_w_C3_before, & mepcop1_32_mep_model::model_cpslai3_w_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPCLIPIU3_W_C3, & mepcop1_32_mep_model::model_cpclipiu3_w_C3_before, & mepcop1_32_mep_model::model_cpclipiu3_w_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPCLIPI3_W_C3, & mepcop1_32_mep_model::model_cpclipi3_w_C3_before, & mepcop1_32_mep_model::model_cpclipi3_w_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CDCLIPIU3_C3, & mepcop1_32_mep_model::model_cdclipiu3_C3_before, & mepcop1_32_mep_model::model_cdclipiu3_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CDCLIPI3_C3, & mepcop1_32_mep_model::model_cdclipi3_C3_before, & mepcop1_32_mep_model::model_cdclipi3_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPMOVI_B_C3, & mepcop1_32_mep_model::model_cpmovi_b_C3_before, & mepcop1_32_mep_model::model_cpmovi_b_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPMOVIU_H_C3, & mepcop1_32_mep_model::model_cpmoviu_h_C3_before, & mepcop1_32_mep_model::model_cpmoviu_h_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPMOVI_H_C3, & mepcop1_32_mep_model::model_cpmovi_h_C3_before, & mepcop1_32_mep_model::model_cpmovi_h_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPMOVIU_W_C3, & mepcop1_32_mep_model::model_cpmoviu_w_C3_before, & mepcop1_32_mep_model::model_cpmoviu_w_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPMOVI_W_C3, & mepcop1_32_mep_model::model_cpmovi_w_C3_before, & mepcop1_32_mep_model::model_cpmovi_w_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CDMOVIU_C3, & mepcop1_32_mep_model::model_cdmoviu_C3_before, & mepcop1_32_mep_model::model_cdmoviu_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CDMOVI_C3, & mepcop1_32_mep_model::model_cdmovi_C3_before, & mepcop1_32_mep_model::model_cdmovi_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPADDA1U_B_C3, & mepcop1_32_mep_model::model_cpadda1u_b_C3_before, & mepcop1_32_mep_model::model_cpadda1u_b_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPADDA1_B_C3, & mepcop1_32_mep_model::model_cpadda1_b_C3_before, & mepcop1_32_mep_model::model_cpadda1_b_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPADDUA1_H_C3, & mepcop1_32_mep_model::model_cpaddua1_h_C3_before, & mepcop1_32_mep_model::model_cpaddua1_h_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPADDLA1_H_C3, & mepcop1_32_mep_model::model_cpaddla1_h_C3_before, & mepcop1_32_mep_model::model_cpaddla1_h_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPADDACA1U_B_C3, & mepcop1_32_mep_model::model_cpaddaca1u_b_C3_before, & mepcop1_32_mep_model::model_cpaddaca1u_b_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPADDACA1_B_C3, & mepcop1_32_mep_model::model_cpaddaca1_b_C3_before, & mepcop1_32_mep_model::model_cpaddaca1_b_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPADDACUA1_H_C3, & mepcop1_32_mep_model::model_cpaddacua1_h_C3_before, & mepcop1_32_mep_model::model_cpaddacua1_h_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPADDACLA1_H_C3, & mepcop1_32_mep_model::model_cpaddacla1_h_C3_before, & mepcop1_32_mep_model::model_cpaddacla1_h_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPSUBA1U_B_C3, & mepcop1_32_mep_model::model_cpsuba1u_b_C3_before, & mepcop1_32_mep_model::model_cpsuba1u_b_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPSUBA1_B_C3, & mepcop1_32_mep_model::model_cpsuba1_b_C3_before, & mepcop1_32_mep_model::model_cpsuba1_b_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPSUBUA1_H_C3, & mepcop1_32_mep_model::model_cpsubua1_h_C3_before, & mepcop1_32_mep_model::model_cpsubua1_h_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPSUBLA1_H_C3, & mepcop1_32_mep_model::model_cpsubla1_h_C3_before, & mepcop1_32_mep_model::model_cpsubla1_h_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPSUBACA1U_B_C3, & mepcop1_32_mep_model::model_cpsubaca1u_b_C3_before, & mepcop1_32_mep_model::model_cpsubaca1u_b_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPSUBACA1_B_C3, & mepcop1_32_mep_model::model_cpsubaca1_b_C3_before, & mepcop1_32_mep_model::model_cpsubaca1_b_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPSUBACUA1_H_C3, & mepcop1_32_mep_model::model_cpsubacua1_h_C3_before, & mepcop1_32_mep_model::model_cpsubacua1_h_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPSUBACLA1_H_C3, & mepcop1_32_mep_model::model_cpsubacla1_h_C3_before, & mepcop1_32_mep_model::model_cpsubacla1_h_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPABSA1U_B_C3, & mepcop1_32_mep_model::model_cpabsa1u_b_C3_before, & mepcop1_32_mep_model::model_cpabsa1u_b_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPABSA1_B_C3, & mepcop1_32_mep_model::model_cpabsa1_b_C3_before, & mepcop1_32_mep_model::model_cpabsa1_b_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPABSUA1_H_C3, & mepcop1_32_mep_model::model_cpabsua1_h_C3_before, & mepcop1_32_mep_model::model_cpabsua1_h_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPABSLA1_H_C3, & mepcop1_32_mep_model::model_cpabsla1_h_C3_before, & mepcop1_32_mep_model::model_cpabsla1_h_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPSADA1U_B_C3, & mepcop1_32_mep_model::model_cpsada1u_b_C3_before, & mepcop1_32_mep_model::model_cpsada1u_b_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPSADA1_B_C3, & mepcop1_32_mep_model::model_cpsada1_b_C3_before, & mepcop1_32_mep_model::model_cpsada1_b_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPSADUA1_H_C3, & mepcop1_32_mep_model::model_cpsadua1_h_C3_before, & mepcop1_32_mep_model::model_cpsadua1_h_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPSADLA1_H_C3, & mepcop1_32_mep_model::model_cpsadla1_h_C3_before, & mepcop1_32_mep_model::model_cpsadla1_h_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPSETA1_H_C3, & mepcop1_32_mep_model::model_cpseta1_h_C3_before, & mepcop1_32_mep_model::model_cpseta1_h_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPSETUA1_W_C3, & mepcop1_32_mep_model::model_cpsetua1_w_C3_before, & mepcop1_32_mep_model::model_cpsetua1_w_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPSETLA1_W_C3, & mepcop1_32_mep_model::model_cpsetla1_w_C3_before, & mepcop1_32_mep_model::model_cpsetla1_w_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPMOVA1_B_C3, & mepcop1_32_mep_model::model_cpmova1_b_C3_before, & mepcop1_32_mep_model::model_cpmova1_b_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPMOVUA1_H_C3, & mepcop1_32_mep_model::model_cpmovua1_h_C3_before, & mepcop1_32_mep_model::model_cpmovua1_h_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPMOVLA1_H_C3, & mepcop1_32_mep_model::model_cpmovla1_h_C3_before, & mepcop1_32_mep_model::model_cpmovla1_h_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPMOVUUA1_W_C3, & mepcop1_32_mep_model::model_cpmovuua1_w_C3_before, & mepcop1_32_mep_model::model_cpmovuua1_w_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPMOVULA1_W_C3, & mepcop1_32_mep_model::model_cpmovula1_w_C3_before, & mepcop1_32_mep_model::model_cpmovula1_w_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPMOVLUA1_W_C3, & mepcop1_32_mep_model::model_cpmovlua1_w_C3_before, & mepcop1_32_mep_model::model_cpmovlua1_w_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPMOVLLA1_W_C3, & mepcop1_32_mep_model::model_cpmovlla1_w_C3_before, & mepcop1_32_mep_model::model_cpmovlla1_w_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPPACKA1U_B_C3, & mepcop1_32_mep_model::model_cppacka1u_b_C3_before, & mepcop1_32_mep_model::model_cppacka1u_b_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPPACKA1_B_C3, & mepcop1_32_mep_model::model_cppacka1_b_C3_before, & mepcop1_32_mep_model::model_cppacka1_b_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPPACKUA1_H_C3, & mepcop1_32_mep_model::model_cppackua1_h_C3_before, & mepcop1_32_mep_model::model_cppackua1_h_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPPACKLA1_H_C3, & mepcop1_32_mep_model::model_cppackla1_h_C3_before, & mepcop1_32_mep_model::model_cppackla1_h_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPPACKUA1_W_C3, & mepcop1_32_mep_model::model_cppackua1_w_C3_before, & mepcop1_32_mep_model::model_cppackua1_w_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPPACKLA1_W_C3, & mepcop1_32_mep_model::model_cppackla1_w_C3_before, & mepcop1_32_mep_model::model_cppackla1_w_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPMOVHUA1_W_C3, & mepcop1_32_mep_model::model_cpmovhua1_w_C3_before, & mepcop1_32_mep_model::model_cpmovhua1_w_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPMOVHLA1_W_C3, & mepcop1_32_mep_model::model_cpmovhla1_w_C3_before, & mepcop1_32_mep_model::model_cpmovhla1_w_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPSRLA1_C3, & mepcop1_32_mep_model::model_cpsrla1_C3_before, & mepcop1_32_mep_model::model_cpsrla1_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPSRAA1_C3, & mepcop1_32_mep_model::model_cpsraa1_C3_before, & mepcop1_32_mep_model::model_cpsraa1_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPSLLA1_C3, & mepcop1_32_mep_model::model_cpslla1_C3_before, & mepcop1_32_mep_model::model_cpslla1_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPSRLIA1_P1, & mepcop1_32_mep_model::model_cpsrlia1_P1_before, & mepcop1_32_mep_model::model_cpsrlia1_P1_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPSRAIA1_P1, & mepcop1_32_mep_model::model_cpsraia1_P1_before, & mepcop1_32_mep_model::model_cpsraia1_P1_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPSLLIA1_P1, & mepcop1_32_mep_model::model_cpsllia1_P1_before, & mepcop1_32_mep_model::model_cpsllia1_P1_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPSSQA1U_B_C3, & mepcop1_32_mep_model::model_cpssqa1u_b_C3_before, & mepcop1_32_mep_model::model_cpssqa1u_b_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPSSQA1_B_C3, & mepcop1_32_mep_model::model_cpssqa1_b_C3_before, & mepcop1_32_mep_model::model_cpssqa1_b_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPSSDA1U_B_C3, & mepcop1_32_mep_model::model_cpssda1u_b_C3_before, & mepcop1_32_mep_model::model_cpssda1u_b_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPSSDA1_B_C3, & mepcop1_32_mep_model::model_cpssda1_b_C3_before, & mepcop1_32_mep_model::model_cpssda1_b_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPMULA1U_B_C3, & mepcop1_32_mep_model::model_cpmula1u_b_C3_before, & mepcop1_32_mep_model::model_cpmula1u_b_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPMULA1_B_C3, & mepcop1_32_mep_model::model_cpmula1_b_C3_before, & mepcop1_32_mep_model::model_cpmula1_b_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPMULUA1_H_C3, & mepcop1_32_mep_model::model_cpmulua1_h_C3_before, & mepcop1_32_mep_model::model_cpmulua1_h_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPMULLA1_H_C3, & mepcop1_32_mep_model::model_cpmulla1_h_C3_before, & mepcop1_32_mep_model::model_cpmulla1_h_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPMULUA1U_W_C3, & mepcop1_32_mep_model::model_cpmulua1u_w_C3_before, & mepcop1_32_mep_model::model_cpmulua1u_w_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPMULLA1U_W_C3, & mepcop1_32_mep_model::model_cpmulla1u_w_C3_before, & mepcop1_32_mep_model::model_cpmulla1u_w_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPMULUA1_W_C3, & mepcop1_32_mep_model::model_cpmulua1_w_C3_before, & mepcop1_32_mep_model::model_cpmulua1_w_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPMULLA1_W_C3, & mepcop1_32_mep_model::model_cpmulla1_w_C3_before, & mepcop1_32_mep_model::model_cpmulla1_w_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPMADA1U_B_C3, & mepcop1_32_mep_model::model_cpmada1u_b_C3_before, & mepcop1_32_mep_model::model_cpmada1u_b_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPMADA1_B_C3, & mepcop1_32_mep_model::model_cpmada1_b_C3_before, & mepcop1_32_mep_model::model_cpmada1_b_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPMADUA1_H_C3, & mepcop1_32_mep_model::model_cpmadua1_h_C3_before, & mepcop1_32_mep_model::model_cpmadua1_h_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPMADLA1_H_C3, & mepcop1_32_mep_model::model_cpmadla1_h_C3_before, & mepcop1_32_mep_model::model_cpmadla1_h_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPMADUA1U_W_C3, & mepcop1_32_mep_model::model_cpmadua1u_w_C3_before, & mepcop1_32_mep_model::model_cpmadua1u_w_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPMADLA1U_W_C3, & mepcop1_32_mep_model::model_cpmadla1u_w_C3_before, & mepcop1_32_mep_model::model_cpmadla1u_w_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPMADUA1_W_C3, & mepcop1_32_mep_model::model_cpmadua1_w_C3_before, & mepcop1_32_mep_model::model_cpmadua1_w_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPMADLA1_W_C3, & mepcop1_32_mep_model::model_cpmadla1_w_C3_before, & mepcop1_32_mep_model::model_cpmadla1_w_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPMSBUA1_H_C3, & mepcop1_32_mep_model::model_cpmsbua1_h_C3_before, & mepcop1_32_mep_model::model_cpmsbua1_h_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPMSBLA1_H_C3, & mepcop1_32_mep_model::model_cpmsbla1_h_C3_before, & mepcop1_32_mep_model::model_cpmsbla1_h_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPMSBUA1U_W_C3, & mepcop1_32_mep_model::model_cpmsbua1u_w_C3_before, & mepcop1_32_mep_model::model_cpmsbua1u_w_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPMSBLA1U_W_C3, & mepcop1_32_mep_model::model_cpmsbla1u_w_C3_before, & mepcop1_32_mep_model::model_cpmsbla1u_w_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPMSBUA1_W_C3, & mepcop1_32_mep_model::model_cpmsbua1_w_C3_before, & mepcop1_32_mep_model::model_cpmsbua1_w_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPMSBLA1_W_C3, & mepcop1_32_mep_model::model_cpmsbla1_w_C3_before, & mepcop1_32_mep_model::model_cpmsbla1_w_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPSMADUA1_H_C3, & mepcop1_32_mep_model::model_cpsmadua1_h_C3_before, & mepcop1_32_mep_model::model_cpsmadua1_h_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPSMADLA1_H_C3, & mepcop1_32_mep_model::model_cpsmadla1_h_C3_before, & mepcop1_32_mep_model::model_cpsmadla1_h_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPSMADUA1_W_C3, & mepcop1_32_mep_model::model_cpsmadua1_w_C3_before, & mepcop1_32_mep_model::model_cpsmadua1_w_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPSMADLA1_W_C3, & mepcop1_32_mep_model::model_cpsmadla1_w_C3_before, & mepcop1_32_mep_model::model_cpsmadla1_w_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPSMSBUA1_H_C3, & mepcop1_32_mep_model::model_cpsmsbua1_h_C3_before, & mepcop1_32_mep_model::model_cpsmsbua1_h_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPSMSBLA1_H_C3, & mepcop1_32_mep_model::model_cpsmsbla1_h_C3_before, & mepcop1_32_mep_model::model_cpsmsbla1_h_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPSMSBUA1_W_C3, & mepcop1_32_mep_model::model_cpsmsbua1_w_C3_before, & mepcop1_32_mep_model::model_cpsmsbua1_w_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPSMSBLA1_W_C3, & mepcop1_32_mep_model::model_cpsmsbla1_w_C3_before, & mepcop1_32_mep_model::model_cpsmsbla1_w_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPMULSLUA1_H_C3, & mepcop1_32_mep_model::model_cpmulslua1_h_C3_before, & mepcop1_32_mep_model::model_cpmulslua1_h_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPMULSLLA1_H_C3, & mepcop1_32_mep_model::model_cpmulslla1_h_C3_before, & mepcop1_32_mep_model::model_cpmulslla1_h_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPMULSLUA1_W_C3, & mepcop1_32_mep_model::model_cpmulslua1_w_C3_before, & mepcop1_32_mep_model::model_cpmulslua1_w_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPMULSLLA1_W_C3, & mepcop1_32_mep_model::model_cpmulslla1_w_C3_before, & mepcop1_32_mep_model::model_cpmulslla1_w_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPSMADSLUA1_H_C3, & mepcop1_32_mep_model::model_cpsmadslua1_h_C3_before, & mepcop1_32_mep_model::model_cpsmadslua1_h_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPSMADSLLA1_H_C3, & mepcop1_32_mep_model::model_cpsmadslla1_h_C3_before, & mepcop1_32_mep_model::model_cpsmadslla1_h_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPSMADSLUA1_W_C3, & mepcop1_32_mep_model::model_cpsmadslua1_w_C3_before, & mepcop1_32_mep_model::model_cpsmadslua1_w_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPSMADSLLA1_W_C3, & mepcop1_32_mep_model::model_cpsmadslla1_w_C3_before, & mepcop1_32_mep_model::model_cpsmadslla1_w_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPSMSBSLUA1_H_C3, & mepcop1_32_mep_model::model_cpsmsbslua1_h_C3_before, & mepcop1_32_mep_model::model_cpsmsbslua1_h_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPSMSBSLLA1_H_C3, & mepcop1_32_mep_model::model_cpsmsbslla1_h_C3_before, & mepcop1_32_mep_model::model_cpsmsbslla1_h_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPSMSBSLUA1_W_C3, & mepcop1_32_mep_model::model_cpsmsbslua1_w_C3_before, & mepcop1_32_mep_model::model_cpsmsbslua1_w_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_32_INSN_CPSMSBSLLA1_W_C3, & mepcop1_32_mep_model::model_cpsmsbslla1_w_C3_before, & mepcop1_32_mep_model::model_cpsmsbslla1_w_C3_after, { { mepcop1_32_mep_model::UNIT_U_EXEC, 1, 1 } } }, +}; + diff --git a/sid/component/cgen-cpu/mep/mep-cop1-32-model.h b/sid/component/cgen-cpu/mep/mep-cop1-32-model.h new file mode 100644 index 0000000000..4cadac4d9d --- /dev/null +++ b/sid/component/cgen-cpu/mep/mep-cop1-32-model.h @@ -0,0 +1,758 @@ +/* Simulator model support for mepcop1_32. + +THIS FILE IS MACHINE GENERATED WITH CGEN. + +Copyright (C) 2000-2007 Red Hat, Inc. + +This file is part of the Red Hat simulators. + + +*/ + +#ifndef MEPCOP1_32_MODEL_H +#define MEPCOP1_32_MODEL_H + +#include "cgen-cpu.h" +#include "cgen-model.h" + +namespace mep_ext1 +{ +using namespace cgen; + +class mepcop1_32_mep_model : public cgen_model +{ +public: + mepcop1_32_mep_model (mep_ext1_cpu *cpu); + + // Call the proper unit modelling function for the given insn. + UINT model_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache* sem) + { + return (this->*(timing[sem->idesc->sem_index].model_before)) (current_cpu, sem); + } + UINT model_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache* sem) + { + return (this->*(timing[sem->idesc->sem_index].model_after)) (current_cpu, sem); + } + +// Function unit handlers +// To be overridden as needed. + virtual UINT model_u_store_ctrl_reg_before (mep_ext1_cpu *cpu, const struct mepcop1_32_idesc *idesc, int unit_num, INT /*storereg*/) + { + return 0; + } + virtual UINT model_u_store_ctrl_reg_after (mep_ext1_cpu *cpu, const struct mepcop1_32_idesc *idesc, int unit_num, unsigned long long referenced, INT /*storereg*/) + { + return timing[idesc->sem_index].units[unit_num].done; + } + virtual UINT model_u_use_ctrl_reg_before (mep_ext1_cpu *cpu, const struct mepcop1_32_idesc *idesc, int unit_num, INT /*usereg*/) + { + return 0; + } + virtual UINT model_u_use_ctrl_reg_after (mep_ext1_cpu *cpu, const struct mepcop1_32_idesc *idesc, int unit_num, unsigned long long referenced, INT /*usereg*/) + { + return timing[idesc->sem_index].units[unit_num].done; + } + virtual UINT model_u_use_gpr_before (mep_ext1_cpu *cpu, const struct mepcop1_32_idesc *idesc, int unit_num, INT /*usereg*/) + { + return 0; + } + virtual UINT model_u_use_gpr_after (mep_ext1_cpu *cpu, const struct mepcop1_32_idesc *idesc, int unit_num, unsigned long long referenced, INT /*usereg*/) + { + return timing[idesc->sem_index].units[unit_num].done; + } + virtual UINT model_u_mul_gpr_before (mep_ext1_cpu *cpu, const struct mepcop1_32_idesc *idesc, int unit_num, INT /*resultreg*/) + { + return 0; + } + virtual UINT model_u_mul_gpr_after (mep_ext1_cpu *cpu, const struct mepcop1_32_idesc *idesc, int unit_num, unsigned long long referenced, INT /*resultreg*/) + { + return timing[idesc->sem_index].units[unit_num].done; + } + virtual UINT model_u_ldcb_gpr_before (mep_ext1_cpu *cpu, const struct mepcop1_32_idesc *idesc, int unit_num, INT /*loadreg*/) + { + return 0; + } + virtual UINT model_u_ldcb_gpr_after (mep_ext1_cpu *cpu, const struct mepcop1_32_idesc *idesc, int unit_num, unsigned long long referenced, INT /*loadreg*/) + { + return timing[idesc->sem_index].units[unit_num].done; + } + virtual UINT model_u_load_gpr_before (mep_ext1_cpu *cpu, const struct mepcop1_32_idesc *idesc, int unit_num, INT /*loadreg*/) + { + return 0; + } + virtual UINT model_u_load_gpr_after (mep_ext1_cpu *cpu, const struct mepcop1_32_idesc *idesc, int unit_num, unsigned long long referenced, INT /*loadreg*/) + { + return timing[idesc->sem_index].units[unit_num].done; + } + virtual UINT model_u_ldcb_before (mep_ext1_cpu *cpu, const struct mepcop1_32_idesc *idesc, int unit_num) + { + return 0; + } + virtual UINT model_u_ldcb_after (mep_ext1_cpu *cpu, const struct mepcop1_32_idesc *idesc, int unit_num, unsigned long long referenced) + { + return timing[idesc->sem_index].units[unit_num].done; + } + virtual UINT model_u_stcb_before (mep_ext1_cpu *cpu, const struct mepcop1_32_idesc *idesc, int unit_num) + { + return 0; + } + virtual UINT model_u_stcb_after (mep_ext1_cpu *cpu, const struct mepcop1_32_idesc *idesc, int unit_num, unsigned long long referenced) + { + return timing[idesc->sem_index].units[unit_num].done; + } + virtual UINT model_u_divide_before (mep_ext1_cpu *cpu, const struct mepcop1_32_idesc *idesc, int unit_num) + { + return 0; + } + virtual UINT model_u_divide_after (mep_ext1_cpu *cpu, const struct mepcop1_32_idesc *idesc, int unit_num, unsigned long long referenced) + { + return timing[idesc->sem_index].units[unit_num].done; + } + virtual UINT model_u_multiply_before (mep_ext1_cpu *cpu, const struct mepcop1_32_idesc *idesc, int unit_num) + { + return 0; + } + virtual UINT model_u_multiply_after (mep_ext1_cpu *cpu, const struct mepcop1_32_idesc *idesc, int unit_num, unsigned long long referenced) + { + return timing[idesc->sem_index].units[unit_num].done; + } + virtual UINT model_u_branch_before (mep_ext1_cpu *cpu, const struct mepcop1_32_idesc *idesc, int unit_num) + { + return 0; + } + virtual UINT model_u_branch_after (mep_ext1_cpu *cpu, const struct mepcop1_32_idesc *idesc, int unit_num, unsigned long long referenced) + { + return timing[idesc->sem_index].units[unit_num].done; + } + virtual UINT model_u_exec_before (mep_ext1_cpu *cpu, const struct mepcop1_32_idesc *idesc, int unit_num) + { + return 0; + } + virtual UINT model_u_exec_after (mep_ext1_cpu *cpu, const struct mepcop1_32_idesc *idesc, int unit_num, unsigned long long referenced) + { + return timing[idesc->sem_index].units[unit_num].done; + } + +protected: + // These methods call the appropriate unit modeller(s) for each insn. + UINT model_cmov_crn_rm_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cmov_crn_rm_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cmov_rn_crm_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cmov_rn_crm_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cmovc_ccrn_rm_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cmovc_ccrn_rm_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cmovc_rn_ccrm_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cmovc_rn_ccrm_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cmovh_crn_rm_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cmovh_crn_rm_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cmovh_rn_crm_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cmovh_rn_crm_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpadd3_b_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpadd3_b_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpadd3_h_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpadd3_h_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpadd3_w_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpadd3_w_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cdadd3_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cdadd3_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpsub3_b_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpsub3_b_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpsub3_h_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpsub3_h_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpsub3_w_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpsub3_w_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cdsub3_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cdsub3_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpand3_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpand3_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpor3_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpor3_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpnor3_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpnor3_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpxor3_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpxor3_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpsel_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpsel_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpfsftbi_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpfsftbi_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpfsftbs0_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpfsftbs0_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpfsftbs1_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpfsftbs1_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpunpacku_b_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpunpacku_b_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpunpacku_h_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpunpacku_h_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpunpacku_w_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpunpacku_w_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpunpackl_b_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpunpackl_b_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpunpackl_h_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpunpackl_h_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpunpackl_w_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpunpackl_w_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cppacku_b_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cppacku_b_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cppack_b_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cppack_b_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cppack_h_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cppack_h_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpsrl3_b_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpsrl3_b_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpssrl3_b_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpssrl3_b_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpsrl3_h_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpsrl3_h_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpssrl3_h_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpssrl3_h_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpsrl3_w_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpsrl3_w_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpssrl3_w_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpssrl3_w_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cdsrl3_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cdsrl3_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpsra3_b_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpsra3_b_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpssra3_b_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpssra3_b_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpsra3_h_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpsra3_h_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpssra3_h_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpssra3_h_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpsra3_w_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpsra3_w_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpssra3_w_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpssra3_w_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cdsra3_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cdsra3_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpsll3_b_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpsll3_b_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpssll3_b_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpssll3_b_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpsll3_h_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpsll3_h_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpssll3_h_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpssll3_h_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpsll3_w_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpsll3_w_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpssll3_w_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpssll3_w_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cdsll3_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cdsll3_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpsla3_h_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpsla3_h_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpsla3_w_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpsla3_w_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpsadd3_h_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpsadd3_h_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpsadd3_w_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpsadd3_w_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpssub3_h_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpssub3_h_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpssub3_w_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpssub3_w_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpextuaddu3_b_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpextuaddu3_b_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpextuadd3_b_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpextuadd3_b_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpextladdu3_b_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpextladdu3_b_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpextladd3_b_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpextladd3_b_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpextusubu3_b_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpextusubu3_b_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpextusub3_b_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpextusub3_b_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpextlsubu3_b_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpextlsubu3_b_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpextlsub3_b_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpextlsub3_b_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpaveu3_b_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpaveu3_b_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpave3_b_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpave3_b_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpave3_h_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpave3_h_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpave3_w_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpave3_w_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpaddsru3_b_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpaddsru3_b_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpaddsr3_b_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpaddsr3_b_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpaddsr3_h_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpaddsr3_h_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpaddsr3_w_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpaddsr3_w_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpabsu3_b_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpabsu3_b_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpabs3_b_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpabs3_b_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpabs3_h_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpabs3_h_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpmaxu3_b_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpmaxu3_b_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpmax3_b_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpmax3_b_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpmax3_h_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpmax3_h_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpmaxu3_w_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpmaxu3_w_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpmax3_w_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpmax3_w_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpminu3_b_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpminu3_b_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpmin3_b_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpmin3_b_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpmin3_h_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpmin3_h_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpminu3_w_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpminu3_w_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpmin3_w_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpmin3_w_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpmovfrcsar0_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpmovfrcsar0_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpmovfrcsar1_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpmovfrcsar1_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpmovfrcc_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpmovfrcc_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpmovtocsar0_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpmovtocsar0_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpmovtocsar1_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpmovtocsar1_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpmovtocc_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpmovtocc_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpmov_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpmov_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpabsz_b_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpabsz_b_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpabsz_h_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpabsz_h_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpabsz_w_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpabsz_w_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpldz_h_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpldz_h_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpldz_w_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpldz_w_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpnorm_h_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpnorm_h_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpnorm_w_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpnorm_w_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cphaddu_b_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cphaddu_b_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cphadd_b_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cphadd_b_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cphadd_h_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cphadd_h_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cphadd_w_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cphadd_w_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpccadd_b_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpccadd_b_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpbcast_b_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpbcast_b_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpbcast_h_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpbcast_h_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpbcast_w_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpbcast_w_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpextuu_b_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpextuu_b_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpextu_b_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpextu_b_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpextuu_h_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpextuu_h_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpextu_h_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpextu_h_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpextlu_b_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpextlu_b_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpextl_b_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpextl_b_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpextlu_h_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpextlu_h_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpextl_h_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpextl_h_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpcastub_h_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpcastub_h_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpcastb_h_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpcastb_h_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpcastub_w_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpcastub_w_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpcastb_w_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpcastb_w_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpcastuh_w_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpcastuh_w_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpcasth_w_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpcasth_w_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cdcastuw_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cdcastuw_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cdcastw_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cdcastw_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpcmpeqz_b_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpcmpeqz_b_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpcmpeq_b_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpcmpeq_b_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpcmpeq_h_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpcmpeq_h_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpcmpeq_w_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpcmpeq_w_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpcmpne_b_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpcmpne_b_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpcmpne_h_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpcmpne_h_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpcmpne_w_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpcmpne_w_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpcmpgtu_b_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpcmpgtu_b_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpcmpgt_b_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpcmpgt_b_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpcmpgt_h_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpcmpgt_h_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpcmpgtu_w_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpcmpgtu_w_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpcmpgt_w_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpcmpgt_w_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpcmpgeu_b_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpcmpgeu_b_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpcmpge_b_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpcmpge_b_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpcmpge_h_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpcmpge_h_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpcmpgeu_w_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpcmpgeu_w_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpcmpge_w_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpcmpge_w_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpacmpeq_b_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpacmpeq_b_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpacmpeq_h_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpacmpeq_h_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpacmpeq_w_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpacmpeq_w_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpacmpne_b_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpacmpne_b_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpacmpne_h_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpacmpne_h_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpacmpne_w_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpacmpne_w_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpacmpgtu_b_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpacmpgtu_b_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpacmpgt_b_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpacmpgt_b_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpacmpgt_h_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpacmpgt_h_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpacmpgtu_w_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpacmpgtu_w_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpacmpgt_w_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpacmpgt_w_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpacmpgeu_b_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpacmpgeu_b_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpacmpge_b_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpacmpge_b_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpacmpge_h_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpacmpge_h_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpacmpgeu_w_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpacmpgeu_w_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpacmpge_w_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpacmpge_w_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpocmpeq_b_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpocmpeq_b_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpocmpeq_h_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpocmpeq_h_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpocmpeq_w_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpocmpeq_w_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpocmpne_b_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpocmpne_b_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpocmpne_h_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpocmpne_h_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpocmpne_w_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpocmpne_w_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpocmpgtu_b_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpocmpgtu_b_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpocmpgt_b_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpocmpgt_b_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpocmpgt_h_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpocmpgt_h_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpocmpgtu_w_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpocmpgtu_w_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpocmpgt_w_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpocmpgt_w_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpocmpgeu_b_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpocmpgeu_b_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpocmpge_b_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpocmpge_b_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpocmpge_h_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpocmpge_h_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpocmpgeu_w_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpocmpgeu_w_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpocmpge_w_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpocmpge_w_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpsrli3_b_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpsrli3_b_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpsrli3_h_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpsrli3_h_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpsrli3_w_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpsrli3_w_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cdsrli3_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cdsrli3_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpsrai3_b_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpsrai3_b_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpsrai3_h_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpsrai3_h_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpsrai3_w_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpsrai3_w_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cdsrai3_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cdsrai3_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpslli3_b_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpslli3_b_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpslli3_h_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpslli3_h_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpslli3_w_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpslli3_w_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cdslli3_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cdslli3_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpslai3_h_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpslai3_h_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpslai3_w_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpslai3_w_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpclipiu3_w_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpclipiu3_w_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpclipi3_w_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpclipi3_w_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cdclipiu3_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cdclipiu3_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cdclipi3_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cdclipi3_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpmovi_b_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpmovi_b_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpmoviu_h_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpmoviu_h_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpmovi_h_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpmovi_h_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpmoviu_w_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpmoviu_w_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpmovi_w_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpmovi_w_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cdmoviu_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cdmoviu_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cdmovi_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cdmovi_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpadda1u_b_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpadda1u_b_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpadda1_b_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpadda1_b_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpaddua1_h_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpaddua1_h_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpaddla1_h_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpaddla1_h_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpaddaca1u_b_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpaddaca1u_b_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpaddaca1_b_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpaddaca1_b_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpaddacua1_h_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpaddacua1_h_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpaddacla1_h_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpaddacla1_h_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpsuba1u_b_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpsuba1u_b_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpsuba1_b_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpsuba1_b_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpsubua1_h_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpsubua1_h_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpsubla1_h_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpsubla1_h_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpsubaca1u_b_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpsubaca1u_b_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpsubaca1_b_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpsubaca1_b_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpsubacua1_h_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpsubacua1_h_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpsubacla1_h_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpsubacla1_h_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpabsa1u_b_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpabsa1u_b_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpabsa1_b_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpabsa1_b_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpabsua1_h_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpabsua1_h_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpabsla1_h_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpabsla1_h_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpsada1u_b_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpsada1u_b_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpsada1_b_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpsada1_b_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpsadua1_h_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpsadua1_h_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpsadla1_h_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpsadla1_h_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpseta1_h_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpseta1_h_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpsetua1_w_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpsetua1_w_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpsetla1_w_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpsetla1_w_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpmova1_b_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpmova1_b_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpmovua1_h_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpmovua1_h_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpmovla1_h_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpmovla1_h_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpmovuua1_w_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpmovuua1_w_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpmovula1_w_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpmovula1_w_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpmovlua1_w_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpmovlua1_w_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpmovlla1_w_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpmovlla1_w_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cppacka1u_b_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cppacka1u_b_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cppacka1_b_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cppacka1_b_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cppackua1_h_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cppackua1_h_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cppackla1_h_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cppackla1_h_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cppackua1_w_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cppackua1_w_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cppackla1_w_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cppackla1_w_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpmovhua1_w_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpmovhua1_w_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpmovhla1_w_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpmovhla1_w_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpsrla1_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpsrla1_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpsraa1_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpsraa1_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpslla1_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpslla1_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpsrlia1_P1_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpsrlia1_P1_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpsraia1_P1_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpsraia1_P1_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpsllia1_P1_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpsllia1_P1_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpssqa1u_b_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpssqa1u_b_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpssqa1_b_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpssqa1_b_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpssda1u_b_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpssda1u_b_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpssda1_b_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpssda1_b_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpmula1u_b_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpmula1u_b_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpmula1_b_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpmula1_b_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpmulua1_h_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpmulua1_h_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpmulla1_h_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpmulla1_h_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpmulua1u_w_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpmulua1u_w_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpmulla1u_w_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpmulla1u_w_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpmulua1_w_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpmulua1_w_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpmulla1_w_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpmulla1_w_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpmada1u_b_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpmada1u_b_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpmada1_b_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpmada1_b_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpmadua1_h_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpmadua1_h_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpmadla1_h_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpmadla1_h_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpmadua1u_w_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpmadua1u_w_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpmadla1u_w_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpmadla1u_w_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpmadua1_w_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpmadua1_w_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpmadla1_w_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpmadla1_w_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpmsbua1_h_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpmsbua1_h_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpmsbla1_h_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpmsbla1_h_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpmsbua1u_w_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpmsbua1u_w_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpmsbla1u_w_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpmsbla1u_w_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpmsbua1_w_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpmsbua1_w_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpmsbla1_w_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpmsbla1_w_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpsmadua1_h_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpsmadua1_h_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpsmadla1_h_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpsmadla1_h_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpsmadua1_w_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpsmadua1_w_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpsmadla1_w_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpsmadla1_w_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpsmsbua1_h_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpsmsbua1_h_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpsmsbla1_h_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpsmsbla1_h_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpsmsbua1_w_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpsmsbua1_w_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpsmsbla1_w_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpsmsbla1_w_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpmulslua1_h_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpmulslua1_h_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpmulslla1_h_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpmulslla1_h_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpmulslua1_w_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpmulslua1_w_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpmulslla1_w_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpmulslla1_w_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpsmadslua1_h_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpsmadslua1_h_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpsmadslla1_h_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpsmadslla1_h_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpsmadslua1_w_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpsmadslua1_w_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpsmadslla1_w_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpsmadslla1_w_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpsmsbslua1_h_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpsmsbslua1_h_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpsmsbslla1_h_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpsmsbslla1_h_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpsmsbslua1_w_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpsmsbslua1_w_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpsmsbslla1_w_C3_before (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + UINT model_cpsmsbslla1_w_C3_after (mep_ext1_cpu *current_cpu, mepcop1_32_scache *sem); + + /* Enum declaration for unit types. */ +typedef enum unit_number { + UNIT_NONE, UNIT_U_STORE_CTRL_REG, UNIT_U_USE_CTRL_REG, UNIT_U_USE_GPR + , UNIT_U_MUL_GPR, UNIT_U_LDCB_GPR, UNIT_U_LOAD_GPR, UNIT_U_LDCB + , UNIT_U_STCB, UNIT_U_DIVIDE, UNIT_U_MULTIPLY, UNIT_U_BRANCH + , UNIT_U_EXEC, UNIT_MAX +} UNIT_NUMBER; + + struct unit { + unit_number unit; + UINT issue; + UINT done; + }; + + static const int MAX_UNITS = 1; + + typedef UINT (mepcop1_32_mep_model::*model_function) (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem); + + struct insn_timing { + // This is an integer that identifies this insn. + UINT num; + // Functions to handle insn-specific profiling. + model_function model_before; + model_function model_after; + // Array of function units used by this insn. + unit units[MAX_UNITS]; + }; + + static const insn_timing timing[]; +}; + +} // namespace mep_ext1 + +#endif // MEPCOP1_32_MODEL_H diff --git a/sid/component/cgen-cpu/mep/mep-cop1-32-sem.cxx b/sid/component/cgen-cpu/mep/mep-cop1-32-sem.cxx new file mode 100644 index 0000000000..aa68c9f592 --- /dev/null +++ b/sid/component/cgen-cpu/mep/mep-cop1-32-sem.cxx @@ -0,0 +1,7277 @@ +/* Simulator instruction semantics for mepcop1_32. + +THIS FILE IS MACHINE GENERATED WITH CGEN. + +Copyright (C) 2000-2007 Red Hat, Inc. + +This file is part of the Red Hat simulators. + + +*/ + + +#if HAVE_CONFIG_H +#include "config.h" +#endif +#include "mep_ext1.h" + +using namespace mep_ext1; // FIXME: namespace organization still wip +#define GET_ATTR(name) GET_ATTR_##name () + + +// ********** x-invalid: --invalid-- + +sem_status +mepcop1_32_sem_x_invalid (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.fmt_empty.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 0; + + { + current_cpu->invalid_insn (pc); + assert (0); + /* NOTREACHED */ + } + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cmov-crn-rm: cmov $crnx64,$rm + +sem_status +mepcop1_32_sem_cmov_crn_rm (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cmov_crn_rm.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + + { + DI opval = ORDI (ZEXTSIDI (* FLD (i_rm)), ANDDI (current_cpu->hardware.h_cr64[FLD (f_crnx)], MAKEDI (0xffffffff, 0))); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_crnx) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_crnx), opval); + } + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cmov-rn-crm: cmov $rm,$crnx64 + +sem_status +mepcop1_32_sem_cmov_rn_crm (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cmov_rn_crm.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + + { + SI opval = current_cpu->hardware.h_cr64[FLD (f_crnx)]; + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "gpr" << '[' << FLD (f_rm) << ']' << ":=0x" << hex << opval << dec << " "; + * FLD (i_rm) = opval; + } + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cmovc-ccrn-rm: cmovc $ccrn,$rm + +sem_status +mepcop1_32_sem_cmovc_ccrn_rm (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cmovc_ccrn_rm.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + + { + SI opval = * FLD (i_rm); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "ccr" << '[' << FLD (f_ccrn) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_ccr_set (FLD (f_ccrn), opval); + } + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cmovc-rn-ccrm: cmovc $rm,$ccrn + +sem_status +mepcop1_32_sem_cmovc_rn_ccrm (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cmovc_rn_ccrm.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + + { + SI opval = current_cpu->hardware.h_ccr[FLD (f_ccrn)]; + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "gpr" << '[' << FLD (f_rm) << ']' << ":=0x" << hex << opval << dec << " "; + * FLD (i_rm) = opval; + } + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cmovh-crn-rm: cmovh $crnx64,$rm + +sem_status +mepcop1_32_sem_cmovh_crn_rm (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cmov_crn_rm.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + + { + DI opval = ORDI (SLLDI (ZEXTSIDI (* FLD (i_rm)), 32), ANDDI (current_cpu->hardware.h_cr64[FLD (f_crnx)], 0xffffffff)); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_crnx) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_crnx), opval); + } + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cmovh-rn-crm: cmovh $rm,$crnx64 + +sem_status +mepcop1_32_sem_cmovh_rn_crm (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cmov_rn_crm.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + + { + SI opval = SRLDI (current_cpu->hardware.h_cr64[FLD (f_crnx)], 32); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "gpr" << '[' << FLD (f_rm) << ']' << ":=0x" << hex << opval << dec << " "; + * FLD (i_rm) = opval; + } + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpadd3_b_C3: cpadd3.b $croc,$crqc,$crpc + +sem_status +mepcop1_32_sem_cpadd3_b_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpadd3_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u26)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u7) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u7), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpadd3_h_C3: cpadd3.h $croc,$crqc,$crpc + +sem_status +mepcop1_32_sem_cpadd3_h_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpadd3_h (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u26)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u7) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u7), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpadd3_w_C3: cpadd3.w $croc,$crqc,$crpc + +sem_status +mepcop1_32_sem_cpadd3_w_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpadd3_w (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u26)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u7) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u7), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cdadd3_C3: cdadd3 $croc,$crqc,$crpc + +sem_status +mepcop1_32_sem_cdadd3_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cdadd3 (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u26)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u7) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u7), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpsub3_b_C3: cpsub3.b $croc,$crqc,$crpc + +sem_status +mepcop1_32_sem_cpsub3_b_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpsub3_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u26)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u7) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u7), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpsub3_h_C3: cpsub3.h $croc,$crqc,$crpc + +sem_status +mepcop1_32_sem_cpsub3_h_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpsub3_h (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u26)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u7) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u7), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpsub3_w_C3: cpsub3.w $croc,$crqc,$crpc + +sem_status +mepcop1_32_sem_cpsub3_w_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpsub3_w (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u26)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u7) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u7), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cdsub3_C3: cdsub3 $croc,$crqc,$crpc + +sem_status +mepcop1_32_sem_cdsub3_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cdsub3 (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u26)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u7) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u7), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpand3_C3: cpand3 $croc,$crqc,$crpc + +sem_status +mepcop1_32_sem_cpand3_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpand3 (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u26)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u7) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u7), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpor3_C3: cpor3 $croc,$crqc,$crpc + +sem_status +mepcop1_32_sem_cpor3_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpor3 (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u26)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u7) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u7), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpnor3_C3: cpnor3 $croc,$crqc,$crpc + +sem_status +mepcop1_32_sem_cpnor3_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpnor3 (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u26)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u7) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u7), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpxor3_C3: cpxor3 $croc,$crqc,$crpc + +sem_status +mepcop1_32_sem_cpxor3_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpxor3 (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u26)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u7) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u7), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpsel_C3: cpsel $croc,$crqc,$crpc + +sem_status +mepcop1_32_sem_cpsel_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpsel (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u26)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u7) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u7), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpfsftbi_C3: cpfsftbi $croc,$crqc,$crpc,$imm3p4 + +sem_status +mepcop1_32_sem_cpfsftbi_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpfsftbi (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u26)], FLD (f_ivc2_3u4)); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u7) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u7), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpfsftbs0_C3: cpfsftbs0 $croc,$crqc,$crpc + +sem_status +mepcop1_32_sem_cpfsftbs0_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpfsftbs0 (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u26)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u7) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u7), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpfsftbs1_C3: cpfsftbs1 $croc,$crqc,$crpc + +sem_status +mepcop1_32_sem_cpfsftbs1_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpfsftbs1 (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u26)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u7) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u7), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpunpacku_b_C3: cpunpacku.b $croc,$crqc,$crpc + +sem_status +mepcop1_32_sem_cpunpacku_b_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpunpacku_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u26)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u7) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u7), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpunpacku_h_C3: cpunpacku.h $croc,$crqc,$crpc + +sem_status +mepcop1_32_sem_cpunpacku_h_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpunpacku_h (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u26)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u7) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u7), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpunpacku_w_C3: cpunpacku.w $croc,$crqc,$crpc + +sem_status +mepcop1_32_sem_cpunpacku_w_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpunpacku_w (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u26)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u7) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u7), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpunpackl_b_C3: cpunpackl.b $croc,$crqc,$crpc + +sem_status +mepcop1_32_sem_cpunpackl_b_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpunpackl_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u26)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u7) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u7), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpunpackl_h_C3: cpunpackl.h $croc,$crqc,$crpc + +sem_status +mepcop1_32_sem_cpunpackl_h_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpunpackl_h (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u26)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u7) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u7), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpunpackl_w_C3: cpunpackl.w $croc,$crqc,$crpc + +sem_status +mepcop1_32_sem_cpunpackl_w_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpunpackl_w (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u26)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u7) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u7), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cppacku_b_C3: cppacku.b $croc,$crqc,$crpc + +sem_status +mepcop1_32_sem_cppacku_b_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cppacku_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u26)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u7) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u7), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cppack_b_C3: cppack.b $croc,$crqc,$crpc + +sem_status +mepcop1_32_sem_cppack_b_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cppack_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u26)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u7) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u7), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cppack_h_C3: cppack.h $croc,$crqc,$crpc + +sem_status +mepcop1_32_sem_cppack_h_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cppack_h (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u26)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u7) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u7), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpsrl3_b_C3: cpsrl3.b $croc,$crqc,$crpc + +sem_status +mepcop1_32_sem_cpsrl3_b_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpsrl3_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u26)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u7) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u7), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpssrl3_b_C3: cpssrl3.b $croc,$crqc,$crpc + +sem_status +mepcop1_32_sem_cpssrl3_b_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpssrl3_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u26)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u7) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u7), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpsrl3_h_C3: cpsrl3.h $croc,$crqc,$crpc + +sem_status +mepcop1_32_sem_cpsrl3_h_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpsrl3_h (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u26)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u7) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u7), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpssrl3_h_C3: cpssrl3.h $croc,$crqc,$crpc + +sem_status +mepcop1_32_sem_cpssrl3_h_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpssrl3_h (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u26)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u7) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u7), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpsrl3_w_C3: cpsrl3.w $croc,$crqc,$crpc + +sem_status +mepcop1_32_sem_cpsrl3_w_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpsrl3_w (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u26)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u7) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u7), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpssrl3_w_C3: cpssrl3.w $croc,$crqc,$crpc + +sem_status +mepcop1_32_sem_cpssrl3_w_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpssrl3_w (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u26)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u7) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u7), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cdsrl3_C3: cdsrl3 $croc,$crqc,$crpc + +sem_status +mepcop1_32_sem_cdsrl3_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cdsrl3 (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u26)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u7) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u7), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpsra3_b_C3: cpsra3.b $croc,$crqc,$crpc + +sem_status +mepcop1_32_sem_cpsra3_b_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpsra3_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u26)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u7) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u7), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpssra3_b_C3: cpssra3.b $croc,$crqc,$crpc + +sem_status +mepcop1_32_sem_cpssra3_b_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpssra3_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u26)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u7) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u7), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpsra3_h_C3: cpsra3.h $croc,$crqc,$crpc + +sem_status +mepcop1_32_sem_cpsra3_h_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpsra3_h (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u26)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u7) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u7), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpssra3_h_C3: cpssra3.h $croc,$crqc,$crpc + +sem_status +mepcop1_32_sem_cpssra3_h_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpssra3_h (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u26)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u7) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u7), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpsra3_w_C3: cpsra3.w $croc,$crqc,$crpc + +sem_status +mepcop1_32_sem_cpsra3_w_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpsra3_w (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u26)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u7) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u7), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpssra3_w_C3: cpssra3.w $croc,$crqc,$crpc + +sem_status +mepcop1_32_sem_cpssra3_w_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpssra3_w (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u26)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u7) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u7), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cdsra3_C3: cdsra3 $croc,$crqc,$crpc + +sem_status +mepcop1_32_sem_cdsra3_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cdsra3 (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u26)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u7) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u7), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpsll3_b_C3: cpsll3.b $croc,$crqc,$crpc + +sem_status +mepcop1_32_sem_cpsll3_b_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpsll3_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u26)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u7) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u7), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpssll3_b_C3: cpssll3.b $croc,$crqc,$crpc + +sem_status +mepcop1_32_sem_cpssll3_b_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpssll3_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u26)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u7) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u7), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpsll3_h_C3: cpsll3.h $croc,$crqc,$crpc + +sem_status +mepcop1_32_sem_cpsll3_h_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpsll3_h (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u26)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u7) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u7), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpssll3_h_C3: cpssll3.h $croc,$crqc,$crpc + +sem_status +mepcop1_32_sem_cpssll3_h_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpssll3_h (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u26)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u7) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u7), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpsll3_w_C3: cpsll3.w $croc,$crqc,$crpc + +sem_status +mepcop1_32_sem_cpsll3_w_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpsll3_w (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u26)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u7) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u7), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpssll3_w_C3: cpssll3.w $croc,$crqc,$crpc + +sem_status +mepcop1_32_sem_cpssll3_w_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpssll3_w (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u26)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u7) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u7), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cdsll3_C3: cdsll3 $croc,$crqc,$crpc + +sem_status +mepcop1_32_sem_cdsll3_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cdsll3 (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u26)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u7) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u7), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpsla3_h_C3: cpsla3.h $croc,$crqc,$crpc + +sem_status +mepcop1_32_sem_cpsla3_h_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpsla3_h (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u26)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u7) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u7), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpsla3_w_C3: cpsla3.w $croc,$crqc,$crpc + +sem_status +mepcop1_32_sem_cpsla3_w_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpsla3_w (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u26)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u7) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u7), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpsadd3_h_C3: cpsadd3.h $croc,$crqc,$crpc + +sem_status +mepcop1_32_sem_cpsadd3_h_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpsadd3_h (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u26)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u7) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u7), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpsadd3_w_C3: cpsadd3.w $croc,$crqc,$crpc + +sem_status +mepcop1_32_sem_cpsadd3_w_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpsadd3_w (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u26)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u7) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u7), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpssub3_h_C3: cpssub3.h $croc,$crqc,$crpc + +sem_status +mepcop1_32_sem_cpssub3_h_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpssub3_h (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u26)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u7) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u7), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpssub3_w_C3: cpssub3.w $croc,$crqc,$crpc + +sem_status +mepcop1_32_sem_cpssub3_w_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpssub3_w (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u26)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u7) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u7), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpextuaddu3_b_C3: cpextuaddu3.b $croc,$crqc,$crpc + +sem_status +mepcop1_32_sem_cpextuaddu3_b_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpextuaddu3_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u26)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u7) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u7), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpextuadd3_b_C3: cpextuadd3.b $croc,$crqc,$crpc + +sem_status +mepcop1_32_sem_cpextuadd3_b_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpextuadd3_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u26)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u7) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u7), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpextladdu3_b_C3: cpextladdu3.b $croc,$crqc,$crpc + +sem_status +mepcop1_32_sem_cpextladdu3_b_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpextladdu3_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u26)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u7) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u7), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpextladd3_b_C3: cpextladd3.b $croc,$crqc,$crpc + +sem_status +mepcop1_32_sem_cpextladd3_b_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpextladd3_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u26)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u7) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u7), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpextusubu3_b_C3: cpextusubu3.b $croc,$crqc,$crpc + +sem_status +mepcop1_32_sem_cpextusubu3_b_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpextusubu3_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u26)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u7) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u7), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpextusub3_b_C3: cpextusub3.b $croc,$crqc,$crpc + +sem_status +mepcop1_32_sem_cpextusub3_b_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpextusub3_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u26)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u7) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u7), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpextlsubu3_b_C3: cpextlsubu3.b $croc,$crqc,$crpc + +sem_status +mepcop1_32_sem_cpextlsubu3_b_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpextlsubu3_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u26)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u7) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u7), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpextlsub3_b_C3: cpextlsub3.b $croc,$crqc,$crpc + +sem_status +mepcop1_32_sem_cpextlsub3_b_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpextlsub3_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u26)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u7) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u7), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpaveu3_b_C3: cpaveu3.b $croc,$crqc,$crpc + +sem_status +mepcop1_32_sem_cpaveu3_b_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpaveu3_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u26)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u7) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u7), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpave3_b_C3: cpave3.b $croc,$crqc,$crpc + +sem_status +mepcop1_32_sem_cpave3_b_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpave3_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u26)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u7) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u7), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpave3_h_C3: cpave3.h $croc,$crqc,$crpc + +sem_status +mepcop1_32_sem_cpave3_h_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpave3_h (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u26)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u7) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u7), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpave3_w_C3: cpave3.w $croc,$crqc,$crpc + +sem_status +mepcop1_32_sem_cpave3_w_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpave3_w (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u26)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u7) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u7), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpaddsru3_b_C3: cpaddsru3.b $croc,$crqc,$crpc + +sem_status +mepcop1_32_sem_cpaddsru3_b_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpaddsru3_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u26)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u7) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u7), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpaddsr3_b_C3: cpaddsr3.b $croc,$crqc,$crpc + +sem_status +mepcop1_32_sem_cpaddsr3_b_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpaddsr3_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u26)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u7) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u7), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpaddsr3_h_C3: cpaddsr3.h $croc,$crqc,$crpc + +sem_status +mepcop1_32_sem_cpaddsr3_h_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpaddsr3_h (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u26)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u7) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u7), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpaddsr3_w_C3: cpaddsr3.w $croc,$crqc,$crpc + +sem_status +mepcop1_32_sem_cpaddsr3_w_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpaddsr3_w (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u26)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u7) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u7), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpabsu3_b_C3: cpabsu3.b $croc,$crqc,$crpc + +sem_status +mepcop1_32_sem_cpabsu3_b_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpabsu3_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u26)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u7) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u7), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpabs3_b_C3: cpabs3.b $croc,$crqc,$crpc + +sem_status +mepcop1_32_sem_cpabs3_b_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpabs3_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u26)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u7) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u7), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpabs3_h_C3: cpabs3.h $croc,$crqc,$crpc + +sem_status +mepcop1_32_sem_cpabs3_h_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpabs3_h (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u26)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u7) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u7), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpmaxu3_b_C3: cpmaxu3.b $croc,$crqc,$crpc + +sem_status +mepcop1_32_sem_cpmaxu3_b_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpmaxu3_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u26)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u7) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u7), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpmax3_b_C3: cpmax3.b $croc,$crqc,$crpc + +sem_status +mepcop1_32_sem_cpmax3_b_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpmax3_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u26)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u7) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u7), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpmax3_h_C3: cpmax3.h $croc,$crqc,$crpc + +sem_status +mepcop1_32_sem_cpmax3_h_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpmax3_h (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u26)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u7) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u7), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpmaxu3_w_C3: cpmaxu3.w $croc,$crqc,$crpc + +sem_status +mepcop1_32_sem_cpmaxu3_w_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpmaxu3_w (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u26)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u7) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u7), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpmax3_w_C3: cpmax3.w $croc,$crqc,$crpc + +sem_status +mepcop1_32_sem_cpmax3_w_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpmax3_w (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u26)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u7) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u7), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpminu3_b_C3: cpminu3.b $croc,$crqc,$crpc + +sem_status +mepcop1_32_sem_cpminu3_b_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpminu3_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u26)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u7) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u7), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpmin3_b_C3: cpmin3.b $croc,$crqc,$crpc + +sem_status +mepcop1_32_sem_cpmin3_b_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpmin3_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u26)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u7) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u7), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpmin3_h_C3: cpmin3.h $croc,$crqc,$crpc + +sem_status +mepcop1_32_sem_cpmin3_h_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpmin3_h (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u26)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u7) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u7), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpminu3_w_C3: cpminu3.w $croc,$crqc,$crpc + +sem_status +mepcop1_32_sem_cpminu3_w_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpminu3_w (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u26)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u7) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u7), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpmin3_w_C3: cpmin3.w $croc,$crqc,$crpc + +sem_status +mepcop1_32_sem_cpmin3_w_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpmin3_w (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u26)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u7) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u7), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpmovfrcsar0_C3: cpmovfrcsar0 $croc + +sem_status +mepcop1_32_sem_cpmovfrcsar0_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpmovfrcsar0 (pc); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u7) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u7), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpmovfrcsar1_C3: cpmovfrcsar1 $croc + +sem_status +mepcop1_32_sem_cpmovfrcsar1_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpmovfrcsar1 (pc); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u7) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u7), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpmovfrcc_C3: cpmovfrcc $croc + +sem_status +mepcop1_32_sem_cpmovfrcc_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpmovfrcc (pc); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u7) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u7), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpmovtocsar0_C3: cpmovtocsar0 $crqc + +sem_status +mepcop1_32_sem_cpmovtocsar0_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpmoviu_h_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpmovtocsar0 (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpmovtocsar1_C3: cpmovtocsar1 $crqc + +sem_status +mepcop1_32_sem_cpmovtocsar1_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpmoviu_h_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpmovtocsar1 (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpmovtocc_C3: cpmovtocc $crqc + +sem_status +mepcop1_32_sem_cpmovtocc_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpmoviu_h_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpmovtocc (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpmov_C3: cpmov $croc,$crqc + +sem_status +mepcop1_32_sem_cpmov_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpmov (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u7) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u7), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpabsz_b_C3: cpabsz.b $croc,$crqc + +sem_status +mepcop1_32_sem_cpabsz_b_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpabsz_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u7) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u7), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpabsz_h_C3: cpabsz.h $croc,$crqc + +sem_status +mepcop1_32_sem_cpabsz_h_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpabsz_h (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u7) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u7), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpabsz_w_C3: cpabsz.w $croc,$crqc + +sem_status +mepcop1_32_sem_cpabsz_w_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpabsz_w (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u7) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u7), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpldz_h_C3: cpldz.h $croc,$crqc + +sem_status +mepcop1_32_sem_cpldz_h_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpldz_h (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u7) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u7), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpldz_w_C3: cpldz.w $croc,$crqc + +sem_status +mepcop1_32_sem_cpldz_w_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpldz_w (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u7) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u7), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpnorm_h_C3: cpnorm.h $croc,$crqc + +sem_status +mepcop1_32_sem_cpnorm_h_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpnorm_h (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u7) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u7), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpnorm_w_C3: cpnorm.w $croc,$crqc + +sem_status +mepcop1_32_sem_cpnorm_w_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpnorm_w (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u7) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u7), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cphaddu_b_C3: cphaddu.b $croc,$crqc + +sem_status +mepcop1_32_sem_cphaddu_b_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cphaddu_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u7) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u7), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cphadd_b_C3: cphadd.b $croc,$crqc + +sem_status +mepcop1_32_sem_cphadd_b_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cphadd_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u7) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u7), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cphadd_h_C3: cphadd.h $croc,$crqc + +sem_status +mepcop1_32_sem_cphadd_h_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cphadd_h (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u7) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u7), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cphadd_w_C3: cphadd.w $croc,$crqc + +sem_status +mepcop1_32_sem_cphadd_w_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cphadd_w (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u7) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u7), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpccadd_b_C3: cpccadd.b $crqc + +sem_status +mepcop1_32_sem_cpccadd_b_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpmoviu_h_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpccadd_b (pc, FLD (f_ivc2_5u21)); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpbcast_b_C3: cpbcast.b $croc,$crqc + +sem_status +mepcop1_32_sem_cpbcast_b_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpbcast_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u7) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u7), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpbcast_h_C3: cpbcast.h $croc,$crqc + +sem_status +mepcop1_32_sem_cpbcast_h_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpbcast_h (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u7) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u7), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpbcast_w_C3: cpbcast.w $croc,$crqc + +sem_status +mepcop1_32_sem_cpbcast_w_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpbcast_w (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u7) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u7), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpextuu_b_C3: cpextuu.b $croc,$crqc + +sem_status +mepcop1_32_sem_cpextuu_b_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpextuu_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u7) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u7), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpextu_b_C3: cpextu.b $croc,$crqc + +sem_status +mepcop1_32_sem_cpextu_b_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpextu_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u7) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u7), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpextuu_h_C3: cpextuu.h $croc,$crqc + +sem_status +mepcop1_32_sem_cpextuu_h_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpextuu_h (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u7) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u7), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpextu_h_C3: cpextu.h $croc,$crqc + +sem_status +mepcop1_32_sem_cpextu_h_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpextu_h (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u7) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u7), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpextlu_b_C3: cpextlu.b $croc,$crqc + +sem_status +mepcop1_32_sem_cpextlu_b_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpextlu_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u7) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u7), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpextl_b_C3: cpextl.b $croc,$crqc + +sem_status +mepcop1_32_sem_cpextl_b_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpextl_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u7) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u7), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpextlu_h_C3: cpextlu.h $croc,$crqc + +sem_status +mepcop1_32_sem_cpextlu_h_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpextlu_h (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u7) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u7), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpextl_h_C3: cpextl.h $croc,$crqc + +sem_status +mepcop1_32_sem_cpextl_h_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpextl_h (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u7) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u7), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpcastub_h_C3: cpcastub.h $croc,$crqc + +sem_status +mepcop1_32_sem_cpcastub_h_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpcastub_h (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u7) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u7), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpcastb_h_C3: cpcastb.h $croc,$crqc + +sem_status +mepcop1_32_sem_cpcastb_h_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpcastb_h (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u7) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u7), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpcastub_w_C3: cpcastub.w $croc,$crqc + +sem_status +mepcop1_32_sem_cpcastub_w_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpcastub_w (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u7) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u7), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpcastb_w_C3: cpcastb.w $croc,$crqc + +sem_status +mepcop1_32_sem_cpcastb_w_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpcastb_w (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u7) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u7), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpcastuh_w_C3: cpcastuh.w $croc,$crqc + +sem_status +mepcop1_32_sem_cpcastuh_w_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpcastuh_w (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u7) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u7), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpcasth_w_C3: cpcasth.w $croc,$crqc + +sem_status +mepcop1_32_sem_cpcasth_w_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpcasth_w (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u7) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u7), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cdcastuw_C3: cdcastuw $croc,$crqc + +sem_status +mepcop1_32_sem_cdcastuw_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cdcastuw (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u7) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u7), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cdcastw_C3: cdcastw $croc,$crqc + +sem_status +mepcop1_32_sem_cdcastw_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cdcastw (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u7) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u7), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpcmpeqz_b_C3: cpcmpeqz.b $crqc,$crpc + +sem_status +mepcop1_32_sem_cpcmpeqz_b_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpcmpeqz_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u26)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpcmpeq_b_C3: cpcmpeq.b $crqc,$crpc + +sem_status +mepcop1_32_sem_cpcmpeq_b_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpcmpeq_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u26)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpcmpeq_h_C3: cpcmpeq.h $crqc,$crpc + +sem_status +mepcop1_32_sem_cpcmpeq_h_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpcmpeq_h (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u26)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpcmpeq_w_C3: cpcmpeq.w $crqc,$crpc + +sem_status +mepcop1_32_sem_cpcmpeq_w_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpcmpeq_w (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u26)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpcmpne_b_C3: cpcmpne.b $crqc,$crpc + +sem_status +mepcop1_32_sem_cpcmpne_b_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpcmpne_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u26)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpcmpne_h_C3: cpcmpne.h $crqc,$crpc + +sem_status +mepcop1_32_sem_cpcmpne_h_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpcmpne_h (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u26)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpcmpne_w_C3: cpcmpne.w $crqc,$crpc + +sem_status +mepcop1_32_sem_cpcmpne_w_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpcmpne_w (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u26)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpcmpgtu_b_C3: cpcmpgtu.b $crqc,$crpc + +sem_status +mepcop1_32_sem_cpcmpgtu_b_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpcmpgtu_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u26)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpcmpgt_b_C3: cpcmpgt.b $crqc,$crpc + +sem_status +mepcop1_32_sem_cpcmpgt_b_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpcmpgt_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u26)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpcmpgt_h_C3: cpcmpgt.h $crqc,$crpc + +sem_status +mepcop1_32_sem_cpcmpgt_h_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpcmpgt_h (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u26)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpcmpgtu_w_C3: cpcmpgtu.w $crqc,$crpc + +sem_status +mepcop1_32_sem_cpcmpgtu_w_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpcmpgtu_w (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u26)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpcmpgt_w_C3: cpcmpgt.w $crqc,$crpc + +sem_status +mepcop1_32_sem_cpcmpgt_w_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpcmpgt_w (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u26)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpcmpgeu_b_C3: cpcmpgeu.b $crqc,$crpc + +sem_status +mepcop1_32_sem_cpcmpgeu_b_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpcmpgeu_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u26)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpcmpge_b_C3: cpcmpge.b $crqc,$crpc + +sem_status +mepcop1_32_sem_cpcmpge_b_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpcmpge_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u26)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpcmpge_h_C3: cpcmpge.h $crqc,$crpc + +sem_status +mepcop1_32_sem_cpcmpge_h_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpcmpge_h (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u26)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpcmpgeu_w_C3: cpcmpgeu.w $crqc,$crpc + +sem_status +mepcop1_32_sem_cpcmpgeu_w_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpcmpgeu_w (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u26)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpcmpge_w_C3: cpcmpge.w $crqc,$crpc + +sem_status +mepcop1_32_sem_cpcmpge_w_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpcmpge_w (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u26)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpacmpeq_b_C3: cpacmpeq.b $crqc,$crpc + +sem_status +mepcop1_32_sem_cpacmpeq_b_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpacmpeq_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u26)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpacmpeq_h_C3: cpacmpeq.h $crqc,$crpc + +sem_status +mepcop1_32_sem_cpacmpeq_h_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpacmpeq_h (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u26)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpacmpeq_w_C3: cpacmpeq.w $crqc,$crpc + +sem_status +mepcop1_32_sem_cpacmpeq_w_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpacmpeq_w (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u26)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpacmpne_b_C3: cpacmpne.b $crqc,$crpc + +sem_status +mepcop1_32_sem_cpacmpne_b_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpacmpne_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u26)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpacmpne_h_C3: cpacmpne.h $crqc,$crpc + +sem_status +mepcop1_32_sem_cpacmpne_h_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpacmpne_h (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u26)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpacmpne_w_C3: cpacmpne.w $crqc,$crpc + +sem_status +mepcop1_32_sem_cpacmpne_w_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpacmpne_w (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u26)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpacmpgtu_b_C3: cpacmpgtu.b $crqc,$crpc + +sem_status +mepcop1_32_sem_cpacmpgtu_b_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpacmpgtu_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u26)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpacmpgt_b_C3: cpacmpgt.b $crqc,$crpc + +sem_status +mepcop1_32_sem_cpacmpgt_b_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpacmpgt_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u26)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpacmpgt_h_C3: cpacmpgt.h $crqc,$crpc + +sem_status +mepcop1_32_sem_cpacmpgt_h_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpacmpgt_h (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u26)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpacmpgtu_w_C3: cpacmpgtu.w $crqc,$crpc + +sem_status +mepcop1_32_sem_cpacmpgtu_w_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpacmpgtu_w (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u26)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpacmpgt_w_C3: cpacmpgt.w $crqc,$crpc + +sem_status +mepcop1_32_sem_cpacmpgt_w_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpacmpgt_w (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u26)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpacmpgeu_b_C3: cpacmpgeu.b $crqc,$crpc + +sem_status +mepcop1_32_sem_cpacmpgeu_b_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpacmpgeu_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u26)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpacmpge_b_C3: cpacmpge.b $crqc,$crpc + +sem_status +mepcop1_32_sem_cpacmpge_b_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpacmpge_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u26)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpacmpge_h_C3: cpacmpge.h $crqc,$crpc + +sem_status +mepcop1_32_sem_cpacmpge_h_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpacmpge_h (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u26)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpacmpgeu_w_C3: cpacmpgeu.w $crqc,$crpc + +sem_status +mepcop1_32_sem_cpacmpgeu_w_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpacmpgeu_w (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u26)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpacmpge_w_C3: cpacmpge.w $crqc,$crpc + +sem_status +mepcop1_32_sem_cpacmpge_w_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpacmpge_w (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u26)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpocmpeq_b_C3: cpocmpeq.b $crqc,$crpc + +sem_status +mepcop1_32_sem_cpocmpeq_b_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpocmpeq_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u26)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpocmpeq_h_C3: cpocmpeq.h $crqc,$crpc + +sem_status +mepcop1_32_sem_cpocmpeq_h_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpocmpeq_h (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u26)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpocmpeq_w_C3: cpocmpeq.w $crqc,$crpc + +sem_status +mepcop1_32_sem_cpocmpeq_w_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpocmpeq_w (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u26)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpocmpne_b_C3: cpocmpne.b $crqc,$crpc + +sem_status +mepcop1_32_sem_cpocmpne_b_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpocmpne_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u26)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpocmpne_h_C3: cpocmpne.h $crqc,$crpc + +sem_status +mepcop1_32_sem_cpocmpne_h_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpocmpne_h (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u26)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpocmpne_w_C3: cpocmpne.w $crqc,$crpc + +sem_status +mepcop1_32_sem_cpocmpne_w_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpocmpne_w (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u26)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpocmpgtu_b_C3: cpocmpgtu.b $crqc,$crpc + +sem_status +mepcop1_32_sem_cpocmpgtu_b_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpocmpgtu_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u26)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpocmpgt_b_C3: cpocmpgt.b $crqc,$crpc + +sem_status +mepcop1_32_sem_cpocmpgt_b_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpocmpgt_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u26)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpocmpgt_h_C3: cpocmpgt.h $crqc,$crpc + +sem_status +mepcop1_32_sem_cpocmpgt_h_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpocmpgt_h (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u26)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpocmpgtu_w_C3: cpocmpgtu.w $crqc,$crpc + +sem_status +mepcop1_32_sem_cpocmpgtu_w_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpocmpgtu_w (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u26)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpocmpgt_w_C3: cpocmpgt.w $crqc,$crpc + +sem_status +mepcop1_32_sem_cpocmpgt_w_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpocmpgt_w (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u26)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpocmpgeu_b_C3: cpocmpgeu.b $crqc,$crpc + +sem_status +mepcop1_32_sem_cpocmpgeu_b_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpocmpgeu_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u26)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpocmpge_b_C3: cpocmpge.b $crqc,$crpc + +sem_status +mepcop1_32_sem_cpocmpge_b_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpocmpge_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u26)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpocmpge_h_C3: cpocmpge.h $crqc,$crpc + +sem_status +mepcop1_32_sem_cpocmpge_h_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpocmpge_h (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u26)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpocmpgeu_w_C3: cpocmpgeu.w $crqc,$crpc + +sem_status +mepcop1_32_sem_cpocmpgeu_w_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpocmpgeu_w (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u26)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpocmpge_w_C3: cpocmpge.w $crqc,$crpc + +sem_status +mepcop1_32_sem_cpocmpge_w_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpocmpge_w (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u26)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpsrli3_b_C3: cpsrli3.b $crqc,$crpc,$imm3p9 + +sem_status +mepcop1_32_sem_cpsrli3_b_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpsrli3_b_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpsrli3_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u26)], FLD (f_ivc2_3u9)); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u21) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u21), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpsrli3_h_C3: cpsrli3.h $crqc,$crpc,$imm4p8 + +sem_status +mepcop1_32_sem_cpsrli3_h_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpsrli3_h_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpsrli3_h (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u26)], FLD (f_ivc2_4u8)); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u21) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u21), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpsrli3_w_C3: cpsrli3.w $crqc,$crpc,$imm5p7 + +sem_status +mepcop1_32_sem_cpsrli3_w_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpsrli3_w (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u26)], FLD (f_ivc2_5u7)); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u21) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u21), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cdsrli3_C3: cdsrli3 $crqc,$crpc,$imm6p6 + +sem_status +mepcop1_32_sem_cdsrli3_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cdsrli3 (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u26)], FLD (f_ivc2_6u6)); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u21) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u21), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpsrai3_b_C3: cpsrai3.b $crqc,$crpc,$imm3p9 + +sem_status +mepcop1_32_sem_cpsrai3_b_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpsrli3_b_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpsrai3_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u26)], FLD (f_ivc2_3u9)); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u21) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u21), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpsrai3_h_C3: cpsrai3.h $crqc,$crpc,$imm4p8 + +sem_status +mepcop1_32_sem_cpsrai3_h_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpsrli3_h_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpsrai3_h (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u26)], FLD (f_ivc2_4u8)); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u21) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u21), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpsrai3_w_C3: cpsrai3.w $crqc,$crpc,$imm5p7 + +sem_status +mepcop1_32_sem_cpsrai3_w_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpsrai3_w (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u26)], FLD (f_ivc2_5u7)); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u21) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u21), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cdsrai3_C3: cdsrai3 $crqc,$crpc,$imm6p6 + +sem_status +mepcop1_32_sem_cdsrai3_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cdsrai3 (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u26)], FLD (f_ivc2_6u6)); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u21) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u21), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpslli3_b_C3: cpslli3.b $crqc,$crpc,$imm3p9 + +sem_status +mepcop1_32_sem_cpslli3_b_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpsrli3_b_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpslli3_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u26)], FLD (f_ivc2_3u9)); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u21) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u21), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpslli3_h_C3: cpslli3.h $crqc,$crpc,$imm4p8 + +sem_status +mepcop1_32_sem_cpslli3_h_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpsrli3_h_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpslli3_h (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u26)], FLD (f_ivc2_4u8)); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u21) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u21), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpslli3_w_C3: cpslli3.w $crqc,$crpc,$imm5p7 + +sem_status +mepcop1_32_sem_cpslli3_w_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpslli3_w (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u26)], FLD (f_ivc2_5u7)); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u21) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u21), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cdslli3_C3: cdslli3 $crqc,$crpc,$imm6p6 + +sem_status +mepcop1_32_sem_cdslli3_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cdslli3 (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u26)], FLD (f_ivc2_6u6)); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u21) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u21), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpslai3_h_C3: cpslai3.h $crqc,$crpc,$imm4p8 + +sem_status +mepcop1_32_sem_cpslai3_h_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpsrli3_h_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpslai3_h (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u26)], FLD (f_ivc2_4u8)); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u21) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u21), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpslai3_w_C3: cpslai3.w $crqc,$crpc,$imm5p7 + +sem_status +mepcop1_32_sem_cpslai3_w_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpslai3_w (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u26)], FLD (f_ivc2_5u7)); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u21) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u21), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpclipiu3_w_C3: cpclipiu3.w $crqc,$crpc,$imm5p7 + +sem_status +mepcop1_32_sem_cpclipiu3_w_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpclipiu3_w (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u26)], FLD (f_ivc2_5u7)); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u21) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u21), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpclipi3_w_C3: cpclipi3.w $crqc,$crpc,$imm5p7 + +sem_status +mepcop1_32_sem_cpclipi3_w_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpclipi3_w (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u26)], FLD (f_ivc2_5u7)); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u21) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u21), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cdclipiu3_C3: cdclipiu3 $crqc,$crpc,$imm6p6 + +sem_status +mepcop1_32_sem_cdclipiu3_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cdclipiu3 (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u26)], FLD (f_ivc2_6u6)); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u21) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u21), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cdclipi3_C3: cdclipi3 $crqc,$crpc,$imm6p6 + +sem_status +mepcop1_32_sem_cdclipi3_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cdclipi3 (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u26)], FLD (f_ivc2_6u6)); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u21) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u21), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpmovi_b_C3: cpmovi.b $crqc,$simm8p4 + +sem_status +mepcop1_32_sem_cpmovi_b_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpmovi_b_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpmovi_b (pc, FLD (f_ivc2_8s4)); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u21) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u21), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpmoviu_h_C3: cpmoviu.h $crqc,$imm8p4 + +sem_status +mepcop1_32_sem_cpmoviu_h_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpmoviu_h_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpmoviu_h (pc, FLD (f_ivc2_8u4)); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u21) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u21), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpmovi_h_C3: cpmovi.h $crqc,$simm8p4 + +sem_status +mepcop1_32_sem_cpmovi_h_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpmovi_b_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpmovi_h (pc, FLD (f_ivc2_8s4)); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u21) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u21), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpmoviu_w_C3: cpmoviu.w $crqc,$imm8p4 + +sem_status +mepcop1_32_sem_cpmoviu_w_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpmoviu_h_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpmoviu_w (pc, FLD (f_ivc2_8u4)); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u21) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u21), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpmovi_w_C3: cpmovi.w $crqc,$simm8p4 + +sem_status +mepcop1_32_sem_cpmovi_w_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpmovi_b_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpmovi_w (pc, FLD (f_ivc2_8s4)); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u21) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u21), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cdmoviu_C3: cdmoviu $crqc,$imm8p4 + +sem_status +mepcop1_32_sem_cdmoviu_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpmoviu_h_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cdmoviu (pc, FLD (f_ivc2_8u4)); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u21) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u21), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cdmovi_C3: cdmovi $crqc,$simm8p4 + +sem_status +mepcop1_32_sem_cdmovi_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpmovi_b_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cdmovi (pc, FLD (f_ivc2_8s4)); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u21) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u21), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpadda1u_b_C3: cpadda1u.b $crqc,$crpc + +sem_status +mepcop1_32_sem_cpadda1u_b_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpadda1u_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u26)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpadda1_b_C3: cpadda1.b $crqc,$crpc + +sem_status +mepcop1_32_sem_cpadda1_b_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpadda1_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u26)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpaddua1_h_C3: cpaddua1.h $crqc,$crpc + +sem_status +mepcop1_32_sem_cpaddua1_h_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpaddua1_h (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u26)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpaddla1_h_C3: cpaddla1.h $crqc,$crpc + +sem_status +mepcop1_32_sem_cpaddla1_h_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpaddla1_h (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u26)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpaddaca1u_b_C3: cpaddaca1u.b $crqc,$crpc + +sem_status +mepcop1_32_sem_cpaddaca1u_b_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpaddaca1u_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u26)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpaddaca1_b_C3: cpaddaca1.b $crqc,$crpc + +sem_status +mepcop1_32_sem_cpaddaca1_b_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpaddaca1_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u26)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpaddacua1_h_C3: cpaddacua1.h $crqc,$crpc + +sem_status +mepcop1_32_sem_cpaddacua1_h_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpaddacua1_h (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u26)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpaddacla1_h_C3: cpaddacla1.h $crqc,$crpc + +sem_status +mepcop1_32_sem_cpaddacla1_h_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpaddacla1_h (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u26)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpsuba1u_b_C3: cpsuba1u.b $crqc,$crpc + +sem_status +mepcop1_32_sem_cpsuba1u_b_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpsuba1u_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u26)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpsuba1_b_C3: cpsuba1.b $crqc,$crpc + +sem_status +mepcop1_32_sem_cpsuba1_b_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpsuba1_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u26)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpsubua1_h_C3: cpsubua1.h $crqc,$crpc + +sem_status +mepcop1_32_sem_cpsubua1_h_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpsubua1_h (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u26)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpsubla1_h_C3: cpsubla1.h $crqc,$crpc + +sem_status +mepcop1_32_sem_cpsubla1_h_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpsubla1_h (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u26)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpsubaca1u_b_C3: cpsubaca1u.b $crqc,$crpc + +sem_status +mepcop1_32_sem_cpsubaca1u_b_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpsubaca1u_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u26)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpsubaca1_b_C3: cpsubaca1.b $crqc,$crpc + +sem_status +mepcop1_32_sem_cpsubaca1_b_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpsubaca1_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u26)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpsubacua1_h_C3: cpsubacua1.h $crqc,$crpc + +sem_status +mepcop1_32_sem_cpsubacua1_h_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpsubacua1_h (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u26)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpsubacla1_h_C3: cpsubacla1.h $crqc,$crpc + +sem_status +mepcop1_32_sem_cpsubacla1_h_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpsubacla1_h (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u26)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpabsa1u_b_C3: cpabsa1u.b $crqc,$crpc + +sem_status +mepcop1_32_sem_cpabsa1u_b_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpabsa1u_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u26)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpabsa1_b_C3: cpabsa1.b $crqc,$crpc + +sem_status +mepcop1_32_sem_cpabsa1_b_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpabsa1_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u26)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpabsua1_h_C3: cpabsua1.h $crqc,$crpc + +sem_status +mepcop1_32_sem_cpabsua1_h_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpabsua1_h (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u26)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpabsla1_h_C3: cpabsla1.h $crqc,$crpc + +sem_status +mepcop1_32_sem_cpabsla1_h_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpabsla1_h (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u26)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpsada1u_b_C3: cpsada1u.b $crqc,$crpc + +sem_status +mepcop1_32_sem_cpsada1u_b_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpsada1u_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u26)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpsada1_b_C3: cpsada1.b $crqc,$crpc + +sem_status +mepcop1_32_sem_cpsada1_b_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpsada1_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u26)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpsadua1_h_C3: cpsadua1.h $crqc,$crpc + +sem_status +mepcop1_32_sem_cpsadua1_h_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpsadua1_h (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u26)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpsadla1_h_C3: cpsadla1.h $crqc,$crpc + +sem_status +mepcop1_32_sem_cpsadla1_h_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpsadla1_h (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u26)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpseta1_h_C3: cpseta1.h $crqc,$crpc + +sem_status +mepcop1_32_sem_cpseta1_h_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpseta1_h (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u26)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpsetua1_w_C3: cpsetua1.w $crqc,$crpc + +sem_status +mepcop1_32_sem_cpsetua1_w_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpsetua1_w (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u26)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpsetla1_w_C3: cpsetla1.w $crqc,$crpc + +sem_status +mepcop1_32_sem_cpsetla1_w_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpsetla1_w (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u26)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpmova1_b_C3: cpmova1.b $croc + +sem_status +mepcop1_32_sem_cpmova1_b_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpmova1_b (pc); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u7) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u7), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpmovua1_h_C3: cpmovua1.h $croc + +sem_status +mepcop1_32_sem_cpmovua1_h_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpmovua1_h (pc); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u7) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u7), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpmovla1_h_C3: cpmovla1.h $croc + +sem_status +mepcop1_32_sem_cpmovla1_h_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpmovla1_h (pc); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u7) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u7), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpmovuua1_w_C3: cpmovuua1.w $croc + +sem_status +mepcop1_32_sem_cpmovuua1_w_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpmovuua1_w (pc); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u7) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u7), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpmovula1_w_C3: cpmovula1.w $croc + +sem_status +mepcop1_32_sem_cpmovula1_w_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpmovula1_w (pc); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u7) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u7), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpmovlua1_w_C3: cpmovlua1.w $croc + +sem_status +mepcop1_32_sem_cpmovlua1_w_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpmovlua1_w (pc); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u7) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u7), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpmovlla1_w_C3: cpmovlla1.w $croc + +sem_status +mepcop1_32_sem_cpmovlla1_w_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpmovlla1_w (pc); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u7) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u7), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cppacka1u_b_C3: cppacka1u.b $croc + +sem_status +mepcop1_32_sem_cppacka1u_b_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cppacka1u_b (pc); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u7) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u7), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cppacka1_b_C3: cppacka1.b $croc + +sem_status +mepcop1_32_sem_cppacka1_b_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cppacka1_b (pc); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u7) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u7), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cppackua1_h_C3: cppackua1.h $croc + +sem_status +mepcop1_32_sem_cppackua1_h_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cppackua1_h (pc); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u7) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u7), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cppackla1_h_C3: cppackla1.h $croc + +sem_status +mepcop1_32_sem_cppackla1_h_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cppackla1_h (pc); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u7) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u7), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cppackua1_w_C3: cppackua1.w $croc + +sem_status +mepcop1_32_sem_cppackua1_w_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cppackua1_w (pc); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u7) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u7), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cppackla1_w_C3: cppackla1.w $croc + +sem_status +mepcop1_32_sem_cppackla1_w_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cppackla1_w (pc); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u7) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u7), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpmovhua1_w_C3: cpmovhua1.w $croc + +sem_status +mepcop1_32_sem_cpmovhua1_w_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpmovhua1_w (pc); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u7) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u7), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpmovhla1_w_C3: cpmovhla1.w $croc + +sem_status +mepcop1_32_sem_cpmovhla1_w_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpmovhla1_w (pc); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u7) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u7), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpsrla1_C3: cpsrla1 $crqc + +sem_status +mepcop1_32_sem_cpsrla1_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpmoviu_h_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpsrla1 (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpsraa1_C3: cpsraa1 $crqc + +sem_status +mepcop1_32_sem_cpsraa1_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpmoviu_h_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpsraa1 (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpslla1_C3: cpslla1 $crqc + +sem_status +mepcop1_32_sem_cpslla1_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpmoviu_h_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpslla1 (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpsrlia1_P1: cpsrlia1 $imm5p7 + +sem_status +mepcop1_32_sem_cpsrlia1_P1 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpsrlia1 (pc, FLD (f_ivc2_5u7)); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpsraia1_P1: cpsraia1 $imm5p7 + +sem_status +mepcop1_32_sem_cpsraia1_P1 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpsraia1 (pc, FLD (f_ivc2_5u7)); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpsllia1_P1: cpsllia1 $imm5p7 + +sem_status +mepcop1_32_sem_cpsllia1_P1 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpsllia1 (pc, FLD (f_ivc2_5u7)); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpssqa1u_b_C3: cpssqa1u.b $crqc,$crpc + +sem_status +mepcop1_32_sem_cpssqa1u_b_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpssqa1u_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u26)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpssqa1_b_C3: cpssqa1.b $crqc,$crpc + +sem_status +mepcop1_32_sem_cpssqa1_b_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpssqa1_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u26)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpssda1u_b_C3: cpssda1u.b $crqc,$crpc + +sem_status +mepcop1_32_sem_cpssda1u_b_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpssda1u_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u26)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpssda1_b_C3: cpssda1.b $crqc,$crpc + +sem_status +mepcop1_32_sem_cpssda1_b_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpssda1_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u26)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpmula1u_b_C3: cpmula1u.b $crqc,$crpc + +sem_status +mepcop1_32_sem_cpmula1u_b_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpmula1u_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u26)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpmula1_b_C3: cpmula1.b $crqc,$crpc + +sem_status +mepcop1_32_sem_cpmula1_b_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpmula1_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u26)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpmulua1_h_C3: cpmulua1.h $crqc,$crpc + +sem_status +mepcop1_32_sem_cpmulua1_h_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpmulua1_h (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u26)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpmulla1_h_C3: cpmulla1.h $crqc,$crpc + +sem_status +mepcop1_32_sem_cpmulla1_h_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpmulla1_h (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u26)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpmulua1u_w_C3: cpmulua1u.w $crqc,$crpc + +sem_status +mepcop1_32_sem_cpmulua1u_w_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpmulua1u_w (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u26)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpmulla1u_w_C3: cpmulla1u.w $crqc,$crpc + +sem_status +mepcop1_32_sem_cpmulla1u_w_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpmulla1u_w (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u26)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpmulua1_w_C3: cpmulua1.w $crqc,$crpc + +sem_status +mepcop1_32_sem_cpmulua1_w_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpmulua1_w (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u26)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpmulla1_w_C3: cpmulla1.w $crqc,$crpc + +sem_status +mepcop1_32_sem_cpmulla1_w_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpmulla1_w (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u26)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpmada1u_b_C3: cpmada1u.b $crqc,$crpc + +sem_status +mepcop1_32_sem_cpmada1u_b_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpmada1u_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u26)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpmada1_b_C3: cpmada1.b $crqc,$crpc + +sem_status +mepcop1_32_sem_cpmada1_b_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpmada1_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u26)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpmadua1_h_C3: cpmadua1.h $crqc,$crpc + +sem_status +mepcop1_32_sem_cpmadua1_h_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpmadua1_h (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u26)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpmadla1_h_C3: cpmadla1.h $crqc,$crpc + +sem_status +mepcop1_32_sem_cpmadla1_h_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpmadla1_h (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u26)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpmadua1u_w_C3: cpmadua1u.w $crqc,$crpc + +sem_status +mepcop1_32_sem_cpmadua1u_w_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpmadua1u_w (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u26)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpmadla1u_w_C3: cpmadla1u.w $crqc,$crpc + +sem_status +mepcop1_32_sem_cpmadla1u_w_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpmadla1u_w (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u26)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpmadua1_w_C3: cpmadua1.w $crqc,$crpc + +sem_status +mepcop1_32_sem_cpmadua1_w_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpmadua1_w (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u26)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpmadla1_w_C3: cpmadla1.w $crqc,$crpc + +sem_status +mepcop1_32_sem_cpmadla1_w_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpmadla1_w (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u26)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpmsbua1_h_C3: cpmsbua1.h $crqc,$crpc + +sem_status +mepcop1_32_sem_cpmsbua1_h_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpmsbua1_h (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u26)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpmsbla1_h_C3: cpmsbla1.h $crqc,$crpc + +sem_status +mepcop1_32_sem_cpmsbla1_h_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpmsbla1_h (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u26)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpmsbua1u_w_C3: cpmsbua1u.w $crqc,$crpc + +sem_status +mepcop1_32_sem_cpmsbua1u_w_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpmsbua1u_w (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u26)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpmsbla1u_w_C3: cpmsbla1u.w $crqc,$crpc + +sem_status +mepcop1_32_sem_cpmsbla1u_w_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpmsbla1u_w (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u26)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpmsbua1_w_C3: cpmsbua1.w $crqc,$crpc + +sem_status +mepcop1_32_sem_cpmsbua1_w_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpmsbua1_w (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u26)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpmsbla1_w_C3: cpmsbla1.w $crqc,$crpc + +sem_status +mepcop1_32_sem_cpmsbla1_w_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpmsbla1_w (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u26)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpsmadua1_h_C3: cpsmadua1.h $crqc,$crpc + +sem_status +mepcop1_32_sem_cpsmadua1_h_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpsmadua1_h (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u26)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpsmadla1_h_C3: cpsmadla1.h $crqc,$crpc + +sem_status +mepcop1_32_sem_cpsmadla1_h_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpsmadla1_h (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u26)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpsmadua1_w_C3: cpsmadua1.w $crqc,$crpc + +sem_status +mepcop1_32_sem_cpsmadua1_w_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpsmadua1_w (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u26)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpsmadla1_w_C3: cpsmadla1.w $crqc,$crpc + +sem_status +mepcop1_32_sem_cpsmadla1_w_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpsmadla1_w (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u26)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpsmsbua1_h_C3: cpsmsbua1.h $crqc,$crpc + +sem_status +mepcop1_32_sem_cpsmsbua1_h_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpsmsbua1_h (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u26)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpsmsbla1_h_C3: cpsmsbla1.h $crqc,$crpc + +sem_status +mepcop1_32_sem_cpsmsbla1_h_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpsmsbla1_h (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u26)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpsmsbua1_w_C3: cpsmsbua1.w $crqc,$crpc + +sem_status +mepcop1_32_sem_cpsmsbua1_w_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpsmsbua1_w (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u26)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpsmsbla1_w_C3: cpsmsbla1.w $crqc,$crpc + +sem_status +mepcop1_32_sem_cpsmsbla1_w_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpsmsbla1_w (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u26)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpmulslua1_h_C3: cpmulslua1.h $crqc,$crpc + +sem_status +mepcop1_32_sem_cpmulslua1_h_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpmulslua1_h (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u26)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpmulslla1_h_C3: cpmulslla1.h $crqc,$crpc + +sem_status +mepcop1_32_sem_cpmulslla1_h_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpmulslla1_h (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u26)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpmulslua1_w_C3: cpmulslua1.w $crqc,$crpc + +sem_status +mepcop1_32_sem_cpmulslua1_w_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpmulslua1_w (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u26)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpmulslla1_w_C3: cpmulslla1.w $crqc,$crpc + +sem_status +mepcop1_32_sem_cpmulslla1_w_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpmulslla1_w (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u26)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpsmadslua1_h_C3: cpsmadslua1.h $crqc,$crpc + +sem_status +mepcop1_32_sem_cpsmadslua1_h_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpsmadslua1_h (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u26)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpsmadslla1_h_C3: cpsmadslla1.h $crqc,$crpc + +sem_status +mepcop1_32_sem_cpsmadslla1_h_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpsmadslla1_h (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u26)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpsmadslua1_w_C3: cpsmadslua1.w $crqc,$crpc + +sem_status +mepcop1_32_sem_cpsmadslua1_w_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpsmadslua1_w (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u26)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpsmadslla1_w_C3: cpsmadslla1.w $crqc,$crpc + +sem_status +mepcop1_32_sem_cpsmadslla1_w_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpsmadslla1_w (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u26)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpsmsbslua1_h_C3: cpsmsbslua1.h $crqc,$crpc + +sem_status +mepcop1_32_sem_cpsmsbslua1_h_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpsmsbslua1_h (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u26)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpsmsbslla1_h_C3: cpsmsbslla1.h $crqc,$crpc + +sem_status +mepcop1_32_sem_cpsmsbslla1_h_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpsmsbslla1_h (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u26)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpsmsbslua1_w_C3: cpsmsbslua1.w $crqc,$crpc + +sem_status +mepcop1_32_sem_cpsmsbslua1_w_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpsmsbslua1_w (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u26)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpsmsbslla1_w_C3: cpsmsbslla1.w $crqc,$crpc + +sem_status +mepcop1_32_sem_cpsmsbslla1_w_C3 (mep_ext1_cpu* current_cpu, mepcop1_32_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_C3.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_32_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpsmsbslla1_w (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u21)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u26)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + diff --git a/sid/component/cgen-cpu/mep/mep-cop1-48-decode.cxx b/sid/component/cgen-cpu/mep/mep-cop1-48-decode.cxx new file mode 100644 index 0000000000..55fb8acf31 --- /dev/null +++ b/sid/component/cgen-cpu/mep/mep-cop1-48-decode.cxx @@ -0,0 +1,1951 @@ +/* Simulator instruction decoder for mepcop1_48. + +THIS FILE IS MACHINE GENERATED WITH CGEN. + +Copyright (C) 2000-2007 Red Hat, Inc. + +This file is part of the Red Hat simulators. + + +*/ + + +#if HAVE_CONFIG_H +#include "config.h" +#endif +#include "mep_ext1.h" + +using namespace mep_ext1; // FIXME: namespace organization still wip + + +// The instruction descriptor array. + +mepcop1_48_idesc mepcop1_48_idesc::idesc_table[MEPCOP1_48_INSN_CDMOVI_P0_P1 + 1] = +{ + { mepcop1_48_sem_x_invalid, "X_INVALID", MEPCOP1_48_INSN_X_INVALID, { 0|(1<> 20) & (127 << 4)) | ((insn >> 19) & (15 << 0))); + switch (val) + { + case 0 : + if ((entire_insn & 0xffffffff) == 0x0) + { itype = MEPCOP1_48_INSN_C0NOP_P0_P0S; mepcop1_48_extract_sfmt_c0nop_P0_P0S (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_48_INSN_X_INVALID; mepcop1_48_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 3 : + { + unsigned int val = (((insn >> 4) & (31 << 0))); + switch (val) + { + case 1 : + if ((entire_insn & 0xfff801ff) == 0x980010) + { itype = MEPCOP1_48_INSN_CPACMPEQ_B_P0_P1; mepcop1_48_extract_sfmt_cpacmpeq_b_P0_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_48_INSN_X_INVALID; mepcop1_48_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 3 : + if ((entire_insn & 0xfff801ff) == 0x980030) + { itype = MEPCOP1_48_INSN_CPACMPEQ_H_P0_P1; mepcop1_48_extract_sfmt_cpacmpeq_b_P0_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_48_INSN_X_INVALID; mepcop1_48_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 5 : + if ((entire_insn & 0xfff801ff) == 0x980050) + { itype = MEPCOP1_48_INSN_CPACMPEQ_W_P0_P1; mepcop1_48_extract_sfmt_cpacmpeq_b_P0_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_48_INSN_X_INVALID; mepcop1_48_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 9 : + if ((entire_insn & 0xfff801ff) == 0x980090) + { itype = MEPCOP1_48_INSN_CPACMPNE_B_P0_P1; mepcop1_48_extract_sfmt_cpacmpeq_b_P0_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_48_INSN_X_INVALID; mepcop1_48_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 11 : + if ((entire_insn & 0xfff801ff) == 0x9800b0) + { itype = MEPCOP1_48_INSN_CPACMPNE_H_P0_P1; mepcop1_48_extract_sfmt_cpacmpeq_b_P0_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_48_INSN_X_INVALID; mepcop1_48_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 13 : + if ((entire_insn & 0xfff801ff) == 0x9800d0) + { itype = MEPCOP1_48_INSN_CPACMPNE_W_P0_P1; mepcop1_48_extract_sfmt_cpacmpeq_b_P0_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_48_INSN_X_INVALID; mepcop1_48_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 16 : + if ((entire_insn & 0xfff801ff) == 0x980100) + { itype = MEPCOP1_48_INSN_CPACMPGTU_B_P0_P1; mepcop1_48_extract_sfmt_cpacmpeq_b_P0_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_48_INSN_X_INVALID; mepcop1_48_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 17 : + if ((entire_insn & 0xfff801ff) == 0x980110) + { itype = MEPCOP1_48_INSN_CPACMPGT_B_P0_P1; mepcop1_48_extract_sfmt_cpacmpeq_b_P0_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_48_INSN_X_INVALID; mepcop1_48_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 19 : + if ((entire_insn & 0xfff801ff) == 0x980130) + { itype = MEPCOP1_48_INSN_CPACMPGT_H_P0_P1; mepcop1_48_extract_sfmt_cpacmpeq_b_P0_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_48_INSN_X_INVALID; mepcop1_48_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 20 : + if ((entire_insn & 0xfff801ff) == 0x980140) + { itype = MEPCOP1_48_INSN_CPACMPGTU_W_P0_P1; mepcop1_48_extract_sfmt_cpacmpeq_b_P0_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_48_INSN_X_INVALID; mepcop1_48_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 21 : + if ((entire_insn & 0xfff801ff) == 0x980150) + { itype = MEPCOP1_48_INSN_CPACMPGT_W_P0_P1; mepcop1_48_extract_sfmt_cpacmpeq_b_P0_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_48_INSN_X_INVALID; mepcop1_48_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 24 : + if ((entire_insn & 0xfff801ff) == 0x980180) + { itype = MEPCOP1_48_INSN_CPACMPGEU_B_P0_P1; mepcop1_48_extract_sfmt_cpacmpeq_b_P0_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_48_INSN_X_INVALID; mepcop1_48_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 25 : + if ((entire_insn & 0xfff801ff) == 0x980190) + { itype = MEPCOP1_48_INSN_CPACMPGE_B_P0_P1; mepcop1_48_extract_sfmt_cpacmpeq_b_P0_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_48_INSN_X_INVALID; mepcop1_48_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 27 : + if ((entire_insn & 0xfff801ff) == 0x9801b0) + { itype = MEPCOP1_48_INSN_CPACMPGE_H_P0_P1; mepcop1_48_extract_sfmt_cpacmpeq_b_P0_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_48_INSN_X_INVALID; mepcop1_48_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 28 : + if ((entire_insn & 0xfff801ff) == 0x9801c0) + { itype = MEPCOP1_48_INSN_CPACMPGEU_W_P0_P1; mepcop1_48_extract_sfmt_cpacmpeq_b_P0_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_48_INSN_X_INVALID; mepcop1_48_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 29 : + if ((entire_insn & 0xfff801ff) == 0x9801d0) + { itype = MEPCOP1_48_INSN_CPACMPGE_W_P0_P1; mepcop1_48_extract_sfmt_cpacmpeq_b_P0_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_48_INSN_X_INVALID; mepcop1_48_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + default : itype = MEPCOP1_48_INSN_X_INVALID; mepcop1_48_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + } + } + case 5 : /* fall through */ + case 21 : /* fall through */ + case 37 : /* fall through */ + case 53 : /* fall through */ + case 69 : /* fall through */ + case 85 : /* fall through */ + case 101 : /* fall through */ + case 117 : /* fall through */ + case 133 : /* fall through */ + case 149 : /* fall through */ + case 165 : /* fall through */ + case 181 : /* fall through */ + case 197 : /* fall through */ + case 213 : /* fall through */ + case 229 : /* fall through */ + case 245 : /* fall through */ + case 261 : /* fall through */ + case 277 : /* fall through */ + case 293 : /* fall through */ + case 309 : /* fall through */ + case 325 : /* fall through */ + case 341 : /* fall through */ + case 357 : /* fall through */ + case 373 : /* fall through */ + case 389 : /* fall through */ + case 405 : /* fall through */ + case 421 : /* fall through */ + case 437 : /* fall through */ + case 453 : /* fall through */ + case 469 : /* fall through */ + case 485 : /* fall through */ + case 501 : /* fall through */ + case 517 : /* fall through */ + case 533 : /* fall through */ + case 549 : /* fall through */ + case 565 : /* fall through */ + case 581 : /* fall through */ + case 597 : /* fall through */ + case 613 : /* fall through */ + case 629 : /* fall through */ + case 645 : /* fall through */ + case 661 : /* fall through */ + case 677 : /* fall through */ + case 693 : /* fall through */ + case 709 : /* fall through */ + case 725 : /* fall through */ + case 741 : /* fall through */ + case 757 : /* fall through */ + case 773 : /* fall through */ + case 789 : /* fall through */ + case 805 : /* fall through */ + case 821 : /* fall through */ + case 837 : /* fall through */ + case 853 : /* fall through */ + case 869 : /* fall through */ + case 885 : /* fall through */ + case 901 : /* fall through */ + case 917 : /* fall through */ + case 933 : /* fall through */ + case 949 : /* fall through */ + case 965 : /* fall through */ + case 981 : /* fall through */ + case 997 : /* fall through */ + case 1013 : /* fall through */ + case 1029 : /* fall through */ + case 1045 : /* fall through */ + case 1061 : /* fall through */ + case 1077 : /* fall through */ + case 1093 : /* fall through */ + case 1109 : /* fall through */ + case 1125 : /* fall through */ + case 1141 : /* fall through */ + case 1157 : /* fall through */ + case 1173 : /* fall through */ + case 1189 : /* fall through */ + case 1205 : /* fall through */ + case 1221 : /* fall through */ + case 1237 : /* fall through */ + case 1253 : /* fall through */ + case 1269 : /* fall through */ + case 1285 : /* fall through */ + case 1301 : /* fall through */ + case 1317 : /* fall through */ + case 1333 : /* fall through */ + case 1349 : /* fall through */ + case 1365 : /* fall through */ + case 1381 : /* fall through */ + case 1397 : /* fall through */ + case 1413 : /* fall through */ + case 1429 : /* fall through */ + case 1445 : /* fall through */ + case 1461 : /* fall through */ + case 1477 : /* fall through */ + case 1493 : /* fall through */ + case 1509 : /* fall through */ + case 1525 : /* fall through */ + case 1541 : /* fall through */ + case 1557 : /* fall through */ + case 1573 : /* fall through */ + case 1589 : /* fall through */ + case 1605 : /* fall through */ + case 1621 : /* fall through */ + case 1637 : /* fall through */ + case 1653 : /* fall through */ + case 1669 : /* fall through */ + case 1685 : /* fall through */ + case 1701 : /* fall through */ + case 1717 : /* fall through */ + case 1733 : /* fall through */ + case 1749 : /* fall through */ + case 1765 : /* fall through */ + case 1781 : /* fall through */ + case 1797 : /* fall through */ + case 1813 : /* fall through */ + case 1829 : /* fall through */ + case 1845 : /* fall through */ + case 1861 : /* fall through */ + case 1877 : /* fall through */ + case 1893 : /* fall through */ + case 1909 : /* fall through */ + case 1925 : /* fall through */ + case 1941 : /* fall through */ + case 1957 : /* fall through */ + case 1973 : /* fall through */ + case 1989 : /* fall through */ + case 2005 : /* fall through */ + case 2021 : /* fall through */ + case 2037 : + { + unsigned int val = (((insn >> 9) & (31 << 0))); + switch (val) + { + case 0 : + if ((entire_insn & 0xf83e0f) == 0xa80000) + { itype = MEPCOP1_48_INSN_CPSRLI3_B_P0_P1; mepcop1_48_extract_sfmt_cpsrli3_b_P0_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_48_INSN_X_INVALID; mepcop1_48_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 1 : + if ((entire_insn & 0xf83e0f) == 0xa80200) + { itype = MEPCOP1_48_INSN_CPSRLI3_H_P0_P1; mepcop1_48_extract_sfmt_cpsrli3_h_P0_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_48_INSN_X_INVALID; mepcop1_48_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 2 : + if ((entire_insn & 0xf83e0f) == 0xa80400) + { itype = MEPCOP1_48_INSN_CPSRLI3_W_P0_P1; mepcop1_48_extract_sfmt_cpsrli3_w_P0_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_48_INSN_X_INVALID; mepcop1_48_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 3 : + if ((entire_insn & 0xf83e0f) == 0xa80600) + { itype = MEPCOP1_48_INSN_CDSRLI3_P0_P1; mepcop1_48_extract_sfmt_cdsrli3_P0_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_48_INSN_X_INVALID; mepcop1_48_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 4 : + if ((entire_insn & 0xf83e0f) == 0xa80800) + { itype = MEPCOP1_48_INSN_CPSRAI3_B_P0_P1; mepcop1_48_extract_sfmt_cpsrli3_b_P0_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_48_INSN_X_INVALID; mepcop1_48_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 5 : + if ((entire_insn & 0xf83e0f) == 0xa80a00) + { itype = MEPCOP1_48_INSN_CPSRAI3_H_P0_P1; mepcop1_48_extract_sfmt_cpsrli3_h_P0_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_48_INSN_X_INVALID; mepcop1_48_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 6 : + if ((entire_insn & 0xf83e0f) == 0xa80c00) + { itype = MEPCOP1_48_INSN_CPSRAI3_W_P0_P1; mepcop1_48_extract_sfmt_cpsrli3_w_P0_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_48_INSN_X_INVALID; mepcop1_48_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 7 : + if ((entire_insn & 0xf83e0f) == 0xa80e00) + { itype = MEPCOP1_48_INSN_CDSRAI3_P0_P1; mepcop1_48_extract_sfmt_cdsrli3_P0_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_48_INSN_X_INVALID; mepcop1_48_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 8 : + if ((entire_insn & 0xf83e0f) == 0xa81000) + { itype = MEPCOP1_48_INSN_CPSLLI3_B_P0_P1; mepcop1_48_extract_sfmt_cpsrli3_b_P0_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_48_INSN_X_INVALID; mepcop1_48_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 9 : + if ((entire_insn & 0xf83e0f) == 0xa81200) + { itype = MEPCOP1_48_INSN_CPSLLI3_H_P0_P1; mepcop1_48_extract_sfmt_cpsrli3_h_P0_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_48_INSN_X_INVALID; mepcop1_48_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 10 : + if ((entire_insn & 0xf83e0f) == 0xa81400) + { itype = MEPCOP1_48_INSN_CPSLLI3_W_P0_P1; mepcop1_48_extract_sfmt_cpsrli3_w_P0_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_48_INSN_X_INVALID; mepcop1_48_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 11 : + if ((entire_insn & 0xf83e0f) == 0xa81600) + { itype = MEPCOP1_48_INSN_CDSLLI3_P0_P1; mepcop1_48_extract_sfmt_cdsrli3_P0_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_48_INSN_X_INVALID; mepcop1_48_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 13 : + if ((entire_insn & 0xf83e0f) == 0xa81a00) + { itype = MEPCOP1_48_INSN_CPSLAI3_H_P0_P1; mepcop1_48_extract_sfmt_cpsrli3_h_P0_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_48_INSN_X_INVALID; mepcop1_48_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 14 : + if ((entire_insn & 0xf83e0f) == 0xa81c00) + { itype = MEPCOP1_48_INSN_CPSLAI3_W_P0_P1; mepcop1_48_extract_sfmt_cpsrli3_w_P0_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_48_INSN_X_INVALID; mepcop1_48_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 16 : + if ((entire_insn & 0xf83e0f) == 0xa82000) + { itype = MEPCOP1_48_INSN_CPCLIPIU3_W_P0_P1; mepcop1_48_extract_sfmt_cpsrli3_w_P0_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_48_INSN_X_INVALID; mepcop1_48_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 17 : + if ((entire_insn & 0xf83e0f) == 0xa82200) + { itype = MEPCOP1_48_INSN_CPCLIPI3_W_P0_P1; mepcop1_48_extract_sfmt_cpsrli3_w_P0_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_48_INSN_X_INVALID; mepcop1_48_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 18 : + if ((entire_insn & 0xf83e0f) == 0xa82400) + { itype = MEPCOP1_48_INSN_CDCLIPIU3_P0_P1; mepcop1_48_extract_sfmt_cdsrli3_P0_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_48_INSN_X_INVALID; mepcop1_48_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 19 : + if ((entire_insn & 0xf83e0f) == 0xa82600) + { itype = MEPCOP1_48_INSN_CDCLIPI3_P0_P1; mepcop1_48_extract_sfmt_cdsrli3_P0_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_48_INSN_X_INVALID; mepcop1_48_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + default : itype = MEPCOP1_48_INSN_X_INVALID; mepcop1_48_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + } + } + case 6 : /* fall through */ + case 22 : /* fall through */ + case 38 : /* fall through */ + case 54 : /* fall through */ + case 70 : /* fall through */ + case 86 : /* fall through */ + case 102 : /* fall through */ + case 118 : /* fall through */ + case 134 : /* fall through */ + case 150 : /* fall through */ + case 166 : /* fall through */ + case 182 : /* fall through */ + case 198 : /* fall through */ + case 214 : /* fall through */ + case 230 : /* fall through */ + case 246 : /* fall through */ + case 262 : /* fall through */ + case 278 : /* fall through */ + case 294 : /* fall through */ + case 310 : /* fall through */ + case 326 : /* fall through */ + case 342 : /* fall through */ + case 358 : /* fall through */ + case 374 : /* fall through */ + case 390 : /* fall through */ + case 406 : /* fall through */ + case 422 : /* fall through */ + case 438 : /* fall through */ + case 454 : /* fall through */ + case 470 : /* fall through */ + case 486 : /* fall through */ + case 502 : /* fall through */ + case 518 : /* fall through */ + case 534 : /* fall through */ + case 550 : /* fall through */ + case 566 : /* fall through */ + case 582 : /* fall through */ + case 598 : /* fall through */ + case 614 : /* fall through */ + case 630 : /* fall through */ + case 646 : /* fall through */ + case 662 : /* fall through */ + case 678 : /* fall through */ + case 694 : /* fall through */ + case 710 : /* fall through */ + case 726 : /* fall through */ + case 742 : /* fall through */ + case 758 : /* fall through */ + case 774 : /* fall through */ + case 790 : /* fall through */ + case 806 : /* fall through */ + case 822 : /* fall through */ + case 838 : /* fall through */ + case 854 : /* fall through */ + case 870 : /* fall through */ + case 886 : /* fall through */ + case 902 : /* fall through */ + case 918 : /* fall through */ + case 934 : /* fall through */ + case 950 : /* fall through */ + case 966 : /* fall through */ + case 982 : /* fall through */ + case 998 : /* fall through */ + case 1014 : /* fall through */ + case 1030 : /* fall through */ + case 1046 : /* fall through */ + case 1062 : /* fall through */ + case 1078 : /* fall through */ + case 1094 : /* fall through */ + case 1110 : /* fall through */ + case 1126 : /* fall through */ + case 1142 : /* fall through */ + case 1158 : /* fall through */ + case 1174 : /* fall through */ + case 1190 : /* fall through */ + case 1206 : /* fall through */ + case 1222 : /* fall through */ + case 1238 : /* fall through */ + case 1254 : /* fall through */ + case 1270 : /* fall through */ + case 1286 : /* fall through */ + case 1302 : /* fall through */ + case 1318 : /* fall through */ + case 1334 : /* fall through */ + case 1350 : /* fall through */ + case 1366 : /* fall through */ + case 1382 : /* fall through */ + case 1398 : /* fall through */ + case 1414 : /* fall through */ + case 1430 : /* fall through */ + case 1446 : /* fall through */ + case 1462 : /* fall through */ + case 1478 : /* fall through */ + case 1494 : /* fall through */ + case 1510 : /* fall through */ + case 1526 : /* fall through */ + case 1542 : /* fall through */ + case 1558 : /* fall through */ + case 1574 : /* fall through */ + case 1590 : /* fall through */ + case 1606 : /* fall through */ + case 1622 : /* fall through */ + case 1638 : /* fall through */ + case 1654 : /* fall through */ + case 1670 : /* fall through */ + case 1686 : /* fall through */ + case 1702 : /* fall through */ + case 1718 : /* fall through */ + case 1734 : /* fall through */ + case 1750 : /* fall through */ + case 1766 : /* fall through */ + case 1782 : /* fall through */ + case 1798 : /* fall through */ + case 1814 : /* fall through */ + case 1830 : /* fall through */ + case 1846 : /* fall through */ + case 1862 : /* fall through */ + case 1878 : /* fall through */ + case 1894 : /* fall through */ + case 1910 : /* fall through */ + case 1926 : /* fall through */ + case 1942 : /* fall through */ + case 1958 : /* fall through */ + case 1974 : /* fall through */ + case 1990 : /* fall through */ + case 2006 : /* fall through */ + case 2022 : /* fall through */ + case 2038 : + if ((entire_insn & 0xf8300f) == 0xb01000) + { itype = MEPCOP1_48_INSN_CPMOVI_H_P0_P1; mepcop1_48_extract_sfmt_cpmovi_h_P0_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_48_INSN_X_INVALID; mepcop1_48_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 7 : /* fall through */ + case 23 : /* fall through */ + case 39 : /* fall through */ + case 55 : /* fall through */ + case 71 : /* fall through */ + case 87 : /* fall through */ + case 103 : /* fall through */ + case 119 : /* fall through */ + case 135 : /* fall through */ + case 151 : /* fall through */ + case 167 : /* fall through */ + case 183 : /* fall through */ + case 199 : /* fall through */ + case 215 : /* fall through */ + case 231 : /* fall through */ + case 247 : /* fall through */ + case 263 : /* fall through */ + case 279 : /* fall through */ + case 295 : /* fall through */ + case 311 : /* fall through */ + case 327 : /* fall through */ + case 343 : /* fall through */ + case 359 : /* fall through */ + case 375 : /* fall through */ + case 391 : /* fall through */ + case 407 : /* fall through */ + case 423 : /* fall through */ + case 439 : /* fall through */ + case 455 : /* fall through */ + case 471 : /* fall through */ + case 487 : /* fall through */ + case 503 : /* fall through */ + case 519 : /* fall through */ + case 535 : /* fall through */ + case 551 : /* fall through */ + case 567 : /* fall through */ + case 583 : /* fall through */ + case 599 : /* fall through */ + case 615 : /* fall through */ + case 631 : /* fall through */ + case 647 : /* fall through */ + case 663 : /* fall through */ + case 679 : /* fall through */ + case 695 : /* fall through */ + case 711 : /* fall through */ + case 727 : /* fall through */ + case 743 : /* fall through */ + case 759 : /* fall through */ + case 775 : /* fall through */ + case 791 : /* fall through */ + case 807 : /* fall through */ + case 823 : /* fall through */ + case 839 : /* fall through */ + case 855 : /* fall through */ + case 871 : /* fall through */ + case 887 : /* fall through */ + case 903 : /* fall through */ + case 919 : /* fall through */ + case 935 : /* fall through */ + case 951 : /* fall through */ + case 967 : /* fall through */ + case 983 : /* fall through */ + case 999 : /* fall through */ + case 1015 : /* fall through */ + case 1031 : /* fall through */ + case 1047 : /* fall through */ + case 1063 : /* fall through */ + case 1079 : /* fall through */ + case 1095 : /* fall through */ + case 1111 : /* fall through */ + case 1127 : /* fall through */ + case 1143 : /* fall through */ + case 1159 : /* fall through */ + case 1175 : /* fall through */ + case 1191 : /* fall through */ + case 1207 : /* fall through */ + case 1223 : /* fall through */ + case 1239 : /* fall through */ + case 1255 : /* fall through */ + case 1271 : /* fall through */ + case 1287 : /* fall through */ + case 1303 : /* fall through */ + case 1319 : /* fall through */ + case 1335 : /* fall through */ + case 1351 : /* fall through */ + case 1367 : /* fall through */ + case 1383 : /* fall through */ + case 1399 : /* fall through */ + case 1415 : /* fall through */ + case 1431 : /* fall through */ + case 1447 : /* fall through */ + case 1463 : /* fall through */ + case 1479 : /* fall through */ + case 1495 : /* fall through */ + case 1511 : /* fall through */ + case 1527 : /* fall through */ + case 1543 : /* fall through */ + case 1559 : /* fall through */ + case 1575 : /* fall through */ + case 1591 : /* fall through */ + case 1607 : /* fall through */ + case 1623 : /* fall through */ + case 1639 : /* fall through */ + case 1655 : /* fall through */ + case 1671 : /* fall through */ + case 1687 : /* fall through */ + case 1703 : /* fall through */ + case 1719 : /* fall through */ + case 1735 : /* fall through */ + case 1751 : /* fall through */ + case 1767 : /* fall through */ + case 1783 : /* fall through */ + case 1799 : /* fall through */ + case 1815 : /* fall through */ + case 1831 : /* fall through */ + case 1847 : /* fall through */ + case 1863 : /* fall through */ + case 1879 : /* fall through */ + case 1895 : /* fall through */ + case 1911 : /* fall through */ + case 1927 : /* fall through */ + case 1943 : /* fall through */ + case 1959 : /* fall through */ + case 1975 : /* fall through */ + case 1991 : /* fall through */ + case 2007 : /* fall through */ + case 2023 : /* fall through */ + case 2039 : + { + unsigned int val = (((insn >> 12) & (3 << 0))); + switch (val) + { + case 0 : + if ((entire_insn & 0xf8300f) == 0xb80000) + { itype = MEPCOP1_48_INSN_CPMOVIU_W_P0_P1; mepcop1_48_extract_sfmt_cpmoviu_w_P0_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_48_INSN_X_INVALID; mepcop1_48_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 1 : + if ((entire_insn & 0xf8300f) == 0xb81000) + { itype = MEPCOP1_48_INSN_CPMOVI_W_P0_P1; mepcop1_48_extract_sfmt_cpmovi_h_P0_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_48_INSN_X_INVALID; mepcop1_48_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 2 : + if ((entire_insn & 0xf8300f) == 0xb82000) + { itype = MEPCOP1_48_INSN_CDMOVIU_P0_P1; mepcop1_48_extract_sfmt_cpmoviu_w_P0_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_48_INSN_X_INVALID; mepcop1_48_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 3 : + if ((entire_insn & 0xf8300f) == 0xb83000) + { itype = MEPCOP1_48_INSN_CDMOVI_P0_P1; mepcop1_48_extract_sfmt_cpmovi_h_P0_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_48_INSN_X_INVALID; mepcop1_48_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + default : itype = MEPCOP1_48_INSN_X_INVALID; mepcop1_48_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + } + } + case 8 : /* fall through */ + case 24 : /* fall through */ + case 40 : /* fall through */ + case 56 : /* fall through */ + case 72 : /* fall through */ + case 88 : /* fall through */ + case 104 : /* fall through */ + case 120 : /* fall through */ + case 136 : /* fall through */ + case 152 : /* fall through */ + case 168 : /* fall through */ + case 184 : /* fall through */ + case 200 : /* fall through */ + case 216 : /* fall through */ + case 232 : /* fall through */ + case 248 : /* fall through */ + case 264 : /* fall through */ + case 280 : /* fall through */ + case 296 : /* fall through */ + case 312 : /* fall through */ + case 328 : /* fall through */ + case 344 : /* fall through */ + case 360 : /* fall through */ + case 376 : /* fall through */ + case 392 : /* fall through */ + case 408 : /* fall through */ + case 424 : /* fall through */ + case 440 : /* fall through */ + case 456 : /* fall through */ + case 472 : /* fall through */ + case 488 : /* fall through */ + case 504 : /* fall through */ + case 520 : /* fall through */ + case 536 : /* fall through */ + case 552 : /* fall through */ + case 568 : /* fall through */ + case 584 : /* fall through */ + case 600 : /* fall through */ + case 616 : /* fall through */ + case 632 : /* fall through */ + case 648 : /* fall through */ + case 664 : /* fall through */ + case 680 : /* fall through */ + case 696 : /* fall through */ + case 712 : /* fall through */ + case 728 : /* fall through */ + case 744 : /* fall through */ + case 760 : /* fall through */ + case 776 : /* fall through */ + case 792 : /* fall through */ + case 808 : /* fall through */ + case 824 : /* fall through */ + case 840 : /* fall through */ + case 856 : /* fall through */ + case 872 : /* fall through */ + case 888 : /* fall through */ + case 904 : /* fall through */ + case 920 : /* fall through */ + case 936 : /* fall through */ + case 952 : /* fall through */ + case 968 : /* fall through */ + case 984 : /* fall through */ + case 1000 : /* fall through */ + case 1016 : /* fall through */ + case 1032 : /* fall through */ + case 1048 : /* fall through */ + case 1064 : /* fall through */ + case 1080 : /* fall through */ + case 1096 : /* fall through */ + case 1112 : /* fall through */ + case 1128 : /* fall through */ + case 1144 : /* fall through */ + case 1160 : /* fall through */ + case 1176 : /* fall through */ + case 1192 : /* fall through */ + case 1208 : /* fall through */ + case 1224 : /* fall through */ + case 1240 : /* fall through */ + case 1256 : /* fall through */ + case 1272 : /* fall through */ + case 1288 : /* fall through */ + case 1304 : /* fall through */ + case 1320 : /* fall through */ + case 1336 : /* fall through */ + case 1352 : /* fall through */ + case 1368 : /* fall through */ + case 1384 : /* fall through */ + case 1400 : /* fall through */ + case 1416 : /* fall through */ + case 1432 : /* fall through */ + case 1448 : /* fall through */ + case 1464 : /* fall through */ + case 1480 : /* fall through */ + case 1496 : /* fall through */ + case 1512 : /* fall through */ + case 1528 : /* fall through */ + case 1544 : /* fall through */ + case 1560 : /* fall through */ + case 1576 : /* fall through */ + case 1592 : /* fall through */ + case 1608 : /* fall through */ + case 1624 : /* fall through */ + case 1640 : /* fall through */ + case 1656 : /* fall through */ + case 1672 : /* fall through */ + case 1688 : /* fall through */ + case 1704 : /* fall through */ + case 1720 : /* fall through */ + case 1736 : /* fall through */ + case 1752 : /* fall through */ + case 1768 : /* fall through */ + case 1784 : /* fall through */ + case 1800 : /* fall through */ + case 1816 : /* fall through */ + case 1832 : /* fall through */ + case 1848 : /* fall through */ + case 1864 : /* fall through */ + case 1880 : /* fall through */ + case 1896 : /* fall through */ + case 1912 : /* fall through */ + case 1928 : /* fall through */ + case 1944 : /* fall through */ + case 1960 : /* fall through */ + case 1976 : /* fall through */ + case 1992 : /* fall through */ + case 2008 : /* fall through */ + case 2024 : /* fall through */ + case 2040 : + if ((entire_insn & 0xf8000f) == 0x400000) + { itype = MEPCOP1_48_INSN_CPFSFTBI_P0_P1; mepcop1_48_extract_sfmt_cpfsftbi_P0_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_48_INSN_X_INVALID; mepcop1_48_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 14 : /* fall through */ + case 30 : /* fall through */ + case 46 : /* fall through */ + case 62 : /* fall through */ + case 78 : /* fall through */ + case 94 : /* fall through */ + case 110 : /* fall through */ + case 126 : /* fall through */ + case 142 : /* fall through */ + case 158 : /* fall through */ + case 174 : /* fall through */ + case 190 : /* fall through */ + case 206 : /* fall through */ + case 222 : /* fall through */ + case 238 : /* fall through */ + case 254 : /* fall through */ + case 270 : /* fall through */ + case 286 : /* fall through */ + case 302 : /* fall through */ + case 318 : /* fall through */ + case 334 : /* fall through */ + case 350 : /* fall through */ + case 366 : /* fall through */ + case 382 : /* fall through */ + case 398 : /* fall through */ + case 414 : /* fall through */ + case 430 : /* fall through */ + case 446 : /* fall through */ + case 462 : /* fall through */ + case 478 : /* fall through */ + case 494 : /* fall through */ + case 510 : /* fall through */ + case 526 : /* fall through */ + case 542 : /* fall through */ + case 558 : /* fall through */ + case 574 : /* fall through */ + case 590 : /* fall through */ + case 606 : /* fall through */ + case 622 : /* fall through */ + case 638 : /* fall through */ + case 654 : /* fall through */ + case 670 : /* fall through */ + case 686 : /* fall through */ + case 702 : /* fall through */ + case 718 : /* fall through */ + case 734 : /* fall through */ + case 750 : /* fall through */ + case 766 : /* fall through */ + case 782 : /* fall through */ + case 798 : /* fall through */ + case 814 : /* fall through */ + case 830 : /* fall through */ + case 846 : /* fall through */ + case 862 : /* fall through */ + case 878 : /* fall through */ + case 894 : /* fall through */ + case 910 : /* fall through */ + case 926 : /* fall through */ + case 942 : /* fall through */ + case 958 : /* fall through */ + case 974 : /* fall through */ + case 990 : /* fall through */ + case 1006 : /* fall through */ + case 1022 : /* fall through */ + case 1038 : /* fall through */ + case 1054 : /* fall through */ + case 1070 : /* fall through */ + case 1086 : /* fall through */ + case 1102 : /* fall through */ + case 1118 : /* fall through */ + case 1134 : /* fall through */ + case 1150 : /* fall through */ + case 1166 : /* fall through */ + case 1182 : /* fall through */ + case 1198 : /* fall through */ + case 1214 : /* fall through */ + case 1230 : /* fall through */ + case 1246 : /* fall through */ + case 1262 : /* fall through */ + case 1278 : /* fall through */ + case 1294 : /* fall through */ + case 1310 : /* fall through */ + case 1326 : /* fall through */ + case 1342 : /* fall through */ + case 1358 : /* fall through */ + case 1374 : /* fall through */ + case 1390 : /* fall through */ + case 1406 : /* fall through */ + case 1422 : /* fall through */ + case 1438 : /* fall through */ + case 1454 : /* fall through */ + case 1470 : /* fall through */ + case 1486 : /* fall through */ + case 1502 : /* fall through */ + case 1518 : /* fall through */ + case 1534 : /* fall through */ + case 1550 : /* fall through */ + case 1566 : /* fall through */ + case 1582 : /* fall through */ + case 1598 : /* fall through */ + case 1614 : /* fall through */ + case 1630 : /* fall through */ + case 1646 : /* fall through */ + case 1662 : /* fall through */ + case 1678 : /* fall through */ + case 1694 : /* fall through */ + case 1710 : /* fall through */ + case 1726 : /* fall through */ + case 1742 : /* fall through */ + case 1758 : /* fall through */ + case 1774 : /* fall through */ + case 1790 : /* fall through */ + case 1806 : /* fall through */ + case 1822 : /* fall through */ + case 1838 : /* fall through */ + case 1854 : /* fall through */ + case 1870 : /* fall through */ + case 1886 : /* fall through */ + case 1902 : /* fall through */ + case 1918 : /* fall through */ + case 1934 : /* fall through */ + case 1950 : /* fall through */ + case 1966 : /* fall through */ + case 1982 : /* fall through */ + case 1998 : /* fall through */ + case 2014 : /* fall through */ + case 2030 : /* fall through */ + case 2046 : + { + unsigned int val = (((insn >> 14) & (1 << 2)) | ((insn >> 8) & (3 << 0))); + switch (val) + { + case 0 : + if ((entire_insn & 0xfff7ff) == 0xf00000) + { itype = MEPCOP1_48_INSN_CMOV_CRN_RM_P0; mepcop1_48_extract_sfmt_cmov_crn_rm_p0 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_48_INSN_X_INVALID; mepcop1_48_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 1 : + if ((entire_insn & 0xfff7ff) == 0xf00100) + { itype = MEPCOP1_48_INSN_CMOV_RN_CRM_P0; mepcop1_48_extract_sfmt_cmov_rn_crm_p0 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_48_INSN_X_INVALID; mepcop1_48_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 2 : + if ((entire_insn & 0xfff3ff) == 0xf00200) + { itype = MEPCOP1_48_INSN_CMOVC_CCRN_RM_P0; mepcop1_48_extract_sfmt_cmovc_ccrn_rm_p0 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_48_INSN_X_INVALID; mepcop1_48_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 3 : + if ((entire_insn & 0xfff3ff) == 0xf00300) + { itype = MEPCOP1_48_INSN_CMOVC_RN_CCRM_P0; mepcop1_48_extract_sfmt_cmovc_rn_ccrm_p0 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_48_INSN_X_INVALID; mepcop1_48_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 4 : + if ((entire_insn & 0xfff7ff) == 0xf10000) + { itype = MEPCOP1_48_INSN_CMOVH_CRN_RM_P0; mepcop1_48_extract_sfmt_cmovh_crn_rm_p0 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_48_INSN_X_INVALID; mepcop1_48_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 5 : + if ((entire_insn & 0xfff7ff) == 0xf10100) + { itype = MEPCOP1_48_INSN_CMOVH_RN_CRM_P0; mepcop1_48_extract_sfmt_cmov_rn_crm_p0 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_48_INSN_X_INVALID; mepcop1_48_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + default : itype = MEPCOP1_48_INSN_X_INVALID; mepcop1_48_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + } + } + case 19 : + { + unsigned int val = (((insn >> 4) & (31 << 0))); + switch (val) + { + case 1 : + if ((entire_insn & 0xfff801ff) == 0x1980010) + { itype = MEPCOP1_48_INSN_CPOCMPEQ_B_P0_P1; mepcop1_48_extract_sfmt_cpacmpeq_b_P0_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_48_INSN_X_INVALID; mepcop1_48_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 3 : + if ((entire_insn & 0xfff801ff) == 0x1980030) + { itype = MEPCOP1_48_INSN_CPOCMPEQ_H_P0_P1; mepcop1_48_extract_sfmt_cpacmpeq_b_P0_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_48_INSN_X_INVALID; mepcop1_48_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 5 : + if ((entire_insn & 0xfff801ff) == 0x1980050) + { itype = MEPCOP1_48_INSN_CPOCMPEQ_W_P0_P1; mepcop1_48_extract_sfmt_cpacmpeq_b_P0_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_48_INSN_X_INVALID; mepcop1_48_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 9 : + if ((entire_insn & 0xfff801ff) == 0x1980090) + { itype = MEPCOP1_48_INSN_CPOCMPNE_B_P0_P1; mepcop1_48_extract_sfmt_cpacmpeq_b_P0_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_48_INSN_X_INVALID; mepcop1_48_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 11 : + if ((entire_insn & 0xfff801ff) == 0x19800b0) + { itype = MEPCOP1_48_INSN_CPOCMPNE_H_P0_P1; mepcop1_48_extract_sfmt_cpacmpeq_b_P0_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_48_INSN_X_INVALID; mepcop1_48_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 13 : + if ((entire_insn & 0xfff801ff) == 0x19800d0) + { itype = MEPCOP1_48_INSN_CPOCMPNE_W_P0_P1; mepcop1_48_extract_sfmt_cpacmpeq_b_P0_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_48_INSN_X_INVALID; mepcop1_48_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 16 : + if ((entire_insn & 0xfff801ff) == 0x1980100) + { itype = MEPCOP1_48_INSN_CPOCMPGTU_B_P0_P1; mepcop1_48_extract_sfmt_cpacmpeq_b_P0_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_48_INSN_X_INVALID; mepcop1_48_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 17 : + if ((entire_insn & 0xfff801ff) == 0x1980110) + { itype = MEPCOP1_48_INSN_CPOCMPGT_B_P0_P1; mepcop1_48_extract_sfmt_cpacmpeq_b_P0_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_48_INSN_X_INVALID; mepcop1_48_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 19 : + if ((entire_insn & 0xfff801ff) == 0x1980130) + { itype = MEPCOP1_48_INSN_CPOCMPGT_H_P0_P1; mepcop1_48_extract_sfmt_cpacmpeq_b_P0_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_48_INSN_X_INVALID; mepcop1_48_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 20 : + if ((entire_insn & 0xfff801ff) == 0x1980140) + { itype = MEPCOP1_48_INSN_CPOCMPGTU_W_P0_P1; mepcop1_48_extract_sfmt_cpacmpeq_b_P0_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_48_INSN_X_INVALID; mepcop1_48_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 21 : + if ((entire_insn & 0xfff801ff) == 0x1980150) + { itype = MEPCOP1_48_INSN_CPOCMPGT_W_P0_P1; mepcop1_48_extract_sfmt_cpacmpeq_b_P0_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_48_INSN_X_INVALID; mepcop1_48_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 24 : + if ((entire_insn & 0xfff801ff) == 0x1980180) + { itype = MEPCOP1_48_INSN_CPOCMPGEU_B_P0_P1; mepcop1_48_extract_sfmt_cpacmpeq_b_P0_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_48_INSN_X_INVALID; mepcop1_48_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 25 : + if ((entire_insn & 0xfff801ff) == 0x1980190) + { itype = MEPCOP1_48_INSN_CPOCMPGE_B_P0_P1; mepcop1_48_extract_sfmt_cpacmpeq_b_P0_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_48_INSN_X_INVALID; mepcop1_48_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 27 : + if ((entire_insn & 0xfff801ff) == 0x19801b0) + { itype = MEPCOP1_48_INSN_CPOCMPGE_H_P0_P1; mepcop1_48_extract_sfmt_cpacmpeq_b_P0_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_48_INSN_X_INVALID; mepcop1_48_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 28 : + if ((entire_insn & 0xfff801ff) == 0x19801c0) + { itype = MEPCOP1_48_INSN_CPOCMPGEU_W_P0_P1; mepcop1_48_extract_sfmt_cpacmpeq_b_P0_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_48_INSN_X_INVALID; mepcop1_48_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 29 : + if ((entire_insn & 0xfff801ff) == 0x19801d0) + { itype = MEPCOP1_48_INSN_CPOCMPGE_W_P0_P1; mepcop1_48_extract_sfmt_cpacmpeq_b_P0_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_48_INSN_X_INVALID; mepcop1_48_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + default : itype = MEPCOP1_48_INSN_X_INVALID; mepcop1_48_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + } + } + case 52 : + if ((entire_insn & 0xfff8000f) == 0x3a00000) + { itype = MEPCOP1_48_INSN_CDADD3_P0_P1; mepcop1_48_extract_sfmt_cdadd3_P0_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_48_INSN_X_INVALID; mepcop1_48_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 68 : + if ((entire_insn & 0xfff8000f) == 0x4a00000) + { itype = MEPCOP1_48_INSN_CPSUB3_B_P0_P1; mepcop1_48_extract_sfmt_cdadd3_P0_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_48_INSN_X_INVALID; mepcop1_48_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 84 : + if ((entire_insn & 0xfff8000f) == 0x5a00000) + { itype = MEPCOP1_48_INSN_CPSUB3_H_P0_P1; mepcop1_48_extract_sfmt_cdadd3_P0_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_48_INSN_X_INVALID; mepcop1_48_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 100 : + if ((entire_insn & 0xfff8000f) == 0x6a00000) + { itype = MEPCOP1_48_INSN_CPSUB3_W_P0_P1; mepcop1_48_extract_sfmt_cdadd3_P0_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_48_INSN_X_INVALID; mepcop1_48_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 116 : + if ((entire_insn & 0xfff8000f) == 0x7a00000) + { itype = MEPCOP1_48_INSN_CDSUB3_P0_P1; mepcop1_48_extract_sfmt_cdadd3_P0_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_48_INSN_X_INVALID; mepcop1_48_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 164 : + if ((entire_insn & 0xfff8000f) == 0xaa00000) + { itype = MEPCOP1_48_INSN_CPSADD3_H_P0_P1; mepcop1_48_extract_sfmt_cdadd3_P0_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_48_INSN_X_INVALID; mepcop1_48_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 180 : + if ((entire_insn & 0xfff8000f) == 0xba00000) + { itype = MEPCOP1_48_INSN_CPSADD3_W_P0_P1; mepcop1_48_extract_sfmt_cdadd3_P0_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_48_INSN_X_INVALID; mepcop1_48_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 228 : + if ((entire_insn & 0xfff8000f) == 0xea00000) + { itype = MEPCOP1_48_INSN_CPSSUB3_H_P0_P1; mepcop1_48_extract_sfmt_cdadd3_P0_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_48_INSN_X_INVALID; mepcop1_48_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 244 : + if ((entire_insn & 0xfff8000f) == 0xfa00000) + { itype = MEPCOP1_48_INSN_CPSSUB3_W_P0_P1; mepcop1_48_extract_sfmt_cdadd3_P0_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_48_INSN_X_INVALID; mepcop1_48_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 260 : + if ((entire_insn & 0xfff8000f) == 0x10a00000) + { itype = MEPCOP1_48_INSN_CPEXTUADDU3_B_P0_P1; mepcop1_48_extract_sfmt_cdadd3_P0_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_48_INSN_X_INVALID; mepcop1_48_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 276 : + if ((entire_insn & 0xfff8000f) == 0x11a00000) + { itype = MEPCOP1_48_INSN_CPEXTUADD3_B_P0_P1; mepcop1_48_extract_sfmt_cdadd3_P0_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_48_INSN_X_INVALID; mepcop1_48_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 292 : + if ((entire_insn & 0xfff8000f) == 0x12a00000) + { itype = MEPCOP1_48_INSN_CPEXTLADDU3_B_P0_P1; mepcop1_48_extract_sfmt_cdadd3_P0_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_48_INSN_X_INVALID; mepcop1_48_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 308 : + if ((entire_insn & 0xfff8000f) == 0x13a00000) + { itype = MEPCOP1_48_INSN_CPEXTLADD3_B_P0_P1; mepcop1_48_extract_sfmt_cdadd3_P0_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_48_INSN_X_INVALID; mepcop1_48_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 324 : + if ((entire_insn & 0xfff8000f) == 0x14a00000) + { itype = MEPCOP1_48_INSN_CPEXTUSUBU3_B_P0_P1; mepcop1_48_extract_sfmt_cdadd3_P0_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_48_INSN_X_INVALID; mepcop1_48_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 340 : + if ((entire_insn & 0xfff8000f) == 0x15a00000) + { itype = MEPCOP1_48_INSN_CPEXTUSUB3_B_P0_P1; mepcop1_48_extract_sfmt_cdadd3_P0_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_48_INSN_X_INVALID; mepcop1_48_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 356 : + if ((entire_insn & 0xfff8000f) == 0x16a00000) + { itype = MEPCOP1_48_INSN_CPEXTLSUBU3_B_P0_P1; mepcop1_48_extract_sfmt_cdadd3_P0_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_48_INSN_X_INVALID; mepcop1_48_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 372 : + if ((entire_insn & 0xfff8000f) == 0x17a00000) + { itype = MEPCOP1_48_INSN_CPEXTLSUB3_B_P0_P1; mepcop1_48_extract_sfmt_cdadd3_P0_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_48_INSN_X_INVALID; mepcop1_48_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 388 : + if ((entire_insn & 0xfff8000f) == 0x18a00000) + { itype = MEPCOP1_48_INSN_CPAVEU3_B_P0_P1; mepcop1_48_extract_sfmt_cdadd3_P0_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_48_INSN_X_INVALID; mepcop1_48_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 404 : + if ((entire_insn & 0xfff8000f) == 0x19a00000) + { itype = MEPCOP1_48_INSN_CPAVE3_B_P0_P1; mepcop1_48_extract_sfmt_cdadd3_P0_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_48_INSN_X_INVALID; mepcop1_48_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 420 : + if ((entire_insn & 0xfff8000f) == 0x1aa00000) + { itype = MEPCOP1_48_INSN_CPAVE3_H_P0_P1; mepcop1_48_extract_sfmt_cdadd3_P0_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_48_INSN_X_INVALID; mepcop1_48_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 436 : + if ((entire_insn & 0xfff8000f) == 0x1ba00000) + { itype = MEPCOP1_48_INSN_CPAVE3_W_P0_P1; mepcop1_48_extract_sfmt_cdadd3_P0_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_48_INSN_X_INVALID; mepcop1_48_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 452 : + if ((entire_insn & 0xfff8000f) == 0x1ca00000) + { itype = MEPCOP1_48_INSN_CPADDSRU3_B_P0_P1; mepcop1_48_extract_sfmt_cdadd3_P0_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_48_INSN_X_INVALID; mepcop1_48_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 468 : + if ((entire_insn & 0xfff8000f) == 0x1da00000) + { itype = MEPCOP1_48_INSN_CPADDSR3_B_P0_P1; mepcop1_48_extract_sfmt_cdadd3_P0_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_48_INSN_X_INVALID; mepcop1_48_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 484 : + if ((entire_insn & 0xfff8000f) == 0x1ea00000) + { itype = MEPCOP1_48_INSN_CPADDSR3_H_P0_P1; mepcop1_48_extract_sfmt_cdadd3_P0_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_48_INSN_X_INVALID; mepcop1_48_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 500 : + if ((entire_insn & 0xfff8000f) == 0x1fa00000) + { itype = MEPCOP1_48_INSN_CPADDSR3_W_P0_P1; mepcop1_48_extract_sfmt_cdadd3_P0_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_48_INSN_X_INVALID; mepcop1_48_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 516 : + if ((entire_insn & 0xfff8000f) == 0x20a00000) + { itype = MEPCOP1_48_INSN_CPABSU3_B_P0_P1; mepcop1_48_extract_sfmt_cdadd3_P0_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_48_INSN_X_INVALID; mepcop1_48_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 532 : + if ((entire_insn & 0xfff8000f) == 0x21a00000) + { itype = MEPCOP1_48_INSN_CPABS3_B_P0_P1; mepcop1_48_extract_sfmt_cdadd3_P0_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_48_INSN_X_INVALID; mepcop1_48_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 548 : + if ((entire_insn & 0xfff8000f) == 0x22a00000) + { itype = MEPCOP1_48_INSN_CPABS3_H_P0_P1; mepcop1_48_extract_sfmt_cdadd3_P0_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_48_INSN_X_INVALID; mepcop1_48_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 580 : + if ((entire_insn & 0xfff8000f) == 0x24a00000) + { itype = MEPCOP1_48_INSN_CPAND3_P0_P1; mepcop1_48_extract_sfmt_cdadd3_P0_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_48_INSN_X_INVALID; mepcop1_48_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 596 : + if ((entire_insn & 0xfff8000f) == 0x25a00000) + { itype = MEPCOP1_48_INSN_CPOR3_P0_P1; mepcop1_48_extract_sfmt_cdadd3_P0_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_48_INSN_X_INVALID; mepcop1_48_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 612 : + if ((entire_insn & 0xfff8000f) == 0x26a00000) + { itype = MEPCOP1_48_INSN_CPNOR3_P0_P1; mepcop1_48_extract_sfmt_cdadd3_P0_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_48_INSN_X_INVALID; mepcop1_48_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 628 : + if ((entire_insn & 0xfff8000f) == 0x27a00000) + { itype = MEPCOP1_48_INSN_CPXOR3_P0_P1; mepcop1_48_extract_sfmt_cdadd3_P0_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_48_INSN_X_INVALID; mepcop1_48_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 708 : + if ((entire_insn & 0xfff8000f) == 0x2ca00000) + { itype = MEPCOP1_48_INSN_CPPACKU_B_P0_P1; mepcop1_48_extract_sfmt_cdadd3_P0_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_48_INSN_X_INVALID; mepcop1_48_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 724 : + if ((entire_insn & 0xfff8000f) == 0x2da00000) + { itype = MEPCOP1_48_INSN_CPPACK_B_P0_P1; mepcop1_48_extract_sfmt_cdadd3_P0_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_48_INSN_X_INVALID; mepcop1_48_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 756 : + if ((entire_insn & 0xfff8000f) == 0x2fa00000) + { itype = MEPCOP1_48_INSN_CPPACK_H_P0_P1; mepcop1_48_extract_sfmt_cdadd3_P0_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_48_INSN_X_INVALID; mepcop1_48_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 772 : + if ((entire_insn & 0xfff8000f) == 0x30a00000) + { itype = MEPCOP1_48_INSN_CPMAXU3_B_P0_P1; mepcop1_48_extract_sfmt_cdadd3_P0_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_48_INSN_X_INVALID; mepcop1_48_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 788 : + if ((entire_insn & 0xfff8000f) == 0x31a00000) + { itype = MEPCOP1_48_INSN_CPMAX3_B_P0_P1; mepcop1_48_extract_sfmt_cdadd3_P0_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_48_INSN_X_INVALID; mepcop1_48_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 820 : + if ((entire_insn & 0xfff8000f) == 0x33a00000) + { itype = MEPCOP1_48_INSN_CPMAX3_H_P0_P1; mepcop1_48_extract_sfmt_cdadd3_P0_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_48_INSN_X_INVALID; mepcop1_48_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 836 : + if ((entire_insn & 0xfff8000f) == 0x34a00000) + { itype = MEPCOP1_48_INSN_CPMAXU3_W_P0_P1; mepcop1_48_extract_sfmt_cdadd3_P0_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_48_INSN_X_INVALID; mepcop1_48_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 852 : + if ((entire_insn & 0xfff8000f) == 0x35a00000) + { itype = MEPCOP1_48_INSN_CPMAX3_W_P0_P1; mepcop1_48_extract_sfmt_cdadd3_P0_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_48_INSN_X_INVALID; mepcop1_48_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 900 : + if ((entire_insn & 0xfff8000f) == 0x38a00000) + { itype = MEPCOP1_48_INSN_CPMINU3_B_P0_P1; mepcop1_48_extract_sfmt_cdadd3_P0_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_48_INSN_X_INVALID; mepcop1_48_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 916 : + if ((entire_insn & 0xfff8000f) == 0x39a00000) + { itype = MEPCOP1_48_INSN_CPMIN3_B_P0_P1; mepcop1_48_extract_sfmt_cdadd3_P0_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_48_INSN_X_INVALID; mepcop1_48_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 948 : + if ((entire_insn & 0xfff8000f) == 0x3ba00000) + { itype = MEPCOP1_48_INSN_CPMIN3_H_P0_P1; mepcop1_48_extract_sfmt_cdadd3_P0_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_48_INSN_X_INVALID; mepcop1_48_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 964 : + if ((entire_insn & 0xfff8000f) == 0x3ca00000) + { itype = MEPCOP1_48_INSN_CPMINU3_W_P0_P1; mepcop1_48_extract_sfmt_cdadd3_P0_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_48_INSN_X_INVALID; mepcop1_48_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 980 : + if ((entire_insn & 0xfff8000f) == 0x3da00000) + { itype = MEPCOP1_48_INSN_CPMIN3_W_P0_P1; mepcop1_48_extract_sfmt_cdadd3_P0_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_48_INSN_X_INVALID; mepcop1_48_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 1028 : + if ((entire_insn & 0xfff8000f) == 0x40a00000) + { itype = MEPCOP1_48_INSN_CPSRL3_B_P0_P1; mepcop1_48_extract_sfmt_cdadd3_P0_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_48_INSN_X_INVALID; mepcop1_48_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 1044 : + if ((entire_insn & 0xfff8000f) == 0x41a00000) + { itype = MEPCOP1_48_INSN_CPSSRL3_B_P0_P1; mepcop1_48_extract_sfmt_cdadd3_P0_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_48_INSN_X_INVALID; mepcop1_48_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 1060 : + if ((entire_insn & 0xfff8000f) == 0x42a00000) + { itype = MEPCOP1_48_INSN_CPSRL3_H_P0_P1; mepcop1_48_extract_sfmt_cdadd3_P0_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_48_INSN_X_INVALID; mepcop1_48_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 1076 : + if ((entire_insn & 0xfff8000f) == 0x43a00000) + { itype = MEPCOP1_48_INSN_CPSSRL3_H_P0_P1; mepcop1_48_extract_sfmt_cdadd3_P0_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_48_INSN_X_INVALID; mepcop1_48_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 1092 : + if ((entire_insn & 0xfff8000f) == 0x44a00000) + { itype = MEPCOP1_48_INSN_CPSRL3_W_P0_P1; mepcop1_48_extract_sfmt_cdadd3_P0_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_48_INSN_X_INVALID; mepcop1_48_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 1108 : + if ((entire_insn & 0xfff8000f) == 0x45a00000) + { itype = MEPCOP1_48_INSN_CPSSRL3_W_P0_P1; mepcop1_48_extract_sfmt_cdadd3_P0_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_48_INSN_X_INVALID; mepcop1_48_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 1124 : + if ((entire_insn & 0xfff8000f) == 0x46a00000) + { itype = MEPCOP1_48_INSN_CDSRL3_P0_P1; mepcop1_48_extract_sfmt_cdadd3_P0_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_48_INSN_X_INVALID; mepcop1_48_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 1156 : + if ((entire_insn & 0xfff8000f) == 0x48a00000) + { itype = MEPCOP1_48_INSN_CPSRA3_B_P0_P1; mepcop1_48_extract_sfmt_cdadd3_P0_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_48_INSN_X_INVALID; mepcop1_48_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 1172 : + if ((entire_insn & 0xfff8000f) == 0x49a00000) + { itype = MEPCOP1_48_INSN_CPSSRA3_B_P0_P1; mepcop1_48_extract_sfmt_cdadd3_P0_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_48_INSN_X_INVALID; mepcop1_48_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 1188 : + if ((entire_insn & 0xfff8000f) == 0x4aa00000) + { itype = MEPCOP1_48_INSN_CPSRA3_H_P0_P1; mepcop1_48_extract_sfmt_cdadd3_P0_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_48_INSN_X_INVALID; mepcop1_48_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 1204 : + if ((entire_insn & 0xfff8000f) == 0x4ba00000) + { itype = MEPCOP1_48_INSN_CPSSRA3_H_P0_P1; mepcop1_48_extract_sfmt_cdadd3_P0_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_48_INSN_X_INVALID; mepcop1_48_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 1220 : + if ((entire_insn & 0xfff8000f) == 0x4ca00000) + { itype = MEPCOP1_48_INSN_CPSRA3_W_P0_P1; mepcop1_48_extract_sfmt_cdadd3_P0_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_48_INSN_X_INVALID; mepcop1_48_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 1236 : + if ((entire_insn & 0xfff8000f) == 0x4da00000) + { itype = MEPCOP1_48_INSN_CPSSRA3_W_P0_P1; mepcop1_48_extract_sfmt_cdadd3_P0_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_48_INSN_X_INVALID; mepcop1_48_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 1252 : + if ((entire_insn & 0xfff8000f) == 0x4ea00000) + { itype = MEPCOP1_48_INSN_CDSRA3_P0_P1; mepcop1_48_extract_sfmt_cdadd3_P0_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_48_INSN_X_INVALID; mepcop1_48_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 1284 : + if ((entire_insn & 0xfff8000f) == 0x50a00000) + { itype = MEPCOP1_48_INSN_CPSLL3_B_P0_P1; mepcop1_48_extract_sfmt_cdadd3_P0_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_48_INSN_X_INVALID; mepcop1_48_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 1300 : + if ((entire_insn & 0xfff8000f) == 0x51a00000) + { itype = MEPCOP1_48_INSN_CPSSLL3_B_P0_P1; mepcop1_48_extract_sfmt_cdadd3_P0_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_48_INSN_X_INVALID; mepcop1_48_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 1316 : + if ((entire_insn & 0xfff8000f) == 0x52a00000) + { itype = MEPCOP1_48_INSN_CPSLL3_H_P0_P1; mepcop1_48_extract_sfmt_cdadd3_P0_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_48_INSN_X_INVALID; mepcop1_48_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 1332 : + if ((entire_insn & 0xfff8000f) == 0x53a00000) + { itype = MEPCOP1_48_INSN_CPSSLL3_H_P0_P1; mepcop1_48_extract_sfmt_cdadd3_P0_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_48_INSN_X_INVALID; mepcop1_48_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 1348 : + if ((entire_insn & 0xfff8000f) == 0x54a00000) + { itype = MEPCOP1_48_INSN_CPSLL3_W_P0_P1; mepcop1_48_extract_sfmt_cdadd3_P0_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_48_INSN_X_INVALID; mepcop1_48_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 1364 : + if ((entire_insn & 0xfff8000f) == 0x55a00000) + { itype = MEPCOP1_48_INSN_CPSSLL3_W_P0_P1; mepcop1_48_extract_sfmt_cdadd3_P0_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_48_INSN_X_INVALID; mepcop1_48_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 1380 : + if ((entire_insn & 0xfff8000f) == 0x56a00000) + { itype = MEPCOP1_48_INSN_CDSLL3_P0_P1; mepcop1_48_extract_sfmt_cdadd3_P0_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_48_INSN_X_INVALID; mepcop1_48_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 1444 : + if ((entire_insn & 0xfff8000f) == 0x5aa00000) + { itype = MEPCOP1_48_INSN_CPSLA3_H_P0_P1; mepcop1_48_extract_sfmt_cdadd3_P0_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_48_INSN_X_INVALID; mepcop1_48_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 1476 : + if ((entire_insn & 0xfff8000f) == 0x5ca00000) + { itype = MEPCOP1_48_INSN_CPSLA3_W_P0_P1; mepcop1_48_extract_sfmt_cdadd3_P0_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_48_INSN_X_INVALID; mepcop1_48_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + default : itype = MEPCOP1_48_INSN_X_INVALID; mepcop1_48_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + } + } + + } + + /* The instruction has been decoded and fields extracted. */ + done: + + this->addr = pc; + // FIXME: To be redone (to handle ISA variants). + this->idesc = & mepcop1_48_idesc::idesc_table[itype]; + // ??? record semantic handler? + assert(this->idesc->sem_index == itype); +} + +void +mepcop1_48_extract_sfmt_empty (mepcop1_48_scache* abuf, mep_ext1_cpu* current_cpu, PCADDR pc, mepcop1_48_insn_word base_insn, mepcop1_48_insn_word entire_insn){ + mepcop1_48_insn_word insn = entire_insn; +#define FLD(f) abuf->fields.fmt_empty.f + + + /* Record the fields for the semantic handler. */ + if (UNLIKELY(current_cpu->trace_extract_p)) + { + current_cpu->trace_stream + << "0x" << hex << pc << dec << " (sfmt_empty)\t" + << endl; + } + +#undef FLD +} + +void +mepcop1_48_extract_sfmt_cmov_crn_rm_p0 (mepcop1_48_scache* abuf, mep_ext1_cpu* current_cpu, PCADDR pc, mepcop1_48_insn_word base_insn, mepcop1_48_insn_word entire_insn){ + mepcop1_48_insn_word insn = entire_insn; +#define FLD(f) abuf->fields.sfmt_cmov_crn_rm_p0.f + UINT f_ivc2_ccrn_lo; + UINT f_ivc2_crm; + UINT f_ivc2_ccrn_h1; + UINT f_ivc2_crnx; + + f_ivc2_ccrn_lo = EXTRACT_MSB0_UINT (insn, 32, 0, 4); + f_ivc2_crm = EXTRACT_MSB0_UINT (insn, 32, 4, 4); + f_ivc2_ccrn_h1 = EXTRACT_MSB0_UINT (insn, 32, 20, 1); + f_ivc2_crnx = ((((f_ivc2_ccrn_h1) << (4))) | (f_ivc2_ccrn_lo)); + + /* Record the fields for the semantic handler. */ + FLD (f_ivc2_crm) = f_ivc2_crm; + FLD (f_ivc2_crnx) = f_ivc2_crnx; + FLD (i_ivc2rm) = & current_cpu->hardware.h_gpr[f_ivc2_crm]; + if (UNLIKELY(current_cpu->trace_extract_p)) + { + current_cpu->trace_stream + << "0x" << hex << pc << dec << " (sfmt_cmov_crn_rm_p0)\t" + << " f_ivc2_crm:0x" << hex << f_ivc2_crm << dec + << " f_ivc2_crnx:0x" << hex << f_ivc2_crnx << dec + << endl; + } + + /* Record the fields for profiling. */ + if (UNLIKELY (current_cpu->trace_counter_p || current_cpu->final_insn_count_p)) + { + FLD (in_ivc2rm) = f_ivc2_crm; + } +#undef FLD +} + +void +mepcop1_48_extract_sfmt_cmov_rn_crm_p0 (mepcop1_48_scache* abuf, mep_ext1_cpu* current_cpu, PCADDR pc, mepcop1_48_insn_word base_insn, mepcop1_48_insn_word entire_insn){ + mepcop1_48_insn_word insn = entire_insn; +#define FLD(f) abuf->fields.sfmt_cmov_rn_crm_p0.f + UINT f_ivc2_ccrn_lo; + UINT f_ivc2_crm; + UINT f_ivc2_ccrn_h1; + UINT f_ivc2_crnx; + + f_ivc2_ccrn_lo = EXTRACT_MSB0_UINT (insn, 32, 0, 4); + f_ivc2_crm = EXTRACT_MSB0_UINT (insn, 32, 4, 4); + f_ivc2_ccrn_h1 = EXTRACT_MSB0_UINT (insn, 32, 20, 1); + f_ivc2_crnx = ((((f_ivc2_ccrn_h1) << (4))) | (f_ivc2_ccrn_lo)); + + /* Record the fields for the semantic handler. */ + FLD (f_ivc2_crnx) = f_ivc2_crnx; + FLD (f_ivc2_crm) = f_ivc2_crm; + FLD (i_ivc2rm) = & current_cpu->hardware.h_gpr[f_ivc2_crm]; + if (UNLIKELY(current_cpu->trace_extract_p)) + { + current_cpu->trace_stream + << "0x" << hex << pc << dec << " (sfmt_cmov_rn_crm_p0)\t" + << " f_ivc2_crnx:0x" << hex << f_ivc2_crnx << dec + << " f_ivc2_crm:0x" << hex << f_ivc2_crm << dec + << endl; + } + + /* Record the fields for profiling. */ + if (UNLIKELY (current_cpu->trace_counter_p || current_cpu->final_insn_count_p)) + { + FLD (out_ivc2rm) = f_ivc2_crm; + } +#undef FLD +} + +void +mepcop1_48_extract_sfmt_cmovc_ccrn_rm_p0 (mepcop1_48_scache* abuf, mep_ext1_cpu* current_cpu, PCADDR pc, mepcop1_48_insn_word base_insn, mepcop1_48_insn_word entire_insn){ + mepcop1_48_insn_word insn = entire_insn; +#define FLD(f) abuf->fields.sfmt_cmovc_ccrn_rm_p0.f + UINT f_ivc2_ccrn_lo; + UINT f_ivc2_crm; + UINT f_ivc2_ccrn_h2; + UINT f_ivc2_ccrn; + + f_ivc2_ccrn_lo = EXTRACT_MSB0_UINT (insn, 32, 0, 4); + f_ivc2_crm = EXTRACT_MSB0_UINT (insn, 32, 4, 4); + f_ivc2_ccrn_h2 = EXTRACT_MSB0_UINT (insn, 32, 20, 2); + f_ivc2_ccrn = ((((f_ivc2_ccrn_h2) << (4))) | (f_ivc2_ccrn_lo)); + + /* Record the fields for the semantic handler. */ + FLD (f_ivc2_crm) = f_ivc2_crm; + FLD (f_ivc2_ccrn) = f_ivc2_ccrn; + FLD (i_ivc2rm) = & current_cpu->hardware.h_gpr[f_ivc2_crm]; + if (UNLIKELY(current_cpu->trace_extract_p)) + { + current_cpu->trace_stream + << "0x" << hex << pc << dec << " (sfmt_cmovc_ccrn_rm_p0)\t" + << " f_ivc2_crm:0x" << hex << f_ivc2_crm << dec + << " f_ivc2_ccrn:0x" << hex << f_ivc2_ccrn << dec + << endl; + } + + /* Record the fields for profiling. */ + if (UNLIKELY (current_cpu->trace_counter_p || current_cpu->final_insn_count_p)) + { + FLD (in_ivc2rm) = f_ivc2_crm; + } +#undef FLD +} + +void +mepcop1_48_extract_sfmt_cmovc_rn_ccrm_p0 (mepcop1_48_scache* abuf, mep_ext1_cpu* current_cpu, PCADDR pc, mepcop1_48_insn_word base_insn, mepcop1_48_insn_word entire_insn){ + mepcop1_48_insn_word insn = entire_insn; +#define FLD(f) abuf->fields.sfmt_cmovc_rn_ccrm_p0.f + UINT f_ivc2_ccrn_lo; + UINT f_ivc2_crm; + UINT f_ivc2_ccrn_h2; + UINT f_ivc2_ccrn; + + f_ivc2_ccrn_lo = EXTRACT_MSB0_UINT (insn, 32, 0, 4); + f_ivc2_crm = EXTRACT_MSB0_UINT (insn, 32, 4, 4); + f_ivc2_ccrn_h2 = EXTRACT_MSB0_UINT (insn, 32, 20, 2); + f_ivc2_ccrn = ((((f_ivc2_ccrn_h2) << (4))) | (f_ivc2_ccrn_lo)); + + /* Record the fields for the semantic handler. */ + FLD (f_ivc2_ccrn) = f_ivc2_ccrn; + FLD (f_ivc2_crm) = f_ivc2_crm; + FLD (i_ivc2rm) = & current_cpu->hardware.h_gpr[f_ivc2_crm]; + if (UNLIKELY(current_cpu->trace_extract_p)) + { + current_cpu->trace_stream + << "0x" << hex << pc << dec << " (sfmt_cmovc_rn_ccrm_p0)\t" + << " f_ivc2_ccrn:0x" << hex << f_ivc2_ccrn << dec + << " f_ivc2_crm:0x" << hex << f_ivc2_crm << dec + << endl; + } + + /* Record the fields for profiling. */ + if (UNLIKELY (current_cpu->trace_counter_p || current_cpu->final_insn_count_p)) + { + FLD (out_ivc2rm) = f_ivc2_crm; + } +#undef FLD +} + +void +mepcop1_48_extract_sfmt_cmovh_crn_rm_p0 (mepcop1_48_scache* abuf, mep_ext1_cpu* current_cpu, PCADDR pc, mepcop1_48_insn_word base_insn, mepcop1_48_insn_word entire_insn){ + mepcop1_48_insn_word insn = entire_insn; +#define FLD(f) abuf->fields.sfmt_cmov_crn_rm_p0.f + UINT f_ivc2_ccrn_lo; + UINT f_ivc2_crm; + UINT f_ivc2_ccrn_h1; + UINT f_ivc2_crnx; + + f_ivc2_ccrn_lo = EXTRACT_MSB0_UINT (insn, 32, 0, 4); + f_ivc2_crm = EXTRACT_MSB0_UINT (insn, 32, 4, 4); + f_ivc2_ccrn_h1 = EXTRACT_MSB0_UINT (insn, 32, 20, 1); + f_ivc2_crnx = ((((f_ivc2_ccrn_h1) << (4))) | (f_ivc2_ccrn_lo)); + + /* Record the fields for the semantic handler. */ + FLD (f_ivc2_crnx) = f_ivc2_crnx; + FLD (f_ivc2_crm) = f_ivc2_crm; + FLD (i_ivc2rm) = & current_cpu->hardware.h_gpr[f_ivc2_crm]; + if (UNLIKELY(current_cpu->trace_extract_p)) + { + current_cpu->trace_stream + << "0x" << hex << pc << dec << " (sfmt_cmovh_crn_rm_p0)\t" + << " f_ivc2_crnx:0x" << hex << f_ivc2_crnx << dec + << " f_ivc2_crm:0x" << hex << f_ivc2_crm << dec + << endl; + } + + /* Record the fields for profiling. */ + if (UNLIKELY (current_cpu->trace_counter_p || current_cpu->final_insn_count_p)) + { + FLD (in_ivc2rm) = f_ivc2_crm; + } +#undef FLD +} + +void +mepcop1_48_extract_sfmt_c0nop_P0_P0S (mepcop1_48_scache* abuf, mep_ext1_cpu* current_cpu, PCADDR pc, mepcop1_48_insn_word base_insn, mepcop1_48_insn_word entire_insn){ + mepcop1_48_insn_word insn = entire_insn; +#define FLD(f) abuf->fields.fmt_empty.f + + + /* Record the fields for the semantic handler. */ + if (UNLIKELY(current_cpu->trace_extract_p)) + { + current_cpu->trace_stream + << "0x" << hex << pc << dec << " (sfmt_c0nop_P0_P0S)\t" + << endl; + } + + /* Record the fields for profiling. */ + if (UNLIKELY (current_cpu->trace_counter_p || current_cpu->final_insn_count_p)) + { + } +#undef FLD +} + +void +mepcop1_48_extract_sfmt_cpfsftbi_P0_P1 (mepcop1_48_scache* abuf, mep_ext1_cpu* current_cpu, PCADDR pc, mepcop1_48_insn_word base_insn, mepcop1_48_insn_word entire_insn){ + mepcop1_48_insn_word insn = entire_insn; +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + UINT f_ivc2_3u5; + UINT f_ivc2_5u13; + UINT f_ivc2_5u18; + UINT f_ivc2_5u23; + + f_ivc2_3u5 = EXTRACT_MSB0_UINT (insn, 32, 5, 3); + f_ivc2_5u13 = EXTRACT_MSB0_UINT (insn, 32, 13, 5); + f_ivc2_5u18 = EXTRACT_MSB0_UINT (insn, 32, 18, 5); + f_ivc2_5u23 = EXTRACT_MSB0_UINT (insn, 32, 23, 5); + + /* Record the fields for the semantic handler. */ + FLD (f_ivc2_5u18) = f_ivc2_5u18; + FLD (f_ivc2_5u13) = f_ivc2_5u13; + FLD (f_ivc2_3u5) = f_ivc2_3u5; + FLD (f_ivc2_5u23) = f_ivc2_5u23; + if (UNLIKELY(current_cpu->trace_extract_p)) + { + current_cpu->trace_stream + << "0x" << hex << pc << dec << " (sfmt_cpfsftbi_P0_P1)\t" + << " f_ivc2_5u18:0x" << hex << f_ivc2_5u18 << dec + << " f_ivc2_5u13:0x" << hex << f_ivc2_5u13 << dec + << " f_ivc2_3u5:0x" << hex << f_ivc2_3u5 << dec + << " f_ivc2_5u23:0x" << hex << f_ivc2_5u23 << dec + << endl; + } + + /* Record the fields for profiling. */ + if (UNLIKELY (current_cpu->trace_counter_p || current_cpu->final_insn_count_p)) + { + } +#undef FLD +} + +void +mepcop1_48_extract_sfmt_cpacmpeq_b_P0_P1 (mepcop1_48_scache* abuf, mep_ext1_cpu* current_cpu, PCADDR pc, mepcop1_48_insn_word base_insn, mepcop1_48_insn_word entire_insn){ + mepcop1_48_insn_word insn = entire_insn; +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + UINT f_ivc2_5u13; + UINT f_ivc2_5u18; + + f_ivc2_5u13 = EXTRACT_MSB0_UINT (insn, 32, 13, 5); + f_ivc2_5u18 = EXTRACT_MSB0_UINT (insn, 32, 18, 5); + + /* Record the fields for the semantic handler. */ + FLD (f_ivc2_5u18) = f_ivc2_5u18; + FLD (f_ivc2_5u13) = f_ivc2_5u13; + if (UNLIKELY(current_cpu->trace_extract_p)) + { + current_cpu->trace_stream + << "0x" << hex << pc << dec << " (sfmt_cpacmpeq_b_P0_P1)\t" + << " f_ivc2_5u18:0x" << hex << f_ivc2_5u18 << dec + << " f_ivc2_5u13:0x" << hex << f_ivc2_5u13 << dec + << endl; + } + + /* Record the fields for profiling. */ + if (UNLIKELY (current_cpu->trace_counter_p || current_cpu->final_insn_count_p)) + { + } +#undef FLD +} + +void +mepcop1_48_extract_sfmt_cdadd3_P0_P1 (mepcop1_48_scache* abuf, mep_ext1_cpu* current_cpu, PCADDR pc, mepcop1_48_insn_word base_insn, mepcop1_48_insn_word entire_insn){ + mepcop1_48_insn_word insn = entire_insn; +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + UINT f_ivc2_5u13; + UINT f_ivc2_5u18; + UINT f_ivc2_5u23; + + f_ivc2_5u13 = EXTRACT_MSB0_UINT (insn, 32, 13, 5); + f_ivc2_5u18 = EXTRACT_MSB0_UINT (insn, 32, 18, 5); + f_ivc2_5u23 = EXTRACT_MSB0_UINT (insn, 32, 23, 5); + + /* Record the fields for the semantic handler. */ + FLD (f_ivc2_5u18) = f_ivc2_5u18; + FLD (f_ivc2_5u13) = f_ivc2_5u13; + FLD (f_ivc2_5u23) = f_ivc2_5u23; + if (UNLIKELY(current_cpu->trace_extract_p)) + { + current_cpu->trace_stream + << "0x" << hex << pc << dec << " (sfmt_cdadd3_P0_P1)\t" + << " f_ivc2_5u18:0x" << hex << f_ivc2_5u18 << dec + << " f_ivc2_5u13:0x" << hex << f_ivc2_5u13 << dec + << " f_ivc2_5u23:0x" << hex << f_ivc2_5u23 << dec + << endl; + } + + /* Record the fields for profiling. */ + if (UNLIKELY (current_cpu->trace_counter_p || current_cpu->final_insn_count_p)) + { + } +#undef FLD +} + +void +mepcop1_48_extract_sfmt_cpsrli3_b_P0_P1 (mepcop1_48_scache* abuf, mep_ext1_cpu* current_cpu, PCADDR pc, mepcop1_48_insn_word base_insn, mepcop1_48_insn_word entire_insn){ + mepcop1_48_insn_word insn = entire_insn; +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + UINT f_ivc2_3u5; + UINT f_ivc2_5u13; + UINT f_ivc2_5u23; + + f_ivc2_3u5 = EXTRACT_MSB0_UINT (insn, 32, 5, 3); + f_ivc2_5u13 = EXTRACT_MSB0_UINT (insn, 32, 13, 5); + f_ivc2_5u23 = EXTRACT_MSB0_UINT (insn, 32, 23, 5); + + /* Record the fields for the semantic handler. */ + FLD (f_ivc2_5u13) = f_ivc2_5u13; + FLD (f_ivc2_3u5) = f_ivc2_3u5; + FLD (f_ivc2_5u23) = f_ivc2_5u23; + if (UNLIKELY(current_cpu->trace_extract_p)) + { + current_cpu->trace_stream + << "0x" << hex << pc << dec << " (sfmt_cpsrli3_b_P0_P1)\t" + << " f_ivc2_5u13:0x" << hex << f_ivc2_5u13 << dec + << " f_ivc2_3u5:0x" << hex << f_ivc2_3u5 << dec + << " f_ivc2_5u23:0x" << hex << f_ivc2_5u23 << dec + << endl; + } + + /* Record the fields for profiling. */ + if (UNLIKELY (current_cpu->trace_counter_p || current_cpu->final_insn_count_p)) + { + } +#undef FLD +} + +void +mepcop1_48_extract_sfmt_cpsrli3_h_P0_P1 (mepcop1_48_scache* abuf, mep_ext1_cpu* current_cpu, PCADDR pc, mepcop1_48_insn_word base_insn, mepcop1_48_insn_word entire_insn){ + mepcop1_48_insn_word insn = entire_insn; +#define FLD(f) abuf->fields.sfmt_cpsrli3_h_P0_P1.f + UINT f_ivc2_4u4; + UINT f_ivc2_5u13; + UINT f_ivc2_5u23; + + f_ivc2_4u4 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); + f_ivc2_5u13 = EXTRACT_MSB0_UINT (insn, 32, 13, 5); + f_ivc2_5u23 = EXTRACT_MSB0_UINT (insn, 32, 23, 5); + + /* Record the fields for the semantic handler. */ + FLD (f_ivc2_5u13) = f_ivc2_5u13; + FLD (f_ivc2_4u4) = f_ivc2_4u4; + FLD (f_ivc2_5u23) = f_ivc2_5u23; + if (UNLIKELY(current_cpu->trace_extract_p)) + { + current_cpu->trace_stream + << "0x" << hex << pc << dec << " (sfmt_cpsrli3_h_P0_P1)\t" + << " f_ivc2_5u13:0x" << hex << f_ivc2_5u13 << dec + << " f_ivc2_4u4:0x" << hex << f_ivc2_4u4 << dec + << " f_ivc2_5u23:0x" << hex << f_ivc2_5u23 << dec + << endl; + } + + /* Record the fields for profiling. */ + if (UNLIKELY (current_cpu->trace_counter_p || current_cpu->final_insn_count_p)) + { + } +#undef FLD +} + +void +mepcop1_48_extract_sfmt_cpsrli3_w_P0_P1 (mepcop1_48_scache* abuf, mep_ext1_cpu* current_cpu, PCADDR pc, mepcop1_48_insn_word base_insn, mepcop1_48_insn_word entire_insn){ + mepcop1_48_insn_word insn = entire_insn; +#define FLD(f) abuf->fields.sfmt_cpsrli3_w_P0_P1.f + UINT f_ivc2_5u3; + UINT f_ivc2_5u13; + UINT f_ivc2_5u23; + + f_ivc2_5u3 = EXTRACT_MSB0_UINT (insn, 32, 3, 5); + f_ivc2_5u13 = EXTRACT_MSB0_UINT (insn, 32, 13, 5); + f_ivc2_5u23 = EXTRACT_MSB0_UINT (insn, 32, 23, 5); + + /* Record the fields for the semantic handler. */ + FLD (f_ivc2_5u13) = f_ivc2_5u13; + FLD (f_ivc2_5u3) = f_ivc2_5u3; + FLD (f_ivc2_5u23) = f_ivc2_5u23; + if (UNLIKELY(current_cpu->trace_extract_p)) + { + current_cpu->trace_stream + << "0x" << hex << pc << dec << " (sfmt_cpsrli3_w_P0_P1)\t" + << " f_ivc2_5u13:0x" << hex << f_ivc2_5u13 << dec + << " f_ivc2_5u3:0x" << hex << f_ivc2_5u3 << dec + << " f_ivc2_5u23:0x" << hex << f_ivc2_5u23 << dec + << endl; + } + + /* Record the fields for profiling. */ + if (UNLIKELY (current_cpu->trace_counter_p || current_cpu->final_insn_count_p)) + { + } +#undef FLD +} + +void +mepcop1_48_extract_sfmt_cdsrli3_P0_P1 (mepcop1_48_scache* abuf, mep_ext1_cpu* current_cpu, PCADDR pc, mepcop1_48_insn_word base_insn, mepcop1_48_insn_word entire_insn){ + mepcop1_48_insn_word insn = entire_insn; +#define FLD(f) abuf->fields.sfmt_cdsrli3_P0_P1.f + UINT f_ivc2_6u2; + UINT f_ivc2_5u13; + UINT f_ivc2_5u23; + + f_ivc2_6u2 = EXTRACT_MSB0_UINT (insn, 32, 2, 6); + f_ivc2_5u13 = EXTRACT_MSB0_UINT (insn, 32, 13, 5); + f_ivc2_5u23 = EXTRACT_MSB0_UINT (insn, 32, 23, 5); + + /* Record the fields for the semantic handler. */ + FLD (f_ivc2_5u13) = f_ivc2_5u13; + FLD (f_ivc2_6u2) = f_ivc2_6u2; + FLD (f_ivc2_5u23) = f_ivc2_5u23; + if (UNLIKELY(current_cpu->trace_extract_p)) + { + current_cpu->trace_stream + << "0x" << hex << pc << dec << " (sfmt_cdsrli3_P0_P1)\t" + << " f_ivc2_5u13:0x" << hex << f_ivc2_5u13 << dec + << " f_ivc2_6u2:0x" << hex << f_ivc2_6u2 << dec + << " f_ivc2_5u23:0x" << hex << f_ivc2_5u23 << dec + << endl; + } + + /* Record the fields for profiling. */ + if (UNLIKELY (current_cpu->trace_counter_p || current_cpu->final_insn_count_p)) + { + } +#undef FLD +} + +void +mepcop1_48_extract_sfmt_cpmovi_h_P0_P1 (mepcop1_48_scache* abuf, mep_ext1_cpu* current_cpu, PCADDR pc, mepcop1_48_insn_word base_insn, mepcop1_48_insn_word entire_insn){ + mepcop1_48_insn_word insn = entire_insn; +#define FLD(f) abuf->fields.sfmt_cpmovi_h_P0_P1.f + UINT f_ivc2_8u0; + UINT f_ivc2_5u13; + UINT f_ivc2_8u20; + INT f_ivc2_simm16p0; + + f_ivc2_8u0 = EXTRACT_MSB0_UINT (insn, 32, 0, 8); + f_ivc2_5u13 = EXTRACT_MSB0_UINT (insn, 32, 13, 5); + f_ivc2_8u20 = EXTRACT_MSB0_UINT (insn, 32, 20, 8); +{ + f_ivc2_simm16p0 = ((f_ivc2_8u20) | (((f_ivc2_8u0) << (8)))); +} + + /* Record the fields for the semantic handler. */ + FLD (f_ivc2_simm16p0) = f_ivc2_simm16p0; + FLD (f_ivc2_5u13) = f_ivc2_5u13; + if (UNLIKELY(current_cpu->trace_extract_p)) + { + current_cpu->trace_stream + << "0x" << hex << pc << dec << " (sfmt_cpmovi_h_P0_P1)\t" + << " f_ivc2_simm16p0:0x" << hex << f_ivc2_simm16p0 << dec + << " f_ivc2_5u13:0x" << hex << f_ivc2_5u13 << dec + << endl; + } + + /* Record the fields for profiling. */ + if (UNLIKELY (current_cpu->trace_counter_p || current_cpu->final_insn_count_p)) + { + } +#undef FLD +} + +void +mepcop1_48_extract_sfmt_cpmoviu_w_P0_P1 (mepcop1_48_scache* abuf, mep_ext1_cpu* current_cpu, PCADDR pc, mepcop1_48_insn_word base_insn, mepcop1_48_insn_word entire_insn){ + mepcop1_48_insn_word insn = entire_insn; +#define FLD(f) abuf->fields.sfmt_cpmoviu_w_P0_P1.f + UINT f_ivc2_8u0; + UINT f_ivc2_5u13; + UINT f_ivc2_8u20; + UINT f_ivc2_imm16p0; + + f_ivc2_8u0 = EXTRACT_MSB0_UINT (insn, 32, 0, 8); + f_ivc2_5u13 = EXTRACT_MSB0_UINT (insn, 32, 13, 5); + f_ivc2_8u20 = EXTRACT_MSB0_UINT (insn, 32, 20, 8); +{ + f_ivc2_imm16p0 = ((f_ivc2_8u20) | (((f_ivc2_8u0) << (8)))); +} + + /* Record the fields for the semantic handler. */ + FLD (f_ivc2_imm16p0) = f_ivc2_imm16p0; + FLD (f_ivc2_5u13) = f_ivc2_5u13; + if (UNLIKELY(current_cpu->trace_extract_p)) + { + current_cpu->trace_stream + << "0x" << hex << pc << dec << " (sfmt_cpmoviu_w_P0_P1)\t" + << " f_ivc2_imm16p0:0x" << hex << f_ivc2_imm16p0 << dec + << " f_ivc2_5u13:0x" << hex << f_ivc2_5u13 << dec + << endl; + } + + /* Record the fields for profiling. */ + if (UNLIKELY (current_cpu->trace_counter_p || current_cpu->final_insn_count_p)) + { + } +#undef FLD +} + diff --git a/sid/component/cgen-cpu/mep/mep-cop1-48-decode.h b/sid/component/cgen-cpu/mep/mep-cop1-48-decode.h new file mode 100644 index 0000000000..05363eeb07 --- /dev/null +++ b/sid/component/cgen-cpu/mep/mep-cop1-48-decode.h @@ -0,0 +1,324 @@ +/* Decode header for mepcop1_48. + +THIS FILE IS MACHINE GENERATED WITH CGEN. + +Copyright (C) 2000-2007 Red Hat, Inc. + +This file is part of the Red Hat simulators. + + +*/ + +#ifndef MEPCOP1_48_DECODE_H +#define MEPCOP1_48_DECODE_H + +namespace mep_ext1 { + +using namespace cgen; +using namespace mep; + +typedef UINT mepcop1_48_insn_word; + +/* Enum declaration for instructions in cpu family mepcop1_48. */ +typedef enum mepcop1_48_insn_type { + MEPCOP1_48_INSN_X_INVALID, MEPCOP1_48_INSN_CMOV_CRN_RM_P0, MEPCOP1_48_INSN_CMOV_RN_CRM_P0, MEPCOP1_48_INSN_CMOVC_CCRN_RM_P0 + , MEPCOP1_48_INSN_CMOVC_RN_CCRM_P0, MEPCOP1_48_INSN_CMOVH_CRN_RM_P0, MEPCOP1_48_INSN_CMOVH_RN_CRM_P0, MEPCOP1_48_INSN_C0NOP_P0_P0S + , MEPCOP1_48_INSN_CPFSFTBI_P0_P1, MEPCOP1_48_INSN_CPACMPEQ_B_P0_P1, MEPCOP1_48_INSN_CPACMPEQ_H_P0_P1, MEPCOP1_48_INSN_CPACMPEQ_W_P0_P1 + , MEPCOP1_48_INSN_CPACMPNE_B_P0_P1, MEPCOP1_48_INSN_CPACMPNE_H_P0_P1, MEPCOP1_48_INSN_CPACMPNE_W_P0_P1, MEPCOP1_48_INSN_CPACMPGTU_B_P0_P1 + , MEPCOP1_48_INSN_CPACMPGT_B_P0_P1, MEPCOP1_48_INSN_CPACMPGT_H_P0_P1, MEPCOP1_48_INSN_CPACMPGTU_W_P0_P1, MEPCOP1_48_INSN_CPACMPGT_W_P0_P1 + , MEPCOP1_48_INSN_CPACMPGEU_B_P0_P1, MEPCOP1_48_INSN_CPACMPGE_B_P0_P1, MEPCOP1_48_INSN_CPACMPGE_H_P0_P1, MEPCOP1_48_INSN_CPACMPGEU_W_P0_P1 + , MEPCOP1_48_INSN_CPACMPGE_W_P0_P1, MEPCOP1_48_INSN_CPOCMPEQ_B_P0_P1, MEPCOP1_48_INSN_CPOCMPEQ_H_P0_P1, MEPCOP1_48_INSN_CPOCMPEQ_W_P0_P1 + , MEPCOP1_48_INSN_CPOCMPNE_B_P0_P1, MEPCOP1_48_INSN_CPOCMPNE_H_P0_P1, MEPCOP1_48_INSN_CPOCMPNE_W_P0_P1, MEPCOP1_48_INSN_CPOCMPGTU_B_P0_P1 + , MEPCOP1_48_INSN_CPOCMPGT_B_P0_P1, MEPCOP1_48_INSN_CPOCMPGT_H_P0_P1, MEPCOP1_48_INSN_CPOCMPGTU_W_P0_P1, MEPCOP1_48_INSN_CPOCMPGT_W_P0_P1 + , MEPCOP1_48_INSN_CPOCMPGEU_B_P0_P1, MEPCOP1_48_INSN_CPOCMPGE_B_P0_P1, MEPCOP1_48_INSN_CPOCMPGE_H_P0_P1, MEPCOP1_48_INSN_CPOCMPGEU_W_P0_P1 + , MEPCOP1_48_INSN_CPOCMPGE_W_P0_P1, MEPCOP1_48_INSN_CDADD3_P0_P1, MEPCOP1_48_INSN_CPSUB3_B_P0_P1, MEPCOP1_48_INSN_CPSUB3_H_P0_P1 + , MEPCOP1_48_INSN_CPSUB3_W_P0_P1, MEPCOP1_48_INSN_CDSUB3_P0_P1, MEPCOP1_48_INSN_CPSADD3_H_P0_P1, MEPCOP1_48_INSN_CPSADD3_W_P0_P1 + , MEPCOP1_48_INSN_CPSSUB3_H_P0_P1, MEPCOP1_48_INSN_CPSSUB3_W_P0_P1, MEPCOP1_48_INSN_CPEXTUADDU3_B_P0_P1, MEPCOP1_48_INSN_CPEXTUADD3_B_P0_P1 + , MEPCOP1_48_INSN_CPEXTLADDU3_B_P0_P1, MEPCOP1_48_INSN_CPEXTLADD3_B_P0_P1, MEPCOP1_48_INSN_CPEXTUSUBU3_B_P0_P1, MEPCOP1_48_INSN_CPEXTUSUB3_B_P0_P1 + , MEPCOP1_48_INSN_CPEXTLSUBU3_B_P0_P1, MEPCOP1_48_INSN_CPEXTLSUB3_B_P0_P1, MEPCOP1_48_INSN_CPAVEU3_B_P0_P1, MEPCOP1_48_INSN_CPAVE3_B_P0_P1 + , MEPCOP1_48_INSN_CPAVE3_H_P0_P1, MEPCOP1_48_INSN_CPAVE3_W_P0_P1, MEPCOP1_48_INSN_CPADDSRU3_B_P0_P1, MEPCOP1_48_INSN_CPADDSR3_B_P0_P1 + , MEPCOP1_48_INSN_CPADDSR3_H_P0_P1, MEPCOP1_48_INSN_CPADDSR3_W_P0_P1, MEPCOP1_48_INSN_CPABSU3_B_P0_P1, MEPCOP1_48_INSN_CPABS3_B_P0_P1 + , MEPCOP1_48_INSN_CPABS3_H_P0_P1, MEPCOP1_48_INSN_CPAND3_P0_P1, MEPCOP1_48_INSN_CPOR3_P0_P1, MEPCOP1_48_INSN_CPNOR3_P0_P1 + , MEPCOP1_48_INSN_CPXOR3_P0_P1, MEPCOP1_48_INSN_CPPACKU_B_P0_P1, MEPCOP1_48_INSN_CPPACK_B_P0_P1, MEPCOP1_48_INSN_CPPACK_H_P0_P1 + , MEPCOP1_48_INSN_CPMAXU3_B_P0_P1, MEPCOP1_48_INSN_CPMAX3_B_P0_P1, MEPCOP1_48_INSN_CPMAX3_H_P0_P1, MEPCOP1_48_INSN_CPMAXU3_W_P0_P1 + , MEPCOP1_48_INSN_CPMAX3_W_P0_P1, MEPCOP1_48_INSN_CPMINU3_B_P0_P1, MEPCOP1_48_INSN_CPMIN3_B_P0_P1, MEPCOP1_48_INSN_CPMIN3_H_P0_P1 + , MEPCOP1_48_INSN_CPMINU3_W_P0_P1, MEPCOP1_48_INSN_CPMIN3_W_P0_P1, MEPCOP1_48_INSN_CPSRL3_B_P0_P1, MEPCOP1_48_INSN_CPSSRL3_B_P0_P1 + , MEPCOP1_48_INSN_CPSRL3_H_P0_P1, MEPCOP1_48_INSN_CPSSRL3_H_P0_P1, MEPCOP1_48_INSN_CPSRL3_W_P0_P1, MEPCOP1_48_INSN_CPSSRL3_W_P0_P1 + , MEPCOP1_48_INSN_CDSRL3_P0_P1, MEPCOP1_48_INSN_CPSRA3_B_P0_P1, MEPCOP1_48_INSN_CPSSRA3_B_P0_P1, MEPCOP1_48_INSN_CPSRA3_H_P0_P1 + , MEPCOP1_48_INSN_CPSSRA3_H_P0_P1, MEPCOP1_48_INSN_CPSRA3_W_P0_P1, MEPCOP1_48_INSN_CPSSRA3_W_P0_P1, MEPCOP1_48_INSN_CDSRA3_P0_P1 + , MEPCOP1_48_INSN_CPSLL3_B_P0_P1, MEPCOP1_48_INSN_CPSSLL3_B_P0_P1, MEPCOP1_48_INSN_CPSLL3_H_P0_P1, MEPCOP1_48_INSN_CPSSLL3_H_P0_P1 + , MEPCOP1_48_INSN_CPSLL3_W_P0_P1, MEPCOP1_48_INSN_CPSSLL3_W_P0_P1, MEPCOP1_48_INSN_CDSLL3_P0_P1, MEPCOP1_48_INSN_CPSLA3_H_P0_P1 + , MEPCOP1_48_INSN_CPSLA3_W_P0_P1, MEPCOP1_48_INSN_CPSRLI3_B_P0_P1, MEPCOP1_48_INSN_CPSRLI3_H_P0_P1, MEPCOP1_48_INSN_CPSRLI3_W_P0_P1 + , MEPCOP1_48_INSN_CDSRLI3_P0_P1, MEPCOP1_48_INSN_CPSRAI3_B_P0_P1, MEPCOP1_48_INSN_CPSRAI3_H_P0_P1, MEPCOP1_48_INSN_CPSRAI3_W_P0_P1 + , MEPCOP1_48_INSN_CDSRAI3_P0_P1, MEPCOP1_48_INSN_CPSLLI3_B_P0_P1, MEPCOP1_48_INSN_CPSLLI3_H_P0_P1, MEPCOP1_48_INSN_CPSLLI3_W_P0_P1 + , MEPCOP1_48_INSN_CDSLLI3_P0_P1, MEPCOP1_48_INSN_CPSLAI3_H_P0_P1, MEPCOP1_48_INSN_CPSLAI3_W_P0_P1, MEPCOP1_48_INSN_CPCLIPIU3_W_P0_P1 + , MEPCOP1_48_INSN_CPCLIPI3_W_P0_P1, MEPCOP1_48_INSN_CDCLIPIU3_P0_P1, MEPCOP1_48_INSN_CDCLIPI3_P0_P1, MEPCOP1_48_INSN_CPMOVI_H_P0_P1 + , MEPCOP1_48_INSN_CPMOVIU_W_P0_P1, MEPCOP1_48_INSN_CPMOVI_W_P0_P1, MEPCOP1_48_INSN_CDMOVIU_P0_P1, MEPCOP1_48_INSN_CDMOVI_P0_P1 +} MEPCOP1_48_INSN_TYPE; + + +// Forward decls. +struct mep_ext1_cpu; +struct mepcop1_48_scache; +typedef sem_status (mepcop1_48_sem_fn) (mep_ext1_cpu* cpu, mepcop1_48_scache* sem); + + +// Instruction descriptor. + +struct mepcop1_48_idesc { + + // scache engine executor for this insn + mepcop1_48_sem_fn* execute; + + const char* insn_name; + enum mepcop1_48_insn_type sem_index; + mep_insn_attr attrs; + + // idesc table: indexed by sem_index + static mepcop1_48_idesc idesc_table[]; + + static mepcop1_48_insn_type lookup_virtual (virtual_insn_type vit); +}; + +// Instruction argument buffer. + +union mepcop1_48_sem_fields { + struct { /* no operands */ + int empty; + } fmt_empty; + struct { /* */ + UINT f_ivc2_5u13; + UINT f_ivc2_imm16p0; + } sfmt_cpmoviu_w_P0_P1; + struct { /* */ + INT f_ivc2_simm16p0; + UINT f_ivc2_5u13; + } sfmt_cpmovi_h_P0_P1; + struct { /* */ + UINT f_ivc2_5u13; + UINT f_ivc2_5u23; + UINT f_ivc2_6u2; + } sfmt_cdsrli3_P0_P1; + struct { /* */ + UINT f_ivc2_5u13; + UINT f_ivc2_5u23; + UINT f_ivc2_5u3; + } sfmt_cpsrli3_w_P0_P1; + struct { /* */ + UINT f_ivc2_4u4; + UINT f_ivc2_5u13; + UINT f_ivc2_5u23; + } sfmt_cpsrli3_h_P0_P1; + struct { /* */ + UINT f_ivc2_3u5; + UINT f_ivc2_5u13; + UINT f_ivc2_5u18; + UINT f_ivc2_5u23; + } sfmt_cpfsftbi_P0_P1; + struct { /* */ + SI* i_ivc2rm; + UINT f_ivc2_ccrn; + UINT f_ivc2_crm; + unsigned char out_ivc2rm; + } sfmt_cmovc_rn_ccrm_p0; + struct { /* */ + SI* i_ivc2rm; + UINT f_ivc2_ccrn; + UINT f_ivc2_crm; + unsigned char in_ivc2rm; + } sfmt_cmovc_ccrn_rm_p0; + struct { /* */ + SI* i_ivc2rm; + UINT f_ivc2_crm; + UINT f_ivc2_crnx; + unsigned char out_ivc2rm; + } sfmt_cmov_rn_crm_p0; + struct { /* */ + SI* i_ivc2rm; + UINT f_ivc2_crm; + UINT f_ivc2_crnx; + unsigned char in_ivc2rm; + } sfmt_cmov_crn_rm_p0; + // This one is for chain/cti-chain virtual insns. + struct { + // Number of insns in pbb. + unsigned insn_count; + // This is used by chain insns and by untaken conditional branches. + mepcop1_48_scache* next; + mepcop1_48_scache* branch_target; + } chain; + // This one is for `before' virtual insns. + struct { + // The cache entry of the real insn. + mepcop1_48_scache* insn; + } before; +}; + +// Simulator instruction cache. + +struct mepcop1_48_scache { + // executor + union { + cgoto_label cgoto; + mepcop1_48_sem_fn* fn; + } execute; + + // PC of this instruction. + PCADDR addr; + + // instruction class + mepcop1_48_idesc* idesc; + + // argument buffer + mepcop1_48_sem_fields fields; + + + // writeback flags + // Only used if profiling or parallel execution support enabled during + // file generation. + unsigned long long written; + + + // decode given instruction + void decode (mep_ext1_cpu* current_cpu, PCADDR pc, mepcop1_48_insn_word base_insn, mepcop1_48_insn_word entire_insn); +}; + +} // end mep_ext1 namespace + +// Decls of each semantic fn. + +using mep_ext1::mepcop1_48_sem_fn; +extern mepcop1_48_sem_fn mepcop1_48_sem_x_invalid; +extern mepcop1_48_sem_fn mepcop1_48_sem_cmov_crn_rm_p0; +extern mepcop1_48_sem_fn mepcop1_48_sem_cmov_rn_crm_p0; +extern mepcop1_48_sem_fn mepcop1_48_sem_cmovc_ccrn_rm_p0; +extern mepcop1_48_sem_fn mepcop1_48_sem_cmovc_rn_ccrm_p0; +extern mepcop1_48_sem_fn mepcop1_48_sem_cmovh_crn_rm_p0; +extern mepcop1_48_sem_fn mepcop1_48_sem_cmovh_rn_crm_p0; +extern mepcop1_48_sem_fn mepcop1_48_sem_c0nop_P0_P0S; +extern mepcop1_48_sem_fn mepcop1_48_sem_cpfsftbi_P0_P1; +extern mepcop1_48_sem_fn mepcop1_48_sem_cpacmpeq_b_P0_P1; +extern mepcop1_48_sem_fn mepcop1_48_sem_cpacmpeq_h_P0_P1; +extern mepcop1_48_sem_fn mepcop1_48_sem_cpacmpeq_w_P0_P1; +extern mepcop1_48_sem_fn mepcop1_48_sem_cpacmpne_b_P0_P1; +extern mepcop1_48_sem_fn mepcop1_48_sem_cpacmpne_h_P0_P1; +extern mepcop1_48_sem_fn mepcop1_48_sem_cpacmpne_w_P0_P1; +extern mepcop1_48_sem_fn mepcop1_48_sem_cpacmpgtu_b_P0_P1; +extern mepcop1_48_sem_fn mepcop1_48_sem_cpacmpgt_b_P0_P1; +extern mepcop1_48_sem_fn mepcop1_48_sem_cpacmpgt_h_P0_P1; +extern mepcop1_48_sem_fn mepcop1_48_sem_cpacmpgtu_w_P0_P1; +extern mepcop1_48_sem_fn mepcop1_48_sem_cpacmpgt_w_P0_P1; +extern mepcop1_48_sem_fn mepcop1_48_sem_cpacmpgeu_b_P0_P1; +extern mepcop1_48_sem_fn mepcop1_48_sem_cpacmpge_b_P0_P1; +extern mepcop1_48_sem_fn mepcop1_48_sem_cpacmpge_h_P0_P1; +extern mepcop1_48_sem_fn mepcop1_48_sem_cpacmpgeu_w_P0_P1; +extern mepcop1_48_sem_fn mepcop1_48_sem_cpacmpge_w_P0_P1; +extern mepcop1_48_sem_fn mepcop1_48_sem_cpocmpeq_b_P0_P1; +extern mepcop1_48_sem_fn mepcop1_48_sem_cpocmpeq_h_P0_P1; +extern mepcop1_48_sem_fn mepcop1_48_sem_cpocmpeq_w_P0_P1; +extern mepcop1_48_sem_fn mepcop1_48_sem_cpocmpne_b_P0_P1; +extern mepcop1_48_sem_fn mepcop1_48_sem_cpocmpne_h_P0_P1; +extern mepcop1_48_sem_fn mepcop1_48_sem_cpocmpne_w_P0_P1; +extern mepcop1_48_sem_fn mepcop1_48_sem_cpocmpgtu_b_P0_P1; +extern mepcop1_48_sem_fn mepcop1_48_sem_cpocmpgt_b_P0_P1; +extern mepcop1_48_sem_fn mepcop1_48_sem_cpocmpgt_h_P0_P1; +extern mepcop1_48_sem_fn mepcop1_48_sem_cpocmpgtu_w_P0_P1; +extern mepcop1_48_sem_fn mepcop1_48_sem_cpocmpgt_w_P0_P1; +extern mepcop1_48_sem_fn mepcop1_48_sem_cpocmpgeu_b_P0_P1; +extern mepcop1_48_sem_fn mepcop1_48_sem_cpocmpge_b_P0_P1; +extern mepcop1_48_sem_fn mepcop1_48_sem_cpocmpge_h_P0_P1; +extern mepcop1_48_sem_fn mepcop1_48_sem_cpocmpgeu_w_P0_P1; +extern mepcop1_48_sem_fn mepcop1_48_sem_cpocmpge_w_P0_P1; +extern mepcop1_48_sem_fn mepcop1_48_sem_cdadd3_P0_P1; +extern mepcop1_48_sem_fn mepcop1_48_sem_cpsub3_b_P0_P1; +extern mepcop1_48_sem_fn mepcop1_48_sem_cpsub3_h_P0_P1; +extern mepcop1_48_sem_fn mepcop1_48_sem_cpsub3_w_P0_P1; +extern mepcop1_48_sem_fn mepcop1_48_sem_cdsub3_P0_P1; +extern mepcop1_48_sem_fn mepcop1_48_sem_cpsadd3_h_P0_P1; +extern mepcop1_48_sem_fn mepcop1_48_sem_cpsadd3_w_P0_P1; +extern mepcop1_48_sem_fn mepcop1_48_sem_cpssub3_h_P0_P1; +extern mepcop1_48_sem_fn mepcop1_48_sem_cpssub3_w_P0_P1; +extern mepcop1_48_sem_fn mepcop1_48_sem_cpextuaddu3_b_P0_P1; +extern mepcop1_48_sem_fn mepcop1_48_sem_cpextuadd3_b_P0_P1; +extern mepcop1_48_sem_fn mepcop1_48_sem_cpextladdu3_b_P0_P1; +extern mepcop1_48_sem_fn mepcop1_48_sem_cpextladd3_b_P0_P1; +extern mepcop1_48_sem_fn mepcop1_48_sem_cpextusubu3_b_P0_P1; +extern mepcop1_48_sem_fn mepcop1_48_sem_cpextusub3_b_P0_P1; +extern mepcop1_48_sem_fn mepcop1_48_sem_cpextlsubu3_b_P0_P1; +extern mepcop1_48_sem_fn mepcop1_48_sem_cpextlsub3_b_P0_P1; +extern mepcop1_48_sem_fn mepcop1_48_sem_cpaveu3_b_P0_P1; +extern mepcop1_48_sem_fn mepcop1_48_sem_cpave3_b_P0_P1; +extern mepcop1_48_sem_fn mepcop1_48_sem_cpave3_h_P0_P1; +extern mepcop1_48_sem_fn mepcop1_48_sem_cpave3_w_P0_P1; +extern mepcop1_48_sem_fn mepcop1_48_sem_cpaddsru3_b_P0_P1; +extern mepcop1_48_sem_fn mepcop1_48_sem_cpaddsr3_b_P0_P1; +extern mepcop1_48_sem_fn mepcop1_48_sem_cpaddsr3_h_P0_P1; +extern mepcop1_48_sem_fn mepcop1_48_sem_cpaddsr3_w_P0_P1; +extern mepcop1_48_sem_fn mepcop1_48_sem_cpabsu3_b_P0_P1; +extern mepcop1_48_sem_fn mepcop1_48_sem_cpabs3_b_P0_P1; +extern mepcop1_48_sem_fn mepcop1_48_sem_cpabs3_h_P0_P1; +extern mepcop1_48_sem_fn mepcop1_48_sem_cpand3_P0_P1; +extern mepcop1_48_sem_fn mepcop1_48_sem_cpor3_P0_P1; +extern mepcop1_48_sem_fn mepcop1_48_sem_cpnor3_P0_P1; +extern mepcop1_48_sem_fn mepcop1_48_sem_cpxor3_P0_P1; +extern mepcop1_48_sem_fn mepcop1_48_sem_cppacku_b_P0_P1; +extern mepcop1_48_sem_fn mepcop1_48_sem_cppack_b_P0_P1; +extern mepcop1_48_sem_fn mepcop1_48_sem_cppack_h_P0_P1; +extern mepcop1_48_sem_fn mepcop1_48_sem_cpmaxu3_b_P0_P1; +extern mepcop1_48_sem_fn mepcop1_48_sem_cpmax3_b_P0_P1; +extern mepcop1_48_sem_fn mepcop1_48_sem_cpmax3_h_P0_P1; +extern mepcop1_48_sem_fn mepcop1_48_sem_cpmaxu3_w_P0_P1; +extern mepcop1_48_sem_fn mepcop1_48_sem_cpmax3_w_P0_P1; +extern mepcop1_48_sem_fn mepcop1_48_sem_cpminu3_b_P0_P1; +extern mepcop1_48_sem_fn mepcop1_48_sem_cpmin3_b_P0_P1; +extern mepcop1_48_sem_fn mepcop1_48_sem_cpmin3_h_P0_P1; +extern mepcop1_48_sem_fn mepcop1_48_sem_cpminu3_w_P0_P1; +extern mepcop1_48_sem_fn mepcop1_48_sem_cpmin3_w_P0_P1; +extern mepcop1_48_sem_fn mepcop1_48_sem_cpsrl3_b_P0_P1; +extern mepcop1_48_sem_fn mepcop1_48_sem_cpssrl3_b_P0_P1; +extern mepcop1_48_sem_fn mepcop1_48_sem_cpsrl3_h_P0_P1; +extern mepcop1_48_sem_fn mepcop1_48_sem_cpssrl3_h_P0_P1; +extern mepcop1_48_sem_fn mepcop1_48_sem_cpsrl3_w_P0_P1; +extern mepcop1_48_sem_fn mepcop1_48_sem_cpssrl3_w_P0_P1; +extern mepcop1_48_sem_fn mepcop1_48_sem_cdsrl3_P0_P1; +extern mepcop1_48_sem_fn mepcop1_48_sem_cpsra3_b_P0_P1; +extern mepcop1_48_sem_fn mepcop1_48_sem_cpssra3_b_P0_P1; +extern mepcop1_48_sem_fn mepcop1_48_sem_cpsra3_h_P0_P1; +extern mepcop1_48_sem_fn mepcop1_48_sem_cpssra3_h_P0_P1; +extern mepcop1_48_sem_fn mepcop1_48_sem_cpsra3_w_P0_P1; +extern mepcop1_48_sem_fn mepcop1_48_sem_cpssra3_w_P0_P1; +extern mepcop1_48_sem_fn mepcop1_48_sem_cdsra3_P0_P1; +extern mepcop1_48_sem_fn mepcop1_48_sem_cpsll3_b_P0_P1; +extern mepcop1_48_sem_fn mepcop1_48_sem_cpssll3_b_P0_P1; +extern mepcop1_48_sem_fn mepcop1_48_sem_cpsll3_h_P0_P1; +extern mepcop1_48_sem_fn mepcop1_48_sem_cpssll3_h_P0_P1; +extern mepcop1_48_sem_fn mepcop1_48_sem_cpsll3_w_P0_P1; +extern mepcop1_48_sem_fn mepcop1_48_sem_cpssll3_w_P0_P1; +extern mepcop1_48_sem_fn mepcop1_48_sem_cdsll3_P0_P1; +extern mepcop1_48_sem_fn mepcop1_48_sem_cpsla3_h_P0_P1; +extern mepcop1_48_sem_fn mepcop1_48_sem_cpsla3_w_P0_P1; +extern mepcop1_48_sem_fn mepcop1_48_sem_cpsrli3_b_P0_P1; +extern mepcop1_48_sem_fn mepcop1_48_sem_cpsrli3_h_P0_P1; +extern mepcop1_48_sem_fn mepcop1_48_sem_cpsrli3_w_P0_P1; +extern mepcop1_48_sem_fn mepcop1_48_sem_cdsrli3_P0_P1; +extern mepcop1_48_sem_fn mepcop1_48_sem_cpsrai3_b_P0_P1; +extern mepcop1_48_sem_fn mepcop1_48_sem_cpsrai3_h_P0_P1; +extern mepcop1_48_sem_fn mepcop1_48_sem_cpsrai3_w_P0_P1; +extern mepcop1_48_sem_fn mepcop1_48_sem_cdsrai3_P0_P1; +extern mepcop1_48_sem_fn mepcop1_48_sem_cpslli3_b_P0_P1; +extern mepcop1_48_sem_fn mepcop1_48_sem_cpslli3_h_P0_P1; +extern mepcop1_48_sem_fn mepcop1_48_sem_cpslli3_w_P0_P1; +extern mepcop1_48_sem_fn mepcop1_48_sem_cdslli3_P0_P1; +extern mepcop1_48_sem_fn mepcop1_48_sem_cpslai3_h_P0_P1; +extern mepcop1_48_sem_fn mepcop1_48_sem_cpslai3_w_P0_P1; +extern mepcop1_48_sem_fn mepcop1_48_sem_cpclipiu3_w_P0_P1; +extern mepcop1_48_sem_fn mepcop1_48_sem_cpclipi3_w_P0_P1; +extern mepcop1_48_sem_fn mepcop1_48_sem_cdclipiu3_P0_P1; +extern mepcop1_48_sem_fn mepcop1_48_sem_cdclipi3_P0_P1; +extern mepcop1_48_sem_fn mepcop1_48_sem_cpmovi_h_P0_P1; +extern mepcop1_48_sem_fn mepcop1_48_sem_cpmoviu_w_P0_P1; +extern mepcop1_48_sem_fn mepcop1_48_sem_cpmovi_w_P0_P1; +extern mepcop1_48_sem_fn mepcop1_48_sem_cdmoviu_P0_P1; +extern mepcop1_48_sem_fn mepcop1_48_sem_cdmovi_P0_P1; + +#endif /* MEPCOP1_48_DECODE_H */ diff --git a/sid/component/cgen-cpu/mep/mep-cop1-48-defs.h b/sid/component/cgen-cpu/mep/mep-cop1-48-defs.h new file mode 100644 index 0000000000..74c8177804 --- /dev/null +++ b/sid/component/cgen-cpu/mep/mep-cop1-48-defs.h @@ -0,0 +1,16 @@ +/* CPU family header for mep_ext1 / mepcop1_48. + +THIS FILE IS MACHINE GENERATED WITH CGEN. + +Copyright (C) 2000-2007 Red Hat, Inc. + +This file is part of the Red Hat simulators. + + +*/ + +#ifndef DEFS_MEPCOP1_48_H +#define DEFS_MEPCOP1_48_H + + +#endif /* DEFS_MEPCOP1_48_H */ diff --git a/sid/component/cgen-cpu/mep/mep-cop1-48-model.cxx b/sid/component/cgen-cpu/mep/mep-cop1-48-model.cxx new file mode 100644 index 0000000000..ee0c6e9082 --- /dev/null +++ b/sid/component/cgen-cpu/mep/mep-cop1-48-model.cxx @@ -0,0 +1,4099 @@ +/* Simulator model support for mepcop1_48. + +THIS FILE IS MACHINE GENERATED WITH CGEN. + +Copyright (C) 2000-2007 Red Hat, Inc. + +This file is part of the Red Hat simulators. + + +*/ + + +#if HAVE_CONFIG_H +#include "config.h" +#endif +#include "mep_ext1.h" + +using namespace mep_ext1; // FIXME: namespace organization still wip + +/* The profiling data is recorded here, but is accessed via the profiling + mechanism. After all, this is information for profiling. */ + +/* Model handlers for each insn. */ + +mepcop1_48_mep_model::mepcop1_48_mep_model (mep_ext1_cpu *cpu) + : cgen_model (cpu) +{ +} + +UINT +mepcop1_48_mep_model::model_cmov_crn_rm_p0_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cmov_crn_rm_p0.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cmov_crn_rm_p0_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cmov_crn_rm_p0.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cmov_rn_crm_p0_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cmov_rn_crm_p0.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cmov_rn_crm_p0_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cmov_rn_crm_p0.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cmovc_ccrn_rm_p0_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cmovc_ccrn_rm_p0.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cmovc_ccrn_rm_p0_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cmovc_ccrn_rm_p0.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cmovc_rn_ccrm_p0_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cmovc_rn_ccrm_p0.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cmovc_rn_ccrm_p0_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cmovc_rn_ccrm_p0.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cmovh_crn_rm_p0_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cmov_crn_rm_p0.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cmovh_crn_rm_p0_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cmov_crn_rm_p0.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cmovh_rn_crm_p0_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cmov_rn_crm_p0.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cmovh_rn_crm_p0_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cmov_rn_crm_p0.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_c0nop_P0_P0S_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.fmt_empty.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_c0nop_P0_P0S_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.fmt_empty.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cpfsftbi_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cpfsftbi_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cpacmpeq_b_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cpacmpeq_b_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cpacmpeq_h_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cpacmpeq_h_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cpacmpeq_w_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cpacmpeq_w_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cpacmpne_b_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cpacmpne_b_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cpacmpne_h_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cpacmpne_h_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cpacmpne_w_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cpacmpne_w_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cpacmpgtu_b_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cpacmpgtu_b_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cpacmpgt_b_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cpacmpgt_b_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cpacmpgt_h_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cpacmpgt_h_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cpacmpgtu_w_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cpacmpgtu_w_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cpacmpgt_w_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cpacmpgt_w_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cpacmpgeu_b_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cpacmpgeu_b_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cpacmpge_b_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cpacmpge_b_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cpacmpge_h_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cpacmpge_h_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cpacmpgeu_w_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cpacmpgeu_w_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cpacmpge_w_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cpacmpge_w_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cpocmpeq_b_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cpocmpeq_b_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cpocmpeq_h_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cpocmpeq_h_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cpocmpeq_w_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cpocmpeq_w_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cpocmpne_b_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cpocmpne_b_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cpocmpne_h_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cpocmpne_h_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cpocmpne_w_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cpocmpne_w_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cpocmpgtu_b_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cpocmpgtu_b_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cpocmpgt_b_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cpocmpgt_b_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cpocmpgt_h_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cpocmpgt_h_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cpocmpgtu_w_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cpocmpgtu_w_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cpocmpgt_w_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cpocmpgt_w_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cpocmpgeu_b_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cpocmpgeu_b_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cpocmpge_b_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cpocmpge_b_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cpocmpge_h_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cpocmpge_h_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cpocmpgeu_w_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cpocmpgeu_w_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cpocmpge_w_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cpocmpge_w_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cdadd3_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cdadd3_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cpsub3_b_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cpsub3_b_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cpsub3_h_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cpsub3_h_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cpsub3_w_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cpsub3_w_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cdsub3_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cdsub3_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cpsadd3_h_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cpsadd3_h_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cpsadd3_w_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cpsadd3_w_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cpssub3_h_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cpssub3_h_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cpssub3_w_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cpssub3_w_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cpextuaddu3_b_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cpextuaddu3_b_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cpextuadd3_b_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cpextuadd3_b_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cpextladdu3_b_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cpextladdu3_b_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cpextladd3_b_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cpextladd3_b_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cpextusubu3_b_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cpextusubu3_b_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cpextusub3_b_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cpextusub3_b_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cpextlsubu3_b_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cpextlsubu3_b_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cpextlsub3_b_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cpextlsub3_b_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cpaveu3_b_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cpaveu3_b_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cpave3_b_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cpave3_b_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cpave3_h_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cpave3_h_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cpave3_w_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cpave3_w_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cpaddsru3_b_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cpaddsru3_b_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cpaddsr3_b_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cpaddsr3_b_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cpaddsr3_h_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cpaddsr3_h_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cpaddsr3_w_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cpaddsr3_w_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cpabsu3_b_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cpabsu3_b_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cpabs3_b_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cpabs3_b_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cpabs3_h_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cpabs3_h_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cpand3_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cpand3_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cpor3_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cpor3_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cpnor3_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cpnor3_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cpxor3_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cpxor3_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cppacku_b_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cppacku_b_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cppack_b_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cppack_b_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cppack_h_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cppack_h_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cpmaxu3_b_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cpmaxu3_b_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cpmax3_b_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cpmax3_b_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cpmax3_h_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cpmax3_h_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cpmaxu3_w_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cpmaxu3_w_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cpmax3_w_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cpmax3_w_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cpminu3_b_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cpminu3_b_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cpmin3_b_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cpmin3_b_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cpmin3_h_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cpmin3_h_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cpminu3_w_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cpminu3_w_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cpmin3_w_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cpmin3_w_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cpsrl3_b_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cpsrl3_b_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cpssrl3_b_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cpssrl3_b_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cpsrl3_h_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cpsrl3_h_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cpssrl3_h_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cpssrl3_h_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cpsrl3_w_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cpsrl3_w_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cpssrl3_w_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cpssrl3_w_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cdsrl3_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cdsrl3_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cpsra3_b_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cpsra3_b_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cpssra3_b_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cpssra3_b_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cpsra3_h_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cpsra3_h_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cpssra3_h_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cpssra3_h_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cpsra3_w_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cpsra3_w_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cpssra3_w_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cpssra3_w_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cdsra3_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cdsra3_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cpsll3_b_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cpsll3_b_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cpssll3_b_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cpssll3_b_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cpsll3_h_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cpsll3_h_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cpssll3_h_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cpssll3_h_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cpsll3_w_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cpsll3_w_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cpssll3_w_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cpssll3_w_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cdsll3_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cdsll3_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cpsla3_h_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cpsla3_h_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cpsla3_w_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cpsla3_w_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cpsrli3_b_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cpsrli3_b_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cpsrli3_h_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpsrli3_h_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cpsrli3_h_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpsrli3_h_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cpsrli3_w_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpsrli3_w_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cpsrli3_w_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpsrli3_w_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cdsrli3_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cdsrli3_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cpsrai3_b_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cpsrai3_b_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cpsrai3_h_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpsrli3_h_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cpsrai3_h_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpsrli3_h_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cpsrai3_w_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpsrli3_w_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cpsrai3_w_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpsrli3_w_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cdsrai3_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cdsrai3_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cpslli3_b_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cpslli3_b_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cpslli3_h_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpsrli3_h_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cpslli3_h_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpsrli3_h_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cpslli3_w_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpsrli3_w_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cpslli3_w_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpsrli3_w_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cdslli3_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cdslli3_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cpslai3_h_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpsrli3_h_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cpslai3_h_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpsrli3_h_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cpslai3_w_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpsrli3_w_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cpslai3_w_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpsrli3_w_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cpclipiu3_w_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpsrli3_w_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cpclipiu3_w_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpsrli3_w_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cpclipi3_w_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpsrli3_w_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cpclipi3_w_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpsrli3_w_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cdclipiu3_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cdclipiu3_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cdclipi3_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cdclipi3_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cpmovi_h_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpmovi_h_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cpmovi_h_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpmovi_h_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cpmoviu_w_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpmoviu_w_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cpmoviu_w_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpmoviu_w_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cpmovi_w_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpmovi_h_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cpmovi_w_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpmovi_h_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cdmoviu_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpmoviu_w_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cdmoviu_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpmoviu_w_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cdmovi_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpmovi_h_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_48_mep_model::model_cdmovi_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpmovi_h_P0_P1.f + const mepcop1_48_scache* abuf = sem; + const mepcop1_48_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +/* We assume UNIT_NONE == 0 because the tables don't always terminate + entries with it. */ + +/* Model timing data for `mep'. */ + +const mepcop1_48_mep_model::insn_timing mepcop1_48_mep_model::timing[] = { + { MEPCOP1_48_INSN_X_INVALID, 0, 0, { { mepcop1_48_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_48_INSN_CMOV_CRN_RM_P0, & mepcop1_48_mep_model::model_cmov_crn_rm_p0_before, & mepcop1_48_mep_model::model_cmov_crn_rm_p0_after, { { mepcop1_48_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_48_INSN_CMOV_RN_CRM_P0, & mepcop1_48_mep_model::model_cmov_rn_crm_p0_before, & mepcop1_48_mep_model::model_cmov_rn_crm_p0_after, { { mepcop1_48_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_48_INSN_CMOVC_CCRN_RM_P0, & mepcop1_48_mep_model::model_cmovc_ccrn_rm_p0_before, & mepcop1_48_mep_model::model_cmovc_ccrn_rm_p0_after, { { mepcop1_48_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_48_INSN_CMOVC_RN_CCRM_P0, & mepcop1_48_mep_model::model_cmovc_rn_ccrm_p0_before, & mepcop1_48_mep_model::model_cmovc_rn_ccrm_p0_after, { { mepcop1_48_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_48_INSN_CMOVH_CRN_RM_P0, & mepcop1_48_mep_model::model_cmovh_crn_rm_p0_before, & mepcop1_48_mep_model::model_cmovh_crn_rm_p0_after, { { mepcop1_48_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_48_INSN_CMOVH_RN_CRM_P0, & mepcop1_48_mep_model::model_cmovh_rn_crm_p0_before, & mepcop1_48_mep_model::model_cmovh_rn_crm_p0_after, { { mepcop1_48_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_48_INSN_C0NOP_P0_P0S, & mepcop1_48_mep_model::model_c0nop_P0_P0S_before, & mepcop1_48_mep_model::model_c0nop_P0_P0S_after, { { mepcop1_48_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_48_INSN_CPFSFTBI_P0_P1, & mepcop1_48_mep_model::model_cpfsftbi_P0_P1_before, & mepcop1_48_mep_model::model_cpfsftbi_P0_P1_after, { { mepcop1_48_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_48_INSN_CPACMPEQ_B_P0_P1, & mepcop1_48_mep_model::model_cpacmpeq_b_P0_P1_before, & mepcop1_48_mep_model::model_cpacmpeq_b_P0_P1_after, { { mepcop1_48_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_48_INSN_CPACMPEQ_H_P0_P1, & mepcop1_48_mep_model::model_cpacmpeq_h_P0_P1_before, & mepcop1_48_mep_model::model_cpacmpeq_h_P0_P1_after, { { mepcop1_48_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_48_INSN_CPACMPEQ_W_P0_P1, & mepcop1_48_mep_model::model_cpacmpeq_w_P0_P1_before, & mepcop1_48_mep_model::model_cpacmpeq_w_P0_P1_after, { { mepcop1_48_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_48_INSN_CPACMPNE_B_P0_P1, & mepcop1_48_mep_model::model_cpacmpne_b_P0_P1_before, & mepcop1_48_mep_model::model_cpacmpne_b_P0_P1_after, { { mepcop1_48_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_48_INSN_CPACMPNE_H_P0_P1, & mepcop1_48_mep_model::model_cpacmpne_h_P0_P1_before, & mepcop1_48_mep_model::model_cpacmpne_h_P0_P1_after, { { mepcop1_48_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_48_INSN_CPACMPNE_W_P0_P1, & mepcop1_48_mep_model::model_cpacmpne_w_P0_P1_before, & mepcop1_48_mep_model::model_cpacmpne_w_P0_P1_after, { { mepcop1_48_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_48_INSN_CPACMPGTU_B_P0_P1, & mepcop1_48_mep_model::model_cpacmpgtu_b_P0_P1_before, & mepcop1_48_mep_model::model_cpacmpgtu_b_P0_P1_after, { { mepcop1_48_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_48_INSN_CPACMPGT_B_P0_P1, & mepcop1_48_mep_model::model_cpacmpgt_b_P0_P1_before, & mepcop1_48_mep_model::model_cpacmpgt_b_P0_P1_after, { { mepcop1_48_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_48_INSN_CPACMPGT_H_P0_P1, & mepcop1_48_mep_model::model_cpacmpgt_h_P0_P1_before, & mepcop1_48_mep_model::model_cpacmpgt_h_P0_P1_after, { { mepcop1_48_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_48_INSN_CPACMPGTU_W_P0_P1, & mepcop1_48_mep_model::model_cpacmpgtu_w_P0_P1_before, & mepcop1_48_mep_model::model_cpacmpgtu_w_P0_P1_after, { { mepcop1_48_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_48_INSN_CPACMPGT_W_P0_P1, & mepcop1_48_mep_model::model_cpacmpgt_w_P0_P1_before, & mepcop1_48_mep_model::model_cpacmpgt_w_P0_P1_after, { { mepcop1_48_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_48_INSN_CPACMPGEU_B_P0_P1, & mepcop1_48_mep_model::model_cpacmpgeu_b_P0_P1_before, & mepcop1_48_mep_model::model_cpacmpgeu_b_P0_P1_after, { { mepcop1_48_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_48_INSN_CPACMPGE_B_P0_P1, & mepcop1_48_mep_model::model_cpacmpge_b_P0_P1_before, & mepcop1_48_mep_model::model_cpacmpge_b_P0_P1_after, { { mepcop1_48_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_48_INSN_CPACMPGE_H_P0_P1, & mepcop1_48_mep_model::model_cpacmpge_h_P0_P1_before, & mepcop1_48_mep_model::model_cpacmpge_h_P0_P1_after, { { mepcop1_48_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_48_INSN_CPACMPGEU_W_P0_P1, & mepcop1_48_mep_model::model_cpacmpgeu_w_P0_P1_before, & mepcop1_48_mep_model::model_cpacmpgeu_w_P0_P1_after, { { mepcop1_48_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_48_INSN_CPACMPGE_W_P0_P1, & mepcop1_48_mep_model::model_cpacmpge_w_P0_P1_before, & mepcop1_48_mep_model::model_cpacmpge_w_P0_P1_after, { { mepcop1_48_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_48_INSN_CPOCMPEQ_B_P0_P1, & mepcop1_48_mep_model::model_cpocmpeq_b_P0_P1_before, & mepcop1_48_mep_model::model_cpocmpeq_b_P0_P1_after, { { mepcop1_48_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_48_INSN_CPOCMPEQ_H_P0_P1, & mepcop1_48_mep_model::model_cpocmpeq_h_P0_P1_before, & mepcop1_48_mep_model::model_cpocmpeq_h_P0_P1_after, { { mepcop1_48_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_48_INSN_CPOCMPEQ_W_P0_P1, & mepcop1_48_mep_model::model_cpocmpeq_w_P0_P1_before, & mepcop1_48_mep_model::model_cpocmpeq_w_P0_P1_after, { { mepcop1_48_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_48_INSN_CPOCMPNE_B_P0_P1, & mepcop1_48_mep_model::model_cpocmpne_b_P0_P1_before, & mepcop1_48_mep_model::model_cpocmpne_b_P0_P1_after, { { mepcop1_48_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_48_INSN_CPOCMPNE_H_P0_P1, & mepcop1_48_mep_model::model_cpocmpne_h_P0_P1_before, & mepcop1_48_mep_model::model_cpocmpne_h_P0_P1_after, { { mepcop1_48_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_48_INSN_CPOCMPNE_W_P0_P1, & mepcop1_48_mep_model::model_cpocmpne_w_P0_P1_before, & mepcop1_48_mep_model::model_cpocmpne_w_P0_P1_after, { { mepcop1_48_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_48_INSN_CPOCMPGTU_B_P0_P1, & mepcop1_48_mep_model::model_cpocmpgtu_b_P0_P1_before, & mepcop1_48_mep_model::model_cpocmpgtu_b_P0_P1_after, { { mepcop1_48_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_48_INSN_CPOCMPGT_B_P0_P1, & mepcop1_48_mep_model::model_cpocmpgt_b_P0_P1_before, & mepcop1_48_mep_model::model_cpocmpgt_b_P0_P1_after, { { mepcop1_48_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_48_INSN_CPOCMPGT_H_P0_P1, & mepcop1_48_mep_model::model_cpocmpgt_h_P0_P1_before, & mepcop1_48_mep_model::model_cpocmpgt_h_P0_P1_after, { { mepcop1_48_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_48_INSN_CPOCMPGTU_W_P0_P1, & mepcop1_48_mep_model::model_cpocmpgtu_w_P0_P1_before, & mepcop1_48_mep_model::model_cpocmpgtu_w_P0_P1_after, { { mepcop1_48_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_48_INSN_CPOCMPGT_W_P0_P1, & mepcop1_48_mep_model::model_cpocmpgt_w_P0_P1_before, & mepcop1_48_mep_model::model_cpocmpgt_w_P0_P1_after, { { mepcop1_48_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_48_INSN_CPOCMPGEU_B_P0_P1, & mepcop1_48_mep_model::model_cpocmpgeu_b_P0_P1_before, & mepcop1_48_mep_model::model_cpocmpgeu_b_P0_P1_after, { { mepcop1_48_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_48_INSN_CPOCMPGE_B_P0_P1, & mepcop1_48_mep_model::model_cpocmpge_b_P0_P1_before, & mepcop1_48_mep_model::model_cpocmpge_b_P0_P1_after, { { mepcop1_48_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_48_INSN_CPOCMPGE_H_P0_P1, & mepcop1_48_mep_model::model_cpocmpge_h_P0_P1_before, & mepcop1_48_mep_model::model_cpocmpge_h_P0_P1_after, { { mepcop1_48_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_48_INSN_CPOCMPGEU_W_P0_P1, & mepcop1_48_mep_model::model_cpocmpgeu_w_P0_P1_before, & mepcop1_48_mep_model::model_cpocmpgeu_w_P0_P1_after, { { mepcop1_48_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_48_INSN_CPOCMPGE_W_P0_P1, & mepcop1_48_mep_model::model_cpocmpge_w_P0_P1_before, & mepcop1_48_mep_model::model_cpocmpge_w_P0_P1_after, { { mepcop1_48_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_48_INSN_CDADD3_P0_P1, & mepcop1_48_mep_model::model_cdadd3_P0_P1_before, & mepcop1_48_mep_model::model_cdadd3_P0_P1_after, { { mepcop1_48_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_48_INSN_CPSUB3_B_P0_P1, & mepcop1_48_mep_model::model_cpsub3_b_P0_P1_before, & mepcop1_48_mep_model::model_cpsub3_b_P0_P1_after, { { mepcop1_48_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_48_INSN_CPSUB3_H_P0_P1, & mepcop1_48_mep_model::model_cpsub3_h_P0_P1_before, & mepcop1_48_mep_model::model_cpsub3_h_P0_P1_after, { { mepcop1_48_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_48_INSN_CPSUB3_W_P0_P1, & mepcop1_48_mep_model::model_cpsub3_w_P0_P1_before, & mepcop1_48_mep_model::model_cpsub3_w_P0_P1_after, { { mepcop1_48_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_48_INSN_CDSUB3_P0_P1, & mepcop1_48_mep_model::model_cdsub3_P0_P1_before, & mepcop1_48_mep_model::model_cdsub3_P0_P1_after, { { mepcop1_48_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_48_INSN_CPSADD3_H_P0_P1, & mepcop1_48_mep_model::model_cpsadd3_h_P0_P1_before, & mepcop1_48_mep_model::model_cpsadd3_h_P0_P1_after, { { mepcop1_48_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_48_INSN_CPSADD3_W_P0_P1, & mepcop1_48_mep_model::model_cpsadd3_w_P0_P1_before, & mepcop1_48_mep_model::model_cpsadd3_w_P0_P1_after, { { mepcop1_48_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_48_INSN_CPSSUB3_H_P0_P1, & mepcop1_48_mep_model::model_cpssub3_h_P0_P1_before, & mepcop1_48_mep_model::model_cpssub3_h_P0_P1_after, { { mepcop1_48_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_48_INSN_CPSSUB3_W_P0_P1, & mepcop1_48_mep_model::model_cpssub3_w_P0_P1_before, & mepcop1_48_mep_model::model_cpssub3_w_P0_P1_after, { { mepcop1_48_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_48_INSN_CPEXTUADDU3_B_P0_P1, & mepcop1_48_mep_model::model_cpextuaddu3_b_P0_P1_before, & mepcop1_48_mep_model::model_cpextuaddu3_b_P0_P1_after, { { mepcop1_48_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_48_INSN_CPEXTUADD3_B_P0_P1, & mepcop1_48_mep_model::model_cpextuadd3_b_P0_P1_before, & mepcop1_48_mep_model::model_cpextuadd3_b_P0_P1_after, { { mepcop1_48_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_48_INSN_CPEXTLADDU3_B_P0_P1, & mepcop1_48_mep_model::model_cpextladdu3_b_P0_P1_before, & mepcop1_48_mep_model::model_cpextladdu3_b_P0_P1_after, { { mepcop1_48_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_48_INSN_CPEXTLADD3_B_P0_P1, & mepcop1_48_mep_model::model_cpextladd3_b_P0_P1_before, & mepcop1_48_mep_model::model_cpextladd3_b_P0_P1_after, { { mepcop1_48_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_48_INSN_CPEXTUSUBU3_B_P0_P1, & mepcop1_48_mep_model::model_cpextusubu3_b_P0_P1_before, & mepcop1_48_mep_model::model_cpextusubu3_b_P0_P1_after, { { mepcop1_48_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_48_INSN_CPEXTUSUB3_B_P0_P1, & mepcop1_48_mep_model::model_cpextusub3_b_P0_P1_before, & mepcop1_48_mep_model::model_cpextusub3_b_P0_P1_after, { { mepcop1_48_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_48_INSN_CPEXTLSUBU3_B_P0_P1, & mepcop1_48_mep_model::model_cpextlsubu3_b_P0_P1_before, & mepcop1_48_mep_model::model_cpextlsubu3_b_P0_P1_after, { { mepcop1_48_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_48_INSN_CPEXTLSUB3_B_P0_P1, & mepcop1_48_mep_model::model_cpextlsub3_b_P0_P1_before, & mepcop1_48_mep_model::model_cpextlsub3_b_P0_P1_after, { { mepcop1_48_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_48_INSN_CPAVEU3_B_P0_P1, & mepcop1_48_mep_model::model_cpaveu3_b_P0_P1_before, & mepcop1_48_mep_model::model_cpaveu3_b_P0_P1_after, { { mepcop1_48_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_48_INSN_CPAVE3_B_P0_P1, & mepcop1_48_mep_model::model_cpave3_b_P0_P1_before, & mepcop1_48_mep_model::model_cpave3_b_P0_P1_after, { { mepcop1_48_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_48_INSN_CPAVE3_H_P0_P1, & mepcop1_48_mep_model::model_cpave3_h_P0_P1_before, & mepcop1_48_mep_model::model_cpave3_h_P0_P1_after, { { mepcop1_48_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_48_INSN_CPAVE3_W_P0_P1, & mepcop1_48_mep_model::model_cpave3_w_P0_P1_before, & mepcop1_48_mep_model::model_cpave3_w_P0_P1_after, { { mepcop1_48_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_48_INSN_CPADDSRU3_B_P0_P1, & mepcop1_48_mep_model::model_cpaddsru3_b_P0_P1_before, & mepcop1_48_mep_model::model_cpaddsru3_b_P0_P1_after, { { mepcop1_48_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_48_INSN_CPADDSR3_B_P0_P1, & mepcop1_48_mep_model::model_cpaddsr3_b_P0_P1_before, & mepcop1_48_mep_model::model_cpaddsr3_b_P0_P1_after, { { mepcop1_48_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_48_INSN_CPADDSR3_H_P0_P1, & mepcop1_48_mep_model::model_cpaddsr3_h_P0_P1_before, & mepcop1_48_mep_model::model_cpaddsr3_h_P0_P1_after, { { mepcop1_48_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_48_INSN_CPADDSR3_W_P0_P1, & mepcop1_48_mep_model::model_cpaddsr3_w_P0_P1_before, & mepcop1_48_mep_model::model_cpaddsr3_w_P0_P1_after, { { mepcop1_48_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_48_INSN_CPABSU3_B_P0_P1, & mepcop1_48_mep_model::model_cpabsu3_b_P0_P1_before, & mepcop1_48_mep_model::model_cpabsu3_b_P0_P1_after, { { mepcop1_48_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_48_INSN_CPABS3_B_P0_P1, & mepcop1_48_mep_model::model_cpabs3_b_P0_P1_before, & mepcop1_48_mep_model::model_cpabs3_b_P0_P1_after, { { mepcop1_48_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_48_INSN_CPABS3_H_P0_P1, & mepcop1_48_mep_model::model_cpabs3_h_P0_P1_before, & mepcop1_48_mep_model::model_cpabs3_h_P0_P1_after, { { mepcop1_48_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_48_INSN_CPAND3_P0_P1, & mepcop1_48_mep_model::model_cpand3_P0_P1_before, & mepcop1_48_mep_model::model_cpand3_P0_P1_after, { { mepcop1_48_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_48_INSN_CPOR3_P0_P1, & mepcop1_48_mep_model::model_cpor3_P0_P1_before, & mepcop1_48_mep_model::model_cpor3_P0_P1_after, { { mepcop1_48_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_48_INSN_CPNOR3_P0_P1, & mepcop1_48_mep_model::model_cpnor3_P0_P1_before, & mepcop1_48_mep_model::model_cpnor3_P0_P1_after, { { mepcop1_48_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_48_INSN_CPXOR3_P0_P1, & mepcop1_48_mep_model::model_cpxor3_P0_P1_before, & mepcop1_48_mep_model::model_cpxor3_P0_P1_after, { { mepcop1_48_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_48_INSN_CPPACKU_B_P0_P1, & mepcop1_48_mep_model::model_cppacku_b_P0_P1_before, & mepcop1_48_mep_model::model_cppacku_b_P0_P1_after, { { mepcop1_48_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_48_INSN_CPPACK_B_P0_P1, & mepcop1_48_mep_model::model_cppack_b_P0_P1_before, & mepcop1_48_mep_model::model_cppack_b_P0_P1_after, { { mepcop1_48_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_48_INSN_CPPACK_H_P0_P1, & mepcop1_48_mep_model::model_cppack_h_P0_P1_before, & mepcop1_48_mep_model::model_cppack_h_P0_P1_after, { { mepcop1_48_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_48_INSN_CPMAXU3_B_P0_P1, & mepcop1_48_mep_model::model_cpmaxu3_b_P0_P1_before, & mepcop1_48_mep_model::model_cpmaxu3_b_P0_P1_after, { { mepcop1_48_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_48_INSN_CPMAX3_B_P0_P1, & mepcop1_48_mep_model::model_cpmax3_b_P0_P1_before, & mepcop1_48_mep_model::model_cpmax3_b_P0_P1_after, { { mepcop1_48_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_48_INSN_CPMAX3_H_P0_P1, & mepcop1_48_mep_model::model_cpmax3_h_P0_P1_before, & mepcop1_48_mep_model::model_cpmax3_h_P0_P1_after, { { mepcop1_48_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_48_INSN_CPMAXU3_W_P0_P1, & mepcop1_48_mep_model::model_cpmaxu3_w_P0_P1_before, & mepcop1_48_mep_model::model_cpmaxu3_w_P0_P1_after, { { mepcop1_48_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_48_INSN_CPMAX3_W_P0_P1, & mepcop1_48_mep_model::model_cpmax3_w_P0_P1_before, & mepcop1_48_mep_model::model_cpmax3_w_P0_P1_after, { { mepcop1_48_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_48_INSN_CPMINU3_B_P0_P1, & mepcop1_48_mep_model::model_cpminu3_b_P0_P1_before, & mepcop1_48_mep_model::model_cpminu3_b_P0_P1_after, { { mepcop1_48_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_48_INSN_CPMIN3_B_P0_P1, & mepcop1_48_mep_model::model_cpmin3_b_P0_P1_before, & mepcop1_48_mep_model::model_cpmin3_b_P0_P1_after, { { mepcop1_48_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_48_INSN_CPMIN3_H_P0_P1, & mepcop1_48_mep_model::model_cpmin3_h_P0_P1_before, & mepcop1_48_mep_model::model_cpmin3_h_P0_P1_after, { { mepcop1_48_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_48_INSN_CPMINU3_W_P0_P1, & mepcop1_48_mep_model::model_cpminu3_w_P0_P1_before, & mepcop1_48_mep_model::model_cpminu3_w_P0_P1_after, { { mepcop1_48_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_48_INSN_CPMIN3_W_P0_P1, & mepcop1_48_mep_model::model_cpmin3_w_P0_P1_before, & mepcop1_48_mep_model::model_cpmin3_w_P0_P1_after, { { mepcop1_48_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_48_INSN_CPSRL3_B_P0_P1, & mepcop1_48_mep_model::model_cpsrl3_b_P0_P1_before, & mepcop1_48_mep_model::model_cpsrl3_b_P0_P1_after, { { mepcop1_48_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_48_INSN_CPSSRL3_B_P0_P1, & mepcop1_48_mep_model::model_cpssrl3_b_P0_P1_before, & mepcop1_48_mep_model::model_cpssrl3_b_P0_P1_after, { { mepcop1_48_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_48_INSN_CPSRL3_H_P0_P1, & mepcop1_48_mep_model::model_cpsrl3_h_P0_P1_before, & mepcop1_48_mep_model::model_cpsrl3_h_P0_P1_after, { { mepcop1_48_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_48_INSN_CPSSRL3_H_P0_P1, & mepcop1_48_mep_model::model_cpssrl3_h_P0_P1_before, & mepcop1_48_mep_model::model_cpssrl3_h_P0_P1_after, { { mepcop1_48_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_48_INSN_CPSRL3_W_P0_P1, & mepcop1_48_mep_model::model_cpsrl3_w_P0_P1_before, & mepcop1_48_mep_model::model_cpsrl3_w_P0_P1_after, { { mepcop1_48_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_48_INSN_CPSSRL3_W_P0_P1, & mepcop1_48_mep_model::model_cpssrl3_w_P0_P1_before, & mepcop1_48_mep_model::model_cpssrl3_w_P0_P1_after, { { mepcop1_48_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_48_INSN_CDSRL3_P0_P1, & mepcop1_48_mep_model::model_cdsrl3_P0_P1_before, & mepcop1_48_mep_model::model_cdsrl3_P0_P1_after, { { mepcop1_48_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_48_INSN_CPSRA3_B_P0_P1, & mepcop1_48_mep_model::model_cpsra3_b_P0_P1_before, & mepcop1_48_mep_model::model_cpsra3_b_P0_P1_after, { { mepcop1_48_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_48_INSN_CPSSRA3_B_P0_P1, & mepcop1_48_mep_model::model_cpssra3_b_P0_P1_before, & mepcop1_48_mep_model::model_cpssra3_b_P0_P1_after, { { mepcop1_48_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_48_INSN_CPSRA3_H_P0_P1, & mepcop1_48_mep_model::model_cpsra3_h_P0_P1_before, & mepcop1_48_mep_model::model_cpsra3_h_P0_P1_after, { { mepcop1_48_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_48_INSN_CPSSRA3_H_P0_P1, & mepcop1_48_mep_model::model_cpssra3_h_P0_P1_before, & mepcop1_48_mep_model::model_cpssra3_h_P0_P1_after, { { mepcop1_48_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_48_INSN_CPSRA3_W_P0_P1, & mepcop1_48_mep_model::model_cpsra3_w_P0_P1_before, & mepcop1_48_mep_model::model_cpsra3_w_P0_P1_after, { { mepcop1_48_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_48_INSN_CPSSRA3_W_P0_P1, & mepcop1_48_mep_model::model_cpssra3_w_P0_P1_before, & mepcop1_48_mep_model::model_cpssra3_w_P0_P1_after, { { mepcop1_48_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_48_INSN_CDSRA3_P0_P1, & mepcop1_48_mep_model::model_cdsra3_P0_P1_before, & mepcop1_48_mep_model::model_cdsra3_P0_P1_after, { { mepcop1_48_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_48_INSN_CPSLL3_B_P0_P1, & mepcop1_48_mep_model::model_cpsll3_b_P0_P1_before, & mepcop1_48_mep_model::model_cpsll3_b_P0_P1_after, { { mepcop1_48_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_48_INSN_CPSSLL3_B_P0_P1, & mepcop1_48_mep_model::model_cpssll3_b_P0_P1_before, & mepcop1_48_mep_model::model_cpssll3_b_P0_P1_after, { { mepcop1_48_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_48_INSN_CPSLL3_H_P0_P1, & mepcop1_48_mep_model::model_cpsll3_h_P0_P1_before, & mepcop1_48_mep_model::model_cpsll3_h_P0_P1_after, { { mepcop1_48_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_48_INSN_CPSSLL3_H_P0_P1, & mepcop1_48_mep_model::model_cpssll3_h_P0_P1_before, & mepcop1_48_mep_model::model_cpssll3_h_P0_P1_after, { { mepcop1_48_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_48_INSN_CPSLL3_W_P0_P1, & mepcop1_48_mep_model::model_cpsll3_w_P0_P1_before, & mepcop1_48_mep_model::model_cpsll3_w_P0_P1_after, { { mepcop1_48_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_48_INSN_CPSSLL3_W_P0_P1, & mepcop1_48_mep_model::model_cpssll3_w_P0_P1_before, & mepcop1_48_mep_model::model_cpssll3_w_P0_P1_after, { { mepcop1_48_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_48_INSN_CDSLL3_P0_P1, & mepcop1_48_mep_model::model_cdsll3_P0_P1_before, & mepcop1_48_mep_model::model_cdsll3_P0_P1_after, { { mepcop1_48_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_48_INSN_CPSLA3_H_P0_P1, & mepcop1_48_mep_model::model_cpsla3_h_P0_P1_before, & mepcop1_48_mep_model::model_cpsla3_h_P0_P1_after, { { mepcop1_48_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_48_INSN_CPSLA3_W_P0_P1, & mepcop1_48_mep_model::model_cpsla3_w_P0_P1_before, & mepcop1_48_mep_model::model_cpsla3_w_P0_P1_after, { { mepcop1_48_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_48_INSN_CPSRLI3_B_P0_P1, & mepcop1_48_mep_model::model_cpsrli3_b_P0_P1_before, & mepcop1_48_mep_model::model_cpsrli3_b_P0_P1_after, { { mepcop1_48_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_48_INSN_CPSRLI3_H_P0_P1, & mepcop1_48_mep_model::model_cpsrli3_h_P0_P1_before, & mepcop1_48_mep_model::model_cpsrli3_h_P0_P1_after, { { mepcop1_48_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_48_INSN_CPSRLI3_W_P0_P1, & mepcop1_48_mep_model::model_cpsrli3_w_P0_P1_before, & mepcop1_48_mep_model::model_cpsrli3_w_P0_P1_after, { { mepcop1_48_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_48_INSN_CDSRLI3_P0_P1, & mepcop1_48_mep_model::model_cdsrli3_P0_P1_before, & mepcop1_48_mep_model::model_cdsrli3_P0_P1_after, { { mepcop1_48_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_48_INSN_CPSRAI3_B_P0_P1, & mepcop1_48_mep_model::model_cpsrai3_b_P0_P1_before, & mepcop1_48_mep_model::model_cpsrai3_b_P0_P1_after, { { mepcop1_48_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_48_INSN_CPSRAI3_H_P0_P1, & mepcop1_48_mep_model::model_cpsrai3_h_P0_P1_before, & mepcop1_48_mep_model::model_cpsrai3_h_P0_P1_after, { { mepcop1_48_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_48_INSN_CPSRAI3_W_P0_P1, & mepcop1_48_mep_model::model_cpsrai3_w_P0_P1_before, & mepcop1_48_mep_model::model_cpsrai3_w_P0_P1_after, { { mepcop1_48_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_48_INSN_CDSRAI3_P0_P1, & mepcop1_48_mep_model::model_cdsrai3_P0_P1_before, & mepcop1_48_mep_model::model_cdsrai3_P0_P1_after, { { mepcop1_48_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_48_INSN_CPSLLI3_B_P0_P1, & mepcop1_48_mep_model::model_cpslli3_b_P0_P1_before, & mepcop1_48_mep_model::model_cpslli3_b_P0_P1_after, { { mepcop1_48_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_48_INSN_CPSLLI3_H_P0_P1, & mepcop1_48_mep_model::model_cpslli3_h_P0_P1_before, & mepcop1_48_mep_model::model_cpslli3_h_P0_P1_after, { { mepcop1_48_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_48_INSN_CPSLLI3_W_P0_P1, & mepcop1_48_mep_model::model_cpslli3_w_P0_P1_before, & mepcop1_48_mep_model::model_cpslli3_w_P0_P1_after, { { mepcop1_48_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_48_INSN_CDSLLI3_P0_P1, & mepcop1_48_mep_model::model_cdslli3_P0_P1_before, & mepcop1_48_mep_model::model_cdslli3_P0_P1_after, { { mepcop1_48_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_48_INSN_CPSLAI3_H_P0_P1, & mepcop1_48_mep_model::model_cpslai3_h_P0_P1_before, & mepcop1_48_mep_model::model_cpslai3_h_P0_P1_after, { { mepcop1_48_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_48_INSN_CPSLAI3_W_P0_P1, & mepcop1_48_mep_model::model_cpslai3_w_P0_P1_before, & mepcop1_48_mep_model::model_cpslai3_w_P0_P1_after, { { mepcop1_48_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_48_INSN_CPCLIPIU3_W_P0_P1, & mepcop1_48_mep_model::model_cpclipiu3_w_P0_P1_before, & mepcop1_48_mep_model::model_cpclipiu3_w_P0_P1_after, { { mepcop1_48_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_48_INSN_CPCLIPI3_W_P0_P1, & mepcop1_48_mep_model::model_cpclipi3_w_P0_P1_before, & mepcop1_48_mep_model::model_cpclipi3_w_P0_P1_after, { { mepcop1_48_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_48_INSN_CDCLIPIU3_P0_P1, & mepcop1_48_mep_model::model_cdclipiu3_P0_P1_before, & mepcop1_48_mep_model::model_cdclipiu3_P0_P1_after, { { mepcop1_48_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_48_INSN_CDCLIPI3_P0_P1, & mepcop1_48_mep_model::model_cdclipi3_P0_P1_before, & mepcop1_48_mep_model::model_cdclipi3_P0_P1_after, { { mepcop1_48_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_48_INSN_CPMOVI_H_P0_P1, & mepcop1_48_mep_model::model_cpmovi_h_P0_P1_before, & mepcop1_48_mep_model::model_cpmovi_h_P0_P1_after, { { mepcop1_48_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_48_INSN_CPMOVIU_W_P0_P1, & mepcop1_48_mep_model::model_cpmoviu_w_P0_P1_before, & mepcop1_48_mep_model::model_cpmoviu_w_P0_P1_after, { { mepcop1_48_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_48_INSN_CPMOVI_W_P0_P1, & mepcop1_48_mep_model::model_cpmovi_w_P0_P1_before, & mepcop1_48_mep_model::model_cpmovi_w_P0_P1_after, { { mepcop1_48_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_48_INSN_CDMOVIU_P0_P1, & mepcop1_48_mep_model::model_cdmoviu_P0_P1_before, & mepcop1_48_mep_model::model_cdmoviu_P0_P1_after, { { mepcop1_48_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_48_INSN_CDMOVI_P0_P1, & mepcop1_48_mep_model::model_cdmovi_P0_P1_before, & mepcop1_48_mep_model::model_cdmovi_P0_P1_after, { { mepcop1_48_mep_model::UNIT_U_EXEC, 1, 1 } } }, +}; + diff --git a/sid/component/cgen-cpu/mep/mep-cop1-48-model.h b/sid/component/cgen-cpu/mep/mep-cop1-48-model.h new file mode 100644 index 0000000000..3e9a4cc288 --- /dev/null +++ b/sid/component/cgen-cpu/mep/mep-cop1-48-model.h @@ -0,0 +1,434 @@ +/* Simulator model support for mepcop1_48. + +THIS FILE IS MACHINE GENERATED WITH CGEN. + +Copyright (C) 2000-2007 Red Hat, Inc. + +This file is part of the Red Hat simulators. + + +*/ + +#ifndef MEPCOP1_48_MODEL_H +#define MEPCOP1_48_MODEL_H + +#include "cgen-cpu.h" +#include "cgen-model.h" + +namespace mep_ext1 +{ +using namespace cgen; + +class mepcop1_48_mep_model : public cgen_model +{ +public: + mepcop1_48_mep_model (mep_ext1_cpu *cpu); + + // Call the proper unit modelling function for the given insn. + UINT model_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache* sem) + { + return (this->*(timing[sem->idesc->sem_index].model_before)) (current_cpu, sem); + } + UINT model_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache* sem) + { + return (this->*(timing[sem->idesc->sem_index].model_after)) (current_cpu, sem); + } + +// Function unit handlers +// To be overridden as needed. + virtual UINT model_u_store_ctrl_reg_before (mep_ext1_cpu *cpu, const struct mepcop1_48_idesc *idesc, int unit_num, INT /*storereg*/) + { + return 0; + } + virtual UINT model_u_store_ctrl_reg_after (mep_ext1_cpu *cpu, const struct mepcop1_48_idesc *idesc, int unit_num, unsigned long long referenced, INT /*storereg*/) + { + return timing[idesc->sem_index].units[unit_num].done; + } + virtual UINT model_u_use_ctrl_reg_before (mep_ext1_cpu *cpu, const struct mepcop1_48_idesc *idesc, int unit_num, INT /*usereg*/) + { + return 0; + } + virtual UINT model_u_use_ctrl_reg_after (mep_ext1_cpu *cpu, const struct mepcop1_48_idesc *idesc, int unit_num, unsigned long long referenced, INT /*usereg*/) + { + return timing[idesc->sem_index].units[unit_num].done; + } + virtual UINT model_u_use_gpr_before (mep_ext1_cpu *cpu, const struct mepcop1_48_idesc *idesc, int unit_num, INT /*usereg*/) + { + return 0; + } + virtual UINT model_u_use_gpr_after (mep_ext1_cpu *cpu, const struct mepcop1_48_idesc *idesc, int unit_num, unsigned long long referenced, INT /*usereg*/) + { + return timing[idesc->sem_index].units[unit_num].done; + } + virtual UINT model_u_mul_gpr_before (mep_ext1_cpu *cpu, const struct mepcop1_48_idesc *idesc, int unit_num, INT /*resultreg*/) + { + return 0; + } + virtual UINT model_u_mul_gpr_after (mep_ext1_cpu *cpu, const struct mepcop1_48_idesc *idesc, int unit_num, unsigned long long referenced, INT /*resultreg*/) + { + return timing[idesc->sem_index].units[unit_num].done; + } + virtual UINT model_u_ldcb_gpr_before (mep_ext1_cpu *cpu, const struct mepcop1_48_idesc *idesc, int unit_num, INT /*loadreg*/) + { + return 0; + } + virtual UINT model_u_ldcb_gpr_after (mep_ext1_cpu *cpu, const struct mepcop1_48_idesc *idesc, int unit_num, unsigned long long referenced, INT /*loadreg*/) + { + return timing[idesc->sem_index].units[unit_num].done; + } + virtual UINT model_u_load_gpr_before (mep_ext1_cpu *cpu, const struct mepcop1_48_idesc *idesc, int unit_num, INT /*loadreg*/) + { + return 0; + } + virtual UINT model_u_load_gpr_after (mep_ext1_cpu *cpu, const struct mepcop1_48_idesc *idesc, int unit_num, unsigned long long referenced, INT /*loadreg*/) + { + return timing[idesc->sem_index].units[unit_num].done; + } + virtual UINT model_u_ldcb_before (mep_ext1_cpu *cpu, const struct mepcop1_48_idesc *idesc, int unit_num) + { + return 0; + } + virtual UINT model_u_ldcb_after (mep_ext1_cpu *cpu, const struct mepcop1_48_idesc *idesc, int unit_num, unsigned long long referenced) + { + return timing[idesc->sem_index].units[unit_num].done; + } + virtual UINT model_u_stcb_before (mep_ext1_cpu *cpu, const struct mepcop1_48_idesc *idesc, int unit_num) + { + return 0; + } + virtual UINT model_u_stcb_after (mep_ext1_cpu *cpu, const struct mepcop1_48_idesc *idesc, int unit_num, unsigned long long referenced) + { + return timing[idesc->sem_index].units[unit_num].done; + } + virtual UINT model_u_divide_before (mep_ext1_cpu *cpu, const struct mepcop1_48_idesc *idesc, int unit_num) + { + return 0; + } + virtual UINT model_u_divide_after (mep_ext1_cpu *cpu, const struct mepcop1_48_idesc *idesc, int unit_num, unsigned long long referenced) + { + return timing[idesc->sem_index].units[unit_num].done; + } + virtual UINT model_u_multiply_before (mep_ext1_cpu *cpu, const struct mepcop1_48_idesc *idesc, int unit_num) + { + return 0; + } + virtual UINT model_u_multiply_after (mep_ext1_cpu *cpu, const struct mepcop1_48_idesc *idesc, int unit_num, unsigned long long referenced) + { + return timing[idesc->sem_index].units[unit_num].done; + } + virtual UINT model_u_branch_before (mep_ext1_cpu *cpu, const struct mepcop1_48_idesc *idesc, int unit_num) + { + return 0; + } + virtual UINT model_u_branch_after (mep_ext1_cpu *cpu, const struct mepcop1_48_idesc *idesc, int unit_num, unsigned long long referenced) + { + return timing[idesc->sem_index].units[unit_num].done; + } + virtual UINT model_u_exec_before (mep_ext1_cpu *cpu, const struct mepcop1_48_idesc *idesc, int unit_num) + { + return 0; + } + virtual UINT model_u_exec_after (mep_ext1_cpu *cpu, const struct mepcop1_48_idesc *idesc, int unit_num, unsigned long long referenced) + { + return timing[idesc->sem_index].units[unit_num].done; + } + +protected: + // These methods call the appropriate unit modeller(s) for each insn. + UINT model_cmov_crn_rm_p0_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cmov_crn_rm_p0_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cmov_rn_crm_p0_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cmov_rn_crm_p0_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cmovc_ccrn_rm_p0_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cmovc_ccrn_rm_p0_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cmovc_rn_ccrm_p0_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cmovc_rn_ccrm_p0_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cmovh_crn_rm_p0_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cmovh_crn_rm_p0_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cmovh_rn_crm_p0_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cmovh_rn_crm_p0_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_c0nop_P0_P0S_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_c0nop_P0_P0S_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cpfsftbi_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cpfsftbi_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cpacmpeq_b_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cpacmpeq_b_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cpacmpeq_h_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cpacmpeq_h_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cpacmpeq_w_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cpacmpeq_w_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cpacmpne_b_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cpacmpne_b_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cpacmpne_h_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cpacmpne_h_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cpacmpne_w_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cpacmpne_w_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cpacmpgtu_b_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cpacmpgtu_b_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cpacmpgt_b_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cpacmpgt_b_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cpacmpgt_h_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cpacmpgt_h_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cpacmpgtu_w_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cpacmpgtu_w_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cpacmpgt_w_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cpacmpgt_w_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cpacmpgeu_b_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cpacmpgeu_b_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cpacmpge_b_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cpacmpge_b_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cpacmpge_h_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cpacmpge_h_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cpacmpgeu_w_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cpacmpgeu_w_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cpacmpge_w_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cpacmpge_w_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cpocmpeq_b_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cpocmpeq_b_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cpocmpeq_h_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cpocmpeq_h_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cpocmpeq_w_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cpocmpeq_w_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cpocmpne_b_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cpocmpne_b_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cpocmpne_h_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cpocmpne_h_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cpocmpne_w_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cpocmpne_w_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cpocmpgtu_b_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cpocmpgtu_b_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cpocmpgt_b_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cpocmpgt_b_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cpocmpgt_h_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cpocmpgt_h_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cpocmpgtu_w_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cpocmpgtu_w_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cpocmpgt_w_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cpocmpgt_w_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cpocmpgeu_b_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cpocmpgeu_b_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cpocmpge_b_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cpocmpge_b_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cpocmpge_h_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cpocmpge_h_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cpocmpgeu_w_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cpocmpgeu_w_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cpocmpge_w_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cpocmpge_w_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cdadd3_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cdadd3_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cpsub3_b_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cpsub3_b_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cpsub3_h_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cpsub3_h_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cpsub3_w_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cpsub3_w_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cdsub3_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cdsub3_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cpsadd3_h_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cpsadd3_h_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cpsadd3_w_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cpsadd3_w_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cpssub3_h_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cpssub3_h_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cpssub3_w_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cpssub3_w_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cpextuaddu3_b_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cpextuaddu3_b_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cpextuadd3_b_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cpextuadd3_b_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cpextladdu3_b_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cpextladdu3_b_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cpextladd3_b_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cpextladd3_b_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cpextusubu3_b_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cpextusubu3_b_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cpextusub3_b_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cpextusub3_b_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cpextlsubu3_b_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cpextlsubu3_b_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cpextlsub3_b_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cpextlsub3_b_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cpaveu3_b_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cpaveu3_b_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cpave3_b_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cpave3_b_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cpave3_h_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cpave3_h_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cpave3_w_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cpave3_w_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cpaddsru3_b_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cpaddsru3_b_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cpaddsr3_b_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cpaddsr3_b_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cpaddsr3_h_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cpaddsr3_h_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cpaddsr3_w_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cpaddsr3_w_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cpabsu3_b_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cpabsu3_b_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cpabs3_b_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cpabs3_b_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cpabs3_h_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cpabs3_h_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cpand3_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cpand3_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cpor3_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cpor3_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cpnor3_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cpnor3_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cpxor3_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cpxor3_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cppacku_b_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cppacku_b_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cppack_b_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cppack_b_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cppack_h_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cppack_h_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cpmaxu3_b_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cpmaxu3_b_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cpmax3_b_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cpmax3_b_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cpmax3_h_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cpmax3_h_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cpmaxu3_w_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cpmaxu3_w_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cpmax3_w_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cpmax3_w_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cpminu3_b_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cpminu3_b_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cpmin3_b_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cpmin3_b_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cpmin3_h_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cpmin3_h_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cpminu3_w_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cpminu3_w_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cpmin3_w_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cpmin3_w_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cpsrl3_b_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cpsrl3_b_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cpssrl3_b_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cpssrl3_b_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cpsrl3_h_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cpsrl3_h_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cpssrl3_h_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cpssrl3_h_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cpsrl3_w_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cpsrl3_w_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cpssrl3_w_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cpssrl3_w_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cdsrl3_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cdsrl3_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cpsra3_b_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cpsra3_b_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cpssra3_b_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cpssra3_b_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cpsra3_h_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cpsra3_h_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cpssra3_h_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cpssra3_h_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cpsra3_w_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cpsra3_w_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cpssra3_w_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cpssra3_w_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cdsra3_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cdsra3_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cpsll3_b_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cpsll3_b_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cpssll3_b_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cpssll3_b_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cpsll3_h_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cpsll3_h_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cpssll3_h_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cpssll3_h_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cpsll3_w_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cpsll3_w_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cpssll3_w_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cpssll3_w_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cdsll3_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cdsll3_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cpsla3_h_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cpsla3_h_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cpsla3_w_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cpsla3_w_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cpsrli3_b_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cpsrli3_b_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cpsrli3_h_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cpsrli3_h_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cpsrli3_w_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cpsrli3_w_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cdsrli3_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cdsrli3_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cpsrai3_b_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cpsrai3_b_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cpsrai3_h_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cpsrai3_h_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cpsrai3_w_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cpsrai3_w_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cdsrai3_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cdsrai3_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cpslli3_b_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cpslli3_b_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cpslli3_h_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cpslli3_h_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cpslli3_w_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cpslli3_w_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cdslli3_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cdslli3_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cpslai3_h_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cpslai3_h_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cpslai3_w_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cpslai3_w_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cpclipiu3_w_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cpclipiu3_w_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cpclipi3_w_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cpclipi3_w_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cdclipiu3_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cdclipiu3_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cdclipi3_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cdclipi3_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cpmovi_h_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cpmovi_h_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cpmoviu_w_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cpmoviu_w_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cpmovi_w_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cpmovi_w_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cdmoviu_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cdmoviu_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cdmovi_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + UINT model_cdmovi_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_48_scache *sem); + + /* Enum declaration for unit types. */ +typedef enum unit_number { + UNIT_NONE, UNIT_U_STORE_CTRL_REG, UNIT_U_USE_CTRL_REG, UNIT_U_USE_GPR + , UNIT_U_MUL_GPR, UNIT_U_LDCB_GPR, UNIT_U_LOAD_GPR, UNIT_U_LDCB + , UNIT_U_STCB, UNIT_U_DIVIDE, UNIT_U_MULTIPLY, UNIT_U_BRANCH + , UNIT_U_EXEC, UNIT_MAX +} UNIT_NUMBER; + + struct unit { + unit_number unit; + UINT issue; + UINT done; + }; + + static const int MAX_UNITS = 1; + + typedef UINT (mepcop1_48_mep_model::*model_function) (mep_ext1_cpu* current_cpu, mepcop1_48_scache* sem); + + struct insn_timing { + // This is an integer that identifies this insn. + UINT num; + // Functions to handle insn-specific profiling. + model_function model_before; + model_function model_after; + // Array of function units used by this insn. + unit units[MAX_UNITS]; + }; + + static const insn_timing timing[]; +}; + +} // namespace mep_ext1 + +#endif // MEPCOP1_48_MODEL_H diff --git a/sid/component/cgen-cpu/mep/mep-cop1-48-sem.cxx b/sid/component/cgen-cpu/mep/mep-cop1-48-sem.cxx new file mode 100644 index 0000000000..185a652b0d --- /dev/null +++ b/sid/component/cgen-cpu/mep/mep-cop1-48-sem.cxx @@ -0,0 +1,3398 @@ +/* Simulator instruction semantics for mepcop1_48. + +THIS FILE IS MACHINE GENERATED WITH CGEN. + +Copyright (C) 2000-2007 Red Hat, Inc. + +This file is part of the Red Hat simulators. + + +*/ + + +#if HAVE_CONFIG_H +#include "config.h" +#endif +#include "mep_ext1.h" + +using namespace mep_ext1; // FIXME: namespace organization still wip +#define GET_ATTR(name) GET_ATTR_##name () + + +// ********** x-invalid: --invalid-- + +sem_status +mepcop1_48_sem_x_invalid (mep_ext1_cpu* current_cpu, mepcop1_48_scache* sem) +{ +#define FLD(f) abuf->fields.fmt_empty.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_48_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 0; + + { + current_cpu->invalid_insn (pc); + assert (0); + /* NOTREACHED */ + } + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cmov-crn-rm-p0: cmov $ivc2crn,$ivc2rm + +sem_status +mepcop1_48_sem_cmov_crn_rm_p0 (mep_ext1_cpu* current_cpu, mepcop1_48_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cmov_crn_rm_p0.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_48_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + + { + DI opval = * FLD (i_ivc2rm); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_crnx) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_crnx), opval); + } + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cmov-rn-crm-p0: cmov $ivc2rm,$ivc2crn + +sem_status +mepcop1_48_sem_cmov_rn_crm_p0 (mep_ext1_cpu* current_cpu, mepcop1_48_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cmov_rn_crm_p0.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_48_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + + { + SI opval = current_cpu->hardware.h_cr64[FLD (f_ivc2_crnx)]; + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "gpr" << '[' << FLD (f_ivc2_crm) << ']' << ":=0x" << hex << opval << dec << " "; + * FLD (i_ivc2rm) = opval; + } + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cmovc-ccrn-rm-p0: cmovc $ivc2ccrn,$ivc2rm + +sem_status +mepcop1_48_sem_cmovc_ccrn_rm_p0 (mep_ext1_cpu* current_cpu, mepcop1_48_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cmovc_ccrn_rm_p0.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_48_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + + { + SI opval = * FLD (i_ivc2rm); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "ccr" << '[' << FLD (f_ivc2_ccrn) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_ccr_set (FLD (f_ivc2_ccrn), opval); + } + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cmovc-rn-ccrm-p0: cmovc $ivc2rm,$ivc2ccrn + +sem_status +mepcop1_48_sem_cmovc_rn_ccrm_p0 (mep_ext1_cpu* current_cpu, mepcop1_48_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cmovc_rn_ccrm_p0.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_48_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + + { + SI opval = current_cpu->hardware.h_ccr[FLD (f_ivc2_ccrn)]; + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "gpr" << '[' << FLD (f_ivc2_crm) << ']' << ":=0x" << hex << opval << dec << " "; + * FLD (i_ivc2rm) = opval; + } + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cmovh-crn-rm-p0: cmovh $ivc2crn,$ivc2rm + +sem_status +mepcop1_48_sem_cmovh_crn_rm_p0 (mep_ext1_cpu* current_cpu, mepcop1_48_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cmov_crn_rm_p0.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_48_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + + { + DI opval = ORDI (SLLDI (ZEXTSIDI (* FLD (i_ivc2rm)), 32), ANDDI (current_cpu->hardware.h_cr64[FLD (f_ivc2_crnx)], 0xffffffff)); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_crnx) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_crnx), opval); + } + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cmovh-rn-crm-p0: cmovh $ivc2rm,$ivc2crn + +sem_status +mepcop1_48_sem_cmovh_rn_crm_p0 (mep_ext1_cpu* current_cpu, mepcop1_48_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cmov_rn_crm_p0.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_48_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + + { + SI opval = SRLDI (current_cpu->hardware.h_cr64[FLD (f_ivc2_crnx)], 32); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "gpr" << '[' << FLD (f_ivc2_crm) << ']' << ":=0x" << hex << opval << dec << " "; + * FLD (i_ivc2rm) = opval; + } + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** c0nop_P0_P0S: c0nop + +sem_status +mepcop1_48_sem_c0nop_P0_P0S (mep_ext1_cpu* current_cpu, mepcop1_48_scache* sem) +{ +#define FLD(f) abuf->fields.fmt_empty.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_48_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_c0nop (pc); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpfsftbi_P0_P1: cpfsftbi $crop,$crqp,$crpp,$imm3p5 + +sem_status +mepcop1_48_sem_cpfsftbi_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_48_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_48_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpfsftbi (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)], FLD (f_ivc2_3u5)); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpacmpeq_b_P0_P1: cpacmpeq.b $crqp,$crpp + +sem_status +mepcop1_48_sem_cpacmpeq_b_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_48_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_48_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpacmpeq_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpacmpeq_h_P0_P1: cpacmpeq.h $crqp,$crpp + +sem_status +mepcop1_48_sem_cpacmpeq_h_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_48_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_48_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpacmpeq_h (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpacmpeq_w_P0_P1: cpacmpeq.w $crqp,$crpp + +sem_status +mepcop1_48_sem_cpacmpeq_w_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_48_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_48_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpacmpeq_w (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpacmpne_b_P0_P1: cpacmpne.b $crqp,$crpp + +sem_status +mepcop1_48_sem_cpacmpne_b_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_48_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_48_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpacmpne_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpacmpne_h_P0_P1: cpacmpne.h $crqp,$crpp + +sem_status +mepcop1_48_sem_cpacmpne_h_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_48_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_48_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpacmpne_h (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpacmpne_w_P0_P1: cpacmpne.w $crqp,$crpp + +sem_status +mepcop1_48_sem_cpacmpne_w_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_48_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_48_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpacmpne_w (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpacmpgtu_b_P0_P1: cpacmpgtu.b $crqp,$crpp + +sem_status +mepcop1_48_sem_cpacmpgtu_b_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_48_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_48_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpacmpgtu_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpacmpgt_b_P0_P1: cpacmpgt.b $crqp,$crpp + +sem_status +mepcop1_48_sem_cpacmpgt_b_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_48_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_48_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpacmpgt_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpacmpgt_h_P0_P1: cpacmpgt.h $crqp,$crpp + +sem_status +mepcop1_48_sem_cpacmpgt_h_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_48_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_48_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpacmpgt_h (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpacmpgtu_w_P0_P1: cpacmpgtu.w $crqp,$crpp + +sem_status +mepcop1_48_sem_cpacmpgtu_w_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_48_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_48_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpacmpgtu_w (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpacmpgt_w_P0_P1: cpacmpgt.w $crqp,$crpp + +sem_status +mepcop1_48_sem_cpacmpgt_w_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_48_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_48_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpacmpgt_w (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpacmpgeu_b_P0_P1: cpacmpgeu.b $crqp,$crpp + +sem_status +mepcop1_48_sem_cpacmpgeu_b_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_48_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_48_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpacmpgeu_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpacmpge_b_P0_P1: cpacmpge.b $crqp,$crpp + +sem_status +mepcop1_48_sem_cpacmpge_b_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_48_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_48_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpacmpge_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpacmpge_h_P0_P1: cpacmpge.h $crqp,$crpp + +sem_status +mepcop1_48_sem_cpacmpge_h_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_48_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_48_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpacmpge_h (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpacmpgeu_w_P0_P1: cpacmpgeu.w $crqp,$crpp + +sem_status +mepcop1_48_sem_cpacmpgeu_w_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_48_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_48_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpacmpgeu_w (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpacmpge_w_P0_P1: cpacmpge.w $crqp,$crpp + +sem_status +mepcop1_48_sem_cpacmpge_w_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_48_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_48_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpacmpge_w (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpocmpeq_b_P0_P1: cpocmpeq.b $crqp,$crpp + +sem_status +mepcop1_48_sem_cpocmpeq_b_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_48_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_48_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpocmpeq_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpocmpeq_h_P0_P1: cpocmpeq.h $crqp,$crpp + +sem_status +mepcop1_48_sem_cpocmpeq_h_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_48_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_48_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpocmpeq_h (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpocmpeq_w_P0_P1: cpocmpeq.w $crqp,$crpp + +sem_status +mepcop1_48_sem_cpocmpeq_w_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_48_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_48_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpocmpeq_w (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpocmpne_b_P0_P1: cpocmpne.b $crqp,$crpp + +sem_status +mepcop1_48_sem_cpocmpne_b_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_48_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_48_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpocmpne_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpocmpne_h_P0_P1: cpocmpne.h $crqp,$crpp + +sem_status +mepcop1_48_sem_cpocmpne_h_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_48_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_48_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpocmpne_h (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpocmpne_w_P0_P1: cpocmpne.w $crqp,$crpp + +sem_status +mepcop1_48_sem_cpocmpne_w_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_48_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_48_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpocmpne_w (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpocmpgtu_b_P0_P1: cpocmpgtu.b $crqp,$crpp + +sem_status +mepcop1_48_sem_cpocmpgtu_b_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_48_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_48_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpocmpgtu_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpocmpgt_b_P0_P1: cpocmpgt.b $crqp,$crpp + +sem_status +mepcop1_48_sem_cpocmpgt_b_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_48_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_48_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpocmpgt_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpocmpgt_h_P0_P1: cpocmpgt.h $crqp,$crpp + +sem_status +mepcop1_48_sem_cpocmpgt_h_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_48_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_48_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpocmpgt_h (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpocmpgtu_w_P0_P1: cpocmpgtu.w $crqp,$crpp + +sem_status +mepcop1_48_sem_cpocmpgtu_w_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_48_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_48_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpocmpgtu_w (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpocmpgt_w_P0_P1: cpocmpgt.w $crqp,$crpp + +sem_status +mepcop1_48_sem_cpocmpgt_w_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_48_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_48_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpocmpgt_w (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpocmpgeu_b_P0_P1: cpocmpgeu.b $crqp,$crpp + +sem_status +mepcop1_48_sem_cpocmpgeu_b_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_48_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_48_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpocmpgeu_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpocmpge_b_P0_P1: cpocmpge.b $crqp,$crpp + +sem_status +mepcop1_48_sem_cpocmpge_b_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_48_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_48_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpocmpge_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpocmpge_h_P0_P1: cpocmpge.h $crqp,$crpp + +sem_status +mepcop1_48_sem_cpocmpge_h_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_48_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_48_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpocmpge_h (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpocmpgeu_w_P0_P1: cpocmpgeu.w $crqp,$crpp + +sem_status +mepcop1_48_sem_cpocmpgeu_w_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_48_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_48_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpocmpgeu_w (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpocmpge_w_P0_P1: cpocmpge.w $crqp,$crpp + +sem_status +mepcop1_48_sem_cpocmpge_w_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_48_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_48_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpocmpge_w (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cdadd3_P0_P1: cdadd3 $crop,$crqp,$crpp + +sem_status +mepcop1_48_sem_cdadd3_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_48_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_48_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cdadd3 (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpsub3_b_P0_P1: cpsub3.b $crop,$crqp,$crpp + +sem_status +mepcop1_48_sem_cpsub3_b_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_48_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_48_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpsub3_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpsub3_h_P0_P1: cpsub3.h $crop,$crqp,$crpp + +sem_status +mepcop1_48_sem_cpsub3_h_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_48_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_48_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpsub3_h (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpsub3_w_P0_P1: cpsub3.w $crop,$crqp,$crpp + +sem_status +mepcop1_48_sem_cpsub3_w_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_48_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_48_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpsub3_w (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cdsub3_P0_P1: cdsub3 $crop,$crqp,$crpp + +sem_status +mepcop1_48_sem_cdsub3_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_48_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_48_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cdsub3 (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpsadd3_h_P0_P1: cpsadd3.h $crop,$crqp,$crpp + +sem_status +mepcop1_48_sem_cpsadd3_h_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_48_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_48_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpsadd3_h (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpsadd3_w_P0_P1: cpsadd3.w $crop,$crqp,$crpp + +sem_status +mepcop1_48_sem_cpsadd3_w_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_48_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_48_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpsadd3_w (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpssub3_h_P0_P1: cpssub3.h $crop,$crqp,$crpp + +sem_status +mepcop1_48_sem_cpssub3_h_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_48_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_48_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpssub3_h (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpssub3_w_P0_P1: cpssub3.w $crop,$crqp,$crpp + +sem_status +mepcop1_48_sem_cpssub3_w_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_48_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_48_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpssub3_w (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpextuaddu3_b_P0_P1: cpextuaddu3.b $crop,$crqp,$crpp + +sem_status +mepcop1_48_sem_cpextuaddu3_b_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_48_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_48_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpextuaddu3_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpextuadd3_b_P0_P1: cpextuadd3.b $crop,$crqp,$crpp + +sem_status +mepcop1_48_sem_cpextuadd3_b_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_48_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_48_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpextuadd3_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpextladdu3_b_P0_P1: cpextladdu3.b $crop,$crqp,$crpp + +sem_status +mepcop1_48_sem_cpextladdu3_b_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_48_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_48_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpextladdu3_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpextladd3_b_P0_P1: cpextladd3.b $crop,$crqp,$crpp + +sem_status +mepcop1_48_sem_cpextladd3_b_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_48_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_48_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpextladd3_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpextusubu3_b_P0_P1: cpextusubu3.b $crop,$crqp,$crpp + +sem_status +mepcop1_48_sem_cpextusubu3_b_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_48_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_48_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpextusubu3_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpextusub3_b_P0_P1: cpextusub3.b $crop,$crqp,$crpp + +sem_status +mepcop1_48_sem_cpextusub3_b_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_48_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_48_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpextusub3_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpextlsubu3_b_P0_P1: cpextlsubu3.b $crop,$crqp,$crpp + +sem_status +mepcop1_48_sem_cpextlsubu3_b_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_48_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_48_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpextlsubu3_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpextlsub3_b_P0_P1: cpextlsub3.b $crop,$crqp,$crpp + +sem_status +mepcop1_48_sem_cpextlsub3_b_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_48_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_48_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpextlsub3_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpaveu3_b_P0_P1: cpaveu3.b $crop,$crqp,$crpp + +sem_status +mepcop1_48_sem_cpaveu3_b_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_48_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_48_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpaveu3_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpave3_b_P0_P1: cpave3.b $crop,$crqp,$crpp + +sem_status +mepcop1_48_sem_cpave3_b_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_48_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_48_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpave3_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpave3_h_P0_P1: cpave3.h $crop,$crqp,$crpp + +sem_status +mepcop1_48_sem_cpave3_h_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_48_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_48_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpave3_h (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpave3_w_P0_P1: cpave3.w $crop,$crqp,$crpp + +sem_status +mepcop1_48_sem_cpave3_w_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_48_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_48_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpave3_w (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpaddsru3_b_P0_P1: cpaddsru3.b $crop,$crqp,$crpp + +sem_status +mepcop1_48_sem_cpaddsru3_b_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_48_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_48_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpaddsru3_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpaddsr3_b_P0_P1: cpaddsr3.b $crop,$crqp,$crpp + +sem_status +mepcop1_48_sem_cpaddsr3_b_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_48_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_48_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpaddsr3_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpaddsr3_h_P0_P1: cpaddsr3.h $crop,$crqp,$crpp + +sem_status +mepcop1_48_sem_cpaddsr3_h_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_48_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_48_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpaddsr3_h (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpaddsr3_w_P0_P1: cpaddsr3.w $crop,$crqp,$crpp + +sem_status +mepcop1_48_sem_cpaddsr3_w_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_48_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_48_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpaddsr3_w (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpabsu3_b_P0_P1: cpabsu3.b $crop,$crqp,$crpp + +sem_status +mepcop1_48_sem_cpabsu3_b_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_48_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_48_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpabsu3_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpabs3_b_P0_P1: cpabs3.b $crop,$crqp,$crpp + +sem_status +mepcop1_48_sem_cpabs3_b_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_48_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_48_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpabs3_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpabs3_h_P0_P1: cpabs3.h $crop,$crqp,$crpp + +sem_status +mepcop1_48_sem_cpabs3_h_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_48_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_48_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpabs3_h (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpand3_P0_P1: cpand3 $crop,$crqp,$crpp + +sem_status +mepcop1_48_sem_cpand3_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_48_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_48_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpand3 (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpor3_P0_P1: cpor3 $crop,$crqp,$crpp + +sem_status +mepcop1_48_sem_cpor3_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_48_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_48_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpor3 (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpnor3_P0_P1: cpnor3 $crop,$crqp,$crpp + +sem_status +mepcop1_48_sem_cpnor3_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_48_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_48_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpnor3 (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpxor3_P0_P1: cpxor3 $crop,$crqp,$crpp + +sem_status +mepcop1_48_sem_cpxor3_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_48_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_48_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpxor3 (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cppacku_b_P0_P1: cppacku.b $crop,$crqp,$crpp + +sem_status +mepcop1_48_sem_cppacku_b_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_48_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_48_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cppacku_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cppack_b_P0_P1: cppack.b $crop,$crqp,$crpp + +sem_status +mepcop1_48_sem_cppack_b_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_48_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_48_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cppack_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cppack_h_P0_P1: cppack.h $crop,$crqp,$crpp + +sem_status +mepcop1_48_sem_cppack_h_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_48_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_48_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cppack_h (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpmaxu3_b_P0_P1: cpmaxu3.b $crop,$crqp,$crpp + +sem_status +mepcop1_48_sem_cpmaxu3_b_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_48_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_48_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpmaxu3_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpmax3_b_P0_P1: cpmax3.b $crop,$crqp,$crpp + +sem_status +mepcop1_48_sem_cpmax3_b_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_48_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_48_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpmax3_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpmax3_h_P0_P1: cpmax3.h $crop,$crqp,$crpp + +sem_status +mepcop1_48_sem_cpmax3_h_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_48_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_48_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpmax3_h (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpmaxu3_w_P0_P1: cpmaxu3.w $crop,$crqp,$crpp + +sem_status +mepcop1_48_sem_cpmaxu3_w_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_48_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_48_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpmaxu3_w (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpmax3_w_P0_P1: cpmax3.w $crop,$crqp,$crpp + +sem_status +mepcop1_48_sem_cpmax3_w_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_48_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_48_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpmax3_w (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpminu3_b_P0_P1: cpminu3.b $crop,$crqp,$crpp + +sem_status +mepcop1_48_sem_cpminu3_b_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_48_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_48_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpminu3_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpmin3_b_P0_P1: cpmin3.b $crop,$crqp,$crpp + +sem_status +mepcop1_48_sem_cpmin3_b_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_48_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_48_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpmin3_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpmin3_h_P0_P1: cpmin3.h $crop,$crqp,$crpp + +sem_status +mepcop1_48_sem_cpmin3_h_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_48_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_48_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpmin3_h (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpminu3_w_P0_P1: cpminu3.w $crop,$crqp,$crpp + +sem_status +mepcop1_48_sem_cpminu3_w_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_48_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_48_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpminu3_w (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpmin3_w_P0_P1: cpmin3.w $crop,$crqp,$crpp + +sem_status +mepcop1_48_sem_cpmin3_w_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_48_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_48_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpmin3_w (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpsrl3_b_P0_P1: cpsrl3.b $crop,$crqp,$crpp + +sem_status +mepcop1_48_sem_cpsrl3_b_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_48_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_48_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpsrl3_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpssrl3_b_P0_P1: cpssrl3.b $crop,$crqp,$crpp + +sem_status +mepcop1_48_sem_cpssrl3_b_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_48_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_48_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpssrl3_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpsrl3_h_P0_P1: cpsrl3.h $crop,$crqp,$crpp + +sem_status +mepcop1_48_sem_cpsrl3_h_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_48_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_48_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpsrl3_h (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpssrl3_h_P0_P1: cpssrl3.h $crop,$crqp,$crpp + +sem_status +mepcop1_48_sem_cpssrl3_h_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_48_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_48_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpssrl3_h (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpsrl3_w_P0_P1: cpsrl3.w $crop,$crqp,$crpp + +sem_status +mepcop1_48_sem_cpsrl3_w_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_48_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_48_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpsrl3_w (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpssrl3_w_P0_P1: cpssrl3.w $crop,$crqp,$crpp + +sem_status +mepcop1_48_sem_cpssrl3_w_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_48_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_48_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpssrl3_w (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cdsrl3_P0_P1: cdsrl3 $crop,$crqp,$crpp + +sem_status +mepcop1_48_sem_cdsrl3_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_48_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_48_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cdsrl3 (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpsra3_b_P0_P1: cpsra3.b $crop,$crqp,$crpp + +sem_status +mepcop1_48_sem_cpsra3_b_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_48_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_48_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpsra3_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpssra3_b_P0_P1: cpssra3.b $crop,$crqp,$crpp + +sem_status +mepcop1_48_sem_cpssra3_b_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_48_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_48_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpssra3_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpsra3_h_P0_P1: cpsra3.h $crop,$crqp,$crpp + +sem_status +mepcop1_48_sem_cpsra3_h_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_48_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_48_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpsra3_h (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpssra3_h_P0_P1: cpssra3.h $crop,$crqp,$crpp + +sem_status +mepcop1_48_sem_cpssra3_h_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_48_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_48_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpssra3_h (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpsra3_w_P0_P1: cpsra3.w $crop,$crqp,$crpp + +sem_status +mepcop1_48_sem_cpsra3_w_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_48_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_48_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpsra3_w (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpssra3_w_P0_P1: cpssra3.w $crop,$crqp,$crpp + +sem_status +mepcop1_48_sem_cpssra3_w_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_48_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_48_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpssra3_w (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cdsra3_P0_P1: cdsra3 $crop,$crqp,$crpp + +sem_status +mepcop1_48_sem_cdsra3_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_48_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_48_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cdsra3 (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpsll3_b_P0_P1: cpsll3.b $crop,$crqp,$crpp + +sem_status +mepcop1_48_sem_cpsll3_b_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_48_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_48_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpsll3_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpssll3_b_P0_P1: cpssll3.b $crop,$crqp,$crpp + +sem_status +mepcop1_48_sem_cpssll3_b_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_48_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_48_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpssll3_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpsll3_h_P0_P1: cpsll3.h $crop,$crqp,$crpp + +sem_status +mepcop1_48_sem_cpsll3_h_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_48_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_48_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpsll3_h (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpssll3_h_P0_P1: cpssll3.h $crop,$crqp,$crpp + +sem_status +mepcop1_48_sem_cpssll3_h_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_48_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_48_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpssll3_h (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpsll3_w_P0_P1: cpsll3.w $crop,$crqp,$crpp + +sem_status +mepcop1_48_sem_cpsll3_w_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_48_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_48_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpsll3_w (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpssll3_w_P0_P1: cpssll3.w $crop,$crqp,$crpp + +sem_status +mepcop1_48_sem_cpssll3_w_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_48_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_48_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpssll3_w (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cdsll3_P0_P1: cdsll3 $crop,$crqp,$crpp + +sem_status +mepcop1_48_sem_cdsll3_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_48_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_48_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cdsll3 (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpsla3_h_P0_P1: cpsla3.h $crop,$crqp,$crpp + +sem_status +mepcop1_48_sem_cpsla3_h_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_48_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_48_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpsla3_h (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpsla3_w_P0_P1: cpsla3.w $crop,$crqp,$crpp + +sem_status +mepcop1_48_sem_cpsla3_w_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_48_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_48_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpsla3_w (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpsrli3_b_P0_P1: cpsrli3.b $crop,$crqp,$imm3p5 + +sem_status +mepcop1_48_sem_cpsrli3_b_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_48_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_48_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpsrli3_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], FLD (f_ivc2_3u5)); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpsrli3_h_P0_P1: cpsrli3.h $crop,$crqp,$imm4p4 + +sem_status +mepcop1_48_sem_cpsrli3_h_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_48_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpsrli3_h_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_48_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpsrli3_h (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], FLD (f_ivc2_4u4)); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpsrli3_w_P0_P1: cpsrli3.w $crop,$crqp,$imm5p3 + +sem_status +mepcop1_48_sem_cpsrli3_w_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_48_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpsrli3_w_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_48_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpsrli3_w (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], FLD (f_ivc2_5u3)); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cdsrli3_P0_P1: cdsrli3 $crop,$crqp,$imm6p2 + +sem_status +mepcop1_48_sem_cdsrli3_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_48_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_48_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cdsrli3 (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], FLD (f_ivc2_6u2)); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpsrai3_b_P0_P1: cpsrai3.b $crop,$crqp,$imm3p5 + +sem_status +mepcop1_48_sem_cpsrai3_b_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_48_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_48_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpsrai3_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], FLD (f_ivc2_3u5)); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpsrai3_h_P0_P1: cpsrai3.h $crop,$crqp,$imm4p4 + +sem_status +mepcop1_48_sem_cpsrai3_h_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_48_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpsrli3_h_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_48_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpsrai3_h (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], FLD (f_ivc2_4u4)); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpsrai3_w_P0_P1: cpsrai3.w $crop,$crqp,$imm5p3 + +sem_status +mepcop1_48_sem_cpsrai3_w_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_48_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpsrli3_w_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_48_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpsrai3_w (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], FLD (f_ivc2_5u3)); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cdsrai3_P0_P1: cdsrai3 $crop,$crqp,$imm6p2 + +sem_status +mepcop1_48_sem_cdsrai3_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_48_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_48_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cdsrai3 (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], FLD (f_ivc2_6u2)); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpslli3_b_P0_P1: cpslli3.b $crop,$crqp,$imm3p5 + +sem_status +mepcop1_48_sem_cpslli3_b_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_48_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_48_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpslli3_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], FLD (f_ivc2_3u5)); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpslli3_h_P0_P1: cpslli3.h $crop,$crqp,$imm4p4 + +sem_status +mepcop1_48_sem_cpslli3_h_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_48_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpsrli3_h_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_48_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpslli3_h (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], FLD (f_ivc2_4u4)); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpslli3_w_P0_P1: cpslli3.w $crop,$crqp,$imm5p3 + +sem_status +mepcop1_48_sem_cpslli3_w_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_48_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpsrli3_w_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_48_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpslli3_w (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], FLD (f_ivc2_5u3)); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cdslli3_P0_P1: cdslli3 $crop,$crqp,$imm6p2 + +sem_status +mepcop1_48_sem_cdslli3_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_48_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_48_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cdslli3 (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], FLD (f_ivc2_6u2)); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpslai3_h_P0_P1: cpslai3.h $crop,$crqp,$imm4p4 + +sem_status +mepcop1_48_sem_cpslai3_h_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_48_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpsrli3_h_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_48_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpslai3_h (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], FLD (f_ivc2_4u4)); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpslai3_w_P0_P1: cpslai3.w $crop,$crqp,$imm5p3 + +sem_status +mepcop1_48_sem_cpslai3_w_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_48_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpsrli3_w_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_48_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpslai3_w (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], FLD (f_ivc2_5u3)); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpclipiu3_w_P0_P1: cpclipiu3.w $crop,$crqp,$imm5p3 + +sem_status +mepcop1_48_sem_cpclipiu3_w_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_48_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpsrli3_w_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_48_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpclipiu3_w (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], FLD (f_ivc2_5u3)); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpclipi3_w_P0_P1: cpclipi3.w $crop,$crqp,$imm5p3 + +sem_status +mepcop1_48_sem_cpclipi3_w_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_48_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpsrli3_w_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_48_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpclipi3_w (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], FLD (f_ivc2_5u3)); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cdclipiu3_P0_P1: cdclipiu3 $crop,$crqp,$imm6p2 + +sem_status +mepcop1_48_sem_cdclipiu3_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_48_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_48_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cdclipiu3 (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], FLD (f_ivc2_6u2)); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cdclipi3_P0_P1: cdclipi3 $crop,$crqp,$imm6p2 + +sem_status +mepcop1_48_sem_cdclipi3_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_48_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_48_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cdclipi3 (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], FLD (f_ivc2_6u2)); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpmovi_h_P0_P1: cpmovi.h $crqp,$simm16p0 + +sem_status +mepcop1_48_sem_cpmovi_h_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_48_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpmovi_h_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_48_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpmovi_h16 (pc, FLD (f_ivc2_simm16p0)); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u13) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u13), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpmoviu_w_P0_P1: cpmoviu.w $crqp,$imm16p0 + +sem_status +mepcop1_48_sem_cpmoviu_w_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_48_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpmoviu_w_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_48_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpmoviu_w16 (pc, FLD (f_ivc2_imm16p0)); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u13) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u13), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpmovi_w_P0_P1: cpmovi.w $crqp,$simm16p0 + +sem_status +mepcop1_48_sem_cpmovi_w_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_48_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpmovi_h_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_48_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpmovi_w16 (pc, FLD (f_ivc2_simm16p0)); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u13) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u13), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cdmoviu_P0_P1: cdmoviu $crqp,$imm16p0 + +sem_status +mepcop1_48_sem_cdmoviu_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_48_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpmoviu_w_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_48_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cdmoviu16 (pc, FLD (f_ivc2_imm16p0)); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u13) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u13), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cdmovi_P0_P1: cdmovi $crqp,$simm16p0 + +sem_status +mepcop1_48_sem_cdmovi_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_48_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpmovi_h_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_48_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cdmovi16 (pc, FLD (f_ivc2_simm16p0)); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u13) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u13), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + diff --git a/sid/component/cgen-cpu/mep/mep-cop1-64-decode.cxx b/sid/component/cgen-cpu/mep/mep-cop1-64-decode.cxx new file mode 100644 index 0000000000..3fb5884327 --- /dev/null +++ b/sid/component/cgen-cpu/mep/mep-cop1-64-decode.cxx @@ -0,0 +1,4414 @@ +/* Simulator instruction decoder for mepcop1_64. + +THIS FILE IS MACHINE GENERATED WITH CGEN. + +Copyright (C) 2000-2007 Red Hat, Inc. + +This file is part of the Red Hat simulators. + + +*/ + + +#if HAVE_CONFIG_H +#include "config.h" +#endif +#include "mep_ext1.h" + +using namespace mep_ext1; // FIXME: namespace organization still wip + + +// The instruction descriptor array. + +mepcop1_64_idesc mepcop1_64_idesc::idesc_table[MEPCOP1_64_INSN_CPSMSBSLLA1_W_P1 + 1] = +{ + { mepcop1_64_sem_x_invalid, "X_INVALID", MEPCOP1_64_INSN_X_INVALID, { 0|(1<> 18) & (31 << 6)) | ((insn >> 17) & (15 << 2)) | ((insn >> 7) & (3 << 0))); + switch (val) + { + case 0 : + { + unsigned int val = (((insn >> 9) & (31 << 0))); + switch (val) + { + case 0 : + { + unsigned int val = (((insn >> 23) & (1 << 0))); + switch (val) + { + case 0 : + if ((entire_insn & 0xffffffff) == 0x0) + { itype = MEPCOP1_64_INSN_C1NOP_P1; mepcop1_64_extract_sfmt_c1nop_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 1 : + if ((entire_insn & 0xfff83e0f) == 0x800000) + { itype = MEPCOP1_64_INSN_CPMOV_P0S_P1; mepcop1_64_extract_sfmt_cpmov_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + default : itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + } + } + case 1 : + if ((entire_insn & 0xfff83e0f) == 0x800200) + { itype = MEPCOP1_64_INSN_CPABSZ_B_P0S_P1; mepcop1_64_extract_sfmt_cpmov_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 2 : + if ((entire_insn & 0xfff83e0f) == 0x800400) + { itype = MEPCOP1_64_INSN_CPABSZ_H_P0S_P1; mepcop1_64_extract_sfmt_cpmov_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 3 : + if ((entire_insn & 0xfff83e0f) == 0x800600) + { itype = MEPCOP1_64_INSN_CPABSZ_W_P0S_P1; mepcop1_64_extract_sfmt_cpmov_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 4 : + if ((entire_insn & 0xfff83e0f) == 0x800800) + { itype = MEPCOP1_64_INSN_CPLDZ_H_P0S_P1; mepcop1_64_extract_sfmt_cpmov_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 5 : + if ((entire_insn & 0xfff83e0f) == 0x800a00) + { itype = MEPCOP1_64_INSN_CPLDZ_W_P0S_P1; mepcop1_64_extract_sfmt_cpmov_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 6 : + if ((entire_insn & 0xfff83e0f) == 0x800c00) + { itype = MEPCOP1_64_INSN_CPNORM_H_P0S_P1; mepcop1_64_extract_sfmt_cpmov_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 7 : + if ((entire_insn & 0xfff83e0f) == 0x800e00) + { itype = MEPCOP1_64_INSN_CPNORM_W_P0S_P1; mepcop1_64_extract_sfmt_cpmov_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 8 : + if ((entire_insn & 0xfff83e0f) == 0x801000) + { itype = MEPCOP1_64_INSN_CPHADDU_B_P0S_P1; mepcop1_64_extract_sfmt_cpmov_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 9 : + if ((entire_insn & 0xfff83e0f) == 0x801200) + { itype = MEPCOP1_64_INSN_CPHADD_B_P0S_P1; mepcop1_64_extract_sfmt_cpmov_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 10 : + if ((entire_insn & 0xfff83e0f) == 0x801400) + { itype = MEPCOP1_64_INSN_CPHADD_H_P0S_P1; mepcop1_64_extract_sfmt_cpmov_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 11 : + if ((entire_insn & 0xfff83e0f) == 0x801600) + { itype = MEPCOP1_64_INSN_CPHADD_W_P0S_P1; mepcop1_64_extract_sfmt_cpmov_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 12 : + if ((entire_insn & 0xfff83fff) == 0x801800) + { itype = MEPCOP1_64_INSN_CPCCADD_B_P0S_P1; mepcop1_64_extract_sfmt_cpccadd_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 13 : + if ((entire_insn & 0xfff83e0f) == 0x801a00) + { itype = MEPCOP1_64_INSN_CPBCAST_B_P0S_P1; mepcop1_64_extract_sfmt_cpmov_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 14 : + if ((entire_insn & 0xfff83e0f) == 0x801c00) + { itype = MEPCOP1_64_INSN_CPBCAST_H_P0S_P1; mepcop1_64_extract_sfmt_cpmov_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 15 : + if ((entire_insn & 0xfff83e0f) == 0x801e00) + { itype = MEPCOP1_64_INSN_CPBCAST_W_P0S_P1; mepcop1_64_extract_sfmt_cpmov_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 16 : + if ((entire_insn & 0xfff83e0f) == 0x802000) + { itype = MEPCOP1_64_INSN_CPEXTUU_B_P0S_P1; mepcop1_64_extract_sfmt_cpmov_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 17 : + if ((entire_insn & 0xfff83e0f) == 0x802200) + { itype = MEPCOP1_64_INSN_CPEXTU_B_P0S_P1; mepcop1_64_extract_sfmt_cpmov_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 18 : + if ((entire_insn & 0xfff83e0f) == 0x802400) + { itype = MEPCOP1_64_INSN_CPEXTUU_H_P0S_P1; mepcop1_64_extract_sfmt_cpmov_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 19 : + if ((entire_insn & 0xfff83e0f) == 0x802600) + { itype = MEPCOP1_64_INSN_CPEXTU_H_P0S_P1; mepcop1_64_extract_sfmt_cpmov_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 20 : + if ((entire_insn & 0xfff83e0f) == 0x802800) + { itype = MEPCOP1_64_INSN_CPEXTLU_B_P0S_P1; mepcop1_64_extract_sfmt_cpmov_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 21 : + if ((entire_insn & 0xfff83e0f) == 0x802a00) + { itype = MEPCOP1_64_INSN_CPEXTL_B_P0S_P1; mepcop1_64_extract_sfmt_cpmov_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 22 : + if ((entire_insn & 0xfff83e0f) == 0x802c00) + { itype = MEPCOP1_64_INSN_CPEXTLU_H_P0S_P1; mepcop1_64_extract_sfmt_cpmov_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 23 : + if ((entire_insn & 0xfff83e0f) == 0x802e00) + { itype = MEPCOP1_64_INSN_CPEXTL_H_P0S_P1; mepcop1_64_extract_sfmt_cpmov_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 24 : + if ((entire_insn & 0xfff83e0f) == 0x803000) + { itype = MEPCOP1_64_INSN_CPCASTUB_H_P0S_P1; mepcop1_64_extract_sfmt_cpmov_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 25 : + if ((entire_insn & 0xfff83e0f) == 0x803200) + { itype = MEPCOP1_64_INSN_CPCASTB_H_P0S_P1; mepcop1_64_extract_sfmt_cpmov_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 26 : + if ((entire_insn & 0xfff83e0f) == 0x803400) + { itype = MEPCOP1_64_INSN_CDCASTUW_P0S_P1; mepcop1_64_extract_sfmt_cpmov_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 27 : + if ((entire_insn & 0xfff83e0f) == 0x803600) + { itype = MEPCOP1_64_INSN_CDCASTW_P0S_P1; mepcop1_64_extract_sfmt_cpmov_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 28 : + if ((entire_insn & 0xfff83e0f) == 0x803800) + { itype = MEPCOP1_64_INSN_CPCASTUB_W_P0S_P1; mepcop1_64_extract_sfmt_cpmov_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 29 : + if ((entire_insn & 0xfff83e0f) == 0x803a00) + { itype = MEPCOP1_64_INSN_CPCASTB_W_P0S_P1; mepcop1_64_extract_sfmt_cpmov_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 30 : + if ((entire_insn & 0xfff83e0f) == 0x803c00) + { itype = MEPCOP1_64_INSN_CPCASTUH_W_P0S_P1; mepcop1_64_extract_sfmt_cpmov_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 31 : + if ((entire_insn & 0xfff83e0f) == 0x803e00) + { itype = MEPCOP1_64_INSN_CPCASTH_W_P0S_P1; mepcop1_64_extract_sfmt_cpmov_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + default : itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + } + } + case 1 : /* fall through */ + case 2 : /* fall through */ + case 3 : + { + unsigned int val = (((insn >> 9) & (31 << 0))); + switch (val) + { + case 0 : + if ((entire_insn & 0xfff83e0f) == 0x800000) + { itype = MEPCOP1_64_INSN_CPMOV_P0S_P1; mepcop1_64_extract_sfmt_cpmov_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 1 : + if ((entire_insn & 0xfff83e0f) == 0x800200) + { itype = MEPCOP1_64_INSN_CPABSZ_B_P0S_P1; mepcop1_64_extract_sfmt_cpmov_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 2 : + if ((entire_insn & 0xfff83e0f) == 0x800400) + { itype = MEPCOP1_64_INSN_CPABSZ_H_P0S_P1; mepcop1_64_extract_sfmt_cpmov_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 3 : + if ((entire_insn & 0xfff83e0f) == 0x800600) + { itype = MEPCOP1_64_INSN_CPABSZ_W_P0S_P1; mepcop1_64_extract_sfmt_cpmov_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 4 : + if ((entire_insn & 0xfff83e0f) == 0x800800) + { itype = MEPCOP1_64_INSN_CPLDZ_H_P0S_P1; mepcop1_64_extract_sfmt_cpmov_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 5 : + if ((entire_insn & 0xfff83e0f) == 0x800a00) + { itype = MEPCOP1_64_INSN_CPLDZ_W_P0S_P1; mepcop1_64_extract_sfmt_cpmov_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 6 : + if ((entire_insn & 0xfff83e0f) == 0x800c00) + { itype = MEPCOP1_64_INSN_CPNORM_H_P0S_P1; mepcop1_64_extract_sfmt_cpmov_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 7 : + if ((entire_insn & 0xfff83e0f) == 0x800e00) + { itype = MEPCOP1_64_INSN_CPNORM_W_P0S_P1; mepcop1_64_extract_sfmt_cpmov_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 8 : + if ((entire_insn & 0xfff83e0f) == 0x801000) + { itype = MEPCOP1_64_INSN_CPHADDU_B_P0S_P1; mepcop1_64_extract_sfmt_cpmov_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 9 : + if ((entire_insn & 0xfff83e0f) == 0x801200) + { itype = MEPCOP1_64_INSN_CPHADD_B_P0S_P1; mepcop1_64_extract_sfmt_cpmov_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 10 : + if ((entire_insn & 0xfff83e0f) == 0x801400) + { itype = MEPCOP1_64_INSN_CPHADD_H_P0S_P1; mepcop1_64_extract_sfmt_cpmov_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 11 : + if ((entire_insn & 0xfff83e0f) == 0x801600) + { itype = MEPCOP1_64_INSN_CPHADD_W_P0S_P1; mepcop1_64_extract_sfmt_cpmov_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 13 : + if ((entire_insn & 0xfff83e0f) == 0x801a00) + { itype = MEPCOP1_64_INSN_CPBCAST_B_P0S_P1; mepcop1_64_extract_sfmt_cpmov_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 14 : + if ((entire_insn & 0xfff83e0f) == 0x801c00) + { itype = MEPCOP1_64_INSN_CPBCAST_H_P0S_P1; mepcop1_64_extract_sfmt_cpmov_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 15 : + if ((entire_insn & 0xfff83e0f) == 0x801e00) + { itype = MEPCOP1_64_INSN_CPBCAST_W_P0S_P1; mepcop1_64_extract_sfmt_cpmov_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 16 : + if ((entire_insn & 0xfff83e0f) == 0x802000) + { itype = MEPCOP1_64_INSN_CPEXTUU_B_P0S_P1; mepcop1_64_extract_sfmt_cpmov_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 17 : + if ((entire_insn & 0xfff83e0f) == 0x802200) + { itype = MEPCOP1_64_INSN_CPEXTU_B_P0S_P1; mepcop1_64_extract_sfmt_cpmov_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 18 : + if ((entire_insn & 0xfff83e0f) == 0x802400) + { itype = MEPCOP1_64_INSN_CPEXTUU_H_P0S_P1; mepcop1_64_extract_sfmt_cpmov_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 19 : + if ((entire_insn & 0xfff83e0f) == 0x802600) + { itype = MEPCOP1_64_INSN_CPEXTU_H_P0S_P1; mepcop1_64_extract_sfmt_cpmov_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 20 : + if ((entire_insn & 0xfff83e0f) == 0x802800) + { itype = MEPCOP1_64_INSN_CPEXTLU_B_P0S_P1; mepcop1_64_extract_sfmt_cpmov_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 21 : + if ((entire_insn & 0xfff83e0f) == 0x802a00) + { itype = MEPCOP1_64_INSN_CPEXTL_B_P0S_P1; mepcop1_64_extract_sfmt_cpmov_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 22 : + if ((entire_insn & 0xfff83e0f) == 0x802c00) + { itype = MEPCOP1_64_INSN_CPEXTLU_H_P0S_P1; mepcop1_64_extract_sfmt_cpmov_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 23 : + if ((entire_insn & 0xfff83e0f) == 0x802e00) + { itype = MEPCOP1_64_INSN_CPEXTL_H_P0S_P1; mepcop1_64_extract_sfmt_cpmov_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 24 : + if ((entire_insn & 0xfff83e0f) == 0x803000) + { itype = MEPCOP1_64_INSN_CPCASTUB_H_P0S_P1; mepcop1_64_extract_sfmt_cpmov_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 25 : + if ((entire_insn & 0xfff83e0f) == 0x803200) + { itype = MEPCOP1_64_INSN_CPCASTB_H_P0S_P1; mepcop1_64_extract_sfmt_cpmov_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 26 : + if ((entire_insn & 0xfff83e0f) == 0x803400) + { itype = MEPCOP1_64_INSN_CDCASTUW_P0S_P1; mepcop1_64_extract_sfmt_cpmov_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 27 : + if ((entire_insn & 0xfff83e0f) == 0x803600) + { itype = MEPCOP1_64_INSN_CDCASTW_P0S_P1; mepcop1_64_extract_sfmt_cpmov_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 28 : + if ((entire_insn & 0xfff83e0f) == 0x803800) + { itype = MEPCOP1_64_INSN_CPCASTUB_W_P0S_P1; mepcop1_64_extract_sfmt_cpmov_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 29 : + if ((entire_insn & 0xfff83e0f) == 0x803a00) + { itype = MEPCOP1_64_INSN_CPCASTB_W_P0S_P1; mepcop1_64_extract_sfmt_cpmov_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 30 : + if ((entire_insn & 0xfff83e0f) == 0x803c00) + { itype = MEPCOP1_64_INSN_CPCASTUH_W_P0S_P1; mepcop1_64_extract_sfmt_cpmov_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 31 : + if ((entire_insn & 0xfff83e0f) == 0x803e00) + { itype = MEPCOP1_64_INSN_CPCASTH_W_P0S_P1; mepcop1_64_extract_sfmt_cpmov_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + default : itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + } + } + case 4 : + { + unsigned int val = (((insn >> 18) & (1 << 5)) | ((insn >> 9) & (31 << 0))); + switch (val) + { + case 0 : /* fall through */ + case 1 : /* fall through */ + case 2 : /* fall through */ + case 3 : /* fall through */ + case 4 : /* fall through */ + case 5 : /* fall through */ + case 6 : /* fall through */ + case 7 : /* fall through */ + case 8 : /* fall through */ + case 9 : /* fall through */ + case 10 : /* fall through */ + case 11 : /* fall through */ + case 12 : /* fall through */ + case 13 : /* fall through */ + case 14 : /* fall through */ + case 15 : /* fall through */ + case 16 : /* fall through */ + case 17 : /* fall through */ + case 18 : /* fall through */ + case 19 : /* fall through */ + case 20 : /* fall through */ + case 21 : /* fall through */ + case 22 : /* fall through */ + case 23 : /* fall through */ + case 24 : /* fall through */ + case 25 : /* fall through */ + case 26 : /* fall through */ + case 27 : /* fall through */ + case 28 : /* fall through */ + case 29 : /* fall through */ + case 30 : /* fall through */ + case 31 : + if ((entire_insn & 0xfff8000f) == 0x80000) + { itype = MEPCOP1_64_INSN_CPADD3_B_P0S_P1; mepcop1_64_extract_sfmt_cpadd3_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 32 : + if ((entire_insn & 0xfffffe0f) == 0x880000) + { itype = MEPCOP1_64_INSN_CPMOVFRCSAR0_P0S_P1; mepcop1_64_extract_sfmt_cpmovfrcsar0_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 33 : + if ((entire_insn & 0xfffffe0f) == 0x880200) + { itype = MEPCOP1_64_INSN_CPMOVFRCC_P0S_P1; mepcop1_64_extract_sfmt_cpmovfrcsar0_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 47 : + if ((entire_insn & 0xfffffe0f) == 0x881e00) + { itype = MEPCOP1_64_INSN_CPMOVFRCSAR1_P0S_P1; mepcop1_64_extract_sfmt_cpmovfrcsar0_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 48 : + if ((entire_insn & 0xfff83fff) == 0x882000) + { itype = MEPCOP1_64_INSN_CPMOVTOCSAR0_P0S_P1; mepcop1_64_extract_sfmt_cpmovtocsar0_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 49 : + if ((entire_insn & 0xfff83fff) == 0x882200) + { itype = MEPCOP1_64_INSN_CPMOVTOCC_P0S_P1; mepcop1_64_extract_sfmt_cpmovtocsar0_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 63 : + if ((entire_insn & 0xfff83fff) == 0x883e00) + { itype = MEPCOP1_64_INSN_CPMOVTOCSAR1_P0S_P1; mepcop1_64_extract_sfmt_cpmovtocsar0_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + default : itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + } + } + case 5 : /* fall through */ + case 6 : /* fall through */ + case 7 : + { + unsigned int val = (((insn >> 19) & (1 << 4)) | ((insn >> 9) & (15 << 0))); + switch (val) + { + case 0 : /* fall through */ + case 1 : /* fall through */ + case 2 : /* fall through */ + case 3 : /* fall through */ + case 4 : /* fall through */ + case 5 : /* fall through */ + case 6 : /* fall through */ + case 7 : /* fall through */ + case 8 : /* fall through */ + case 9 : /* fall through */ + case 10 : /* fall through */ + case 11 : /* fall through */ + case 12 : /* fall through */ + case 13 : /* fall through */ + case 14 : /* fall through */ + case 15 : + if ((entire_insn & 0xfff8000f) == 0x80000) + { itype = MEPCOP1_64_INSN_CPADD3_B_P0S_P1; mepcop1_64_extract_sfmt_cpadd3_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 16 : + if ((entire_insn & 0xfffffe0f) == 0x880000) + { itype = MEPCOP1_64_INSN_CPMOVFRCSAR0_P0S_P1; mepcop1_64_extract_sfmt_cpmovfrcsar0_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 17 : + if ((entire_insn & 0xfffffe0f) == 0x880200) + { itype = MEPCOP1_64_INSN_CPMOVFRCC_P0S_P1; mepcop1_64_extract_sfmt_cpmovfrcsar0_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 31 : + if ((entire_insn & 0xfffffe0f) == 0x881e00) + { itype = MEPCOP1_64_INSN_CPMOVFRCSAR1_P0S_P1; mepcop1_64_extract_sfmt_cpmovfrcsar0_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + default : itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + } + } + case 8 : + { + unsigned int val = (((insn >> 20) & (1 << 3)) | ((insn >> 4) & (7 << 0))); + switch (val) + { + case 0 : /* fall through */ + case 1 : /* fall through */ + case 2 : /* fall through */ + case 3 : /* fall through */ + case 4 : /* fall through */ + case 5 : /* fall through */ + case 6 : /* fall through */ + case 7 : + if ((entire_insn & 0xfff8000f) == 0x100000) + { itype = MEPCOP1_64_INSN_CPADD3_H_P0S_P1; mepcop1_64_extract_sfmt_cpadd3_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 8 : + if ((entire_insn & 0xfff801ff) == 0x900000) + { itype = MEPCOP1_64_INSN_CPCMPEQZ_B_P0S_P1; mepcop1_64_extract_sfmt_cpcmpeqz_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 9 : + if ((entire_insn & 0xfff801ff) == 0x900010) + { itype = MEPCOP1_64_INSN_CPCMPEQ_B_P0S_P1; mepcop1_64_extract_sfmt_cpcmpeqz_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 11 : + if ((entire_insn & 0xfff801ff) == 0x900030) + { itype = MEPCOP1_64_INSN_CPCMPEQ_H_P0S_P1; mepcop1_64_extract_sfmt_cpcmpeqz_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 13 : + if ((entire_insn & 0xfff801ff) == 0x900050) + { itype = MEPCOP1_64_INSN_CPCMPEQ_W_P0S_P1; mepcop1_64_extract_sfmt_cpcmpeqz_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + default : itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + } + } + case 9 : + { + unsigned int val = (((insn >> 21) & (1 << 2)) | ((insn >> 5) & (3 << 0))); + switch (val) + { + case 0 : /* fall through */ + case 1 : /* fall through */ + case 2 : /* fall through */ + case 3 : + if ((entire_insn & 0xfff8000f) == 0x100000) + { itype = MEPCOP1_64_INSN_CPADD3_H_P0S_P1; mepcop1_64_extract_sfmt_cpadd3_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 4 : + if ((entire_insn & 0xfff801ff) == 0x900090) + { itype = MEPCOP1_64_INSN_CPCMPNE_B_P0S_P1; mepcop1_64_extract_sfmt_cpcmpeqz_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 5 : + if ((entire_insn & 0xfff801ff) == 0x9000b0) + { itype = MEPCOP1_64_INSN_CPCMPNE_H_P0S_P1; mepcop1_64_extract_sfmt_cpcmpeqz_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 6 : + if ((entire_insn & 0xfff801ff) == 0x9000d0) + { itype = MEPCOP1_64_INSN_CPCMPNE_W_P0S_P1; mepcop1_64_extract_sfmt_cpcmpeqz_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + default : itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + } + } + case 10 : + { + unsigned int val = (((insn >> 20) & (1 << 3)) | ((insn >> 4) & (7 << 0))); + switch (val) + { + case 0 : /* fall through */ + case 1 : /* fall through */ + case 2 : /* fall through */ + case 3 : /* fall through */ + case 4 : /* fall through */ + case 5 : /* fall through */ + case 6 : /* fall through */ + case 7 : + if ((entire_insn & 0xfff8000f) == 0x100000) + { itype = MEPCOP1_64_INSN_CPADD3_H_P0S_P1; mepcop1_64_extract_sfmt_cpadd3_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 8 : + if ((entire_insn & 0xfff801ff) == 0x900100) + { itype = MEPCOP1_64_INSN_CPCMPGTU_B_P0S_P1; mepcop1_64_extract_sfmt_cpcmpeqz_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 9 : + if ((entire_insn & 0xfff801ff) == 0x900110) + { itype = MEPCOP1_64_INSN_CPCMPGT_B_P0S_P1; mepcop1_64_extract_sfmt_cpcmpeqz_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 11 : + if ((entire_insn & 0xfff801ff) == 0x900130) + { itype = MEPCOP1_64_INSN_CPCMPGT_H_P0S_P1; mepcop1_64_extract_sfmt_cpcmpeqz_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 12 : + if ((entire_insn & 0xfff801ff) == 0x900140) + { itype = MEPCOP1_64_INSN_CPCMPGTU_W_P0S_P1; mepcop1_64_extract_sfmt_cpcmpeqz_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 13 : + if ((entire_insn & 0xfff801ff) == 0x900150) + { itype = MEPCOP1_64_INSN_CPCMPGT_W_P0S_P1; mepcop1_64_extract_sfmt_cpcmpeqz_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + default : itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + } + } + case 11 : + { + unsigned int val = (((insn >> 20) & (1 << 3)) | ((insn >> 4) & (7 << 0))); + switch (val) + { + case 0 : /* fall through */ + case 1 : /* fall through */ + case 2 : /* fall through */ + case 3 : /* fall through */ + case 4 : /* fall through */ + case 5 : /* fall through */ + case 6 : /* fall through */ + case 7 : + if ((entire_insn & 0xfff8000f) == 0x100000) + { itype = MEPCOP1_64_INSN_CPADD3_H_P0S_P1; mepcop1_64_extract_sfmt_cpadd3_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 8 : + if ((entire_insn & 0xfff801ff) == 0x900180) + { itype = MEPCOP1_64_INSN_CPCMPGEU_B_P0S_P1; mepcop1_64_extract_sfmt_cpcmpeqz_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 9 : + if ((entire_insn & 0xfff801ff) == 0x900190) + { itype = MEPCOP1_64_INSN_CPCMPGE_B_P0S_P1; mepcop1_64_extract_sfmt_cpcmpeqz_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 11 : + if ((entire_insn & 0xfff801ff) == 0x9001b0) + { itype = MEPCOP1_64_INSN_CPCMPGE_H_P0S_P1; mepcop1_64_extract_sfmt_cpcmpeqz_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 12 : + if ((entire_insn & 0xfff801ff) == 0x9001c0) + { itype = MEPCOP1_64_INSN_CPCMPGEU_W_P0S_P1; mepcop1_64_extract_sfmt_cpcmpeqz_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 13 : + if ((entire_insn & 0xfff801ff) == 0x9001d0) + { itype = MEPCOP1_64_INSN_CPCMPGE_W_P0S_P1; mepcop1_64_extract_sfmt_cpcmpeqz_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + default : itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + } + } + case 12 : + { + unsigned int val = (((insn >> 21) & (1 << 2)) | ((insn >> 5) & (3 << 0))); + switch (val) + { + case 0 : /* fall through */ + case 1 : /* fall through */ + case 2 : /* fall through */ + case 3 : + if ((entire_insn & 0xfff8000f) == 0x180000) + { itype = MEPCOP1_64_INSN_CPADD3_W_P0S_P1; mepcop1_64_extract_sfmt_cpadd3_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 4 : + if ((entire_insn & 0xfff801ff) == 0x980010) + { itype = MEPCOP1_64_INSN_CPACMPEQ_B_P0_P1; mepcop1_64_extract_sfmt_cpcmpeqz_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 5 : + if ((entire_insn & 0xfff801ff) == 0x980030) + { itype = MEPCOP1_64_INSN_CPACMPEQ_H_P0_P1; mepcop1_64_extract_sfmt_cpcmpeqz_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 6 : + if ((entire_insn & 0xfff801ff) == 0x980050) + { itype = MEPCOP1_64_INSN_CPACMPEQ_W_P0_P1; mepcop1_64_extract_sfmt_cpcmpeqz_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + default : itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + } + } + case 13 : + { + unsigned int val = (((insn >> 21) & (1 << 2)) | ((insn >> 5) & (3 << 0))); + switch (val) + { + case 0 : /* fall through */ + case 1 : /* fall through */ + case 2 : /* fall through */ + case 3 : + if ((entire_insn & 0xfff8000f) == 0x180000) + { itype = MEPCOP1_64_INSN_CPADD3_W_P0S_P1; mepcop1_64_extract_sfmt_cpadd3_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 4 : + if ((entire_insn & 0xfff801ff) == 0x980090) + { itype = MEPCOP1_64_INSN_CPACMPNE_B_P0_P1; mepcop1_64_extract_sfmt_cpcmpeqz_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 5 : + if ((entire_insn & 0xfff801ff) == 0x9800b0) + { itype = MEPCOP1_64_INSN_CPACMPNE_H_P0_P1; mepcop1_64_extract_sfmt_cpcmpeqz_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 6 : + if ((entire_insn & 0xfff801ff) == 0x9800d0) + { itype = MEPCOP1_64_INSN_CPACMPNE_W_P0_P1; mepcop1_64_extract_sfmt_cpcmpeqz_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + default : itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + } + } + case 14 : + { + unsigned int val = (((insn >> 20) & (1 << 3)) | ((insn >> 4) & (7 << 0))); + switch (val) + { + case 0 : /* fall through */ + case 1 : /* fall through */ + case 2 : /* fall through */ + case 3 : /* fall through */ + case 4 : /* fall through */ + case 5 : /* fall through */ + case 6 : /* fall through */ + case 7 : + if ((entire_insn & 0xfff8000f) == 0x180000) + { itype = MEPCOP1_64_INSN_CPADD3_W_P0S_P1; mepcop1_64_extract_sfmt_cpadd3_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 8 : + if ((entire_insn & 0xfff801ff) == 0x980100) + { itype = MEPCOP1_64_INSN_CPACMPGTU_B_P0_P1; mepcop1_64_extract_sfmt_cpcmpeqz_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 9 : + if ((entire_insn & 0xfff801ff) == 0x980110) + { itype = MEPCOP1_64_INSN_CPACMPGT_B_P0_P1; mepcop1_64_extract_sfmt_cpcmpeqz_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 11 : + if ((entire_insn & 0xfff801ff) == 0x980130) + { itype = MEPCOP1_64_INSN_CPACMPGT_H_P0_P1; mepcop1_64_extract_sfmt_cpcmpeqz_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 12 : + if ((entire_insn & 0xfff801ff) == 0x980140) + { itype = MEPCOP1_64_INSN_CPACMPGTU_W_P0_P1; mepcop1_64_extract_sfmt_cpcmpeqz_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 13 : + if ((entire_insn & 0xfff801ff) == 0x980150) + { itype = MEPCOP1_64_INSN_CPACMPGT_W_P0_P1; mepcop1_64_extract_sfmt_cpcmpeqz_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + default : itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + } + } + case 15 : + { + unsigned int val = (((insn >> 20) & (1 << 3)) | ((insn >> 4) & (7 << 0))); + switch (val) + { + case 0 : /* fall through */ + case 1 : /* fall through */ + case 2 : /* fall through */ + case 3 : /* fall through */ + case 4 : /* fall through */ + case 5 : /* fall through */ + case 6 : /* fall through */ + case 7 : + if ((entire_insn & 0xfff8000f) == 0x180000) + { itype = MEPCOP1_64_INSN_CPADD3_W_P0S_P1; mepcop1_64_extract_sfmt_cpadd3_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 8 : + if ((entire_insn & 0xfff801ff) == 0x980180) + { itype = MEPCOP1_64_INSN_CPACMPGEU_B_P0_P1; mepcop1_64_extract_sfmt_cpcmpeqz_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 9 : + if ((entire_insn & 0xfff801ff) == 0x980190) + { itype = MEPCOP1_64_INSN_CPACMPGE_B_P0_P1; mepcop1_64_extract_sfmt_cpcmpeqz_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 11 : + if ((entire_insn & 0xfff801ff) == 0x9801b0) + { itype = MEPCOP1_64_INSN_CPACMPGE_H_P0_P1; mepcop1_64_extract_sfmt_cpcmpeqz_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 12 : + if ((entire_insn & 0xfff801ff) == 0x9801c0) + { itype = MEPCOP1_64_INSN_CPACMPGEU_W_P0_P1; mepcop1_64_extract_sfmt_cpcmpeqz_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 13 : + if ((entire_insn & 0xfff801ff) == 0x9801d0) + { itype = MEPCOP1_64_INSN_CPACMPGE_W_P0_P1; mepcop1_64_extract_sfmt_cpcmpeqz_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + default : itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + } + } + case 16 : /* fall through */ + case 17 : /* fall through */ + case 18 : /* fall through */ + case 19 : + { + unsigned int val = (((insn >> 28) & (3 << 1)) | ((insn >> 23) & (1 << 0))); + switch (val) + { + case 0 : + if ((entire_insn & 0xfff8000f) == 0x200000) + { itype = MEPCOP1_64_INSN_CPSEL_P0S_P1; mepcop1_64_extract_sfmt_cpadd3_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 3 : + if ((entire_insn & 0xfff8000f) == 0x20a00000) + { itype = MEPCOP1_64_INSN_CPABSU3_B_P0_P1; mepcop1_64_extract_sfmt_cpadd3_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 5 : + if ((entire_insn & 0xfff8000f) == 0x40a00000) + { itype = MEPCOP1_64_INSN_CPSRL3_B_P0_P1; mepcop1_64_extract_sfmt_cpadd3_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + default : itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + } + } + case 20 : /* fall through */ + case 21 : /* fall through */ + case 22 : /* fall through */ + case 23 : + { + unsigned int val = (((insn >> 18) & (1 << 5)) | ((insn >> 9) & (31 << 0))); + switch (val) + { + case 0 : /* fall through */ + case 1 : /* fall through */ + case 2 : /* fall through */ + case 3 : /* fall through */ + case 4 : /* fall through */ + case 5 : /* fall through */ + case 6 : /* fall through */ + case 7 : /* fall through */ + case 8 : /* fall through */ + case 9 : /* fall through */ + case 10 : /* fall through */ + case 11 : /* fall through */ + case 12 : /* fall through */ + case 13 : /* fall through */ + case 14 : /* fall through */ + case 15 : /* fall through */ + case 16 : /* fall through */ + case 17 : /* fall through */ + case 18 : /* fall through */ + case 19 : /* fall through */ + case 20 : /* fall through */ + case 21 : /* fall through */ + case 22 : /* fall through */ + case 23 : /* fall through */ + case 24 : /* fall through */ + case 25 : /* fall through */ + case 26 : /* fall through */ + case 27 : /* fall through */ + case 28 : /* fall through */ + case 29 : /* fall through */ + case 30 : /* fall through */ + case 31 : + if ((entire_insn & 0xfff8000f) == 0x280000) + { itype = MEPCOP1_64_INSN_CPUNPACKU_B_P0S_P1; mepcop1_64_extract_sfmt_cpadd3_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 32 : + if ((entire_insn & 0xf83e0f) == 0xa80000) + { itype = MEPCOP1_64_INSN_CPSRLI3_B_P0_P1; mepcop1_64_extract_sfmt_cpsrli3_b_P0_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 33 : + if ((entire_insn & 0xf83e0f) == 0xa80200) + { itype = MEPCOP1_64_INSN_CPSRLI3_H_P0_P1; mepcop1_64_extract_sfmt_cpsrli3_h_P0_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 34 : + if ((entire_insn & 0xf83e0f) == 0xa80400) + { itype = MEPCOP1_64_INSN_CPSRLI3_W_P0_P1; mepcop1_64_extract_sfmt_cpsrli3_w_P0_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 35 : + if ((entire_insn & 0xf83e0f) == 0xa80600) + { itype = MEPCOP1_64_INSN_CDSRLI3_P0_P1; mepcop1_64_extract_sfmt_cdsrli3_P0_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 36 : + if ((entire_insn & 0xf83e0f) == 0xa80800) + { itype = MEPCOP1_64_INSN_CPSRAI3_B_P0_P1; mepcop1_64_extract_sfmt_cpsrli3_b_P0_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 37 : + if ((entire_insn & 0xf83e0f) == 0xa80a00) + { itype = MEPCOP1_64_INSN_CPSRAI3_H_P0_P1; mepcop1_64_extract_sfmt_cpsrli3_h_P0_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 38 : + if ((entire_insn & 0xf83e0f) == 0xa80c00) + { itype = MEPCOP1_64_INSN_CPSRAI3_W_P0_P1; mepcop1_64_extract_sfmt_cpsrli3_w_P0_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 39 : + if ((entire_insn & 0xf83e0f) == 0xa80e00) + { itype = MEPCOP1_64_INSN_CDSRAI3_P0_P1; mepcop1_64_extract_sfmt_cdsrli3_P0_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 40 : + if ((entire_insn & 0xf83e0f) == 0xa81000) + { itype = MEPCOP1_64_INSN_CPSLLI3_B_P0_P1; mepcop1_64_extract_sfmt_cpsrli3_b_P0_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 41 : + if ((entire_insn & 0xf83e0f) == 0xa81200) + { itype = MEPCOP1_64_INSN_CPSLLI3_H_P0_P1; mepcop1_64_extract_sfmt_cpsrli3_h_P0_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 42 : + if ((entire_insn & 0xf83e0f) == 0xa81400) + { itype = MEPCOP1_64_INSN_CPSLLI3_W_P0_P1; mepcop1_64_extract_sfmt_cpsrli3_w_P0_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 43 : + if ((entire_insn & 0xf83e0f) == 0xa81600) + { itype = MEPCOP1_64_INSN_CDSLLI3_P0_P1; mepcop1_64_extract_sfmt_cdsrli3_P0_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 45 : + if ((entire_insn & 0xf83e0f) == 0xa81a00) + { itype = MEPCOP1_64_INSN_CPSLAI3_H_P0_P1; mepcop1_64_extract_sfmt_cpsrli3_h_P0_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 46 : + if ((entire_insn & 0xf83e0f) == 0xa81c00) + { itype = MEPCOP1_64_INSN_CPSLAI3_W_P0_P1; mepcop1_64_extract_sfmt_cpsrli3_w_P0_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 48 : + if ((entire_insn & 0xf83e0f) == 0xa82000) + { itype = MEPCOP1_64_INSN_CPCLIPIU3_W_P0_P1; mepcop1_64_extract_sfmt_cpsrli3_w_P0_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 49 : + if ((entire_insn & 0xf83e0f) == 0xa82200) + { itype = MEPCOP1_64_INSN_CPCLIPI3_W_P0_P1; mepcop1_64_extract_sfmt_cpsrli3_w_P0_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 50 : + if ((entire_insn & 0xf83e0f) == 0xa82400) + { itype = MEPCOP1_64_INSN_CDCLIPIU3_P0_P1; mepcop1_64_extract_sfmt_cdsrli3_P0_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 51 : + if ((entire_insn & 0xf83e0f) == 0xa82600) + { itype = MEPCOP1_64_INSN_CDCLIPI3_P0_P1; mepcop1_64_extract_sfmt_cdsrli3_P0_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + default : itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + } + } + case 24 : /* fall through */ + case 25 : /* fall through */ + case 26 : /* fall through */ + case 27 : + { + unsigned int val = (((insn >> 23) & (1 << 0))); + switch (val) + { + case 0 : + if ((entire_insn & 0xfff8000f) == 0x300000) + { itype = MEPCOP1_64_INSN_CPUNPACKU_H_P0S_P1; mepcop1_64_extract_sfmt_cpadd3_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 1 : + if ((entire_insn & 0xf8300f) == 0xb01000) + { itype = MEPCOP1_64_INSN_CPMOVI_H_P0_P1; mepcop1_64_extract_sfmt_cpmovi_h_P0_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + default : itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + } + } + case 28 : /* fall through */ + case 29 : /* fall through */ + case 30 : /* fall through */ + case 31 : + { + unsigned int val = (((insn >> 21) & (1 << 2)) | ((insn >> 12) & (3 << 0))); + switch (val) + { + case 0 : /* fall through */ + case 1 : /* fall through */ + case 2 : /* fall through */ + case 3 : + if ((entire_insn & 0xfff8000f) == 0x380000) + { itype = MEPCOP1_64_INSN_CPUNPACKU_W_P0S_P1; mepcop1_64_extract_sfmt_cpadd3_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 4 : + if ((entire_insn & 0xf8300f) == 0xb80000) + { itype = MEPCOP1_64_INSN_CPMOVIU_W_P0_P1; mepcop1_64_extract_sfmt_cpmoviu_w_P0_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 5 : + if ((entire_insn & 0xf8300f) == 0xb81000) + { itype = MEPCOP1_64_INSN_CPMOVI_W_P0_P1; mepcop1_64_extract_sfmt_cpmovi_h_P0_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 6 : + if ((entire_insn & 0xf8300f) == 0xb82000) + { itype = MEPCOP1_64_INSN_CDMOVIU_P0_P1; mepcop1_64_extract_sfmt_cpmoviu_w_P0_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 7 : + if ((entire_insn & 0xf8300f) == 0xb83000) + { itype = MEPCOP1_64_INSN_CDMOVI_P0_P1; mepcop1_64_extract_sfmt_cpmovi_h_P0_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + default : itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + } + } + case 32 : + { + unsigned int val = (((insn >> 20) & (1 << 3)) | ((insn >> 4) & (7 << 0))); + switch (val) + { + case 0 : /* fall through */ + case 1 : /* fall through */ + case 2 : /* fall through */ + case 3 : /* fall through */ + case 4 : /* fall through */ + case 5 : /* fall through */ + case 6 : /* fall through */ + case 7 : + if ((entire_insn & 0xf8000f) == 0x400000) + { itype = MEPCOP1_64_INSN_CPFSFTBI_P0_P1; mepcop1_64_extract_sfmt_cpfsftbi_P0_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 8 : + if ((entire_insn & 0xfff801ff) == 0xc00000) + { itype = MEPCOP1_64_INSN_CPADDA1U_B_P1; mepcop1_64_extract_sfmt_cpcmpeqz_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 9 : + if ((entire_insn & 0xfff801ff) == 0xc00010) + { itype = MEPCOP1_64_INSN_CPADDA1_B_P1; mepcop1_64_extract_sfmt_cpcmpeqz_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 10 : + if ((entire_insn & 0xfff801ff) == 0xc00020) + { itype = MEPCOP1_64_INSN_CPADDUA1_H_P1; mepcop1_64_extract_sfmt_cpcmpeqz_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 11 : + if ((entire_insn & 0xfff801ff) == 0xc00030) + { itype = MEPCOP1_64_INSN_CPADDLA1_H_P1; mepcop1_64_extract_sfmt_cpcmpeqz_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 12 : + if ((entire_insn & 0xfff801ff) == 0xc00040) + { itype = MEPCOP1_64_INSN_CPADDACA1U_B_P1; mepcop1_64_extract_sfmt_cpcmpeqz_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 13 : + if ((entire_insn & 0xfff801ff) == 0xc00050) + { itype = MEPCOP1_64_INSN_CPADDACA1_B_P1; mepcop1_64_extract_sfmt_cpcmpeqz_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 14 : + if ((entire_insn & 0xfff801ff) == 0xc00060) + { itype = MEPCOP1_64_INSN_CPADDACUA1_H_P1; mepcop1_64_extract_sfmt_cpcmpeqz_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 15 : + if ((entire_insn & 0xfff801ff) == 0xc00070) + { itype = MEPCOP1_64_INSN_CPADDACLA1_H_P1; mepcop1_64_extract_sfmt_cpcmpeqz_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + default : itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + } + } + case 33 : + { + unsigned int val = (((insn >> 20) & (1 << 3)) | ((insn >> 4) & (7 << 0))); + switch (val) + { + case 0 : /* fall through */ + case 1 : /* fall through */ + case 2 : /* fall through */ + case 3 : /* fall through */ + case 4 : /* fall through */ + case 5 : /* fall through */ + case 6 : /* fall through */ + case 7 : + if ((entire_insn & 0xf8000f) == 0x400000) + { itype = MEPCOP1_64_INSN_CPFSFTBI_P0_P1; mepcop1_64_extract_sfmt_cpfsftbi_P0_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 8 : + if ((entire_insn & 0xfff801ff) == 0xc00080) + { itype = MEPCOP1_64_INSN_CPSUBA1U_B_P1; mepcop1_64_extract_sfmt_cpcmpeqz_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 9 : + if ((entire_insn & 0xfff801ff) == 0xc00090) + { itype = MEPCOP1_64_INSN_CPSUBA1_B_P1; mepcop1_64_extract_sfmt_cpcmpeqz_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 10 : + if ((entire_insn & 0xfff801ff) == 0xc000a0) + { itype = MEPCOP1_64_INSN_CPSUBUA1_H_P1; mepcop1_64_extract_sfmt_cpcmpeqz_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 11 : + if ((entire_insn & 0xfff801ff) == 0xc000b0) + { itype = MEPCOP1_64_INSN_CPSUBLA1_H_P1; mepcop1_64_extract_sfmt_cpcmpeqz_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 12 : + if ((entire_insn & 0xfff801ff) == 0xc000c0) + { itype = MEPCOP1_64_INSN_CPSUBACA1U_B_P1; mepcop1_64_extract_sfmt_cpcmpeqz_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 13 : + if ((entire_insn & 0xfff801ff) == 0xc000d0) + { itype = MEPCOP1_64_INSN_CPSUBACA1_B_P1; mepcop1_64_extract_sfmt_cpcmpeqz_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 14 : + if ((entire_insn & 0xfff801ff) == 0xc000e0) + { itype = MEPCOP1_64_INSN_CPSUBACUA1_H_P1; mepcop1_64_extract_sfmt_cpcmpeqz_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 15 : + if ((entire_insn & 0xfff801ff) == 0xc000f0) + { itype = MEPCOP1_64_INSN_CPSUBACLA1_H_P1; mepcop1_64_extract_sfmt_cpcmpeqz_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + default : itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + } + } + case 34 : + { + unsigned int val = (((insn >> 20) & (1 << 3)) | ((insn >> 4) & (7 << 0))); + switch (val) + { + case 0 : /* fall through */ + case 1 : /* fall through */ + case 2 : /* fall through */ + case 3 : /* fall through */ + case 4 : /* fall through */ + case 5 : /* fall through */ + case 6 : /* fall through */ + case 7 : + if ((entire_insn & 0xf8000f) == 0x400000) + { itype = MEPCOP1_64_INSN_CPFSFTBI_P0_P1; mepcop1_64_extract_sfmt_cpfsftbi_P0_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 8 : + if ((entire_insn & 0xfff801ff) == 0xc00100) + { itype = MEPCOP1_64_INSN_CPABSA1U_B_P1; mepcop1_64_extract_sfmt_cpcmpeqz_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 9 : + if ((entire_insn & 0xfff801ff) == 0xc00110) + { itype = MEPCOP1_64_INSN_CPABSA1_B_P1; mepcop1_64_extract_sfmt_cpcmpeqz_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 10 : + if ((entire_insn & 0xfff801ff) == 0xc00120) + { itype = MEPCOP1_64_INSN_CPABSUA1_H_P1; mepcop1_64_extract_sfmt_cpcmpeqz_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 11 : + if ((entire_insn & 0xfff801ff) == 0xc00130) + { itype = MEPCOP1_64_INSN_CPABSLA1_H_P1; mepcop1_64_extract_sfmt_cpcmpeqz_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 12 : + if ((entire_insn & 0xfff801ff) == 0xc00140) + { itype = MEPCOP1_64_INSN_CPSADA1U_B_P1; mepcop1_64_extract_sfmt_cpcmpeqz_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 13 : + if ((entire_insn & 0xfff801ff) == 0xc00150) + { itype = MEPCOP1_64_INSN_CPSADA1_B_P1; mepcop1_64_extract_sfmt_cpcmpeqz_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 14 : + if ((entire_insn & 0xfff801ff) == 0xc00160) + { itype = MEPCOP1_64_INSN_CPSADUA1_H_P1; mepcop1_64_extract_sfmt_cpcmpeqz_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 15 : + if ((entire_insn & 0xfff801ff) == 0xc00170) + { itype = MEPCOP1_64_INSN_CPSADLA1_H_P1; mepcop1_64_extract_sfmt_cpcmpeqz_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + default : itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + } + } + case 35 : + { + unsigned int val = (((insn >> 20) & (1 << 3)) | ((insn >> 4) & (7 << 0))); + switch (val) + { + case 0 : /* fall through */ + case 1 : /* fall through */ + case 2 : /* fall through */ + case 3 : /* fall through */ + case 4 : /* fall through */ + case 5 : /* fall through */ + case 6 : /* fall through */ + case 7 : + if ((entire_insn & 0xf8000f) == 0x400000) + { itype = MEPCOP1_64_INSN_CPFSFTBI_P0_P1; mepcop1_64_extract_sfmt_cpfsftbi_P0_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 11 : + if ((entire_insn & 0xfff801ff) == 0xc001b0) + { itype = MEPCOP1_64_INSN_CPSETA1_H_P1; mepcop1_64_extract_sfmt_cpcmpeqz_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 12 : + if ((entire_insn & 0xfff801ff) == 0xc001c0) + { itype = MEPCOP1_64_INSN_CPSETUA1_W_P1; mepcop1_64_extract_sfmt_cpcmpeqz_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 13 : + if ((entire_insn & 0xfff801ff) == 0xc001d0) + { itype = MEPCOP1_64_INSN_CPSETLA1_W_P1; mepcop1_64_extract_sfmt_cpcmpeqz_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + default : itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + } + } + case 36 : + { + unsigned int val = (((insn >> 18) & (1 << 5)) | ((insn >> 9) & (31 << 0))); + switch (val) + { + case 0 : /* fall through */ + case 1 : /* fall through */ + case 2 : /* fall through */ + case 3 : /* fall through */ + case 4 : /* fall through */ + case 5 : /* fall through */ + case 6 : /* fall through */ + case 7 : /* fall through */ + case 8 : /* fall through */ + case 9 : /* fall through */ + case 10 : /* fall through */ + case 11 : /* fall through */ + case 12 : /* fall through */ + case 13 : /* fall through */ + case 14 : /* fall through */ + case 15 : /* fall through */ + case 16 : /* fall through */ + case 17 : /* fall through */ + case 18 : /* fall through */ + case 19 : /* fall through */ + case 20 : /* fall through */ + case 21 : /* fall through */ + case 22 : /* fall through */ + case 23 : /* fall through */ + case 24 : /* fall through */ + case 25 : /* fall through */ + case 26 : /* fall through */ + case 27 : /* fall through */ + case 28 : /* fall through */ + case 29 : /* fall through */ + case 30 : /* fall through */ + case 31 : + if ((entire_insn & 0xfff8000f) == 0x480000) + { itype = MEPCOP1_64_INSN_CPUNPACKL_B_P0S_P1; mepcop1_64_extract_sfmt_cpadd3_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 33 : + if ((entire_insn & 0xfffffe0f) == 0xc80200) + { itype = MEPCOP1_64_INSN_CPMOVA1_B_P1; mepcop1_64_extract_sfmt_cpmovfrcsar0_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 34 : + if ((entire_insn & 0xfffffe0f) == 0xc80400) + { itype = MEPCOP1_64_INSN_CPMOVUA1_H_P1; mepcop1_64_extract_sfmt_cpmovfrcsar0_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 35 : + if ((entire_insn & 0xfffffe0f) == 0xc80600) + { itype = MEPCOP1_64_INSN_CPMOVLA1_H_P1; mepcop1_64_extract_sfmt_cpmovfrcsar0_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 36 : + if ((entire_insn & 0xfffffe0f) == 0xc80800) + { itype = MEPCOP1_64_INSN_CPMOVUUA1_W_P1; mepcop1_64_extract_sfmt_cpmovfrcsar0_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 37 : + if ((entire_insn & 0xfffffe0f) == 0xc80a00) + { itype = MEPCOP1_64_INSN_CPMOVULA1_W_P1; mepcop1_64_extract_sfmt_cpmovfrcsar0_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 38 : + if ((entire_insn & 0xfffffe0f) == 0xc80c00) + { itype = MEPCOP1_64_INSN_CPMOVLUA1_W_P1; mepcop1_64_extract_sfmt_cpmovfrcsar0_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 39 : + if ((entire_insn & 0xfffffe0f) == 0xc80e00) + { itype = MEPCOP1_64_INSN_CPMOVLLA1_W_P1; mepcop1_64_extract_sfmt_cpmovfrcsar0_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 40 : + if ((entire_insn & 0xfffffe0f) == 0xc81000) + { itype = MEPCOP1_64_INSN_CPPACKA1U_B_P1; mepcop1_64_extract_sfmt_cpmovfrcsar0_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 41 : + if ((entire_insn & 0xfffffe0f) == 0xc81200) + { itype = MEPCOP1_64_INSN_CPPACKA1_B_P1; mepcop1_64_extract_sfmt_cpmovfrcsar0_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 42 : + if ((entire_insn & 0xfffffe0f) == 0xc81400) + { itype = MEPCOP1_64_INSN_CPPACKUA1_H_P1; mepcop1_64_extract_sfmt_cpmovfrcsar0_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 43 : + if ((entire_insn & 0xfffffe0f) == 0xc81600) + { itype = MEPCOP1_64_INSN_CPPACKLA1_H_P1; mepcop1_64_extract_sfmt_cpmovfrcsar0_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 44 : + if ((entire_insn & 0xfffffe0f) == 0xc81800) + { itype = MEPCOP1_64_INSN_CPPACKUA1_W_P1; mepcop1_64_extract_sfmt_cpmovfrcsar0_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 45 : + if ((entire_insn & 0xfffffe0f) == 0xc81a00) + { itype = MEPCOP1_64_INSN_CPPACKLA1_W_P1; mepcop1_64_extract_sfmt_cpmovfrcsar0_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 46 : + if ((entire_insn & 0xfffffe0f) == 0xc81c00) + { itype = MEPCOP1_64_INSN_CPMOVHUA1_W_P1; mepcop1_64_extract_sfmt_cpmovfrcsar0_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 47 : + if ((entire_insn & 0xfffffe0f) == 0xc81e00) + { itype = MEPCOP1_64_INSN_CPMOVHLA1_W_P1; mepcop1_64_extract_sfmt_cpmovfrcsar0_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 48 : + if ((entire_insn & 0xffffffff) == 0xc82000) + { itype = MEPCOP1_64_INSN_CPACSUMA1_P1; mepcop1_64_extract_sfmt_c1nop_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 49 : + if ((entire_insn & 0xffffffff) == 0xc82200) + { itype = MEPCOP1_64_INSN_CPACCPA1_P1; mepcop1_64_extract_sfmt_c1nop_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 50 : + if ((entire_insn & 0xffffffff) == 0xc82400) + { itype = MEPCOP1_64_INSN_CPACSWP_P1; mepcop1_64_extract_sfmt_c1nop_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 56 : + if ((entire_insn & 0xfff83fff) == 0xc83000) + { itype = MEPCOP1_64_INSN_CPSRLA1_P1; mepcop1_64_extract_sfmt_cpmovtocsar0_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 57 : + if ((entire_insn & 0xfff83fff) == 0xc83200) + { itype = MEPCOP1_64_INSN_CPSRAA1_P1; mepcop1_64_extract_sfmt_cpmovtocsar0_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 58 : + if ((entire_insn & 0xfff83fff) == 0xc83400) + { itype = MEPCOP1_64_INSN_CPSLLA1_P1; mepcop1_64_extract_sfmt_cpmovtocsar0_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 60 : + if ((entire_insn & 0xfffffe0f) == 0xc83800) + { itype = MEPCOP1_64_INSN_CPSRLIA1_1_P1; mepcop1_64_extract_sfmt_cpsrlia1_1_p1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 61 : + if ((entire_insn & 0xfffffe0f) == 0xc83a00) + { itype = MEPCOP1_64_INSN_CPSRAIA1_1_P1; mepcop1_64_extract_sfmt_cpsrlia1_1_p1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 62 : + if ((entire_insn & 0xfffffe0f) == 0xc83c00) + { itype = MEPCOP1_64_INSN_CPSLLIA1_1_P1; mepcop1_64_extract_sfmt_cpsrlia1_1_p1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + default : itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + } + } + case 37 : /* fall through */ + case 38 : /* fall through */ + case 39 : + { + unsigned int val = (((insn >> 18) & (1 << 5)) | ((insn >> 9) & (31 << 0))); + switch (val) + { + case 0 : /* fall through */ + case 1 : /* fall through */ + case 2 : /* fall through */ + case 3 : /* fall through */ + case 4 : /* fall through */ + case 5 : /* fall through */ + case 6 : /* fall through */ + case 7 : /* fall through */ + case 8 : /* fall through */ + case 9 : /* fall through */ + case 10 : /* fall through */ + case 11 : /* fall through */ + case 12 : /* fall through */ + case 13 : /* fall through */ + case 14 : /* fall through */ + case 15 : /* fall through */ + case 16 : /* fall through */ + case 17 : /* fall through */ + case 18 : /* fall through */ + case 19 : /* fall through */ + case 20 : /* fall through */ + case 21 : /* fall through */ + case 22 : /* fall through */ + case 23 : /* fall through */ + case 24 : /* fall through */ + case 25 : /* fall through */ + case 26 : /* fall through */ + case 27 : /* fall through */ + case 28 : /* fall through */ + case 29 : /* fall through */ + case 30 : /* fall through */ + case 31 : + if ((entire_insn & 0xfff8000f) == 0x480000) + { itype = MEPCOP1_64_INSN_CPUNPACKL_B_P0S_P1; mepcop1_64_extract_sfmt_cpadd3_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 33 : + if ((entire_insn & 0xfffffe0f) == 0xc80200) + { itype = MEPCOP1_64_INSN_CPMOVA1_B_P1; mepcop1_64_extract_sfmt_cpmovfrcsar0_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 34 : + if ((entire_insn & 0xfffffe0f) == 0xc80400) + { itype = MEPCOP1_64_INSN_CPMOVUA1_H_P1; mepcop1_64_extract_sfmt_cpmovfrcsar0_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 35 : + if ((entire_insn & 0xfffffe0f) == 0xc80600) + { itype = MEPCOP1_64_INSN_CPMOVLA1_H_P1; mepcop1_64_extract_sfmt_cpmovfrcsar0_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 36 : + if ((entire_insn & 0xfffffe0f) == 0xc80800) + { itype = MEPCOP1_64_INSN_CPMOVUUA1_W_P1; mepcop1_64_extract_sfmt_cpmovfrcsar0_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 37 : + if ((entire_insn & 0xfffffe0f) == 0xc80a00) + { itype = MEPCOP1_64_INSN_CPMOVULA1_W_P1; mepcop1_64_extract_sfmt_cpmovfrcsar0_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 38 : + if ((entire_insn & 0xfffffe0f) == 0xc80c00) + { itype = MEPCOP1_64_INSN_CPMOVLUA1_W_P1; mepcop1_64_extract_sfmt_cpmovfrcsar0_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 39 : + if ((entire_insn & 0xfffffe0f) == 0xc80e00) + { itype = MEPCOP1_64_INSN_CPMOVLLA1_W_P1; mepcop1_64_extract_sfmt_cpmovfrcsar0_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 40 : + if ((entire_insn & 0xfffffe0f) == 0xc81000) + { itype = MEPCOP1_64_INSN_CPPACKA1U_B_P1; mepcop1_64_extract_sfmt_cpmovfrcsar0_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 41 : + if ((entire_insn & 0xfffffe0f) == 0xc81200) + { itype = MEPCOP1_64_INSN_CPPACKA1_B_P1; mepcop1_64_extract_sfmt_cpmovfrcsar0_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 42 : + if ((entire_insn & 0xfffffe0f) == 0xc81400) + { itype = MEPCOP1_64_INSN_CPPACKUA1_H_P1; mepcop1_64_extract_sfmt_cpmovfrcsar0_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 43 : + if ((entire_insn & 0xfffffe0f) == 0xc81600) + { itype = MEPCOP1_64_INSN_CPPACKLA1_H_P1; mepcop1_64_extract_sfmt_cpmovfrcsar0_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 44 : + if ((entire_insn & 0xfffffe0f) == 0xc81800) + { itype = MEPCOP1_64_INSN_CPPACKUA1_W_P1; mepcop1_64_extract_sfmt_cpmovfrcsar0_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 45 : + if ((entire_insn & 0xfffffe0f) == 0xc81a00) + { itype = MEPCOP1_64_INSN_CPPACKLA1_W_P1; mepcop1_64_extract_sfmt_cpmovfrcsar0_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 46 : + if ((entire_insn & 0xfffffe0f) == 0xc81c00) + { itype = MEPCOP1_64_INSN_CPMOVHUA1_W_P1; mepcop1_64_extract_sfmt_cpmovfrcsar0_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 47 : + if ((entire_insn & 0xfffffe0f) == 0xc81e00) + { itype = MEPCOP1_64_INSN_CPMOVHLA1_W_P1; mepcop1_64_extract_sfmt_cpmovfrcsar0_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 60 : + if ((entire_insn & 0xfffffe0f) == 0xc83800) + { itype = MEPCOP1_64_INSN_CPSRLIA1_1_P1; mepcop1_64_extract_sfmt_cpsrlia1_1_p1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 61 : + if ((entire_insn & 0xfffffe0f) == 0xc83a00) + { itype = MEPCOP1_64_INSN_CPSRAIA1_1_P1; mepcop1_64_extract_sfmt_cpsrlia1_1_p1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 62 : + if ((entire_insn & 0xfffffe0f) == 0xc83c00) + { itype = MEPCOP1_64_INSN_CPSLLIA1_1_P1; mepcop1_64_extract_sfmt_cpsrlia1_1_p1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + default : itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + } + } + case 40 : /* fall through */ + case 41 : /* fall through */ + case 42 : /* fall through */ + case 43 : + if ((entire_insn & 0xfff8000f) == 0x500000) + { itype = MEPCOP1_64_INSN_CPUNPACKL_H_P0S_P1; mepcop1_64_extract_sfmt_cpadd3_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 44 : /* fall through */ + case 45 : /* fall through */ + case 46 : /* fall through */ + case 47 : + if ((entire_insn & 0xfff8000f) == 0x580000) + { itype = MEPCOP1_64_INSN_CPUNPACKL_W_P0S_P1; mepcop1_64_extract_sfmt_cpadd3_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 48 : + { + unsigned int val = (((insn >> 23) & (1 << 0))); + switch (val) + { + case 0 : + if ((entire_insn & 0xfff8000f) == 0x600000) + { itype = MEPCOP1_64_INSN_CPFSFTBS0_P0S_P1; mepcop1_64_extract_sfmt_cpadd3_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 1 : + if ((entire_insn & 0xf8018f) == 0xe00000) + { itype = MEPCOP1_64_INSN_CPFMULIA1U_B_P1; mepcop1_64_extract_sfmt_cpfmulia1u_b_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + default : itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + } + } + case 49 : + { + unsigned int val = (((insn >> 23) & (1 << 0))); + switch (val) + { + case 0 : + if ((entire_insn & 0xfff8000f) == 0x600000) + { itype = MEPCOP1_64_INSN_CPFSFTBS0_P0S_P1; mepcop1_64_extract_sfmt_cpadd3_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 1 : + if ((entire_insn & 0xf8018f) == 0xe00080) + { itype = MEPCOP1_64_INSN_CPFMULIA1_B_P1; mepcop1_64_extract_sfmt_cpfmulia1u_b_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + default : itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + } + } + case 50 : + { + unsigned int val = (((insn >> 23) & (1 << 0))); + switch (val) + { + case 0 : + if ((entire_insn & 0xfff8000f) == 0x600000) + { itype = MEPCOP1_64_INSN_CPFSFTBS0_P0S_P1; mepcop1_64_extract_sfmt_cpadd3_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 1 : + if ((entire_insn & 0xf8018f) == 0xe00100) + { itype = MEPCOP1_64_INSN_CPFMULIUA1_H_P1; mepcop1_64_extract_sfmt_cpfmulia1u_b_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + default : itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + } + } + case 51 : + { + unsigned int val = (((insn >> 23) & (1 << 0))); + switch (val) + { + case 0 : + if ((entire_insn & 0xfff8000f) == 0x600000) + { itype = MEPCOP1_64_INSN_CPFSFTBS0_P0S_P1; mepcop1_64_extract_sfmt_cpadd3_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 1 : + if ((entire_insn & 0xf8018f) == 0xe00180) + { itype = MEPCOP1_64_INSN_CPFMULILA1_H_P1; mepcop1_64_extract_sfmt_cpfmulia1u_b_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + default : itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + } + } + case 52 : + { + unsigned int val = (((insn >> 23) & (1 << 0))); + switch (val) + { + case 0 : + if ((entire_insn & 0xfff8000f) == 0x680000) + { itype = MEPCOP1_64_INSN_CPFSFTBS1_P0S_P1; mepcop1_64_extract_sfmt_cpadd3_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 1 : + if ((entire_insn & 0xf8018f) == 0xe80000) + { itype = MEPCOP1_64_INSN_CPFMADIA1U_B_P1; mepcop1_64_extract_sfmt_cpfmulia1u_b_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + default : itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + } + } + case 53 : + { + unsigned int val = (((insn >> 23) & (1 << 0))); + switch (val) + { + case 0 : + if ((entire_insn & 0xfff8000f) == 0x680000) + { itype = MEPCOP1_64_INSN_CPFSFTBS1_P0S_P1; mepcop1_64_extract_sfmt_cpadd3_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 1 : + if ((entire_insn & 0xf8018f) == 0xe80080) + { itype = MEPCOP1_64_INSN_CPFMADIA1_B_P1; mepcop1_64_extract_sfmt_cpfmulia1u_b_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + default : itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + } + } + case 54 : + { + unsigned int val = (((insn >> 23) & (1 << 0))); + switch (val) + { + case 0 : + if ((entire_insn & 0xfff8000f) == 0x680000) + { itype = MEPCOP1_64_INSN_CPFSFTBS1_P0S_P1; mepcop1_64_extract_sfmt_cpadd3_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 1 : + if ((entire_insn & 0xf8018f) == 0xe80100) + { itype = MEPCOP1_64_INSN_CPFMADIUA1_H_P1; mepcop1_64_extract_sfmt_cpfmulia1u_b_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + default : itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + } + } + case 55 : + { + unsigned int val = (((insn >> 23) & (1 << 0))); + switch (val) + { + case 0 : + if ((entire_insn & 0xfff8000f) == 0x680000) + { itype = MEPCOP1_64_INSN_CPFSFTBS1_P0S_P1; mepcop1_64_extract_sfmt_cpadd3_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 1 : + if ((entire_insn & 0xf8018f) == 0xe80180) + { itype = MEPCOP1_64_INSN_CPFMADILA1_H_P1; mepcop1_64_extract_sfmt_cpfmulia1u_b_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + default : itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + } + } + case 56 : + { + unsigned int val = (((insn >> 5) & (1 << 1)) | ((insn >> 4) & (1 << 0))); + switch (val) + { + case 0 : + if ((entire_insn & 0xfff801ff) == 0xf00000) + { itype = MEPCOP1_64_INSN_CPSSQA1U_B_P1; mepcop1_64_extract_sfmt_cpcmpeqz_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 1 : + if ((entire_insn & 0xfff801ff) == 0xf00010) + { itype = MEPCOP1_64_INSN_CPSSQA1_B_P1; mepcop1_64_extract_sfmt_cpcmpeqz_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 2 : + if ((entire_insn & 0xfff801ff) == 0xf00040) + { itype = MEPCOP1_64_INSN_CPSSDA1U_B_P1; mepcop1_64_extract_sfmt_cpcmpeqz_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 3 : + if ((entire_insn & 0xfff801ff) == 0xf00050) + { itype = MEPCOP1_64_INSN_CPSSDA1_B_P1; mepcop1_64_extract_sfmt_cpcmpeqz_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + default : itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + } + } + case 57 : + { + unsigned int val = (((insn >> 4) & (7 << 0))); + switch (val) + { + case 0 : + if ((entire_insn & 0xfff801ff) == 0xf00080) + { itype = MEPCOP1_64_INSN_CPMULA1U_B_P1; mepcop1_64_extract_sfmt_cpcmpeqz_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 1 : + if ((entire_insn & 0xfff801ff) == 0xf00090) + { itype = MEPCOP1_64_INSN_CPMULA1_B_P1; mepcop1_64_extract_sfmt_cpcmpeqz_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 2 : + if ((entire_insn & 0xfff801ff) == 0xf000a0) + { itype = MEPCOP1_64_INSN_CPMULUA1_H_P1; mepcop1_64_extract_sfmt_cpcmpeqz_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 3 : + if ((entire_insn & 0xfff801ff) == 0xf000b0) + { itype = MEPCOP1_64_INSN_CPMULLA1_H_P1; mepcop1_64_extract_sfmt_cpcmpeqz_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 4 : + if ((entire_insn & 0xfff801ff) == 0xf000c0) + { itype = MEPCOP1_64_INSN_CPMULUA1U_W_P1; mepcop1_64_extract_sfmt_cpcmpeqz_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 5 : + if ((entire_insn & 0xfff801ff) == 0xf000d0) + { itype = MEPCOP1_64_INSN_CPMULLA1U_W_P1; mepcop1_64_extract_sfmt_cpcmpeqz_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 6 : + if ((entire_insn & 0xfff801ff) == 0xf000e0) + { itype = MEPCOP1_64_INSN_CPMULUA1_W_P1; mepcop1_64_extract_sfmt_cpcmpeqz_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 7 : + if ((entire_insn & 0xfff801ff) == 0xf000f0) + { itype = MEPCOP1_64_INSN_CPMULLA1_W_P1; mepcop1_64_extract_sfmt_cpcmpeqz_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + default : itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + } + } + case 58 : + { + unsigned int val = (((insn >> 4) & (7 << 0))); + switch (val) + { + case 0 : + if ((entire_insn & 0xfff801ff) == 0xf00100) + { itype = MEPCOP1_64_INSN_CPMADA1U_B_P1; mepcop1_64_extract_sfmt_cpcmpeqz_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 1 : + if ((entire_insn & 0xfff801ff) == 0xf00110) + { itype = MEPCOP1_64_INSN_CPMADA1_B_P1; mepcop1_64_extract_sfmt_cpcmpeqz_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 2 : + if ((entire_insn & 0xfff801ff) == 0xf00120) + { itype = MEPCOP1_64_INSN_CPMADUA1_H_P1; mepcop1_64_extract_sfmt_cpcmpeqz_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 3 : + if ((entire_insn & 0xfff801ff) == 0xf00130) + { itype = MEPCOP1_64_INSN_CPMADLA1_H_P1; mepcop1_64_extract_sfmt_cpcmpeqz_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 4 : + if ((entire_insn & 0xfff801ff) == 0xf00140) + { itype = MEPCOP1_64_INSN_CPMADUA1U_W_P1; mepcop1_64_extract_sfmt_cpcmpeqz_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 5 : + if ((entire_insn & 0xfff801ff) == 0xf00150) + { itype = MEPCOP1_64_INSN_CPMADLA1U_W_P1; mepcop1_64_extract_sfmt_cpcmpeqz_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 6 : + if ((entire_insn & 0xfff801ff) == 0xf00160) + { itype = MEPCOP1_64_INSN_CPMADUA1_W_P1; mepcop1_64_extract_sfmt_cpcmpeqz_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 7 : + if ((entire_insn & 0xfff801ff) == 0xf00170) + { itype = MEPCOP1_64_INSN_CPMADLA1_W_P1; mepcop1_64_extract_sfmt_cpcmpeqz_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + default : itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + } + } + case 59 : + { + unsigned int val = (((insn >> 4) & (7 << 0))); + switch (val) + { + case 2 : + if ((entire_insn & 0xfff801ff) == 0xf001a0) + { itype = MEPCOP1_64_INSN_CPMSBUA1_H_P1; mepcop1_64_extract_sfmt_cpcmpeqz_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 3 : + if ((entire_insn & 0xfff801ff) == 0xf001b0) + { itype = MEPCOP1_64_INSN_CPMSBLA1_H_P1; mepcop1_64_extract_sfmt_cpcmpeqz_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 4 : + if ((entire_insn & 0xfff801ff) == 0xf001c0) + { itype = MEPCOP1_64_INSN_CPMSBUA1U_W_P1; mepcop1_64_extract_sfmt_cpcmpeqz_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 5 : + if ((entire_insn & 0xfff801ff) == 0xf001d0) + { itype = MEPCOP1_64_INSN_CPMSBLA1U_W_P1; mepcop1_64_extract_sfmt_cpcmpeqz_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 6 : + if ((entire_insn & 0xfff801ff) == 0xf001e0) + { itype = MEPCOP1_64_INSN_CPMSBUA1_W_P1; mepcop1_64_extract_sfmt_cpcmpeqz_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 7 : + if ((entire_insn & 0xfff801ff) == 0xf001f0) + { itype = MEPCOP1_64_INSN_CPMSBLA1_W_P1; mepcop1_64_extract_sfmt_cpcmpeqz_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + default : itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + } + } + case 60 : /* fall through */ + case 124 : /* fall through */ + case 188 : /* fall through */ + case 252 : /* fall through */ + case 316 : /* fall through */ + case 380 : /* fall through */ + case 444 : /* fall through */ + case 508 : /* fall through */ + case 572 : /* fall through */ + case 636 : /* fall through */ + case 700 : /* fall through */ + case 764 : /* fall through */ + case 828 : /* fall through */ + case 892 : /* fall through */ + case 956 : /* fall through */ + case 1020 : /* fall through */ + case 1084 : /* fall through */ + case 1148 : /* fall through */ + case 1212 : /* fall through */ + case 1276 : /* fall through */ + case 1340 : /* fall through */ + case 1404 : /* fall through */ + case 1468 : /* fall through */ + case 1532 : /* fall through */ + case 1596 : /* fall through */ + case 1660 : /* fall through */ + case 1724 : /* fall through */ + case 1788 : /* fall through */ + case 1852 : /* fall through */ + case 1916 : /* fall through */ + case 1980 : /* fall through */ + case 2044 : + { + unsigned int val = (((insn >> 4) & (7 << 0))); + switch (val) + { + case 0 : + if ((entire_insn & 0xf801ff) == 0xf80000) + { itype = MEPCOP1_64_INSN_CPFMULIA1S0U_B_P1; mepcop1_64_extract_sfmt_cpfmulia1s0u_b_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 1 : + if ((entire_insn & 0xf801ff) == 0xf80010) + { itype = MEPCOP1_64_INSN_CPFMULIA1S0_B_P1; mepcop1_64_extract_sfmt_cpfmulia1s0u_b_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 2 : + if ((entire_insn & 0xf801ff) == 0xf80020) + { itype = MEPCOP1_64_INSN_CPFMULIUA1S0_H_P1; mepcop1_64_extract_sfmt_cpfmulia1s0u_b_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 3 : + if ((entire_insn & 0xf801ff) == 0xf80030) + { itype = MEPCOP1_64_INSN_CPFMULILA1S0_H_P1; mepcop1_64_extract_sfmt_cpfmulia1s0u_b_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 4 : + if ((entire_insn & 0xf801ff) == 0xf80040) + { itype = MEPCOP1_64_INSN_CPFMADIA1S0U_B_P1; mepcop1_64_extract_sfmt_cpfmulia1s0u_b_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 5 : + if ((entire_insn & 0xf801ff) == 0xf80050) + { itype = MEPCOP1_64_INSN_CPFMADIA1S0_B_P1; mepcop1_64_extract_sfmt_cpfmulia1s0u_b_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 6 : + if ((entire_insn & 0xf801ff) == 0xf80060) + { itype = MEPCOP1_64_INSN_CPFMADIUA1S0_H_P1; mepcop1_64_extract_sfmt_cpfmulia1s0u_b_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 7 : + if ((entire_insn & 0xf801ff) == 0xf80070) + { itype = MEPCOP1_64_INSN_CPFMADILA1S0_H_P1; mepcop1_64_extract_sfmt_cpfmulia1s0u_b_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + default : itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + } + } + case 61 : /* fall through */ + case 125 : /* fall through */ + case 189 : /* fall through */ + case 253 : /* fall through */ + case 317 : /* fall through */ + case 381 : /* fall through */ + case 445 : /* fall through */ + case 509 : /* fall through */ + case 573 : /* fall through */ + case 637 : /* fall through */ + case 701 : /* fall through */ + case 765 : /* fall through */ + case 829 : /* fall through */ + case 893 : /* fall through */ + case 957 : /* fall through */ + case 1021 : /* fall through */ + case 1085 : /* fall through */ + case 1149 : /* fall through */ + case 1213 : /* fall through */ + case 1277 : /* fall through */ + case 1341 : /* fall through */ + case 1405 : /* fall through */ + case 1469 : /* fall through */ + case 1533 : /* fall through */ + case 1597 : /* fall through */ + case 1661 : /* fall through */ + case 1725 : /* fall through */ + case 1789 : /* fall through */ + case 1853 : /* fall through */ + case 1917 : /* fall through */ + case 1981 : /* fall through */ + case 2045 : + { + unsigned int val = (((insn >> 4) & (7 << 0))); + switch (val) + { + case 0 : + if ((entire_insn & 0xf801ff) == 0xf80080) + { itype = MEPCOP1_64_INSN_CPFMULIA1S1U_B_P1; mepcop1_64_extract_sfmt_cpfmulia1s0u_b_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 1 : + if ((entire_insn & 0xf801ff) == 0xf80090) + { itype = MEPCOP1_64_INSN_CPFMULIA1S1_B_P1; mepcop1_64_extract_sfmt_cpfmulia1s0u_b_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 2 : + if ((entire_insn & 0xf801ff) == 0xf800a0) + { itype = MEPCOP1_64_INSN_CPFMULIUA1S1_H_P1; mepcop1_64_extract_sfmt_cpfmulia1s0u_b_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 3 : + if ((entire_insn & 0xf801ff) == 0xf800b0) + { itype = MEPCOP1_64_INSN_CPFMULILA1S1_H_P1; mepcop1_64_extract_sfmt_cpfmulia1s0u_b_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 4 : + if ((entire_insn & 0xf801ff) == 0xf800c0) + { itype = MEPCOP1_64_INSN_CPFMADIA1S1U_B_P1; mepcop1_64_extract_sfmt_cpfmulia1s0u_b_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 5 : + if ((entire_insn & 0xf801ff) == 0xf800d0) + { itype = MEPCOP1_64_INSN_CPFMADIA1S1_B_P1; mepcop1_64_extract_sfmt_cpfmulia1s0u_b_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 6 : + if ((entire_insn & 0xf801ff) == 0xf800e0) + { itype = MEPCOP1_64_INSN_CPFMADIUA1S1_H_P1; mepcop1_64_extract_sfmt_cpfmulia1s0u_b_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 7 : + if ((entire_insn & 0xf801ff) == 0xf800f0) + { itype = MEPCOP1_64_INSN_CPFMADILA1S1_H_P1; mepcop1_64_extract_sfmt_cpfmulia1s0u_b_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + default : itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + } + } + case 62 : /* fall through */ + case 126 : /* fall through */ + case 190 : /* fall through */ + case 254 : /* fall through */ + case 318 : /* fall through */ + case 382 : /* fall through */ + case 446 : /* fall through */ + case 510 : /* fall through */ + case 574 : /* fall through */ + case 638 : /* fall through */ + case 702 : /* fall through */ + case 766 : /* fall through */ + case 830 : /* fall through */ + case 894 : /* fall through */ + case 958 : /* fall through */ + case 1022 : /* fall through */ + case 1086 : /* fall through */ + case 1150 : /* fall through */ + case 1214 : /* fall through */ + case 1278 : /* fall through */ + case 1342 : /* fall through */ + case 1406 : /* fall through */ + case 1470 : /* fall through */ + case 1534 : /* fall through */ + case 1598 : /* fall through */ + case 1662 : /* fall through */ + case 1726 : /* fall through */ + case 1790 : /* fall through */ + case 1854 : /* fall through */ + case 1918 : /* fall through */ + case 1982 : /* fall through */ + case 2046 : + { + unsigned int val = (((insn >> 4) & (7 << 0))); + switch (val) + { + case 0 : + if ((entire_insn & 0xf801ff) == 0xf80100) + { itype = MEPCOP1_64_INSN_CPAMULIA1U_B_P1; mepcop1_64_extract_sfmt_cpfmulia1s0u_b_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 1 : + if ((entire_insn & 0xf801ff) == 0xf80110) + { itype = MEPCOP1_64_INSN_CPAMULIA1_B_P1; mepcop1_64_extract_sfmt_cpfmulia1s0u_b_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 2 : + if ((entire_insn & 0xf801ff) == 0xf80120) + { itype = MEPCOP1_64_INSN_CPAMULIUA1_H_P1; mepcop1_64_extract_sfmt_cpfmulia1s0u_b_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 3 : + if ((entire_insn & 0xf801ff) == 0xf80130) + { itype = MEPCOP1_64_INSN_CPAMULILA1_H_P1; mepcop1_64_extract_sfmt_cpfmulia1s0u_b_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 4 : + if ((entire_insn & 0xf801ff) == 0xf80140) + { itype = MEPCOP1_64_INSN_CPAMADIA1U_B_P1; mepcop1_64_extract_sfmt_cpfmulia1s0u_b_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 5 : + if ((entire_insn & 0xf801ff) == 0xf80150) + { itype = MEPCOP1_64_INSN_CPAMADIA1_B_P1; mepcop1_64_extract_sfmt_cpfmulia1s0u_b_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 6 : + if ((entire_insn & 0xf801ff) == 0xf80160) + { itype = MEPCOP1_64_INSN_CPAMADIUA1_H_P1; mepcop1_64_extract_sfmt_cpfmulia1s0u_b_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 7 : + if ((entire_insn & 0xf801ff) == 0xf80170) + { itype = MEPCOP1_64_INSN_CPAMADILA1_H_P1; mepcop1_64_extract_sfmt_cpfmulia1s0u_b_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + default : itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + } + } + case 76 : + { + unsigned int val = (((insn >> 5) & (3 << 0))); + switch (val) + { + case 0 : + if ((entire_insn & 0xfff801ff) == 0x1980010) + { itype = MEPCOP1_64_INSN_CPOCMPEQ_B_P0_P1; mepcop1_64_extract_sfmt_cpcmpeqz_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 1 : + if ((entire_insn & 0xfff801ff) == 0x1980030) + { itype = MEPCOP1_64_INSN_CPOCMPEQ_H_P0_P1; mepcop1_64_extract_sfmt_cpcmpeqz_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 2 : + if ((entire_insn & 0xfff801ff) == 0x1980050) + { itype = MEPCOP1_64_INSN_CPOCMPEQ_W_P0_P1; mepcop1_64_extract_sfmt_cpcmpeqz_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + default : itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + } + } + case 77 : + { + unsigned int val = (((insn >> 5) & (3 << 0))); + switch (val) + { + case 0 : + if ((entire_insn & 0xfff801ff) == 0x1980090) + { itype = MEPCOP1_64_INSN_CPOCMPNE_B_P0_P1; mepcop1_64_extract_sfmt_cpcmpeqz_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 1 : + if ((entire_insn & 0xfff801ff) == 0x19800b0) + { itype = MEPCOP1_64_INSN_CPOCMPNE_H_P0_P1; mepcop1_64_extract_sfmt_cpcmpeqz_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 2 : + if ((entire_insn & 0xfff801ff) == 0x19800d0) + { itype = MEPCOP1_64_INSN_CPOCMPNE_W_P0_P1; mepcop1_64_extract_sfmt_cpcmpeqz_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + default : itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + } + } + case 78 : + { + unsigned int val = (((insn >> 4) & (7 << 0))); + switch (val) + { + case 0 : + if ((entire_insn & 0xfff801ff) == 0x1980100) + { itype = MEPCOP1_64_INSN_CPOCMPGTU_B_P0_P1; mepcop1_64_extract_sfmt_cpcmpeqz_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 1 : + if ((entire_insn & 0xfff801ff) == 0x1980110) + { itype = MEPCOP1_64_INSN_CPOCMPGT_B_P0_P1; mepcop1_64_extract_sfmt_cpcmpeqz_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 3 : + if ((entire_insn & 0xfff801ff) == 0x1980130) + { itype = MEPCOP1_64_INSN_CPOCMPGT_H_P0_P1; mepcop1_64_extract_sfmt_cpcmpeqz_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 4 : + if ((entire_insn & 0xfff801ff) == 0x1980140) + { itype = MEPCOP1_64_INSN_CPOCMPGTU_W_P0_P1; mepcop1_64_extract_sfmt_cpcmpeqz_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 5 : + if ((entire_insn & 0xfff801ff) == 0x1980150) + { itype = MEPCOP1_64_INSN_CPOCMPGT_W_P0_P1; mepcop1_64_extract_sfmt_cpcmpeqz_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + default : itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + } + } + case 79 : + { + unsigned int val = (((insn >> 4) & (7 << 0))); + switch (val) + { + case 0 : + if ((entire_insn & 0xfff801ff) == 0x1980180) + { itype = MEPCOP1_64_INSN_CPOCMPGEU_B_P0_P1; mepcop1_64_extract_sfmt_cpcmpeqz_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 1 : + if ((entire_insn & 0xfff801ff) == 0x1980190) + { itype = MEPCOP1_64_INSN_CPOCMPGE_B_P0_P1; mepcop1_64_extract_sfmt_cpcmpeqz_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 3 : + if ((entire_insn & 0xfff801ff) == 0x19801b0) + { itype = MEPCOP1_64_INSN_CPOCMPGE_H_P0_P1; mepcop1_64_extract_sfmt_cpcmpeqz_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 4 : + if ((entire_insn & 0xfff801ff) == 0x19801c0) + { itype = MEPCOP1_64_INSN_CPOCMPGEU_W_P0_P1; mepcop1_64_extract_sfmt_cpcmpeqz_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 5 : + if ((entire_insn & 0xfff801ff) == 0x19801d0) + { itype = MEPCOP1_64_INSN_CPOCMPGE_W_P0_P1; mepcop1_64_extract_sfmt_cpcmpeqz_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + default : itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + } + } + case 80 : /* fall through */ + case 81 : /* fall through */ + case 82 : /* fall through */ + case 83 : + { + unsigned int val = (((insn >> 29) & (3 << 0))); + switch (val) + { + case 1 : + if ((entire_insn & 0xfff8000f) == 0x21a00000) + { itype = MEPCOP1_64_INSN_CPABS3_B_P0_P1; mepcop1_64_extract_sfmt_cpadd3_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 2 : + if ((entire_insn & 0xfff8000f) == 0x41a00000) + { itype = MEPCOP1_64_INSN_CPSSRL3_B_P0_P1; mepcop1_64_extract_sfmt_cpadd3_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + default : itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + } + } + case 84 : /* fall through */ + case 85 : /* fall through */ + case 86 : /* fall through */ + case 87 : /* fall through */ + case 148 : /* fall through */ + case 149 : /* fall through */ + case 150 : /* fall through */ + case 151 : /* fall through */ + case 212 : /* fall through */ + case 213 : /* fall through */ + case 214 : /* fall through */ + case 215 : /* fall through */ + case 276 : /* fall through */ + case 277 : /* fall through */ + case 278 : /* fall through */ + case 279 : /* fall through */ + case 340 : /* fall through */ + case 341 : /* fall through */ + case 342 : /* fall through */ + case 343 : /* fall through */ + case 404 : /* fall through */ + case 405 : /* fall through */ + case 406 : /* fall through */ + case 407 : /* fall through */ + case 468 : /* fall through */ + case 469 : /* fall through */ + case 470 : /* fall through */ + case 471 : /* fall through */ + case 532 : /* fall through */ + case 533 : /* fall through */ + case 534 : /* fall through */ + case 535 : /* fall through */ + case 596 : /* fall through */ + case 597 : /* fall through */ + case 598 : /* fall through */ + case 599 : /* fall through */ + case 660 : /* fall through */ + case 661 : /* fall through */ + case 662 : /* fall through */ + case 663 : /* fall through */ + case 724 : /* fall through */ + case 725 : /* fall through */ + case 726 : /* fall through */ + case 727 : /* fall through */ + case 788 : /* fall through */ + case 789 : /* fall through */ + case 790 : /* fall through */ + case 791 : /* fall through */ + case 852 : /* fall through */ + case 853 : /* fall through */ + case 854 : /* fall through */ + case 855 : /* fall through */ + case 916 : /* fall through */ + case 917 : /* fall through */ + case 918 : /* fall through */ + case 919 : /* fall through */ + case 980 : /* fall through */ + case 981 : /* fall through */ + case 982 : /* fall through */ + case 983 : /* fall through */ + case 1044 : /* fall through */ + case 1045 : /* fall through */ + case 1046 : /* fall through */ + case 1047 : /* fall through */ + case 1108 : /* fall through */ + case 1109 : /* fall through */ + case 1110 : /* fall through */ + case 1111 : /* fall through */ + case 1172 : /* fall through */ + case 1173 : /* fall through */ + case 1174 : /* fall through */ + case 1175 : /* fall through */ + case 1236 : /* fall through */ + case 1237 : /* fall through */ + case 1238 : /* fall through */ + case 1239 : /* fall through */ + case 1300 : /* fall through */ + case 1301 : /* fall through */ + case 1302 : /* fall through */ + case 1303 : /* fall through */ + case 1364 : /* fall through */ + case 1365 : /* fall through */ + case 1366 : /* fall through */ + case 1367 : /* fall through */ + case 1428 : /* fall through */ + case 1429 : /* fall through */ + case 1430 : /* fall through */ + case 1431 : /* fall through */ + case 1492 : /* fall through */ + case 1493 : /* fall through */ + case 1494 : /* fall through */ + case 1495 : /* fall through */ + case 1556 : /* fall through */ + case 1557 : /* fall through */ + case 1558 : /* fall through */ + case 1559 : /* fall through */ + case 1620 : /* fall through */ + case 1621 : /* fall through */ + case 1622 : /* fall through */ + case 1623 : /* fall through */ + case 1684 : /* fall through */ + case 1685 : /* fall through */ + case 1686 : /* fall through */ + case 1687 : /* fall through */ + case 1748 : /* fall through */ + case 1749 : /* fall through */ + case 1750 : /* fall through */ + case 1751 : /* fall through */ + case 1812 : /* fall through */ + case 1813 : /* fall through */ + case 1814 : /* fall through */ + case 1815 : /* fall through */ + case 1876 : /* fall through */ + case 1877 : /* fall through */ + case 1878 : /* fall through */ + case 1879 : /* fall through */ + case 1940 : /* fall through */ + case 1941 : /* fall through */ + case 1942 : /* fall through */ + case 1943 : /* fall through */ + case 2004 : /* fall through */ + case 2005 : /* fall through */ + case 2006 : /* fall through */ + case 2007 : + { + unsigned int val = (((insn >> 9) & (31 << 0))); + switch (val) + { + case 0 : + if ((entire_insn & 0xf83e0f) == 0xa80000) + { itype = MEPCOP1_64_INSN_CPSRLI3_B_P0_P1; mepcop1_64_extract_sfmt_cpsrli3_b_P0_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 1 : + if ((entire_insn & 0xf83e0f) == 0xa80200) + { itype = MEPCOP1_64_INSN_CPSRLI3_H_P0_P1; mepcop1_64_extract_sfmt_cpsrli3_h_P0_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 2 : + if ((entire_insn & 0xf83e0f) == 0xa80400) + { itype = MEPCOP1_64_INSN_CPSRLI3_W_P0_P1; mepcop1_64_extract_sfmt_cpsrli3_w_P0_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 3 : + if ((entire_insn & 0xf83e0f) == 0xa80600) + { itype = MEPCOP1_64_INSN_CDSRLI3_P0_P1; mepcop1_64_extract_sfmt_cdsrli3_P0_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 4 : + if ((entire_insn & 0xf83e0f) == 0xa80800) + { itype = MEPCOP1_64_INSN_CPSRAI3_B_P0_P1; mepcop1_64_extract_sfmt_cpsrli3_b_P0_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 5 : + if ((entire_insn & 0xf83e0f) == 0xa80a00) + { itype = MEPCOP1_64_INSN_CPSRAI3_H_P0_P1; mepcop1_64_extract_sfmt_cpsrli3_h_P0_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 6 : + if ((entire_insn & 0xf83e0f) == 0xa80c00) + { itype = MEPCOP1_64_INSN_CPSRAI3_W_P0_P1; mepcop1_64_extract_sfmt_cpsrli3_w_P0_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 7 : + if ((entire_insn & 0xf83e0f) == 0xa80e00) + { itype = MEPCOP1_64_INSN_CDSRAI3_P0_P1; mepcop1_64_extract_sfmt_cdsrli3_P0_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 8 : + if ((entire_insn & 0xf83e0f) == 0xa81000) + { itype = MEPCOP1_64_INSN_CPSLLI3_B_P0_P1; mepcop1_64_extract_sfmt_cpsrli3_b_P0_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 9 : + if ((entire_insn & 0xf83e0f) == 0xa81200) + { itype = MEPCOP1_64_INSN_CPSLLI3_H_P0_P1; mepcop1_64_extract_sfmt_cpsrli3_h_P0_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 10 : + if ((entire_insn & 0xf83e0f) == 0xa81400) + { itype = MEPCOP1_64_INSN_CPSLLI3_W_P0_P1; mepcop1_64_extract_sfmt_cpsrli3_w_P0_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 11 : + if ((entire_insn & 0xf83e0f) == 0xa81600) + { itype = MEPCOP1_64_INSN_CDSLLI3_P0_P1; mepcop1_64_extract_sfmt_cdsrli3_P0_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 13 : + if ((entire_insn & 0xf83e0f) == 0xa81a00) + { itype = MEPCOP1_64_INSN_CPSLAI3_H_P0_P1; mepcop1_64_extract_sfmt_cpsrli3_h_P0_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 14 : + if ((entire_insn & 0xf83e0f) == 0xa81c00) + { itype = MEPCOP1_64_INSN_CPSLAI3_W_P0_P1; mepcop1_64_extract_sfmt_cpsrli3_w_P0_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 16 : + if ((entire_insn & 0xf83e0f) == 0xa82000) + { itype = MEPCOP1_64_INSN_CPCLIPIU3_W_P0_P1; mepcop1_64_extract_sfmt_cpsrli3_w_P0_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 17 : + if ((entire_insn & 0xf83e0f) == 0xa82200) + { itype = MEPCOP1_64_INSN_CPCLIPI3_W_P0_P1; mepcop1_64_extract_sfmt_cpsrli3_w_P0_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 18 : + if ((entire_insn & 0xf83e0f) == 0xa82400) + { itype = MEPCOP1_64_INSN_CDCLIPIU3_P0_P1; mepcop1_64_extract_sfmt_cdsrli3_P0_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 19 : + if ((entire_insn & 0xf83e0f) == 0xa82600) + { itype = MEPCOP1_64_INSN_CDCLIPI3_P0_P1; mepcop1_64_extract_sfmt_cdsrli3_P0_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + default : itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + } + } + case 88 : /* fall through */ + case 89 : /* fall through */ + case 90 : /* fall through */ + case 91 : /* fall through */ + case 152 : /* fall through */ + case 153 : /* fall through */ + case 154 : /* fall through */ + case 155 : /* fall through */ + case 216 : /* fall through */ + case 217 : /* fall through */ + case 218 : /* fall through */ + case 219 : /* fall through */ + case 280 : /* fall through */ + case 281 : /* fall through */ + case 282 : /* fall through */ + case 283 : /* fall through */ + case 344 : /* fall through */ + case 345 : /* fall through */ + case 346 : /* fall through */ + case 347 : /* fall through */ + case 408 : /* fall through */ + case 409 : /* fall through */ + case 410 : /* fall through */ + case 411 : /* fall through */ + case 472 : /* fall through */ + case 473 : /* fall through */ + case 474 : /* fall through */ + case 475 : /* fall through */ + case 536 : /* fall through */ + case 537 : /* fall through */ + case 538 : /* fall through */ + case 539 : /* fall through */ + case 600 : /* fall through */ + case 601 : /* fall through */ + case 602 : /* fall through */ + case 603 : /* fall through */ + case 664 : /* fall through */ + case 665 : /* fall through */ + case 666 : /* fall through */ + case 667 : /* fall through */ + case 728 : /* fall through */ + case 729 : /* fall through */ + case 730 : /* fall through */ + case 731 : /* fall through */ + case 792 : /* fall through */ + case 793 : /* fall through */ + case 794 : /* fall through */ + case 795 : /* fall through */ + case 856 : /* fall through */ + case 857 : /* fall through */ + case 858 : /* fall through */ + case 859 : /* fall through */ + case 920 : /* fall through */ + case 921 : /* fall through */ + case 922 : /* fall through */ + case 923 : /* fall through */ + case 984 : /* fall through */ + case 985 : /* fall through */ + case 986 : /* fall through */ + case 987 : /* fall through */ + case 1048 : /* fall through */ + case 1049 : /* fall through */ + case 1050 : /* fall through */ + case 1051 : /* fall through */ + case 1112 : /* fall through */ + case 1113 : /* fall through */ + case 1114 : /* fall through */ + case 1115 : /* fall through */ + case 1176 : /* fall through */ + case 1177 : /* fall through */ + case 1178 : /* fall through */ + case 1179 : /* fall through */ + case 1240 : /* fall through */ + case 1241 : /* fall through */ + case 1242 : /* fall through */ + case 1243 : /* fall through */ + case 1304 : /* fall through */ + case 1305 : /* fall through */ + case 1306 : /* fall through */ + case 1307 : /* fall through */ + case 1368 : /* fall through */ + case 1369 : /* fall through */ + case 1370 : /* fall through */ + case 1371 : /* fall through */ + case 1432 : /* fall through */ + case 1433 : /* fall through */ + case 1434 : /* fall through */ + case 1435 : /* fall through */ + case 1496 : /* fall through */ + case 1497 : /* fall through */ + case 1498 : /* fall through */ + case 1499 : /* fall through */ + case 1560 : /* fall through */ + case 1561 : /* fall through */ + case 1562 : /* fall through */ + case 1563 : /* fall through */ + case 1624 : /* fall through */ + case 1625 : /* fall through */ + case 1626 : /* fall through */ + case 1627 : /* fall through */ + case 1688 : /* fall through */ + case 1689 : /* fall through */ + case 1690 : /* fall through */ + case 1691 : /* fall through */ + case 1752 : /* fall through */ + case 1753 : /* fall through */ + case 1754 : /* fall through */ + case 1755 : /* fall through */ + case 1816 : /* fall through */ + case 1817 : /* fall through */ + case 1818 : /* fall through */ + case 1819 : /* fall through */ + case 1880 : /* fall through */ + case 1881 : /* fall through */ + case 1882 : /* fall through */ + case 1883 : /* fall through */ + case 1944 : /* fall through */ + case 1945 : /* fall through */ + case 1946 : /* fall through */ + case 1947 : /* fall through */ + case 2008 : /* fall through */ + case 2009 : /* fall through */ + case 2010 : /* fall through */ + case 2011 : + if ((entire_insn & 0xf8300f) == 0xb01000) + { itype = MEPCOP1_64_INSN_CPMOVI_H_P0_P1; mepcop1_64_extract_sfmt_cpmovi_h_P0_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 92 : /* fall through */ + case 93 : /* fall through */ + case 94 : /* fall through */ + case 95 : /* fall through */ + case 156 : /* fall through */ + case 157 : /* fall through */ + case 158 : /* fall through */ + case 159 : /* fall through */ + case 220 : /* fall through */ + case 221 : /* fall through */ + case 222 : /* fall through */ + case 223 : /* fall through */ + case 284 : /* fall through */ + case 285 : /* fall through */ + case 286 : /* fall through */ + case 287 : /* fall through */ + case 348 : /* fall through */ + case 349 : /* fall through */ + case 350 : /* fall through */ + case 351 : /* fall through */ + case 412 : /* fall through */ + case 413 : /* fall through */ + case 414 : /* fall through */ + case 415 : /* fall through */ + case 476 : /* fall through */ + case 477 : /* fall through */ + case 478 : /* fall through */ + case 479 : /* fall through */ + case 540 : /* fall through */ + case 541 : /* fall through */ + case 542 : /* fall through */ + case 543 : /* fall through */ + case 604 : /* fall through */ + case 605 : /* fall through */ + case 606 : /* fall through */ + case 607 : /* fall through */ + case 668 : /* fall through */ + case 669 : /* fall through */ + case 670 : /* fall through */ + case 671 : /* fall through */ + case 732 : /* fall through */ + case 733 : /* fall through */ + case 734 : /* fall through */ + case 735 : /* fall through */ + case 796 : /* fall through */ + case 797 : /* fall through */ + case 798 : /* fall through */ + case 799 : /* fall through */ + case 860 : /* fall through */ + case 861 : /* fall through */ + case 862 : /* fall through */ + case 863 : /* fall through */ + case 924 : /* fall through */ + case 925 : /* fall through */ + case 926 : /* fall through */ + case 927 : /* fall through */ + case 988 : /* fall through */ + case 989 : /* fall through */ + case 990 : /* fall through */ + case 991 : /* fall through */ + case 1052 : /* fall through */ + case 1053 : /* fall through */ + case 1054 : /* fall through */ + case 1055 : /* fall through */ + case 1116 : /* fall through */ + case 1117 : /* fall through */ + case 1118 : /* fall through */ + case 1119 : /* fall through */ + case 1180 : /* fall through */ + case 1181 : /* fall through */ + case 1182 : /* fall through */ + case 1183 : /* fall through */ + case 1244 : /* fall through */ + case 1245 : /* fall through */ + case 1246 : /* fall through */ + case 1247 : /* fall through */ + case 1308 : /* fall through */ + case 1309 : /* fall through */ + case 1310 : /* fall through */ + case 1311 : /* fall through */ + case 1372 : /* fall through */ + case 1373 : /* fall through */ + case 1374 : /* fall through */ + case 1375 : /* fall through */ + case 1436 : /* fall through */ + case 1437 : /* fall through */ + case 1438 : /* fall through */ + case 1439 : /* fall through */ + case 1500 : /* fall through */ + case 1501 : /* fall through */ + case 1502 : /* fall through */ + case 1503 : /* fall through */ + case 1564 : /* fall through */ + case 1565 : /* fall through */ + case 1566 : /* fall through */ + case 1567 : /* fall through */ + case 1628 : /* fall through */ + case 1629 : /* fall through */ + case 1630 : /* fall through */ + case 1631 : /* fall through */ + case 1692 : /* fall through */ + case 1693 : /* fall through */ + case 1694 : /* fall through */ + case 1695 : /* fall through */ + case 1756 : /* fall through */ + case 1757 : /* fall through */ + case 1758 : /* fall through */ + case 1759 : /* fall through */ + case 1820 : /* fall through */ + case 1821 : /* fall through */ + case 1822 : /* fall through */ + case 1823 : /* fall through */ + case 1884 : /* fall through */ + case 1885 : /* fall through */ + case 1886 : /* fall through */ + case 1887 : /* fall through */ + case 1948 : /* fall through */ + case 1949 : /* fall through */ + case 1950 : /* fall through */ + case 1951 : /* fall through */ + case 2012 : /* fall through */ + case 2013 : /* fall through */ + case 2014 : /* fall through */ + case 2015 : + { + unsigned int val = (((insn >> 12) & (3 << 0))); + switch (val) + { + case 0 : + if ((entire_insn & 0xf8300f) == 0xb80000) + { itype = MEPCOP1_64_INSN_CPMOVIU_W_P0_P1; mepcop1_64_extract_sfmt_cpmoviu_w_P0_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 1 : + if ((entire_insn & 0xf8300f) == 0xb81000) + { itype = MEPCOP1_64_INSN_CPMOVI_W_P0_P1; mepcop1_64_extract_sfmt_cpmovi_h_P0_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 2 : + if ((entire_insn & 0xf8300f) == 0xb82000) + { itype = MEPCOP1_64_INSN_CDMOVIU_P0_P1; mepcop1_64_extract_sfmt_cpmoviu_w_P0_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 3 : + if ((entire_insn & 0xf8300f) == 0xb83000) + { itype = MEPCOP1_64_INSN_CDMOVI_P0_P1; mepcop1_64_extract_sfmt_cpmovi_h_P0_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + default : itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + } + } + case 96 : /* fall through */ + case 97 : /* fall through */ + case 98 : /* fall through */ + case 99 : /* fall through */ + case 160 : /* fall through */ + case 161 : /* fall through */ + case 162 : /* fall through */ + case 163 : /* fall through */ + case 224 : /* fall through */ + case 225 : /* fall through */ + case 226 : /* fall through */ + case 227 : /* fall through */ + case 288 : /* fall through */ + case 289 : /* fall through */ + case 290 : /* fall through */ + case 291 : /* fall through */ + case 352 : /* fall through */ + case 353 : /* fall through */ + case 354 : /* fall through */ + case 355 : /* fall through */ + case 416 : /* fall through */ + case 417 : /* fall through */ + case 418 : /* fall through */ + case 419 : /* fall through */ + case 480 : /* fall through */ + case 481 : /* fall through */ + case 482 : /* fall through */ + case 483 : /* fall through */ + case 544 : /* fall through */ + case 545 : /* fall through */ + case 546 : /* fall through */ + case 547 : /* fall through */ + case 608 : /* fall through */ + case 609 : /* fall through */ + case 610 : /* fall through */ + case 611 : /* fall through */ + case 672 : /* fall through */ + case 673 : /* fall through */ + case 674 : /* fall through */ + case 675 : /* fall through */ + case 736 : /* fall through */ + case 737 : /* fall through */ + case 738 : /* fall through */ + case 739 : /* fall through */ + case 800 : /* fall through */ + case 801 : /* fall through */ + case 802 : /* fall through */ + case 803 : /* fall through */ + case 864 : /* fall through */ + case 865 : /* fall through */ + case 866 : /* fall through */ + case 867 : /* fall through */ + case 928 : /* fall through */ + case 929 : /* fall through */ + case 930 : /* fall through */ + case 931 : /* fall through */ + case 992 : /* fall through */ + case 993 : /* fall through */ + case 994 : /* fall through */ + case 995 : /* fall through */ + case 1056 : /* fall through */ + case 1057 : /* fall through */ + case 1058 : /* fall through */ + case 1059 : /* fall through */ + case 1120 : /* fall through */ + case 1121 : /* fall through */ + case 1122 : /* fall through */ + case 1123 : /* fall through */ + case 1184 : /* fall through */ + case 1185 : /* fall through */ + case 1186 : /* fall through */ + case 1187 : /* fall through */ + case 1248 : /* fall through */ + case 1249 : /* fall through */ + case 1250 : /* fall through */ + case 1251 : /* fall through */ + case 1312 : /* fall through */ + case 1313 : /* fall through */ + case 1314 : /* fall through */ + case 1315 : /* fall through */ + case 1376 : /* fall through */ + case 1377 : /* fall through */ + case 1378 : /* fall through */ + case 1379 : /* fall through */ + case 1440 : /* fall through */ + case 1441 : /* fall through */ + case 1442 : /* fall through */ + case 1443 : /* fall through */ + case 1504 : /* fall through */ + case 1505 : /* fall through */ + case 1506 : /* fall through */ + case 1507 : /* fall through */ + case 1568 : /* fall through */ + case 1569 : /* fall through */ + case 1570 : /* fall through */ + case 1571 : /* fall through */ + case 1632 : /* fall through */ + case 1633 : /* fall through */ + case 1634 : /* fall through */ + case 1635 : /* fall through */ + case 1696 : /* fall through */ + case 1697 : /* fall through */ + case 1698 : /* fall through */ + case 1699 : /* fall through */ + case 1760 : /* fall through */ + case 1761 : /* fall through */ + case 1762 : /* fall through */ + case 1763 : /* fall through */ + case 1824 : /* fall through */ + case 1825 : /* fall through */ + case 1826 : /* fall through */ + case 1827 : /* fall through */ + case 1888 : /* fall through */ + case 1889 : /* fall through */ + case 1890 : /* fall through */ + case 1891 : /* fall through */ + case 1952 : /* fall through */ + case 1953 : /* fall through */ + case 1954 : /* fall through */ + case 1955 : /* fall through */ + case 2016 : /* fall through */ + case 2017 : /* fall through */ + case 2018 : /* fall through */ + case 2019 : + if ((entire_insn & 0xf8000f) == 0x400000) + { itype = MEPCOP1_64_INSN_CPFSFTBI_P0_P1; mepcop1_64_extract_sfmt_cpfsftbi_P0_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 112 : /* fall through */ + case 176 : /* fall through */ + case 240 : /* fall through */ + case 304 : /* fall through */ + case 368 : /* fall through */ + case 432 : /* fall through */ + case 496 : /* fall through */ + case 560 : /* fall through */ + case 624 : /* fall through */ + case 688 : /* fall through */ + case 752 : /* fall through */ + case 816 : /* fall through */ + case 880 : /* fall through */ + case 944 : /* fall through */ + case 1008 : /* fall through */ + case 1072 : /* fall through */ + case 1136 : /* fall through */ + case 1200 : /* fall through */ + case 1264 : /* fall through */ + case 1328 : /* fall through */ + case 1392 : /* fall through */ + case 1456 : /* fall through */ + case 1520 : /* fall through */ + case 1584 : /* fall through */ + case 1648 : /* fall through */ + case 1712 : /* fall through */ + case 1776 : /* fall through */ + case 1840 : /* fall through */ + case 1904 : /* fall through */ + case 1968 : /* fall through */ + case 2032 : + if ((entire_insn & 0xf8018f) == 0xe00000) + { itype = MEPCOP1_64_INSN_CPFMULIA1U_B_P1; mepcop1_64_extract_sfmt_cpfmulia1u_b_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 113 : /* fall through */ + case 177 : /* fall through */ + case 241 : /* fall through */ + case 305 : /* fall through */ + case 369 : /* fall through */ + case 433 : /* fall through */ + case 497 : /* fall through */ + case 561 : /* fall through */ + case 625 : /* fall through */ + case 689 : /* fall through */ + case 753 : /* fall through */ + case 817 : /* fall through */ + case 881 : /* fall through */ + case 945 : /* fall through */ + case 1009 : /* fall through */ + case 1073 : /* fall through */ + case 1137 : /* fall through */ + case 1201 : /* fall through */ + case 1265 : /* fall through */ + case 1329 : /* fall through */ + case 1393 : /* fall through */ + case 1457 : /* fall through */ + case 1521 : /* fall through */ + case 1585 : /* fall through */ + case 1649 : /* fall through */ + case 1713 : /* fall through */ + case 1777 : /* fall through */ + case 1841 : /* fall through */ + case 1905 : /* fall through */ + case 1969 : /* fall through */ + case 2033 : + if ((entire_insn & 0xf8018f) == 0xe00080) + { itype = MEPCOP1_64_INSN_CPFMULIA1_B_P1; mepcop1_64_extract_sfmt_cpfmulia1u_b_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 114 : /* fall through */ + case 178 : /* fall through */ + case 242 : /* fall through */ + case 306 : /* fall through */ + case 370 : /* fall through */ + case 434 : /* fall through */ + case 498 : /* fall through */ + case 562 : /* fall through */ + case 626 : /* fall through */ + case 690 : /* fall through */ + case 754 : /* fall through */ + case 818 : /* fall through */ + case 882 : /* fall through */ + case 946 : /* fall through */ + case 1010 : /* fall through */ + case 1074 : /* fall through */ + case 1138 : /* fall through */ + case 1202 : /* fall through */ + case 1266 : /* fall through */ + case 1330 : /* fall through */ + case 1394 : /* fall through */ + case 1458 : /* fall through */ + case 1522 : /* fall through */ + case 1586 : /* fall through */ + case 1650 : /* fall through */ + case 1714 : /* fall through */ + case 1778 : /* fall through */ + case 1842 : /* fall through */ + case 1906 : /* fall through */ + case 1970 : /* fall through */ + case 2034 : + if ((entire_insn & 0xf8018f) == 0xe00100) + { itype = MEPCOP1_64_INSN_CPFMULIUA1_H_P1; mepcop1_64_extract_sfmt_cpfmulia1u_b_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 115 : /* fall through */ + case 179 : /* fall through */ + case 243 : /* fall through */ + case 307 : /* fall through */ + case 371 : /* fall through */ + case 435 : /* fall through */ + case 499 : /* fall through */ + case 563 : /* fall through */ + case 627 : /* fall through */ + case 691 : /* fall through */ + case 755 : /* fall through */ + case 819 : /* fall through */ + case 883 : /* fall through */ + case 947 : /* fall through */ + case 1011 : /* fall through */ + case 1075 : /* fall through */ + case 1139 : /* fall through */ + case 1203 : /* fall through */ + case 1267 : /* fall through */ + case 1331 : /* fall through */ + case 1395 : /* fall through */ + case 1459 : /* fall through */ + case 1523 : /* fall through */ + case 1587 : /* fall through */ + case 1651 : /* fall through */ + case 1715 : /* fall through */ + case 1779 : /* fall through */ + case 1843 : /* fall through */ + case 1907 : /* fall through */ + case 1971 : /* fall through */ + case 2035 : + if ((entire_insn & 0xf8018f) == 0xe00180) + { itype = MEPCOP1_64_INSN_CPFMULILA1_H_P1; mepcop1_64_extract_sfmt_cpfmulia1u_b_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 116 : /* fall through */ + case 180 : /* fall through */ + case 244 : /* fall through */ + case 308 : /* fall through */ + case 372 : /* fall through */ + case 436 : /* fall through */ + case 500 : /* fall through */ + case 564 : /* fall through */ + case 628 : /* fall through */ + case 692 : /* fall through */ + case 756 : /* fall through */ + case 820 : /* fall through */ + case 884 : /* fall through */ + case 948 : /* fall through */ + case 1012 : /* fall through */ + case 1076 : /* fall through */ + case 1140 : /* fall through */ + case 1204 : /* fall through */ + case 1268 : /* fall through */ + case 1332 : /* fall through */ + case 1396 : /* fall through */ + case 1460 : /* fall through */ + case 1524 : /* fall through */ + case 1588 : /* fall through */ + case 1652 : /* fall through */ + case 1716 : /* fall through */ + case 1780 : /* fall through */ + case 1844 : /* fall through */ + case 1908 : /* fall through */ + case 1972 : /* fall through */ + case 2036 : + if ((entire_insn & 0xf8018f) == 0xe80000) + { itype = MEPCOP1_64_INSN_CPFMADIA1U_B_P1; mepcop1_64_extract_sfmt_cpfmulia1u_b_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 117 : /* fall through */ + case 181 : /* fall through */ + case 245 : /* fall through */ + case 309 : /* fall through */ + case 373 : /* fall through */ + case 437 : /* fall through */ + case 501 : /* fall through */ + case 565 : /* fall through */ + case 629 : /* fall through */ + case 693 : /* fall through */ + case 757 : /* fall through */ + case 821 : /* fall through */ + case 885 : /* fall through */ + case 949 : /* fall through */ + case 1013 : /* fall through */ + case 1077 : /* fall through */ + case 1141 : /* fall through */ + case 1205 : /* fall through */ + case 1269 : /* fall through */ + case 1333 : /* fall through */ + case 1397 : /* fall through */ + case 1461 : /* fall through */ + case 1525 : /* fall through */ + case 1589 : /* fall through */ + case 1653 : /* fall through */ + case 1717 : /* fall through */ + case 1781 : /* fall through */ + case 1845 : /* fall through */ + case 1909 : /* fall through */ + case 1973 : /* fall through */ + case 2037 : + if ((entire_insn & 0xf8018f) == 0xe80080) + { itype = MEPCOP1_64_INSN_CPFMADIA1_B_P1; mepcop1_64_extract_sfmt_cpfmulia1u_b_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 118 : /* fall through */ + case 182 : /* fall through */ + case 246 : /* fall through */ + case 310 : /* fall through */ + case 374 : /* fall through */ + case 438 : /* fall through */ + case 502 : /* fall through */ + case 566 : /* fall through */ + case 630 : /* fall through */ + case 694 : /* fall through */ + case 758 : /* fall through */ + case 822 : /* fall through */ + case 886 : /* fall through */ + case 950 : /* fall through */ + case 1014 : /* fall through */ + case 1078 : /* fall through */ + case 1142 : /* fall through */ + case 1206 : /* fall through */ + case 1270 : /* fall through */ + case 1334 : /* fall through */ + case 1398 : /* fall through */ + case 1462 : /* fall through */ + case 1526 : /* fall through */ + case 1590 : /* fall through */ + case 1654 : /* fall through */ + case 1718 : /* fall through */ + case 1782 : /* fall through */ + case 1846 : /* fall through */ + case 1910 : /* fall through */ + case 1974 : /* fall through */ + case 2038 : + if ((entire_insn & 0xf8018f) == 0xe80100) + { itype = MEPCOP1_64_INSN_CPFMADIUA1_H_P1; mepcop1_64_extract_sfmt_cpfmulia1u_b_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 119 : /* fall through */ + case 183 : /* fall through */ + case 247 : /* fall through */ + case 311 : /* fall through */ + case 375 : /* fall through */ + case 439 : /* fall through */ + case 503 : /* fall through */ + case 567 : /* fall through */ + case 631 : /* fall through */ + case 695 : /* fall through */ + case 759 : /* fall through */ + case 823 : /* fall through */ + case 887 : /* fall through */ + case 951 : /* fall through */ + case 1015 : /* fall through */ + case 1079 : /* fall through */ + case 1143 : /* fall through */ + case 1207 : /* fall through */ + case 1271 : /* fall through */ + case 1335 : /* fall through */ + case 1399 : /* fall through */ + case 1463 : /* fall through */ + case 1527 : /* fall through */ + case 1591 : /* fall through */ + case 1655 : /* fall through */ + case 1719 : /* fall through */ + case 1783 : /* fall through */ + case 1847 : /* fall through */ + case 1911 : /* fall through */ + case 1975 : /* fall through */ + case 2039 : + if ((entire_insn & 0xf8018f) == 0xe80180) + { itype = MEPCOP1_64_INSN_CPFMADILA1_H_P1; mepcop1_64_extract_sfmt_cpfmulia1u_b_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 122 : + { + unsigned int val = (((insn >> 5) & (1 << 1)) | ((insn >> 4) & (1 << 0))); + switch (val) + { + case 0 : + if ((entire_insn & 0xfff801ff) == 0x1f00120) + { itype = MEPCOP1_64_INSN_CPSMADUA1_H_P1; mepcop1_64_extract_sfmt_cpcmpeqz_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 1 : + if ((entire_insn & 0xfff801ff) == 0x1f00130) + { itype = MEPCOP1_64_INSN_CPSMADLA1_H_P1; mepcop1_64_extract_sfmt_cpcmpeqz_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 2 : + if ((entire_insn & 0xfff801ff) == 0x1f00160) + { itype = MEPCOP1_64_INSN_CPSMADUA1_W_P1; mepcop1_64_extract_sfmt_cpcmpeqz_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 3 : + if ((entire_insn & 0xfff801ff) == 0x1f00170) + { itype = MEPCOP1_64_INSN_CPSMADLA1_W_P1; mepcop1_64_extract_sfmt_cpcmpeqz_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + default : itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + } + } + case 123 : + { + unsigned int val = (((insn >> 5) & (1 << 1)) | ((insn >> 4) & (1 << 0))); + switch (val) + { + case 0 : + if ((entire_insn & 0xfff801ff) == 0x1f001a0) + { itype = MEPCOP1_64_INSN_CPSMSBUA1_H_P1; mepcop1_64_extract_sfmt_cpcmpeqz_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 1 : + if ((entire_insn & 0xfff801ff) == 0x1f001b0) + { itype = MEPCOP1_64_INSN_CPSMSBLA1_H_P1; mepcop1_64_extract_sfmt_cpcmpeqz_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 2 : + if ((entire_insn & 0xfff801ff) == 0x1f001e0) + { itype = MEPCOP1_64_INSN_CPSMSBUA1_W_P1; mepcop1_64_extract_sfmt_cpcmpeqz_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 3 : + if ((entire_insn & 0xfff801ff) == 0x1f001f0) + { itype = MEPCOP1_64_INSN_CPSMSBLA1_W_P1; mepcop1_64_extract_sfmt_cpcmpeqz_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + default : itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + } + } + case 144 : /* fall through */ + case 145 : /* fall through */ + case 146 : /* fall through */ + case 147 : + { + unsigned int val = (((insn >> 29) & (3 << 0))); + switch (val) + { + case 1 : + if ((entire_insn & 0xfff8000f) == 0x22a00000) + { itype = MEPCOP1_64_INSN_CPABS3_H_P0_P1; mepcop1_64_extract_sfmt_cpadd3_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 2 : + if ((entire_insn & 0xfff8000f) == 0x42a00000) + { itype = MEPCOP1_64_INSN_CPSRL3_H_P0_P1; mepcop1_64_extract_sfmt_cpadd3_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + default : itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + } + } + case 185 : + { + unsigned int val = (((insn >> 5) & (1 << 1)) | ((insn >> 4) & (1 << 0))); + switch (val) + { + case 0 : + if ((entire_insn & 0xfff801ff) == 0x2f000a0) + { itype = MEPCOP1_64_INSN_CPMULSLUA1_H_P1; mepcop1_64_extract_sfmt_cpcmpeqz_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 1 : + if ((entire_insn & 0xfff801ff) == 0x2f000b0) + { itype = MEPCOP1_64_INSN_CPMULSLLA1_H_P1; mepcop1_64_extract_sfmt_cpcmpeqz_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 2 : + if ((entire_insn & 0xfff801ff) == 0x2f000e0) + { itype = MEPCOP1_64_INSN_CPMULSLUA1_W_P1; mepcop1_64_extract_sfmt_cpcmpeqz_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 3 : + if ((entire_insn & 0xfff801ff) == 0x2f000f0) + { itype = MEPCOP1_64_INSN_CPMULSLLA1_W_P1; mepcop1_64_extract_sfmt_cpcmpeqz_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + default : itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + } + } + case 208 : /* fall through */ + case 209 : /* fall through */ + case 210 : /* fall through */ + case 211 : + { + unsigned int val = (((insn >> 30) & (1 << 0))); + switch (val) + { + case 0 : + if ((entire_insn & 0xfff8000f) == 0x3a00000) + { itype = MEPCOP1_64_INSN_CDADD3_P0_P1; mepcop1_64_extract_sfmt_cpadd3_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 1 : + if ((entire_insn & 0xfff8000f) == 0x43a00000) + { itype = MEPCOP1_64_INSN_CPSSRL3_H_P0_P1; mepcop1_64_extract_sfmt_cpadd3_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + default : itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + } + } + case 250 : + { + unsigned int val = (((insn >> 5) & (1 << 1)) | ((insn >> 4) & (1 << 0))); + switch (val) + { + case 0 : + if ((entire_insn & 0xfff801ff) == 0x3f00120) + { itype = MEPCOP1_64_INSN_CPSMADSLUA1_H_P1; mepcop1_64_extract_sfmt_cpcmpeqz_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 1 : + if ((entire_insn & 0xfff801ff) == 0x3f00130) + { itype = MEPCOP1_64_INSN_CPSMADSLLA1_H_P1; mepcop1_64_extract_sfmt_cpcmpeqz_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 2 : + if ((entire_insn & 0xfff801ff) == 0x3f00160) + { itype = MEPCOP1_64_INSN_CPSMADSLUA1_W_P1; mepcop1_64_extract_sfmt_cpcmpeqz_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 3 : + if ((entire_insn & 0xfff801ff) == 0x3f00170) + { itype = MEPCOP1_64_INSN_CPSMADSLLA1_W_P1; mepcop1_64_extract_sfmt_cpcmpeqz_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + default : itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + } + } + case 251 : + { + unsigned int val = (((insn >> 5) & (1 << 1)) | ((insn >> 4) & (1 << 0))); + switch (val) + { + case 0 : + if ((entire_insn & 0xfff801ff) == 0x3f001a0) + { itype = MEPCOP1_64_INSN_CPSMSBSLUA1_H_P1; mepcop1_64_extract_sfmt_cpcmpeqz_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 1 : + if ((entire_insn & 0xfff801ff) == 0x3f001b0) + { itype = MEPCOP1_64_INSN_CPSMSBSLLA1_H_P1; mepcop1_64_extract_sfmt_cpcmpeqz_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 2 : + if ((entire_insn & 0xfff801ff) == 0x3f001e0) + { itype = MEPCOP1_64_INSN_CPSMSBSLUA1_W_P1; mepcop1_64_extract_sfmt_cpcmpeqz_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 3 : + if ((entire_insn & 0xfff801ff) == 0x3f001f0) + { itype = MEPCOP1_64_INSN_CPSMSBSLLA1_W_P1; mepcop1_64_extract_sfmt_cpcmpeqz_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + default : itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + } + } + case 272 : /* fall through */ + case 273 : /* fall through */ + case 274 : /* fall through */ + case 275 : + { + unsigned int val = (((insn >> 29) & (3 << 0))); + switch (val) + { + case 0 : + if ((entire_insn & 0xfff8000f) == 0x4a00000) + { itype = MEPCOP1_64_INSN_CPSUB3_B_P0_P1; mepcop1_64_extract_sfmt_cpadd3_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 1 : + if ((entire_insn & 0xfff8000f) == 0x24a00000) + { itype = MEPCOP1_64_INSN_CPAND3_P0_P1; mepcop1_64_extract_sfmt_cpadd3_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 2 : + if ((entire_insn & 0xfff8000f) == 0x44a00000) + { itype = MEPCOP1_64_INSN_CPSRL3_W_P0_P1; mepcop1_64_extract_sfmt_cpadd3_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + default : itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + } + } + case 336 : /* fall through */ + case 337 : /* fall through */ + case 338 : /* fall through */ + case 339 : + { + unsigned int val = (((insn >> 29) & (3 << 0))); + switch (val) + { + case 0 : + if ((entire_insn & 0xfff8000f) == 0x5a00000) + { itype = MEPCOP1_64_INSN_CPSUB3_H_P0_P1; mepcop1_64_extract_sfmt_cpadd3_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 1 : + if ((entire_insn & 0xfff8000f) == 0x25a00000) + { itype = MEPCOP1_64_INSN_CPOR3_P0_P1; mepcop1_64_extract_sfmt_cpadd3_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 2 : + if ((entire_insn & 0xfff8000f) == 0x45a00000) + { itype = MEPCOP1_64_INSN_CPSSRL3_W_P0_P1; mepcop1_64_extract_sfmt_cpadd3_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + default : itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + } + } + case 400 : /* fall through */ + case 401 : /* fall through */ + case 402 : /* fall through */ + case 403 : + { + unsigned int val = (((insn >> 29) & (3 << 0))); + switch (val) + { + case 0 : + if ((entire_insn & 0xfff8000f) == 0x6a00000) + { itype = MEPCOP1_64_INSN_CPSUB3_W_P0_P1; mepcop1_64_extract_sfmt_cpadd3_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 1 : + if ((entire_insn & 0xfff8000f) == 0x26a00000) + { itype = MEPCOP1_64_INSN_CPNOR3_P0_P1; mepcop1_64_extract_sfmt_cpadd3_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 2 : + if ((entire_insn & 0xfff8000f) == 0x46a00000) + { itype = MEPCOP1_64_INSN_CDSRL3_P0_P1; mepcop1_64_extract_sfmt_cpadd3_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + default : itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + } + } + case 464 : /* fall through */ + case 465 : /* fall through */ + case 466 : /* fall through */ + case 467 : + { + unsigned int val = (((insn >> 29) & (1 << 0))); + switch (val) + { + case 0 : + if ((entire_insn & 0xfff8000f) == 0x7a00000) + { itype = MEPCOP1_64_INSN_CDSUB3_P0_P1; mepcop1_64_extract_sfmt_cpadd3_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 1 : + if ((entire_insn & 0xfff8000f) == 0x27a00000) + { itype = MEPCOP1_64_INSN_CPXOR3_P0_P1; mepcop1_64_extract_sfmt_cpadd3_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + default : itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + } + } + case 528 : /* fall through */ + case 529 : /* fall through */ + case 530 : /* fall through */ + case 531 : + if ((entire_insn & 0xfff8000f) == 0x48a00000) + { itype = MEPCOP1_64_INSN_CPSRA3_B_P0_P1; mepcop1_64_extract_sfmt_cpadd3_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 592 : /* fall through */ + case 593 : /* fall through */ + case 594 : /* fall through */ + case 595 : + if ((entire_insn & 0xfff8000f) == 0x49a00000) + { itype = MEPCOP1_64_INSN_CPSSRA3_B_P0_P1; mepcop1_64_extract_sfmt_cpadd3_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 656 : /* fall through */ + case 657 : /* fall through */ + case 658 : /* fall through */ + case 659 : + { + unsigned int val = (((insn >> 30) & (1 << 0))); + switch (val) + { + case 0 : + if ((entire_insn & 0xfff8000f) == 0xaa00000) + { itype = MEPCOP1_64_INSN_CPSADD3_H_P0_P1; mepcop1_64_extract_sfmt_cpadd3_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 1 : + if ((entire_insn & 0xfff8000f) == 0x4aa00000) + { itype = MEPCOP1_64_INSN_CPSRA3_H_P0_P1; mepcop1_64_extract_sfmt_cpadd3_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + default : itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + } + } + case 720 : /* fall through */ + case 721 : /* fall through */ + case 722 : /* fall through */ + case 723 : + { + unsigned int val = (((insn >> 30) & (1 << 0))); + switch (val) + { + case 0 : + if ((entire_insn & 0xfff8000f) == 0xba00000) + { itype = MEPCOP1_64_INSN_CPSADD3_W_P0_P1; mepcop1_64_extract_sfmt_cpadd3_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 1 : + if ((entire_insn & 0xfff8000f) == 0x4ba00000) + { itype = MEPCOP1_64_INSN_CPSSRA3_H_P0_P1; mepcop1_64_extract_sfmt_cpadd3_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + default : itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + } + } + case 784 : /* fall through */ + case 785 : /* fall through */ + case 786 : /* fall through */ + case 787 : + { + unsigned int val = (((insn >> 29) & (3 << 0))); + switch (val) + { + case 1 : + if ((entire_insn & 0xfff8000f) == 0x2ca00000) + { itype = MEPCOP1_64_INSN_CPPACKU_B_P0_P1; mepcop1_64_extract_sfmt_cpadd3_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 2 : + if ((entire_insn & 0xfff8000f) == 0x4ca00000) + { itype = MEPCOP1_64_INSN_CPSRA3_W_P0_P1; mepcop1_64_extract_sfmt_cpadd3_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + default : itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + } + } + case 848 : /* fall through */ + case 849 : /* fall through */ + case 850 : /* fall through */ + case 851 : + { + unsigned int val = (((insn >> 29) & (3 << 0))); + switch (val) + { + case 1 : + if ((entire_insn & 0xfff8000f) == 0x2da00000) + { itype = MEPCOP1_64_INSN_CPPACK_B_P0_P1; mepcop1_64_extract_sfmt_cpadd3_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 2 : + if ((entire_insn & 0xfff8000f) == 0x4da00000) + { itype = MEPCOP1_64_INSN_CPSSRA3_W_P0_P1; mepcop1_64_extract_sfmt_cpadd3_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + default : itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + } + } + case 912 : /* fall through */ + case 913 : /* fall through */ + case 914 : /* fall through */ + case 915 : + { + unsigned int val = (((insn >> 30) & (1 << 0))); + switch (val) + { + case 0 : + if ((entire_insn & 0xfff8000f) == 0xea00000) + { itype = MEPCOP1_64_INSN_CPSSUB3_H_P0_P1; mepcop1_64_extract_sfmt_cpadd3_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 1 : + if ((entire_insn & 0xfff8000f) == 0x4ea00000) + { itype = MEPCOP1_64_INSN_CDSRA3_P0_P1; mepcop1_64_extract_sfmt_cpadd3_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + default : itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + } + } + case 976 : /* fall through */ + case 977 : /* fall through */ + case 978 : /* fall through */ + case 979 : + { + unsigned int val = (((insn >> 29) & (1 << 0))); + switch (val) + { + case 0 : + if ((entire_insn & 0xfff8000f) == 0xfa00000) + { itype = MEPCOP1_64_INSN_CPSSUB3_W_P0_P1; mepcop1_64_extract_sfmt_cpadd3_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 1 : + if ((entire_insn & 0xfff8000f) == 0x2fa00000) + { itype = MEPCOP1_64_INSN_CPPACK_H_P0_P1; mepcop1_64_extract_sfmt_cpadd3_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + default : itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + } + } + case 1040 : /* fall through */ + case 1041 : /* fall through */ + case 1042 : /* fall through */ + case 1043 : + { + unsigned int val = (((insn >> 29) & (3 << 0))); + switch (val) + { + case 0 : + if ((entire_insn & 0xfff8000f) == 0x10a00000) + { itype = MEPCOP1_64_INSN_CPEXTUADDU3_B_P0_P1; mepcop1_64_extract_sfmt_cpadd3_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 1 : + if ((entire_insn & 0xfff8000f) == 0x30a00000) + { itype = MEPCOP1_64_INSN_CPMAXU3_B_P0_P1; mepcop1_64_extract_sfmt_cpadd3_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 2 : + if ((entire_insn & 0xfff8000f) == 0x50a00000) + { itype = MEPCOP1_64_INSN_CPSLL3_B_P0_P1; mepcop1_64_extract_sfmt_cpadd3_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + default : itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + } + } + case 1104 : /* fall through */ + case 1105 : /* fall through */ + case 1106 : /* fall through */ + case 1107 : + { + unsigned int val = (((insn >> 29) & (3 << 0))); + switch (val) + { + case 0 : + if ((entire_insn & 0xfff8000f) == 0x11a00000) + { itype = MEPCOP1_64_INSN_CPEXTUADD3_B_P0_P1; mepcop1_64_extract_sfmt_cpadd3_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 1 : + if ((entire_insn & 0xfff8000f) == 0x31a00000) + { itype = MEPCOP1_64_INSN_CPMAX3_B_P0_P1; mepcop1_64_extract_sfmt_cpadd3_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 2 : + if ((entire_insn & 0xfff8000f) == 0x51a00000) + { itype = MEPCOP1_64_INSN_CPSSLL3_B_P0_P1; mepcop1_64_extract_sfmt_cpadd3_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + default : itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + } + } + case 1168 : /* fall through */ + case 1169 : /* fall through */ + case 1170 : /* fall through */ + case 1171 : + { + unsigned int val = (((insn >> 30) & (1 << 0))); + switch (val) + { + case 0 : + if ((entire_insn & 0xfff8000f) == 0x12a00000) + { itype = MEPCOP1_64_INSN_CPEXTLADDU3_B_P0_P1; mepcop1_64_extract_sfmt_cpadd3_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 1 : + if ((entire_insn & 0xfff8000f) == 0x52a00000) + { itype = MEPCOP1_64_INSN_CPSLL3_H_P0_P1; mepcop1_64_extract_sfmt_cpadd3_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + default : itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + } + } + case 1232 : /* fall through */ + case 1233 : /* fall through */ + case 1234 : /* fall through */ + case 1235 : + { + unsigned int val = (((insn >> 29) & (3 << 0))); + switch (val) + { + case 0 : + if ((entire_insn & 0xfff8000f) == 0x13a00000) + { itype = MEPCOP1_64_INSN_CPEXTLADD3_B_P0_P1; mepcop1_64_extract_sfmt_cpadd3_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 1 : + if ((entire_insn & 0xfff8000f) == 0x33a00000) + { itype = MEPCOP1_64_INSN_CPMAX3_H_P0_P1; mepcop1_64_extract_sfmt_cpadd3_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 2 : + if ((entire_insn & 0xfff8000f) == 0x53a00000) + { itype = MEPCOP1_64_INSN_CPSSLL3_H_P0_P1; mepcop1_64_extract_sfmt_cpadd3_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + default : itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + } + } + case 1296 : /* fall through */ + case 1297 : /* fall through */ + case 1298 : /* fall through */ + case 1299 : + { + unsigned int val = (((insn >> 29) & (3 << 0))); + switch (val) + { + case 0 : + if ((entire_insn & 0xfff8000f) == 0x14a00000) + { itype = MEPCOP1_64_INSN_CPEXTUSUBU3_B_P0_P1; mepcop1_64_extract_sfmt_cpadd3_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 1 : + if ((entire_insn & 0xfff8000f) == 0x34a00000) + { itype = MEPCOP1_64_INSN_CPMAXU3_W_P0_P1; mepcop1_64_extract_sfmt_cpadd3_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 2 : + if ((entire_insn & 0xfff8000f) == 0x54a00000) + { itype = MEPCOP1_64_INSN_CPSLL3_W_P0_P1; mepcop1_64_extract_sfmt_cpadd3_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + default : itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + } + } + case 1360 : /* fall through */ + case 1361 : /* fall through */ + case 1362 : /* fall through */ + case 1363 : + { + unsigned int val = (((insn >> 29) & (3 << 0))); + switch (val) + { + case 0 : + if ((entire_insn & 0xfff8000f) == 0x15a00000) + { itype = MEPCOP1_64_INSN_CPEXTUSUB3_B_P0_P1; mepcop1_64_extract_sfmt_cpadd3_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 1 : + if ((entire_insn & 0xfff8000f) == 0x35a00000) + { itype = MEPCOP1_64_INSN_CPMAX3_W_P0_P1; mepcop1_64_extract_sfmt_cpadd3_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 2 : + if ((entire_insn & 0xfff8000f) == 0x55a00000) + { itype = MEPCOP1_64_INSN_CPSSLL3_W_P0_P1; mepcop1_64_extract_sfmt_cpadd3_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + default : itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + } + } + case 1424 : /* fall through */ + case 1425 : /* fall through */ + case 1426 : /* fall through */ + case 1427 : + { + unsigned int val = (((insn >> 30) & (1 << 0))); + switch (val) + { + case 0 : + if ((entire_insn & 0xfff8000f) == 0x16a00000) + { itype = MEPCOP1_64_INSN_CPEXTLSUBU3_B_P0_P1; mepcop1_64_extract_sfmt_cpadd3_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 1 : + if ((entire_insn & 0xfff8000f) == 0x56a00000) + { itype = MEPCOP1_64_INSN_CDSLL3_P0_P1; mepcop1_64_extract_sfmt_cpadd3_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + default : itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + } + } + case 1488 : /* fall through */ + case 1489 : /* fall through */ + case 1490 : /* fall through */ + case 1491 : + if ((entire_insn & 0xfff8000f) == 0x17a00000) + { itype = MEPCOP1_64_INSN_CPEXTLSUB3_B_P0_P1; mepcop1_64_extract_sfmt_cpadd3_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 1552 : /* fall through */ + case 1553 : /* fall through */ + case 1554 : /* fall through */ + case 1555 : + { + unsigned int val = (((insn >> 29) & (1 << 0))); + switch (val) + { + case 0 : + if ((entire_insn & 0xfff8000f) == 0x18a00000) + { itype = MEPCOP1_64_INSN_CPAVEU3_B_P0_P1; mepcop1_64_extract_sfmt_cpadd3_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 1 : + if ((entire_insn & 0xfff8000f) == 0x38a00000) + { itype = MEPCOP1_64_INSN_CPMINU3_B_P0_P1; mepcop1_64_extract_sfmt_cpadd3_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + default : itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + } + } + case 1616 : /* fall through */ + case 1617 : /* fall through */ + case 1618 : /* fall through */ + case 1619 : + { + unsigned int val = (((insn >> 29) & (1 << 0))); + switch (val) + { + case 0 : + if ((entire_insn & 0xfff8000f) == 0x19a00000) + { itype = MEPCOP1_64_INSN_CPAVE3_B_P0_P1; mepcop1_64_extract_sfmt_cpadd3_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 1 : + if ((entire_insn & 0xfff8000f) == 0x39a00000) + { itype = MEPCOP1_64_INSN_CPMIN3_B_P0_P1; mepcop1_64_extract_sfmt_cpadd3_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + default : itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + } + } + case 1680 : /* fall through */ + case 1681 : /* fall through */ + case 1682 : /* fall through */ + case 1683 : + { + unsigned int val = (((insn >> 30) & (1 << 0))); + switch (val) + { + case 0 : + if ((entire_insn & 0xfff8000f) == 0x1aa00000) + { itype = MEPCOP1_64_INSN_CPAVE3_H_P0_P1; mepcop1_64_extract_sfmt_cpadd3_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 1 : + if ((entire_insn & 0xfff8000f) == 0x5aa00000) + { itype = MEPCOP1_64_INSN_CPSLA3_H_P0_P1; mepcop1_64_extract_sfmt_cpadd3_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + default : itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + } + } + case 1744 : /* fall through */ + case 1745 : /* fall through */ + case 1746 : /* fall through */ + case 1747 : + { + unsigned int val = (((insn >> 29) & (1 << 0))); + switch (val) + { + case 0 : + if ((entire_insn & 0xfff8000f) == 0x1ba00000) + { itype = MEPCOP1_64_INSN_CPAVE3_W_P0_P1; mepcop1_64_extract_sfmt_cpadd3_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 1 : + if ((entire_insn & 0xfff8000f) == 0x3ba00000) + { itype = MEPCOP1_64_INSN_CPMIN3_H_P0_P1; mepcop1_64_extract_sfmt_cpadd3_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + default : itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + } + } + case 1808 : /* fall through */ + case 1809 : /* fall through */ + case 1810 : /* fall through */ + case 1811 : + { + unsigned int val = (((insn >> 29) & (3 << 0))); + switch (val) + { + case 0 : + if ((entire_insn & 0xfff8000f) == 0x1ca00000) + { itype = MEPCOP1_64_INSN_CPADDSRU3_B_P0_P1; mepcop1_64_extract_sfmt_cpadd3_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 1 : + if ((entire_insn & 0xfff8000f) == 0x3ca00000) + { itype = MEPCOP1_64_INSN_CPMINU3_W_P0_P1; mepcop1_64_extract_sfmt_cpadd3_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 2 : + if ((entire_insn & 0xfff8000f) == 0x5ca00000) + { itype = MEPCOP1_64_INSN_CPSLA3_W_P0_P1; mepcop1_64_extract_sfmt_cpadd3_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + default : itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + } + } + case 1872 : /* fall through */ + case 1873 : /* fall through */ + case 1874 : /* fall through */ + case 1875 : + { + unsigned int val = (((insn >> 29) & (1 << 0))); + switch (val) + { + case 0 : + if ((entire_insn & 0xfff8000f) == 0x1da00000) + { itype = MEPCOP1_64_INSN_CPADDSR3_B_P0_P1; mepcop1_64_extract_sfmt_cpadd3_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 1 : + if ((entire_insn & 0xfff8000f) == 0x3da00000) + { itype = MEPCOP1_64_INSN_CPMIN3_W_P0_P1; mepcop1_64_extract_sfmt_cpadd3_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + default : itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + } + } + case 1936 : /* fall through */ + case 1937 : /* fall through */ + case 1938 : /* fall through */ + case 1939 : + if ((entire_insn & 0xfff8000f) == 0x1ea00000) + { itype = MEPCOP1_64_INSN_CPADDSR3_H_P0_P1; mepcop1_64_extract_sfmt_cpadd3_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + case 2000 : /* fall through */ + case 2001 : /* fall through */ + case 2002 : /* fall through */ + case 2003 : + if ((entire_insn & 0xfff8000f) == 0x1fa00000) + { itype = MEPCOP1_64_INSN_CPADDSR3_W_P0_P1; mepcop1_64_extract_sfmt_cpadd3_b_P0S_P1 (this, current_cpu, pc, base_insn, entire_insn); goto done; } + itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + default : itype = MEPCOP1_64_INSN_X_INVALID; mepcop1_64_extract_sfmt_empty (this, current_cpu, pc, base_insn, entire_insn); goto done; + } + } + + } + + /* The instruction has been decoded and fields extracted. */ + done: + + this->addr = pc; + // FIXME: To be redone (to handle ISA variants). + this->idesc = & mepcop1_64_idesc::idesc_table[itype]; + // ??? record semantic handler? + assert(this->idesc->sem_index == itype); +} + +void +mepcop1_64_extract_sfmt_empty (mepcop1_64_scache* abuf, mep_ext1_cpu* current_cpu, PCADDR pc, mepcop1_64_insn_word base_insn, mepcop1_64_insn_word entire_insn){ + mepcop1_64_insn_word insn = entire_insn; +#define FLD(f) abuf->fields.fmt_empty.f + + + /* Record the fields for the semantic handler. */ + if (UNLIKELY(current_cpu->trace_extract_p)) + { + current_cpu->trace_stream + << "0x" << hex << pc << dec << " (sfmt_empty)\t" + << endl; + } + +#undef FLD +} + +void +mepcop1_64_extract_sfmt_cpadd3_b_P0S_P1 (mepcop1_64_scache* abuf, mep_ext1_cpu* current_cpu, PCADDR pc, mepcop1_64_insn_word base_insn, mepcop1_64_insn_word entire_insn){ + mepcop1_64_insn_word insn = entire_insn; +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + UINT f_ivc2_5u13; + UINT f_ivc2_5u18; + UINT f_ivc2_5u23; + + f_ivc2_5u13 = EXTRACT_MSB0_UINT (insn, 32, 13, 5); + f_ivc2_5u18 = EXTRACT_MSB0_UINT (insn, 32, 18, 5); + f_ivc2_5u23 = EXTRACT_MSB0_UINT (insn, 32, 23, 5); + + /* Record the fields for the semantic handler. */ + FLD (f_ivc2_5u18) = f_ivc2_5u18; + FLD (f_ivc2_5u13) = f_ivc2_5u13; + FLD (f_ivc2_5u23) = f_ivc2_5u23; + if (UNLIKELY(current_cpu->trace_extract_p)) + { + current_cpu->trace_stream + << "0x" << hex << pc << dec << " (sfmt_cpadd3_b_P0S_P1)\t" + << " f_ivc2_5u18:0x" << hex << f_ivc2_5u18 << dec + << " f_ivc2_5u13:0x" << hex << f_ivc2_5u13 << dec + << " f_ivc2_5u23:0x" << hex << f_ivc2_5u23 << dec + << endl; + } + + /* Record the fields for profiling. */ + if (UNLIKELY (current_cpu->trace_counter_p || current_cpu->final_insn_count_p)) + { + } +#undef FLD +} + +void +mepcop1_64_extract_sfmt_cpmov_P0S_P1 (mepcop1_64_scache* abuf, mep_ext1_cpu* current_cpu, PCADDR pc, mepcop1_64_insn_word base_insn, mepcop1_64_insn_word entire_insn){ + mepcop1_64_insn_word insn = entire_insn; +#define FLD(f) abuf->fields.sfmt_cdsrli3_P0_P1.f + UINT f_ivc2_5u13; + UINT f_ivc2_5u23; + + f_ivc2_5u13 = EXTRACT_MSB0_UINT (insn, 32, 13, 5); + f_ivc2_5u23 = EXTRACT_MSB0_UINT (insn, 32, 23, 5); + + /* Record the fields for the semantic handler. */ + FLD (f_ivc2_5u13) = f_ivc2_5u13; + FLD (f_ivc2_5u23) = f_ivc2_5u23; + if (UNLIKELY(current_cpu->trace_extract_p)) + { + current_cpu->trace_stream + << "0x" << hex << pc << dec << " (sfmt_cpmov_P0S_P1)\t" + << " f_ivc2_5u13:0x" << hex << f_ivc2_5u13 << dec + << " f_ivc2_5u23:0x" << hex << f_ivc2_5u23 << dec + << endl; + } + + /* Record the fields for profiling. */ + if (UNLIKELY (current_cpu->trace_counter_p || current_cpu->final_insn_count_p)) + { + } +#undef FLD +} + +void +mepcop1_64_extract_sfmt_cpccadd_b_P0S_P1 (mepcop1_64_scache* abuf, mep_ext1_cpu* current_cpu, PCADDR pc, mepcop1_64_insn_word base_insn, mepcop1_64_insn_word entire_insn){ + mepcop1_64_insn_word insn = entire_insn; +#define FLD(f) abuf->fields.sfmt_cpmoviu_w_P0_P1.f + UINT f_ivc2_5u13; + + f_ivc2_5u13 = EXTRACT_MSB0_UINT (insn, 32, 13, 5); + + /* Record the fields for the semantic handler. */ + FLD (f_ivc2_5u13) = f_ivc2_5u13; + if (UNLIKELY(current_cpu->trace_extract_p)) + { + current_cpu->trace_stream + << "0x" << hex << pc << dec << " (sfmt_cpccadd_b_P0S_P1)\t" + << " f_ivc2_5u13:0x" << hex << f_ivc2_5u13 << dec + << endl; + } + + /* Record the fields for profiling. */ + if (UNLIKELY (current_cpu->trace_counter_p || current_cpu->final_insn_count_p)) + { + } +#undef FLD +} + +void +mepcop1_64_extract_sfmt_cpmovfrcsar0_P0S_P1 (mepcop1_64_scache* abuf, mep_ext1_cpu* current_cpu, PCADDR pc, mepcop1_64_insn_word base_insn, mepcop1_64_insn_word entire_insn){ + mepcop1_64_insn_word insn = entire_insn; +#define FLD(f) abuf->fields.sfmt_cdsrli3_P0_P1.f + UINT f_ivc2_5u23; + + f_ivc2_5u23 = EXTRACT_MSB0_UINT (insn, 32, 23, 5); + + /* Record the fields for the semantic handler. */ + FLD (f_ivc2_5u23) = f_ivc2_5u23; + if (UNLIKELY(current_cpu->trace_extract_p)) + { + current_cpu->trace_stream + << "0x" << hex << pc << dec << " (sfmt_cpmovfrcsar0_P0S_P1)\t" + << " f_ivc2_5u23:0x" << hex << f_ivc2_5u23 << dec + << endl; + } + + /* Record the fields for profiling. */ + if (UNLIKELY (current_cpu->trace_counter_p || current_cpu->final_insn_count_p)) + { + } +#undef FLD +} + +void +mepcop1_64_extract_sfmt_cpmovtocsar0_P0S_P1 (mepcop1_64_scache* abuf, mep_ext1_cpu* current_cpu, PCADDR pc, mepcop1_64_insn_word base_insn, mepcop1_64_insn_word entire_insn){ + mepcop1_64_insn_word insn = entire_insn; +#define FLD(f) abuf->fields.sfmt_cpmoviu_w_P0_P1.f + UINT f_ivc2_5u13; + + f_ivc2_5u13 = EXTRACT_MSB0_UINT (insn, 32, 13, 5); + + /* Record the fields for the semantic handler. */ + FLD (f_ivc2_5u13) = f_ivc2_5u13; + if (UNLIKELY(current_cpu->trace_extract_p)) + { + current_cpu->trace_stream + << "0x" << hex << pc << dec << " (sfmt_cpmovtocsar0_P0S_P1)\t" + << " f_ivc2_5u13:0x" << hex << f_ivc2_5u13 << dec + << endl; + } + + /* Record the fields for profiling. */ + if (UNLIKELY (current_cpu->trace_counter_p || current_cpu->final_insn_count_p)) + { + } +#undef FLD +} + +void +mepcop1_64_extract_sfmt_cpcmpeqz_b_P0S_P1 (mepcop1_64_scache* abuf, mep_ext1_cpu* current_cpu, PCADDR pc, mepcop1_64_insn_word base_insn, mepcop1_64_insn_word entire_insn){ + mepcop1_64_insn_word insn = entire_insn; +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + UINT f_ivc2_5u13; + UINT f_ivc2_5u18; + + f_ivc2_5u13 = EXTRACT_MSB0_UINT (insn, 32, 13, 5); + f_ivc2_5u18 = EXTRACT_MSB0_UINT (insn, 32, 18, 5); + + /* Record the fields for the semantic handler. */ + FLD (f_ivc2_5u18) = f_ivc2_5u18; + FLD (f_ivc2_5u13) = f_ivc2_5u13; + if (UNLIKELY(current_cpu->trace_extract_p)) + { + current_cpu->trace_stream + << "0x" << hex << pc << dec << " (sfmt_cpcmpeqz_b_P0S_P1)\t" + << " f_ivc2_5u18:0x" << hex << f_ivc2_5u18 << dec + << " f_ivc2_5u13:0x" << hex << f_ivc2_5u13 << dec + << endl; + } + + /* Record the fields for profiling. */ + if (UNLIKELY (current_cpu->trace_counter_p || current_cpu->final_insn_count_p)) + { + } +#undef FLD +} + +void +mepcop1_64_extract_sfmt_cpfsftbi_P0_P1 (mepcop1_64_scache* abuf, mep_ext1_cpu* current_cpu, PCADDR pc, mepcop1_64_insn_word base_insn, mepcop1_64_insn_word entire_insn){ + mepcop1_64_insn_word insn = entire_insn; +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + UINT f_ivc2_3u5; + UINT f_ivc2_5u13; + UINT f_ivc2_5u18; + UINT f_ivc2_5u23; + + f_ivc2_3u5 = EXTRACT_MSB0_UINT (insn, 32, 5, 3); + f_ivc2_5u13 = EXTRACT_MSB0_UINT (insn, 32, 13, 5); + f_ivc2_5u18 = EXTRACT_MSB0_UINT (insn, 32, 18, 5); + f_ivc2_5u23 = EXTRACT_MSB0_UINT (insn, 32, 23, 5); + + /* Record the fields for the semantic handler. */ + FLD (f_ivc2_5u18) = f_ivc2_5u18; + FLD (f_ivc2_5u13) = f_ivc2_5u13; + FLD (f_ivc2_3u5) = f_ivc2_3u5; + FLD (f_ivc2_5u23) = f_ivc2_5u23; + if (UNLIKELY(current_cpu->trace_extract_p)) + { + current_cpu->trace_stream + << "0x" << hex << pc << dec << " (sfmt_cpfsftbi_P0_P1)\t" + << " f_ivc2_5u18:0x" << hex << f_ivc2_5u18 << dec + << " f_ivc2_5u13:0x" << hex << f_ivc2_5u13 << dec + << " f_ivc2_3u5:0x" << hex << f_ivc2_3u5 << dec + << " f_ivc2_5u23:0x" << hex << f_ivc2_5u23 << dec + << endl; + } + + /* Record the fields for profiling. */ + if (UNLIKELY (current_cpu->trace_counter_p || current_cpu->final_insn_count_p)) + { + } +#undef FLD +} + +void +mepcop1_64_extract_sfmt_cpsrli3_b_P0_P1 (mepcop1_64_scache* abuf, mep_ext1_cpu* current_cpu, PCADDR pc, mepcop1_64_insn_word base_insn, mepcop1_64_insn_word entire_insn){ + mepcop1_64_insn_word insn = entire_insn; +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + UINT f_ivc2_3u5; + UINT f_ivc2_5u13; + UINT f_ivc2_5u23; + + f_ivc2_3u5 = EXTRACT_MSB0_UINT (insn, 32, 5, 3); + f_ivc2_5u13 = EXTRACT_MSB0_UINT (insn, 32, 13, 5); + f_ivc2_5u23 = EXTRACT_MSB0_UINT (insn, 32, 23, 5); + + /* Record the fields for the semantic handler. */ + FLD (f_ivc2_5u13) = f_ivc2_5u13; + FLD (f_ivc2_3u5) = f_ivc2_3u5; + FLD (f_ivc2_5u23) = f_ivc2_5u23; + if (UNLIKELY(current_cpu->trace_extract_p)) + { + current_cpu->trace_stream + << "0x" << hex << pc << dec << " (sfmt_cpsrli3_b_P0_P1)\t" + << " f_ivc2_5u13:0x" << hex << f_ivc2_5u13 << dec + << " f_ivc2_3u5:0x" << hex << f_ivc2_3u5 << dec + << " f_ivc2_5u23:0x" << hex << f_ivc2_5u23 << dec + << endl; + } + + /* Record the fields for profiling. */ + if (UNLIKELY (current_cpu->trace_counter_p || current_cpu->final_insn_count_p)) + { + } +#undef FLD +} + +void +mepcop1_64_extract_sfmt_cpsrli3_h_P0_P1 (mepcop1_64_scache* abuf, mep_ext1_cpu* current_cpu, PCADDR pc, mepcop1_64_insn_word base_insn, mepcop1_64_insn_word entire_insn){ + mepcop1_64_insn_word insn = entire_insn; +#define FLD(f) abuf->fields.sfmt_cpsrli3_h_P0_P1.f + UINT f_ivc2_4u4; + UINT f_ivc2_5u13; + UINT f_ivc2_5u23; + + f_ivc2_4u4 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); + f_ivc2_5u13 = EXTRACT_MSB0_UINT (insn, 32, 13, 5); + f_ivc2_5u23 = EXTRACT_MSB0_UINT (insn, 32, 23, 5); + + /* Record the fields for the semantic handler. */ + FLD (f_ivc2_5u13) = f_ivc2_5u13; + FLD (f_ivc2_4u4) = f_ivc2_4u4; + FLD (f_ivc2_5u23) = f_ivc2_5u23; + if (UNLIKELY(current_cpu->trace_extract_p)) + { + current_cpu->trace_stream + << "0x" << hex << pc << dec << " (sfmt_cpsrli3_h_P0_P1)\t" + << " f_ivc2_5u13:0x" << hex << f_ivc2_5u13 << dec + << " f_ivc2_4u4:0x" << hex << f_ivc2_4u4 << dec + << " f_ivc2_5u23:0x" << hex << f_ivc2_5u23 << dec + << endl; + } + + /* Record the fields for profiling. */ + if (UNLIKELY (current_cpu->trace_counter_p || current_cpu->final_insn_count_p)) + { + } +#undef FLD +} + +void +mepcop1_64_extract_sfmt_cpsrli3_w_P0_P1 (mepcop1_64_scache* abuf, mep_ext1_cpu* current_cpu, PCADDR pc, mepcop1_64_insn_word base_insn, mepcop1_64_insn_word entire_insn){ + mepcop1_64_insn_word insn = entire_insn; +#define FLD(f) abuf->fields.sfmt_cpsrli3_w_P0_P1.f + UINT f_ivc2_5u3; + UINT f_ivc2_5u13; + UINT f_ivc2_5u23; + + f_ivc2_5u3 = EXTRACT_MSB0_UINT (insn, 32, 3, 5); + f_ivc2_5u13 = EXTRACT_MSB0_UINT (insn, 32, 13, 5); + f_ivc2_5u23 = EXTRACT_MSB0_UINT (insn, 32, 23, 5); + + /* Record the fields for the semantic handler. */ + FLD (f_ivc2_5u13) = f_ivc2_5u13; + FLD (f_ivc2_5u3) = f_ivc2_5u3; + FLD (f_ivc2_5u23) = f_ivc2_5u23; + if (UNLIKELY(current_cpu->trace_extract_p)) + { + current_cpu->trace_stream + << "0x" << hex << pc << dec << " (sfmt_cpsrli3_w_P0_P1)\t" + << " f_ivc2_5u13:0x" << hex << f_ivc2_5u13 << dec + << " f_ivc2_5u3:0x" << hex << f_ivc2_5u3 << dec + << " f_ivc2_5u23:0x" << hex << f_ivc2_5u23 << dec + << endl; + } + + /* Record the fields for profiling. */ + if (UNLIKELY (current_cpu->trace_counter_p || current_cpu->final_insn_count_p)) + { + } +#undef FLD +} + +void +mepcop1_64_extract_sfmt_cdsrli3_P0_P1 (mepcop1_64_scache* abuf, mep_ext1_cpu* current_cpu, PCADDR pc, mepcop1_64_insn_word base_insn, mepcop1_64_insn_word entire_insn){ + mepcop1_64_insn_word insn = entire_insn; +#define FLD(f) abuf->fields.sfmt_cdsrli3_P0_P1.f + UINT f_ivc2_6u2; + UINT f_ivc2_5u13; + UINT f_ivc2_5u23; + + f_ivc2_6u2 = EXTRACT_MSB0_UINT (insn, 32, 2, 6); + f_ivc2_5u13 = EXTRACT_MSB0_UINT (insn, 32, 13, 5); + f_ivc2_5u23 = EXTRACT_MSB0_UINT (insn, 32, 23, 5); + + /* Record the fields for the semantic handler. */ + FLD (f_ivc2_5u13) = f_ivc2_5u13; + FLD (f_ivc2_6u2) = f_ivc2_6u2; + FLD (f_ivc2_5u23) = f_ivc2_5u23; + if (UNLIKELY(current_cpu->trace_extract_p)) + { + current_cpu->trace_stream + << "0x" << hex << pc << dec << " (sfmt_cdsrli3_P0_P1)\t" + << " f_ivc2_5u13:0x" << hex << f_ivc2_5u13 << dec + << " f_ivc2_6u2:0x" << hex << f_ivc2_6u2 << dec + << " f_ivc2_5u23:0x" << hex << f_ivc2_5u23 << dec + << endl; + } + + /* Record the fields for profiling. */ + if (UNLIKELY (current_cpu->trace_counter_p || current_cpu->final_insn_count_p)) + { + } +#undef FLD +} + +void +mepcop1_64_extract_sfmt_cpmovi_h_P0_P1 (mepcop1_64_scache* abuf, mep_ext1_cpu* current_cpu, PCADDR pc, mepcop1_64_insn_word base_insn, mepcop1_64_insn_word entire_insn){ + mepcop1_64_insn_word insn = entire_insn; +#define FLD(f) abuf->fields.sfmt_cpmovi_h_P0_P1.f + UINT f_ivc2_8u0; + UINT f_ivc2_5u13; + UINT f_ivc2_8u20; + INT f_ivc2_simm16p0; + + f_ivc2_8u0 = EXTRACT_MSB0_UINT (insn, 32, 0, 8); + f_ivc2_5u13 = EXTRACT_MSB0_UINT (insn, 32, 13, 5); + f_ivc2_8u20 = EXTRACT_MSB0_UINT (insn, 32, 20, 8); +{ + f_ivc2_simm16p0 = ((f_ivc2_8u20) | (((f_ivc2_8u0) << (8)))); +} + + /* Record the fields for the semantic handler. */ + FLD (f_ivc2_simm16p0) = f_ivc2_simm16p0; + FLD (f_ivc2_5u13) = f_ivc2_5u13; + if (UNLIKELY(current_cpu->trace_extract_p)) + { + current_cpu->trace_stream + << "0x" << hex << pc << dec << " (sfmt_cpmovi_h_P0_P1)\t" + << " f_ivc2_simm16p0:0x" << hex << f_ivc2_simm16p0 << dec + << " f_ivc2_5u13:0x" << hex << f_ivc2_5u13 << dec + << endl; + } + + /* Record the fields for profiling. */ + if (UNLIKELY (current_cpu->trace_counter_p || current_cpu->final_insn_count_p)) + { + } +#undef FLD +} + +void +mepcop1_64_extract_sfmt_cpmoviu_w_P0_P1 (mepcop1_64_scache* abuf, mep_ext1_cpu* current_cpu, PCADDR pc, mepcop1_64_insn_word base_insn, mepcop1_64_insn_word entire_insn){ + mepcop1_64_insn_word insn = entire_insn; +#define FLD(f) abuf->fields.sfmt_cpmoviu_w_P0_P1.f + UINT f_ivc2_8u0; + UINT f_ivc2_5u13; + UINT f_ivc2_8u20; + UINT f_ivc2_imm16p0; + + f_ivc2_8u0 = EXTRACT_MSB0_UINT (insn, 32, 0, 8); + f_ivc2_5u13 = EXTRACT_MSB0_UINT (insn, 32, 13, 5); + f_ivc2_8u20 = EXTRACT_MSB0_UINT (insn, 32, 20, 8); +{ + f_ivc2_imm16p0 = ((f_ivc2_8u20) | (((f_ivc2_8u0) << (8)))); +} + + /* Record the fields for the semantic handler. */ + FLD (f_ivc2_imm16p0) = f_ivc2_imm16p0; + FLD (f_ivc2_5u13) = f_ivc2_5u13; + if (UNLIKELY(current_cpu->trace_extract_p)) + { + current_cpu->trace_stream + << "0x" << hex << pc << dec << " (sfmt_cpmoviu_w_P0_P1)\t" + << " f_ivc2_imm16p0:0x" << hex << f_ivc2_imm16p0 << dec + << " f_ivc2_5u13:0x" << hex << f_ivc2_5u13 << dec + << endl; + } + + /* Record the fields for profiling. */ + if (UNLIKELY (current_cpu->trace_counter_p || current_cpu->final_insn_count_p)) + { + } +#undef FLD +} + +void +mepcop1_64_extract_sfmt_c1nop_P1 (mepcop1_64_scache* abuf, mep_ext1_cpu* current_cpu, PCADDR pc, mepcop1_64_insn_word base_insn, mepcop1_64_insn_word entire_insn){ + mepcop1_64_insn_word insn = entire_insn; +#define FLD(f) abuf->fields.fmt_empty.f + + + /* Record the fields for the semantic handler. */ + if (UNLIKELY(current_cpu->trace_extract_p)) + { + current_cpu->trace_stream + << "0x" << hex << pc << dec << " (sfmt_c1nop_P1)\t" + << endl; + } + + /* Record the fields for profiling. */ + if (UNLIKELY (current_cpu->trace_counter_p || current_cpu->final_insn_count_p)) + { + } +#undef FLD +} + +void +mepcop1_64_extract_sfmt_cpsrlia1_1_p1 (mepcop1_64_scache* abuf, mep_ext1_cpu* current_cpu, PCADDR pc, mepcop1_64_insn_word base_insn, mepcop1_64_insn_word entire_insn){ + mepcop1_64_insn_word insn = entire_insn; +#define FLD(f) abuf->fields.sfmt_cdsrli3_P0_P1.f + UINT f_ivc2_5u23; + + f_ivc2_5u23 = EXTRACT_MSB0_UINT (insn, 32, 23, 5); + + /* Record the fields for the semantic handler. */ + FLD (f_ivc2_5u23) = f_ivc2_5u23; + if (UNLIKELY(current_cpu->trace_extract_p)) + { + current_cpu->trace_stream + << "0x" << hex << pc << dec << " (sfmt_cpsrlia1_1_p1)\t" + << " f_ivc2_5u23:0x" << hex << f_ivc2_5u23 << dec + << endl; + } + + /* Record the fields for profiling. */ + if (UNLIKELY (current_cpu->trace_counter_p || current_cpu->final_insn_count_p)) + { + } +#undef FLD +} + +void +mepcop1_64_extract_sfmt_cpfmulia1s0u_b_P1 (mepcop1_64_scache* abuf, mep_ext1_cpu* current_cpu, PCADDR pc, mepcop1_64_insn_word base_insn, mepcop1_64_insn_word entire_insn){ + mepcop1_64_insn_word insn = entire_insn; +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + INT f_ivc2_8s0; + UINT f_ivc2_5u13; + UINT f_ivc2_5u18; + + f_ivc2_8s0 = EXTRACT_MSB0_INT (insn, 32, 0, 8); + f_ivc2_5u13 = EXTRACT_MSB0_UINT (insn, 32, 13, 5); + f_ivc2_5u18 = EXTRACT_MSB0_UINT (insn, 32, 18, 5); + + /* Record the fields for the semantic handler. */ + FLD (f_ivc2_5u18) = f_ivc2_5u18; + FLD (f_ivc2_5u13) = f_ivc2_5u13; + FLD (f_ivc2_8s0) = f_ivc2_8s0; + if (UNLIKELY(current_cpu->trace_extract_p)) + { + current_cpu->trace_stream + << "0x" << hex << pc << dec << " (sfmt_cpfmulia1s0u_b_P1)\t" + << " f_ivc2_5u18:0x" << hex << f_ivc2_5u18 << dec + << " f_ivc2_5u13:0x" << hex << f_ivc2_5u13 << dec + << " f_ivc2_8s0:0x" << hex << f_ivc2_8s0 << dec + << endl; + } + + /* Record the fields for profiling. */ + if (UNLIKELY (current_cpu->trace_counter_p || current_cpu->final_insn_count_p)) + { + } +#undef FLD +} + +void +mepcop1_64_extract_sfmt_cpfmulia1u_b_P1 (mepcop1_64_scache* abuf, mep_ext1_cpu* current_cpu, PCADDR pc, mepcop1_64_insn_word base_insn, mepcop1_64_insn_word entire_insn){ + mepcop1_64_insn_word insn = entire_insn; +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + INT f_ivc2_8s0; + UINT f_ivc2_5u13; + UINT f_ivc2_5u18; + UINT f_ivc2_3u25; + + f_ivc2_8s0 = EXTRACT_MSB0_INT (insn, 32, 0, 8); + f_ivc2_5u13 = EXTRACT_MSB0_UINT (insn, 32, 13, 5); + f_ivc2_5u18 = EXTRACT_MSB0_UINT (insn, 32, 18, 5); + f_ivc2_3u25 = EXTRACT_MSB0_UINT (insn, 32, 25, 3); + + /* Record the fields for the semantic handler. */ + FLD (f_ivc2_5u18) = f_ivc2_5u18; + FLD (f_ivc2_5u13) = f_ivc2_5u13; + FLD (f_ivc2_3u25) = f_ivc2_3u25; + FLD (f_ivc2_8s0) = f_ivc2_8s0; + if (UNLIKELY(current_cpu->trace_extract_p)) + { + current_cpu->trace_stream + << "0x" << hex << pc << dec << " (sfmt_cpfmulia1u_b_P1)\t" + << " f_ivc2_5u18:0x" << hex << f_ivc2_5u18 << dec + << " f_ivc2_5u13:0x" << hex << f_ivc2_5u13 << dec + << " f_ivc2_3u25:0x" << hex << f_ivc2_3u25 << dec + << " f_ivc2_8s0:0x" << hex << f_ivc2_8s0 << dec + << endl; + } + + /* Record the fields for profiling. */ + if (UNLIKELY (current_cpu->trace_counter_p || current_cpu->final_insn_count_p)) + { + } +#undef FLD +} + diff --git a/sid/component/cgen-cpu/mep/mep-cop1-64-decode.h b/sid/component/cgen-cpu/mep/mep-cop1-64-decode.h new file mode 100644 index 0000000000..2927dc58a6 --- /dev/null +++ b/sid/component/cgen-cpu/mep/mep-cop1-64-decode.h @@ -0,0 +1,544 @@ +/* Decode header for mepcop1_64. + +THIS FILE IS MACHINE GENERATED WITH CGEN. + +Copyright (C) 2000-2007 Red Hat, Inc. + +This file is part of the Red Hat simulators. + + +*/ + +#ifndef MEPCOP1_64_DECODE_H +#define MEPCOP1_64_DECODE_H + +namespace mep_ext1 { + +using namespace cgen; +using namespace mep; + +typedef UINT mepcop1_64_insn_word; + +/* Enum declaration for instructions in cpu family mepcop1_64. */ +typedef enum mepcop1_64_insn_type { + MEPCOP1_64_INSN_X_INVALID, MEPCOP1_64_INSN_CPADD3_B_P0S_P1, MEPCOP1_64_INSN_CPADD3_H_P0S_P1, MEPCOP1_64_INSN_CPADD3_W_P0S_P1 + , MEPCOP1_64_INSN_CPUNPACKU_B_P0S_P1, MEPCOP1_64_INSN_CPUNPACKU_H_P0S_P1, MEPCOP1_64_INSN_CPUNPACKU_W_P0S_P1, MEPCOP1_64_INSN_CPUNPACKL_B_P0S_P1 + , MEPCOP1_64_INSN_CPUNPACKL_H_P0S_P1, MEPCOP1_64_INSN_CPUNPACKL_W_P0S_P1, MEPCOP1_64_INSN_CPSEL_P0S_P1, MEPCOP1_64_INSN_CPFSFTBS0_P0S_P1 + , MEPCOP1_64_INSN_CPFSFTBS1_P0S_P1, MEPCOP1_64_INSN_CPMOV_P0S_P1, MEPCOP1_64_INSN_CPABSZ_B_P0S_P1, MEPCOP1_64_INSN_CPABSZ_H_P0S_P1 + , MEPCOP1_64_INSN_CPABSZ_W_P0S_P1, MEPCOP1_64_INSN_CPLDZ_H_P0S_P1, MEPCOP1_64_INSN_CPLDZ_W_P0S_P1, MEPCOP1_64_INSN_CPNORM_H_P0S_P1 + , MEPCOP1_64_INSN_CPNORM_W_P0S_P1, MEPCOP1_64_INSN_CPHADDU_B_P0S_P1, MEPCOP1_64_INSN_CPHADD_B_P0S_P1, MEPCOP1_64_INSN_CPHADD_H_P0S_P1 + , MEPCOP1_64_INSN_CPHADD_W_P0S_P1, MEPCOP1_64_INSN_CPCCADD_B_P0S_P1, MEPCOP1_64_INSN_CPBCAST_B_P0S_P1, MEPCOP1_64_INSN_CPBCAST_H_P0S_P1 + , MEPCOP1_64_INSN_CPBCAST_W_P0S_P1, MEPCOP1_64_INSN_CPEXTUU_B_P0S_P1, MEPCOP1_64_INSN_CPEXTU_B_P0S_P1, MEPCOP1_64_INSN_CPEXTUU_H_P0S_P1 + , MEPCOP1_64_INSN_CPEXTU_H_P0S_P1, MEPCOP1_64_INSN_CPEXTLU_B_P0S_P1, MEPCOP1_64_INSN_CPEXTL_B_P0S_P1, MEPCOP1_64_INSN_CPEXTLU_H_P0S_P1 + , MEPCOP1_64_INSN_CPEXTL_H_P0S_P1, MEPCOP1_64_INSN_CPCASTUB_H_P0S_P1, MEPCOP1_64_INSN_CPCASTB_H_P0S_P1, MEPCOP1_64_INSN_CPCASTUB_W_P0S_P1 + , MEPCOP1_64_INSN_CPCASTB_W_P0S_P1, MEPCOP1_64_INSN_CPCASTUH_W_P0S_P1, MEPCOP1_64_INSN_CPCASTH_W_P0S_P1, MEPCOP1_64_INSN_CDCASTUW_P0S_P1 + , MEPCOP1_64_INSN_CDCASTW_P0S_P1, MEPCOP1_64_INSN_CPMOVFRCSAR0_P0S_P1, MEPCOP1_64_INSN_CPMOVFRCSAR1_P0S_P1, MEPCOP1_64_INSN_CPMOVFRCC_P0S_P1 + , MEPCOP1_64_INSN_CPMOVTOCSAR0_P0S_P1, MEPCOP1_64_INSN_CPMOVTOCSAR1_P0S_P1, MEPCOP1_64_INSN_CPMOVTOCC_P0S_P1, MEPCOP1_64_INSN_CPCMPEQZ_B_P0S_P1 + , MEPCOP1_64_INSN_CPCMPEQ_B_P0S_P1, MEPCOP1_64_INSN_CPCMPEQ_H_P0S_P1, MEPCOP1_64_INSN_CPCMPEQ_W_P0S_P1, MEPCOP1_64_INSN_CPCMPNE_B_P0S_P1 + , MEPCOP1_64_INSN_CPCMPNE_H_P0S_P1, MEPCOP1_64_INSN_CPCMPNE_W_P0S_P1, MEPCOP1_64_INSN_CPCMPGTU_B_P0S_P1, MEPCOP1_64_INSN_CPCMPGT_B_P0S_P1 + , MEPCOP1_64_INSN_CPCMPGT_H_P0S_P1, MEPCOP1_64_INSN_CPCMPGTU_W_P0S_P1, MEPCOP1_64_INSN_CPCMPGT_W_P0S_P1, MEPCOP1_64_INSN_CPCMPGEU_B_P0S_P1 + , MEPCOP1_64_INSN_CPCMPGE_B_P0S_P1, MEPCOP1_64_INSN_CPCMPGE_H_P0S_P1, MEPCOP1_64_INSN_CPCMPGEU_W_P0S_P1, MEPCOP1_64_INSN_CPCMPGE_W_P0S_P1 + , MEPCOP1_64_INSN_CPFSFTBI_P0_P1, MEPCOP1_64_INSN_CPACMPEQ_B_P0_P1, MEPCOP1_64_INSN_CPACMPEQ_H_P0_P1, MEPCOP1_64_INSN_CPACMPEQ_W_P0_P1 + , MEPCOP1_64_INSN_CPACMPNE_B_P0_P1, MEPCOP1_64_INSN_CPACMPNE_H_P0_P1, MEPCOP1_64_INSN_CPACMPNE_W_P0_P1, MEPCOP1_64_INSN_CPACMPGTU_B_P0_P1 + , MEPCOP1_64_INSN_CPACMPGT_B_P0_P1, MEPCOP1_64_INSN_CPACMPGT_H_P0_P1, MEPCOP1_64_INSN_CPACMPGTU_W_P0_P1, MEPCOP1_64_INSN_CPACMPGT_W_P0_P1 + , MEPCOP1_64_INSN_CPACMPGEU_B_P0_P1, MEPCOP1_64_INSN_CPACMPGE_B_P0_P1, MEPCOP1_64_INSN_CPACMPGE_H_P0_P1, MEPCOP1_64_INSN_CPACMPGEU_W_P0_P1 + , MEPCOP1_64_INSN_CPACMPGE_W_P0_P1, MEPCOP1_64_INSN_CPOCMPEQ_B_P0_P1, MEPCOP1_64_INSN_CPOCMPEQ_H_P0_P1, MEPCOP1_64_INSN_CPOCMPEQ_W_P0_P1 + , MEPCOP1_64_INSN_CPOCMPNE_B_P0_P1, MEPCOP1_64_INSN_CPOCMPNE_H_P0_P1, MEPCOP1_64_INSN_CPOCMPNE_W_P0_P1, MEPCOP1_64_INSN_CPOCMPGTU_B_P0_P1 + , MEPCOP1_64_INSN_CPOCMPGT_B_P0_P1, MEPCOP1_64_INSN_CPOCMPGT_H_P0_P1, MEPCOP1_64_INSN_CPOCMPGTU_W_P0_P1, MEPCOP1_64_INSN_CPOCMPGT_W_P0_P1 + , MEPCOP1_64_INSN_CPOCMPGEU_B_P0_P1, MEPCOP1_64_INSN_CPOCMPGE_B_P0_P1, MEPCOP1_64_INSN_CPOCMPGE_H_P0_P1, MEPCOP1_64_INSN_CPOCMPGEU_W_P0_P1 + , MEPCOP1_64_INSN_CPOCMPGE_W_P0_P1, MEPCOP1_64_INSN_CDADD3_P0_P1, MEPCOP1_64_INSN_CPSUB3_B_P0_P1, MEPCOP1_64_INSN_CPSUB3_H_P0_P1 + , MEPCOP1_64_INSN_CPSUB3_W_P0_P1, MEPCOP1_64_INSN_CDSUB3_P0_P1, MEPCOP1_64_INSN_CPSADD3_H_P0_P1, MEPCOP1_64_INSN_CPSADD3_W_P0_P1 + , MEPCOP1_64_INSN_CPSSUB3_H_P0_P1, MEPCOP1_64_INSN_CPSSUB3_W_P0_P1, MEPCOP1_64_INSN_CPEXTUADDU3_B_P0_P1, MEPCOP1_64_INSN_CPEXTUADD3_B_P0_P1 + , MEPCOP1_64_INSN_CPEXTLADDU3_B_P0_P1, MEPCOP1_64_INSN_CPEXTLADD3_B_P0_P1, MEPCOP1_64_INSN_CPEXTUSUBU3_B_P0_P1, MEPCOP1_64_INSN_CPEXTUSUB3_B_P0_P1 + , MEPCOP1_64_INSN_CPEXTLSUBU3_B_P0_P1, MEPCOP1_64_INSN_CPEXTLSUB3_B_P0_P1, MEPCOP1_64_INSN_CPAVEU3_B_P0_P1, MEPCOP1_64_INSN_CPAVE3_B_P0_P1 + , MEPCOP1_64_INSN_CPAVE3_H_P0_P1, MEPCOP1_64_INSN_CPAVE3_W_P0_P1, MEPCOP1_64_INSN_CPADDSRU3_B_P0_P1, MEPCOP1_64_INSN_CPADDSR3_B_P0_P1 + , MEPCOP1_64_INSN_CPADDSR3_H_P0_P1, MEPCOP1_64_INSN_CPADDSR3_W_P0_P1, MEPCOP1_64_INSN_CPABSU3_B_P0_P1, MEPCOP1_64_INSN_CPABS3_B_P0_P1 + , MEPCOP1_64_INSN_CPABS3_H_P0_P1, MEPCOP1_64_INSN_CPAND3_P0_P1, MEPCOP1_64_INSN_CPOR3_P0_P1, MEPCOP1_64_INSN_CPNOR3_P0_P1 + , MEPCOP1_64_INSN_CPXOR3_P0_P1, MEPCOP1_64_INSN_CPPACKU_B_P0_P1, MEPCOP1_64_INSN_CPPACK_B_P0_P1, MEPCOP1_64_INSN_CPPACK_H_P0_P1 + , MEPCOP1_64_INSN_CPMAXU3_B_P0_P1, MEPCOP1_64_INSN_CPMAX3_B_P0_P1, MEPCOP1_64_INSN_CPMAX3_H_P0_P1, MEPCOP1_64_INSN_CPMAXU3_W_P0_P1 + , MEPCOP1_64_INSN_CPMAX3_W_P0_P1, MEPCOP1_64_INSN_CPMINU3_B_P0_P1, MEPCOP1_64_INSN_CPMIN3_B_P0_P1, MEPCOP1_64_INSN_CPMIN3_H_P0_P1 + , MEPCOP1_64_INSN_CPMINU3_W_P0_P1, MEPCOP1_64_INSN_CPMIN3_W_P0_P1, MEPCOP1_64_INSN_CPSRL3_B_P0_P1, MEPCOP1_64_INSN_CPSSRL3_B_P0_P1 + , MEPCOP1_64_INSN_CPSRL3_H_P0_P1, MEPCOP1_64_INSN_CPSSRL3_H_P0_P1, MEPCOP1_64_INSN_CPSRL3_W_P0_P1, MEPCOP1_64_INSN_CPSSRL3_W_P0_P1 + , MEPCOP1_64_INSN_CDSRL3_P0_P1, MEPCOP1_64_INSN_CPSRA3_B_P0_P1, MEPCOP1_64_INSN_CPSSRA3_B_P0_P1, MEPCOP1_64_INSN_CPSRA3_H_P0_P1 + , MEPCOP1_64_INSN_CPSSRA3_H_P0_P1, MEPCOP1_64_INSN_CPSRA3_W_P0_P1, MEPCOP1_64_INSN_CPSSRA3_W_P0_P1, MEPCOP1_64_INSN_CDSRA3_P0_P1 + , MEPCOP1_64_INSN_CPSLL3_B_P0_P1, MEPCOP1_64_INSN_CPSSLL3_B_P0_P1, MEPCOP1_64_INSN_CPSLL3_H_P0_P1, MEPCOP1_64_INSN_CPSSLL3_H_P0_P1 + , MEPCOP1_64_INSN_CPSLL3_W_P0_P1, MEPCOP1_64_INSN_CPSSLL3_W_P0_P1, MEPCOP1_64_INSN_CDSLL3_P0_P1, MEPCOP1_64_INSN_CPSLA3_H_P0_P1 + , MEPCOP1_64_INSN_CPSLA3_W_P0_P1, MEPCOP1_64_INSN_CPSRLI3_B_P0_P1, MEPCOP1_64_INSN_CPSRLI3_H_P0_P1, MEPCOP1_64_INSN_CPSRLI3_W_P0_P1 + , MEPCOP1_64_INSN_CDSRLI3_P0_P1, MEPCOP1_64_INSN_CPSRAI3_B_P0_P1, MEPCOP1_64_INSN_CPSRAI3_H_P0_P1, MEPCOP1_64_INSN_CPSRAI3_W_P0_P1 + , MEPCOP1_64_INSN_CDSRAI3_P0_P1, MEPCOP1_64_INSN_CPSLLI3_B_P0_P1, MEPCOP1_64_INSN_CPSLLI3_H_P0_P1, MEPCOP1_64_INSN_CPSLLI3_W_P0_P1 + , MEPCOP1_64_INSN_CDSLLI3_P0_P1, MEPCOP1_64_INSN_CPSLAI3_H_P0_P1, MEPCOP1_64_INSN_CPSLAI3_W_P0_P1, MEPCOP1_64_INSN_CPCLIPIU3_W_P0_P1 + , MEPCOP1_64_INSN_CPCLIPI3_W_P0_P1, MEPCOP1_64_INSN_CDCLIPIU3_P0_P1, MEPCOP1_64_INSN_CDCLIPI3_P0_P1, MEPCOP1_64_INSN_CPMOVI_H_P0_P1 + , MEPCOP1_64_INSN_CPMOVIU_W_P0_P1, MEPCOP1_64_INSN_CPMOVI_W_P0_P1, MEPCOP1_64_INSN_CDMOVIU_P0_P1, MEPCOP1_64_INSN_CDMOVI_P0_P1 + , MEPCOP1_64_INSN_C1NOP_P1, MEPCOP1_64_INSN_CPADDA1U_B_P1, MEPCOP1_64_INSN_CPADDA1_B_P1, MEPCOP1_64_INSN_CPADDUA1_H_P1 + , MEPCOP1_64_INSN_CPADDLA1_H_P1, MEPCOP1_64_INSN_CPADDACA1U_B_P1, MEPCOP1_64_INSN_CPADDACA1_B_P1, MEPCOP1_64_INSN_CPADDACUA1_H_P1 + , MEPCOP1_64_INSN_CPADDACLA1_H_P1, MEPCOP1_64_INSN_CPSUBA1U_B_P1, MEPCOP1_64_INSN_CPSUBA1_B_P1, MEPCOP1_64_INSN_CPSUBUA1_H_P1 + , MEPCOP1_64_INSN_CPSUBLA1_H_P1, MEPCOP1_64_INSN_CPSUBACA1U_B_P1, MEPCOP1_64_INSN_CPSUBACA1_B_P1, MEPCOP1_64_INSN_CPSUBACUA1_H_P1 + , MEPCOP1_64_INSN_CPSUBACLA1_H_P1, MEPCOP1_64_INSN_CPABSA1U_B_P1, MEPCOP1_64_INSN_CPABSA1_B_P1, MEPCOP1_64_INSN_CPABSUA1_H_P1 + , MEPCOP1_64_INSN_CPABSLA1_H_P1, MEPCOP1_64_INSN_CPSADA1U_B_P1, MEPCOP1_64_INSN_CPSADA1_B_P1, MEPCOP1_64_INSN_CPSADUA1_H_P1 + , MEPCOP1_64_INSN_CPSADLA1_H_P1, MEPCOP1_64_INSN_CPSETA1_H_P1, MEPCOP1_64_INSN_CPSETUA1_W_P1, MEPCOP1_64_INSN_CPSETLA1_W_P1 + , MEPCOP1_64_INSN_CPMOVA1_B_P1, MEPCOP1_64_INSN_CPMOVUA1_H_P1, MEPCOP1_64_INSN_CPMOVLA1_H_P1, MEPCOP1_64_INSN_CPMOVUUA1_W_P1 + , MEPCOP1_64_INSN_CPMOVULA1_W_P1, MEPCOP1_64_INSN_CPMOVLUA1_W_P1, MEPCOP1_64_INSN_CPMOVLLA1_W_P1, MEPCOP1_64_INSN_CPPACKA1U_B_P1 + , MEPCOP1_64_INSN_CPPACKA1_B_P1, MEPCOP1_64_INSN_CPPACKUA1_H_P1, MEPCOP1_64_INSN_CPPACKLA1_H_P1, MEPCOP1_64_INSN_CPPACKUA1_W_P1 + , MEPCOP1_64_INSN_CPPACKLA1_W_P1, MEPCOP1_64_INSN_CPMOVHUA1_W_P1, MEPCOP1_64_INSN_CPMOVHLA1_W_P1, MEPCOP1_64_INSN_CPACSUMA1_P1 + , MEPCOP1_64_INSN_CPACCPA1_P1, MEPCOP1_64_INSN_CPACSWP_P1, MEPCOP1_64_INSN_CPSRLA1_P1, MEPCOP1_64_INSN_CPSRAA1_P1 + , MEPCOP1_64_INSN_CPSLLA1_P1, MEPCOP1_64_INSN_CPSRLIA1_1_P1, MEPCOP1_64_INSN_CPSRAIA1_1_P1, MEPCOP1_64_INSN_CPSLLIA1_1_P1 + , MEPCOP1_64_INSN_CPFMULIA1S0U_B_P1, MEPCOP1_64_INSN_CPFMULIA1S0_B_P1, MEPCOP1_64_INSN_CPFMULIUA1S0_H_P1, MEPCOP1_64_INSN_CPFMULILA1S0_H_P1 + , MEPCOP1_64_INSN_CPFMADIA1S0U_B_P1, MEPCOP1_64_INSN_CPFMADIA1S0_B_P1, MEPCOP1_64_INSN_CPFMADIUA1S0_H_P1, MEPCOP1_64_INSN_CPFMADILA1S0_H_P1 + , MEPCOP1_64_INSN_CPFMULIA1S1U_B_P1, MEPCOP1_64_INSN_CPFMULIA1S1_B_P1, MEPCOP1_64_INSN_CPFMULIUA1S1_H_P1, MEPCOP1_64_INSN_CPFMULILA1S1_H_P1 + , MEPCOP1_64_INSN_CPFMADIA1S1U_B_P1, MEPCOP1_64_INSN_CPFMADIA1S1_B_P1, MEPCOP1_64_INSN_CPFMADIUA1S1_H_P1, MEPCOP1_64_INSN_CPFMADILA1S1_H_P1 + , MEPCOP1_64_INSN_CPAMULIA1U_B_P1, MEPCOP1_64_INSN_CPAMULIA1_B_P1, MEPCOP1_64_INSN_CPAMULIUA1_H_P1, MEPCOP1_64_INSN_CPAMULILA1_H_P1 + , MEPCOP1_64_INSN_CPAMADIA1U_B_P1, MEPCOP1_64_INSN_CPAMADIA1_B_P1, MEPCOP1_64_INSN_CPAMADIUA1_H_P1, MEPCOP1_64_INSN_CPAMADILA1_H_P1 + , MEPCOP1_64_INSN_CPFMULIA1U_B_P1, MEPCOP1_64_INSN_CPFMULIA1_B_P1, MEPCOP1_64_INSN_CPFMULIUA1_H_P1, MEPCOP1_64_INSN_CPFMULILA1_H_P1 + , MEPCOP1_64_INSN_CPFMADIA1U_B_P1, MEPCOP1_64_INSN_CPFMADIA1_B_P1, MEPCOP1_64_INSN_CPFMADIUA1_H_P1, MEPCOP1_64_INSN_CPFMADILA1_H_P1 + , MEPCOP1_64_INSN_CPSSQA1U_B_P1, MEPCOP1_64_INSN_CPSSQA1_B_P1, MEPCOP1_64_INSN_CPSSDA1U_B_P1, MEPCOP1_64_INSN_CPSSDA1_B_P1 + , MEPCOP1_64_INSN_CPMULA1U_B_P1, MEPCOP1_64_INSN_CPMULA1_B_P1, MEPCOP1_64_INSN_CPMULUA1_H_P1, MEPCOP1_64_INSN_CPMULLA1_H_P1 + , MEPCOP1_64_INSN_CPMULUA1U_W_P1, MEPCOP1_64_INSN_CPMULLA1U_W_P1, MEPCOP1_64_INSN_CPMULUA1_W_P1, MEPCOP1_64_INSN_CPMULLA1_W_P1 + , MEPCOP1_64_INSN_CPMADA1U_B_P1, MEPCOP1_64_INSN_CPMADA1_B_P1, MEPCOP1_64_INSN_CPMADUA1_H_P1, MEPCOP1_64_INSN_CPMADLA1_H_P1 + , MEPCOP1_64_INSN_CPMADUA1U_W_P1, MEPCOP1_64_INSN_CPMADLA1U_W_P1, MEPCOP1_64_INSN_CPMADUA1_W_P1, MEPCOP1_64_INSN_CPMADLA1_W_P1 + , MEPCOP1_64_INSN_CPMSBUA1_H_P1, MEPCOP1_64_INSN_CPMSBLA1_H_P1, MEPCOP1_64_INSN_CPMSBUA1U_W_P1, MEPCOP1_64_INSN_CPMSBLA1U_W_P1 + , MEPCOP1_64_INSN_CPMSBUA1_W_P1, MEPCOP1_64_INSN_CPMSBLA1_W_P1, MEPCOP1_64_INSN_CPSMADUA1_H_P1, MEPCOP1_64_INSN_CPSMADLA1_H_P1 + , MEPCOP1_64_INSN_CPSMADUA1_W_P1, MEPCOP1_64_INSN_CPSMADLA1_W_P1, MEPCOP1_64_INSN_CPSMSBUA1_H_P1, MEPCOP1_64_INSN_CPSMSBLA1_H_P1 + , MEPCOP1_64_INSN_CPSMSBUA1_W_P1, MEPCOP1_64_INSN_CPSMSBLA1_W_P1, MEPCOP1_64_INSN_CPMULSLUA1_H_P1, MEPCOP1_64_INSN_CPMULSLLA1_H_P1 + , MEPCOP1_64_INSN_CPMULSLUA1_W_P1, MEPCOP1_64_INSN_CPMULSLLA1_W_P1, MEPCOP1_64_INSN_CPSMADSLUA1_H_P1, MEPCOP1_64_INSN_CPSMADSLLA1_H_P1 + , MEPCOP1_64_INSN_CPSMADSLUA1_W_P1, MEPCOP1_64_INSN_CPSMADSLLA1_W_P1, MEPCOP1_64_INSN_CPSMSBSLUA1_H_P1, MEPCOP1_64_INSN_CPSMSBSLLA1_H_P1 + , MEPCOP1_64_INSN_CPSMSBSLUA1_W_P1, MEPCOP1_64_INSN_CPSMSBSLLA1_W_P1 +} MEPCOP1_64_INSN_TYPE; + + +// Forward decls. +struct mep_ext1_cpu; +struct mepcop1_64_scache; +typedef sem_status (mepcop1_64_sem_fn) (mep_ext1_cpu* cpu, mepcop1_64_scache* sem); + + +// Instruction descriptor. + +struct mepcop1_64_idesc { + + // scache engine executor for this insn + mepcop1_64_sem_fn* execute; + + const char* insn_name; + enum mepcop1_64_insn_type sem_index; + mep_insn_attr attrs; + + // idesc table: indexed by sem_index + static mepcop1_64_idesc idesc_table[]; + + static mepcop1_64_insn_type lookup_virtual (virtual_insn_type vit); +}; + +// Instruction argument buffer. + +union mepcop1_64_sem_fields { + struct { /* no operands */ + int empty; + } fmt_empty; + struct { /* */ + UINT f_ivc2_5u13; + UINT f_ivc2_imm16p0; + } sfmt_cpmoviu_w_P0_P1; + struct { /* */ + INT f_ivc2_simm16p0; + UINT f_ivc2_5u13; + } sfmt_cpmovi_h_P0_P1; + struct { /* */ + UINT f_ivc2_5u13; + UINT f_ivc2_5u23; + UINT f_ivc2_6u2; + } sfmt_cdsrli3_P0_P1; + struct { /* */ + UINT f_ivc2_5u13; + UINT f_ivc2_5u23; + UINT f_ivc2_5u3; + } sfmt_cpsrli3_w_P0_P1; + struct { /* */ + UINT f_ivc2_4u4; + UINT f_ivc2_5u13; + UINT f_ivc2_5u23; + } sfmt_cpsrli3_h_P0_P1; + struct { /* */ + INT f_ivc2_8s0; + UINT f_ivc2_3u25; + UINT f_ivc2_5u13; + UINT f_ivc2_5u18; + } sfmt_cpfmulia1u_b_P1; + struct { /* */ + UINT f_ivc2_3u5; + UINT f_ivc2_5u13; + UINT f_ivc2_5u18; + UINT f_ivc2_5u23; + } sfmt_cpfsftbi_P0_P1; + // This one is for chain/cti-chain virtual insns. + struct { + // Number of insns in pbb. + unsigned insn_count; + // This is used by chain insns and by untaken conditional branches. + mepcop1_64_scache* next; + mepcop1_64_scache* branch_target; + } chain; + // This one is for `before' virtual insns. + struct { + // The cache entry of the real insn. + mepcop1_64_scache* insn; + } before; +}; + +// Simulator instruction cache. + +struct mepcop1_64_scache { + // executor + union { + cgoto_label cgoto; + mepcop1_64_sem_fn* fn; + } execute; + + // PC of this instruction. + PCADDR addr; + + // instruction class + mepcop1_64_idesc* idesc; + + // argument buffer + mepcop1_64_sem_fields fields; + + + // writeback flags + // Only used if profiling or parallel execution support enabled during + // file generation. + unsigned long long written; + + + // decode given instruction + void decode (mep_ext1_cpu* current_cpu, PCADDR pc, mepcop1_64_insn_word base_insn, mepcop1_64_insn_word entire_insn); +}; + +} // end mep_ext1 namespace + +// Decls of each semantic fn. + +using mep_ext1::mepcop1_64_sem_fn; +extern mepcop1_64_sem_fn mepcop1_64_sem_x_invalid; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpadd3_b_P0S_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpadd3_h_P0S_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpadd3_w_P0S_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpunpacku_b_P0S_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpunpacku_h_P0S_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpunpacku_w_P0S_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpunpackl_b_P0S_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpunpackl_h_P0S_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpunpackl_w_P0S_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpsel_P0S_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpfsftbs0_P0S_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpfsftbs1_P0S_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpmov_P0S_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpabsz_b_P0S_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpabsz_h_P0S_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpabsz_w_P0S_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpldz_h_P0S_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpldz_w_P0S_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpnorm_h_P0S_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpnorm_w_P0S_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cphaddu_b_P0S_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cphadd_b_P0S_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cphadd_h_P0S_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cphadd_w_P0S_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpccadd_b_P0S_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpbcast_b_P0S_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpbcast_h_P0S_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpbcast_w_P0S_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpextuu_b_P0S_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpextu_b_P0S_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpextuu_h_P0S_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpextu_h_P0S_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpextlu_b_P0S_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpextl_b_P0S_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpextlu_h_P0S_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpextl_h_P0S_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpcastub_h_P0S_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpcastb_h_P0S_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpcastub_w_P0S_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpcastb_w_P0S_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpcastuh_w_P0S_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpcasth_w_P0S_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cdcastuw_P0S_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cdcastw_P0S_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpmovfrcsar0_P0S_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpmovfrcsar1_P0S_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpmovfrcc_P0S_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpmovtocsar0_P0S_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpmovtocsar1_P0S_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpmovtocc_P0S_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpcmpeqz_b_P0S_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpcmpeq_b_P0S_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpcmpeq_h_P0S_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpcmpeq_w_P0S_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpcmpne_b_P0S_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpcmpne_h_P0S_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpcmpne_w_P0S_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpcmpgtu_b_P0S_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpcmpgt_b_P0S_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpcmpgt_h_P0S_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpcmpgtu_w_P0S_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpcmpgt_w_P0S_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpcmpgeu_b_P0S_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpcmpge_b_P0S_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpcmpge_h_P0S_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpcmpgeu_w_P0S_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpcmpge_w_P0S_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpfsftbi_P0_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpacmpeq_b_P0_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpacmpeq_h_P0_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpacmpeq_w_P0_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpacmpne_b_P0_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpacmpne_h_P0_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpacmpne_w_P0_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpacmpgtu_b_P0_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpacmpgt_b_P0_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpacmpgt_h_P0_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpacmpgtu_w_P0_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpacmpgt_w_P0_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpacmpgeu_b_P0_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpacmpge_b_P0_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpacmpge_h_P0_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpacmpgeu_w_P0_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpacmpge_w_P0_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpocmpeq_b_P0_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpocmpeq_h_P0_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpocmpeq_w_P0_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpocmpne_b_P0_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpocmpne_h_P0_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpocmpne_w_P0_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpocmpgtu_b_P0_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpocmpgt_b_P0_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpocmpgt_h_P0_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpocmpgtu_w_P0_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpocmpgt_w_P0_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpocmpgeu_b_P0_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpocmpge_b_P0_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpocmpge_h_P0_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpocmpgeu_w_P0_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpocmpge_w_P0_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cdadd3_P0_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpsub3_b_P0_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpsub3_h_P0_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpsub3_w_P0_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cdsub3_P0_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpsadd3_h_P0_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpsadd3_w_P0_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpssub3_h_P0_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpssub3_w_P0_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpextuaddu3_b_P0_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpextuadd3_b_P0_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpextladdu3_b_P0_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpextladd3_b_P0_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpextusubu3_b_P0_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpextusub3_b_P0_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpextlsubu3_b_P0_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpextlsub3_b_P0_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpaveu3_b_P0_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpave3_b_P0_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpave3_h_P0_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpave3_w_P0_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpaddsru3_b_P0_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpaddsr3_b_P0_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpaddsr3_h_P0_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpaddsr3_w_P0_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpabsu3_b_P0_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpabs3_b_P0_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpabs3_h_P0_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpand3_P0_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpor3_P0_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpnor3_P0_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpxor3_P0_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cppacku_b_P0_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cppack_b_P0_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cppack_h_P0_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpmaxu3_b_P0_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpmax3_b_P0_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpmax3_h_P0_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpmaxu3_w_P0_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpmax3_w_P0_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpminu3_b_P0_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpmin3_b_P0_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpmin3_h_P0_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpminu3_w_P0_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpmin3_w_P0_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpsrl3_b_P0_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpssrl3_b_P0_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpsrl3_h_P0_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpssrl3_h_P0_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpsrl3_w_P0_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpssrl3_w_P0_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cdsrl3_P0_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpsra3_b_P0_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpssra3_b_P0_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpsra3_h_P0_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpssra3_h_P0_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpsra3_w_P0_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpssra3_w_P0_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cdsra3_P0_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpsll3_b_P0_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpssll3_b_P0_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpsll3_h_P0_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpssll3_h_P0_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpsll3_w_P0_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpssll3_w_P0_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cdsll3_P0_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpsla3_h_P0_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpsla3_w_P0_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpsrli3_b_P0_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpsrli3_h_P0_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpsrli3_w_P0_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cdsrli3_P0_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpsrai3_b_P0_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpsrai3_h_P0_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpsrai3_w_P0_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cdsrai3_P0_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpslli3_b_P0_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpslli3_h_P0_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpslli3_w_P0_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cdslli3_P0_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpslai3_h_P0_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpslai3_w_P0_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpclipiu3_w_P0_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpclipi3_w_P0_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cdclipiu3_P0_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cdclipi3_P0_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpmovi_h_P0_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpmoviu_w_P0_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpmovi_w_P0_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cdmoviu_P0_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cdmovi_P0_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_c1nop_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpadda1u_b_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpadda1_b_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpaddua1_h_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpaddla1_h_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpaddaca1u_b_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpaddaca1_b_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpaddacua1_h_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpaddacla1_h_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpsuba1u_b_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpsuba1_b_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpsubua1_h_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpsubla1_h_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpsubaca1u_b_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpsubaca1_b_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpsubacua1_h_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpsubacla1_h_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpabsa1u_b_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpabsa1_b_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpabsua1_h_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpabsla1_h_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpsada1u_b_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpsada1_b_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpsadua1_h_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpsadla1_h_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpseta1_h_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpsetua1_w_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpsetla1_w_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpmova1_b_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpmovua1_h_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpmovla1_h_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpmovuua1_w_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpmovula1_w_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpmovlua1_w_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpmovlla1_w_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cppacka1u_b_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cppacka1_b_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cppackua1_h_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cppackla1_h_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cppackua1_w_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cppackla1_w_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpmovhua1_w_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpmovhla1_w_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpacsuma1_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpaccpa1_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpacswp_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpsrla1_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpsraa1_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpslla1_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpsrlia1_1_p1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpsraia1_1_p1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpsllia1_1_p1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpfmulia1s0u_b_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpfmulia1s0_b_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpfmuliua1s0_h_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpfmulila1s0_h_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpfmadia1s0u_b_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpfmadia1s0_b_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpfmadiua1s0_h_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpfmadila1s0_h_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpfmulia1s1u_b_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpfmulia1s1_b_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpfmuliua1s1_h_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpfmulila1s1_h_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpfmadia1s1u_b_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpfmadia1s1_b_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpfmadiua1s1_h_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpfmadila1s1_h_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpamulia1u_b_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpamulia1_b_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpamuliua1_h_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpamulila1_h_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpamadia1u_b_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpamadia1_b_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpamadiua1_h_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpamadila1_h_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpfmulia1u_b_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpfmulia1_b_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpfmuliua1_h_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpfmulila1_h_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpfmadia1u_b_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpfmadia1_b_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpfmadiua1_h_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpfmadila1_h_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpssqa1u_b_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpssqa1_b_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpssda1u_b_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpssda1_b_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpmula1u_b_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpmula1_b_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpmulua1_h_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpmulla1_h_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpmulua1u_w_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpmulla1u_w_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpmulua1_w_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpmulla1_w_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpmada1u_b_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpmada1_b_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpmadua1_h_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpmadla1_h_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpmadua1u_w_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpmadla1u_w_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpmadua1_w_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpmadla1_w_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpmsbua1_h_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpmsbla1_h_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpmsbua1u_w_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpmsbla1u_w_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpmsbua1_w_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpmsbla1_w_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpsmadua1_h_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpsmadla1_h_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpsmadua1_w_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpsmadla1_w_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpsmsbua1_h_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpsmsbla1_h_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpsmsbua1_w_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpsmsbla1_w_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpmulslua1_h_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpmulslla1_h_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpmulslua1_w_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpmulslla1_w_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpsmadslua1_h_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpsmadslla1_h_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpsmadslua1_w_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpsmadslla1_w_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpsmsbslua1_h_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpsmsbslla1_h_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpsmsbslua1_w_P1; +extern mepcop1_64_sem_fn mepcop1_64_sem_cpsmsbslla1_w_P1; + +#endif /* MEPCOP1_64_DECODE_H */ diff --git a/sid/component/cgen-cpu/mep/mep-cop1-64-defs.h b/sid/component/cgen-cpu/mep/mep-cop1-64-defs.h new file mode 100644 index 0000000000..fc9ca7388a --- /dev/null +++ b/sid/component/cgen-cpu/mep/mep-cop1-64-defs.h @@ -0,0 +1,16 @@ +/* CPU family header for mep_ext1 / mepcop1_64. + +THIS FILE IS MACHINE GENERATED WITH CGEN. + +Copyright (C) 2000-2007 Red Hat, Inc. + +This file is part of the Red Hat simulators. + + +*/ + +#ifndef DEFS_MEPCOP1_64_H +#define DEFS_MEPCOP1_64_H + + +#endif /* DEFS_MEPCOP1_64_H */ diff --git a/sid/component/cgen-cpu/mep/mep-cop1-64-model.cxx b/sid/component/cgen-cpu/mep/mep-cop1-64-model.cxx new file mode 100644 index 0000000000..7c82af32a8 --- /dev/null +++ b/sid/component/cgen-cpu/mep/mep-cop1-64-model.cxx @@ -0,0 +1,9989 @@ +/* Simulator model support for mepcop1_64. + +THIS FILE IS MACHINE GENERATED WITH CGEN. + +Copyright (C) 2000-2007 Red Hat, Inc. + +This file is part of the Red Hat simulators. + + +*/ + + +#if HAVE_CONFIG_H +#include "config.h" +#endif +#include "mep_ext1.h" + +using namespace mep_ext1; // FIXME: namespace organization still wip + +/* The profiling data is recorded here, but is accessed via the profiling + mechanism. After all, this is information for profiling. */ + +/* Model handlers for each insn. */ + +mepcop1_64_mep_model::mepcop1_64_mep_model (mep_ext1_cpu *cpu) + : cgen_model (cpu) +{ +} + +UINT +mepcop1_64_mep_model::model_cpadd3_b_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpadd3_b_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpadd3_h_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpadd3_h_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpadd3_w_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpadd3_w_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpunpacku_b_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpunpacku_b_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpunpacku_h_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpunpacku_h_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpunpacku_w_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpunpacku_w_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpunpackl_b_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpunpackl_b_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpunpackl_h_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpunpackl_h_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpunpackl_w_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpunpackl_w_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpsel_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpsel_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpfsftbs0_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpfsftbs0_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpfsftbs1_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpfsftbs1_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpmov_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpmov_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpabsz_b_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpabsz_b_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpabsz_h_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpabsz_h_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpabsz_w_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpabsz_w_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpldz_h_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpldz_h_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpldz_w_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpldz_w_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpnorm_h_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpnorm_h_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpnorm_w_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpnorm_w_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cphaddu_b_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cphaddu_b_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cphadd_b_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cphadd_b_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cphadd_h_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cphadd_h_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cphadd_w_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cphadd_w_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpccadd_b_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpmoviu_w_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpccadd_b_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpmoviu_w_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpbcast_b_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpbcast_b_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpbcast_h_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpbcast_h_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpbcast_w_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpbcast_w_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpextuu_b_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpextuu_b_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpextu_b_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpextu_b_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpextuu_h_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpextuu_h_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpextu_h_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpextu_h_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpextlu_b_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpextlu_b_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpextl_b_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpextl_b_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpextlu_h_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpextlu_h_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpextl_h_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpextl_h_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpcastub_h_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpcastub_h_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpcastb_h_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpcastb_h_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpcastub_w_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpcastub_w_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpcastb_w_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpcastb_w_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpcastuh_w_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpcastuh_w_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpcasth_w_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpcasth_w_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cdcastuw_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cdcastuw_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cdcastw_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cdcastw_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpmovfrcsar0_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpmovfrcsar0_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpmovfrcsar1_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpmovfrcsar1_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpmovfrcc_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpmovfrcc_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpmovtocsar0_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpmoviu_w_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpmovtocsar0_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpmoviu_w_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpmovtocsar1_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpmoviu_w_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpmovtocsar1_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpmoviu_w_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpmovtocc_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpmoviu_w_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpmovtocc_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpmoviu_w_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpcmpeqz_b_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpcmpeqz_b_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpcmpeq_b_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpcmpeq_b_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpcmpeq_h_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpcmpeq_h_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpcmpeq_w_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpcmpeq_w_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpcmpne_b_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpcmpne_b_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpcmpne_h_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpcmpne_h_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpcmpne_w_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpcmpne_w_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpcmpgtu_b_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpcmpgtu_b_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpcmpgt_b_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpcmpgt_b_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpcmpgt_h_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpcmpgt_h_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpcmpgtu_w_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpcmpgtu_w_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpcmpgt_w_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpcmpgt_w_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpcmpgeu_b_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpcmpgeu_b_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpcmpge_b_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpcmpge_b_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpcmpge_h_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpcmpge_h_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpcmpgeu_w_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpcmpgeu_w_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpcmpge_w_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpcmpge_w_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpfsftbi_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpfsftbi_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpacmpeq_b_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpacmpeq_b_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpacmpeq_h_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpacmpeq_h_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpacmpeq_w_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpacmpeq_w_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpacmpne_b_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpacmpne_b_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpacmpne_h_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpacmpne_h_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpacmpne_w_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpacmpne_w_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpacmpgtu_b_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpacmpgtu_b_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpacmpgt_b_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpacmpgt_b_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpacmpgt_h_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpacmpgt_h_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpacmpgtu_w_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpacmpgtu_w_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpacmpgt_w_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpacmpgt_w_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpacmpgeu_b_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpacmpgeu_b_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpacmpge_b_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpacmpge_b_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpacmpge_h_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpacmpge_h_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpacmpgeu_w_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpacmpgeu_w_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpacmpge_w_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpacmpge_w_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpocmpeq_b_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpocmpeq_b_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpocmpeq_h_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpocmpeq_h_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpocmpeq_w_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpocmpeq_w_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpocmpne_b_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpocmpne_b_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpocmpne_h_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpocmpne_h_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpocmpne_w_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpocmpne_w_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpocmpgtu_b_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpocmpgtu_b_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpocmpgt_b_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpocmpgt_b_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpocmpgt_h_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpocmpgt_h_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpocmpgtu_w_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpocmpgtu_w_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpocmpgt_w_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpocmpgt_w_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpocmpgeu_b_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpocmpgeu_b_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpocmpge_b_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpocmpge_b_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpocmpge_h_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpocmpge_h_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpocmpgeu_w_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpocmpgeu_w_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpocmpge_w_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpocmpge_w_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cdadd3_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cdadd3_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpsub3_b_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpsub3_b_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpsub3_h_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpsub3_h_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpsub3_w_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpsub3_w_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cdsub3_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cdsub3_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpsadd3_h_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpsadd3_h_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpsadd3_w_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpsadd3_w_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpssub3_h_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpssub3_h_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpssub3_w_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpssub3_w_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpextuaddu3_b_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpextuaddu3_b_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpextuadd3_b_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpextuadd3_b_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpextladdu3_b_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpextladdu3_b_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpextladd3_b_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpextladd3_b_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpextusubu3_b_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpextusubu3_b_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpextusub3_b_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpextusub3_b_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpextlsubu3_b_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpextlsubu3_b_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpextlsub3_b_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpextlsub3_b_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpaveu3_b_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpaveu3_b_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpave3_b_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpave3_b_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpave3_h_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpave3_h_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpave3_w_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpave3_w_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpaddsru3_b_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpaddsru3_b_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpaddsr3_b_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpaddsr3_b_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpaddsr3_h_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpaddsr3_h_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpaddsr3_w_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpaddsr3_w_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpabsu3_b_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpabsu3_b_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpabs3_b_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpabs3_b_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpabs3_h_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpabs3_h_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpand3_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpand3_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpor3_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpor3_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpnor3_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpnor3_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpxor3_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpxor3_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cppacku_b_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cppacku_b_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cppack_b_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cppack_b_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cppack_h_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cppack_h_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpmaxu3_b_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpmaxu3_b_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpmax3_b_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpmax3_b_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpmax3_h_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpmax3_h_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpmaxu3_w_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpmaxu3_w_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpmax3_w_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpmax3_w_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpminu3_b_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpminu3_b_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpmin3_b_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpmin3_b_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpmin3_h_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpmin3_h_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpminu3_w_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpminu3_w_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpmin3_w_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpmin3_w_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpsrl3_b_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpsrl3_b_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpssrl3_b_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpssrl3_b_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpsrl3_h_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpsrl3_h_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpssrl3_h_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpssrl3_h_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpsrl3_w_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpsrl3_w_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpssrl3_w_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpssrl3_w_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cdsrl3_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cdsrl3_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpsra3_b_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpsra3_b_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpssra3_b_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpssra3_b_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpsra3_h_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpsra3_h_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpssra3_h_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpssra3_h_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpsra3_w_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpsra3_w_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpssra3_w_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpssra3_w_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cdsra3_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cdsra3_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpsll3_b_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpsll3_b_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpssll3_b_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpssll3_b_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpsll3_h_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpsll3_h_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpssll3_h_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpssll3_h_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpsll3_w_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpsll3_w_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpssll3_w_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpssll3_w_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cdsll3_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cdsll3_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpsla3_h_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpsla3_h_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpsla3_w_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpsla3_w_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpsrli3_b_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpsrli3_b_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpsrli3_h_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpsrli3_h_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpsrli3_h_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpsrli3_h_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpsrli3_w_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpsrli3_w_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpsrli3_w_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpsrli3_w_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cdsrli3_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cdsrli3_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpsrai3_b_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpsrai3_b_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpsrai3_h_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpsrli3_h_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpsrai3_h_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpsrli3_h_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpsrai3_w_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpsrli3_w_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpsrai3_w_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpsrli3_w_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cdsrai3_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cdsrai3_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpslli3_b_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpslli3_b_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpslli3_h_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpsrli3_h_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpslli3_h_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpsrli3_h_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpslli3_w_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpsrli3_w_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpslli3_w_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpsrli3_w_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cdslli3_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cdslli3_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpslai3_h_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpsrli3_h_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpslai3_h_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpsrli3_h_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpslai3_w_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpsrli3_w_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpslai3_w_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpsrli3_w_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpclipiu3_w_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpsrli3_w_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpclipiu3_w_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpsrli3_w_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpclipi3_w_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpsrli3_w_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpclipi3_w_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpsrli3_w_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cdclipiu3_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cdclipiu3_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cdclipi3_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cdclipi3_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpmovi_h_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpmovi_h_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpmovi_h_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpmovi_h_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpmoviu_w_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpmoviu_w_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpmoviu_w_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpmoviu_w_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpmovi_w_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpmovi_h_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpmovi_w_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpmovi_h_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cdmoviu_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpmoviu_w_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cdmoviu_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpmoviu_w_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cdmovi_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpmovi_h_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cdmovi_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpmovi_h_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_c1nop_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.fmt_empty.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_c1nop_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.fmt_empty.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpadda1u_b_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpadda1u_b_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpadda1_b_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpadda1_b_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpaddua1_h_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpaddua1_h_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpaddla1_h_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpaddla1_h_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpaddaca1u_b_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpaddaca1u_b_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpaddaca1_b_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpaddaca1_b_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpaddacua1_h_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpaddacua1_h_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpaddacla1_h_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpaddacla1_h_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpsuba1u_b_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpsuba1u_b_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpsuba1_b_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpsuba1_b_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpsubua1_h_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpsubua1_h_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpsubla1_h_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpsubla1_h_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpsubaca1u_b_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpsubaca1u_b_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpsubaca1_b_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpsubaca1_b_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpsubacua1_h_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpsubacua1_h_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpsubacla1_h_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpsubacla1_h_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpabsa1u_b_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpabsa1u_b_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpabsa1_b_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpabsa1_b_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpabsua1_h_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpabsua1_h_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpabsla1_h_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpabsla1_h_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpsada1u_b_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpsada1u_b_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpsada1_b_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpsada1_b_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpsadua1_h_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpsadua1_h_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpsadla1_h_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpsadla1_h_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpseta1_h_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpseta1_h_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpsetua1_w_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpsetua1_w_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpsetla1_w_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpsetla1_w_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpmova1_b_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpmova1_b_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpmovua1_h_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpmovua1_h_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpmovla1_h_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpmovla1_h_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpmovuua1_w_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpmovuua1_w_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpmovula1_w_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpmovula1_w_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpmovlua1_w_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpmovlua1_w_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpmovlla1_w_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpmovlla1_w_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cppacka1u_b_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cppacka1u_b_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cppacka1_b_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cppacka1_b_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cppackua1_h_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cppackua1_h_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cppackla1_h_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cppackla1_h_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cppackua1_w_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cppackua1_w_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cppackla1_w_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cppackla1_w_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpmovhua1_w_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpmovhua1_w_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpmovhla1_w_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpmovhla1_w_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpacsuma1_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.fmt_empty.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpacsuma1_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.fmt_empty.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpaccpa1_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.fmt_empty.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpaccpa1_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.fmt_empty.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpacswp_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.fmt_empty.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpacswp_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.fmt_empty.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpsrla1_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpmoviu_w_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpsrla1_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpmoviu_w_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpsraa1_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpmoviu_w_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpsraa1_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpmoviu_w_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpslla1_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpmoviu_w_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpslla1_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpmoviu_w_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpsrlia1_1_p1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpsrlia1_1_p1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpsraia1_1_p1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpsraia1_1_p1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpsllia1_1_p1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpsllia1_1_p1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_P0_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpfmulia1s0u_b_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpfmulia1s0u_b_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpfmulia1s0_b_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpfmulia1s0_b_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpfmuliua1s0_h_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpfmuliua1s0_h_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpfmulila1s0_h_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpfmulila1s0_h_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpfmadia1s0u_b_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpfmadia1s0u_b_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpfmadia1s0_b_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpfmadia1s0_b_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpfmadiua1s0_h_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpfmadiua1s0_h_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpfmadila1s0_h_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpfmadila1s0_h_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpfmulia1s1u_b_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpfmulia1s1u_b_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpfmulia1s1_b_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpfmulia1s1_b_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpfmuliua1s1_h_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpfmuliua1s1_h_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpfmulila1s1_h_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpfmulila1s1_h_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpfmadia1s1u_b_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpfmadia1s1u_b_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpfmadia1s1_b_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpfmadia1s1_b_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpfmadiua1s1_h_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpfmadiua1s1_h_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpfmadila1s1_h_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpfmadila1s1_h_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpamulia1u_b_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpamulia1u_b_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpamulia1_b_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpamulia1_b_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpamuliua1_h_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpamuliua1_h_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpamulila1_h_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpamulila1_h_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpamadia1u_b_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpamadia1u_b_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpamadia1_b_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpamadia1_b_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpamadiua1_h_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpamadiua1_h_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpamadila1_h_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpamadila1_h_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpfmulia1u_b_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpfmulia1u_b_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpfmulia1_b_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpfmulia1_b_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpfmuliua1_h_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpfmuliua1_h_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpfmulila1_h_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpfmulila1_h_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpfmadia1u_b_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpfmadia1u_b_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpfmadia1_b_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpfmadia1_b_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpfmadiua1_h_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpfmadiua1_h_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpfmadila1_h_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpfmadila1_h_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpssqa1u_b_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpssqa1u_b_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpssqa1_b_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpssqa1_b_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpssda1u_b_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpssda1u_b_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpssda1_b_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpssda1_b_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpmula1u_b_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpmula1u_b_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpmula1_b_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpmula1_b_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpmulua1_h_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpmulua1_h_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpmulla1_h_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpmulla1_h_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpmulua1u_w_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpmulua1u_w_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpmulla1u_w_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpmulla1u_w_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpmulua1_w_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpmulua1_w_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpmulla1_w_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpmulla1_w_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpmada1u_b_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpmada1u_b_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpmada1_b_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpmada1_b_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpmadua1_h_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpmadua1_h_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpmadla1_h_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpmadla1_h_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpmadua1u_w_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpmadua1u_w_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpmadla1u_w_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpmadla1u_w_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpmadua1_w_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpmadua1_w_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpmadla1_w_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpmadla1_w_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpmsbua1_h_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpmsbua1_h_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpmsbla1_h_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpmsbla1_h_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpmsbua1u_w_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpmsbua1u_w_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpmsbla1u_w_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpmsbla1u_w_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpmsbua1_w_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpmsbua1_w_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpmsbla1_w_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpmsbla1_w_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpsmadua1_h_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpsmadua1_h_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpsmadla1_h_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpsmadla1_h_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpsmadua1_w_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpsmadua1_w_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpsmadla1_w_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpsmadla1_w_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpsmsbua1_h_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpsmsbua1_h_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpsmsbla1_h_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpsmsbla1_h_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpsmsbua1_w_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpsmsbua1_w_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpsmsbla1_w_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpsmsbla1_w_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpmulslua1_h_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpmulslua1_h_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpmulslla1_h_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpmulslla1_h_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpmulslua1_w_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpmulslua1_w_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpmulslla1_w_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpmulslla1_w_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpsmadslua1_h_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpsmadslua1_h_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpsmadslla1_h_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpsmadslla1_h_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpsmadslua1_w_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpsmadslua1_w_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpsmadslla1_w_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpsmadslla1_w_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpsmsbslua1_h_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpsmsbslua1_h_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpsmsbslla1_h_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpsmsbslla1_h_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpsmsbslua1_w_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpsmsbslua1_w_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpsmsbslla1_w_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + cycles += model_u_exec_before (current_cpu, idesc, 0); + } + return cycles; +#undef FLD +} + +UINT +mepcop1_64_mep_model::model_cpsmsbslla1_w_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + const mepcop1_64_scache* abuf = sem; + const mepcop1_64_idesc* idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + unsigned long long insn_referenced = abuf->written; + cycles += model_u_exec_after (current_cpu, idesc, 0, referenced); + } + return cycles; +#undef FLD +} + +/* We assume UNIT_NONE == 0 because the tables don't always terminate + entries with it. */ + +/* Model timing data for `mep'. */ + +const mepcop1_64_mep_model::insn_timing mepcop1_64_mep_model::timing[] = { + { MEPCOP1_64_INSN_X_INVALID, 0, 0, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPADD3_B_P0S_P1, & mepcop1_64_mep_model::model_cpadd3_b_P0S_P1_before, & mepcop1_64_mep_model::model_cpadd3_b_P0S_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPADD3_H_P0S_P1, & mepcop1_64_mep_model::model_cpadd3_h_P0S_P1_before, & mepcop1_64_mep_model::model_cpadd3_h_P0S_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPADD3_W_P0S_P1, & mepcop1_64_mep_model::model_cpadd3_w_P0S_P1_before, & mepcop1_64_mep_model::model_cpadd3_w_P0S_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPUNPACKU_B_P0S_P1, & mepcop1_64_mep_model::model_cpunpacku_b_P0S_P1_before, & mepcop1_64_mep_model::model_cpunpacku_b_P0S_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPUNPACKU_H_P0S_P1, & mepcop1_64_mep_model::model_cpunpacku_h_P0S_P1_before, & mepcop1_64_mep_model::model_cpunpacku_h_P0S_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPUNPACKU_W_P0S_P1, & mepcop1_64_mep_model::model_cpunpacku_w_P0S_P1_before, & mepcop1_64_mep_model::model_cpunpacku_w_P0S_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPUNPACKL_B_P0S_P1, & mepcop1_64_mep_model::model_cpunpackl_b_P0S_P1_before, & mepcop1_64_mep_model::model_cpunpackl_b_P0S_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPUNPACKL_H_P0S_P1, & mepcop1_64_mep_model::model_cpunpackl_h_P0S_P1_before, & mepcop1_64_mep_model::model_cpunpackl_h_P0S_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPUNPACKL_W_P0S_P1, & mepcop1_64_mep_model::model_cpunpackl_w_P0S_P1_before, & mepcop1_64_mep_model::model_cpunpackl_w_P0S_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPSEL_P0S_P1, & mepcop1_64_mep_model::model_cpsel_P0S_P1_before, & mepcop1_64_mep_model::model_cpsel_P0S_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPFSFTBS0_P0S_P1, & mepcop1_64_mep_model::model_cpfsftbs0_P0S_P1_before, & mepcop1_64_mep_model::model_cpfsftbs0_P0S_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPFSFTBS1_P0S_P1, & mepcop1_64_mep_model::model_cpfsftbs1_P0S_P1_before, & mepcop1_64_mep_model::model_cpfsftbs1_P0S_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPMOV_P0S_P1, & mepcop1_64_mep_model::model_cpmov_P0S_P1_before, & mepcop1_64_mep_model::model_cpmov_P0S_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPABSZ_B_P0S_P1, & mepcop1_64_mep_model::model_cpabsz_b_P0S_P1_before, & mepcop1_64_mep_model::model_cpabsz_b_P0S_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPABSZ_H_P0S_P1, & mepcop1_64_mep_model::model_cpabsz_h_P0S_P1_before, & mepcop1_64_mep_model::model_cpabsz_h_P0S_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPABSZ_W_P0S_P1, & mepcop1_64_mep_model::model_cpabsz_w_P0S_P1_before, & mepcop1_64_mep_model::model_cpabsz_w_P0S_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPLDZ_H_P0S_P1, & mepcop1_64_mep_model::model_cpldz_h_P0S_P1_before, & mepcop1_64_mep_model::model_cpldz_h_P0S_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPLDZ_W_P0S_P1, & mepcop1_64_mep_model::model_cpldz_w_P0S_P1_before, & mepcop1_64_mep_model::model_cpldz_w_P0S_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPNORM_H_P0S_P1, & mepcop1_64_mep_model::model_cpnorm_h_P0S_P1_before, & mepcop1_64_mep_model::model_cpnorm_h_P0S_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPNORM_W_P0S_P1, & mepcop1_64_mep_model::model_cpnorm_w_P0S_P1_before, & mepcop1_64_mep_model::model_cpnorm_w_P0S_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPHADDU_B_P0S_P1, & mepcop1_64_mep_model::model_cphaddu_b_P0S_P1_before, & mepcop1_64_mep_model::model_cphaddu_b_P0S_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPHADD_B_P0S_P1, & mepcop1_64_mep_model::model_cphadd_b_P0S_P1_before, & mepcop1_64_mep_model::model_cphadd_b_P0S_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPHADD_H_P0S_P1, & mepcop1_64_mep_model::model_cphadd_h_P0S_P1_before, & mepcop1_64_mep_model::model_cphadd_h_P0S_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPHADD_W_P0S_P1, & mepcop1_64_mep_model::model_cphadd_w_P0S_P1_before, & mepcop1_64_mep_model::model_cphadd_w_P0S_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPCCADD_B_P0S_P1, & mepcop1_64_mep_model::model_cpccadd_b_P0S_P1_before, & mepcop1_64_mep_model::model_cpccadd_b_P0S_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPBCAST_B_P0S_P1, & mepcop1_64_mep_model::model_cpbcast_b_P0S_P1_before, & mepcop1_64_mep_model::model_cpbcast_b_P0S_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPBCAST_H_P0S_P1, & mepcop1_64_mep_model::model_cpbcast_h_P0S_P1_before, & mepcop1_64_mep_model::model_cpbcast_h_P0S_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPBCAST_W_P0S_P1, & mepcop1_64_mep_model::model_cpbcast_w_P0S_P1_before, & mepcop1_64_mep_model::model_cpbcast_w_P0S_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPEXTUU_B_P0S_P1, & mepcop1_64_mep_model::model_cpextuu_b_P0S_P1_before, & mepcop1_64_mep_model::model_cpextuu_b_P0S_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPEXTU_B_P0S_P1, & mepcop1_64_mep_model::model_cpextu_b_P0S_P1_before, & mepcop1_64_mep_model::model_cpextu_b_P0S_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPEXTUU_H_P0S_P1, & mepcop1_64_mep_model::model_cpextuu_h_P0S_P1_before, & mepcop1_64_mep_model::model_cpextuu_h_P0S_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPEXTU_H_P0S_P1, & mepcop1_64_mep_model::model_cpextu_h_P0S_P1_before, & mepcop1_64_mep_model::model_cpextu_h_P0S_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPEXTLU_B_P0S_P1, & mepcop1_64_mep_model::model_cpextlu_b_P0S_P1_before, & mepcop1_64_mep_model::model_cpextlu_b_P0S_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPEXTL_B_P0S_P1, & mepcop1_64_mep_model::model_cpextl_b_P0S_P1_before, & mepcop1_64_mep_model::model_cpextl_b_P0S_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPEXTLU_H_P0S_P1, & mepcop1_64_mep_model::model_cpextlu_h_P0S_P1_before, & mepcop1_64_mep_model::model_cpextlu_h_P0S_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPEXTL_H_P0S_P1, & mepcop1_64_mep_model::model_cpextl_h_P0S_P1_before, & mepcop1_64_mep_model::model_cpextl_h_P0S_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPCASTUB_H_P0S_P1, & mepcop1_64_mep_model::model_cpcastub_h_P0S_P1_before, & mepcop1_64_mep_model::model_cpcastub_h_P0S_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPCASTB_H_P0S_P1, & mepcop1_64_mep_model::model_cpcastb_h_P0S_P1_before, & mepcop1_64_mep_model::model_cpcastb_h_P0S_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPCASTUB_W_P0S_P1, & mepcop1_64_mep_model::model_cpcastub_w_P0S_P1_before, & mepcop1_64_mep_model::model_cpcastub_w_P0S_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPCASTB_W_P0S_P1, & mepcop1_64_mep_model::model_cpcastb_w_P0S_P1_before, & mepcop1_64_mep_model::model_cpcastb_w_P0S_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPCASTUH_W_P0S_P1, & mepcop1_64_mep_model::model_cpcastuh_w_P0S_P1_before, & mepcop1_64_mep_model::model_cpcastuh_w_P0S_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPCASTH_W_P0S_P1, & mepcop1_64_mep_model::model_cpcasth_w_P0S_P1_before, & mepcop1_64_mep_model::model_cpcasth_w_P0S_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CDCASTUW_P0S_P1, & mepcop1_64_mep_model::model_cdcastuw_P0S_P1_before, & mepcop1_64_mep_model::model_cdcastuw_P0S_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CDCASTW_P0S_P1, & mepcop1_64_mep_model::model_cdcastw_P0S_P1_before, & mepcop1_64_mep_model::model_cdcastw_P0S_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPMOVFRCSAR0_P0S_P1, & mepcop1_64_mep_model::model_cpmovfrcsar0_P0S_P1_before, & mepcop1_64_mep_model::model_cpmovfrcsar0_P0S_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPMOVFRCSAR1_P0S_P1, & mepcop1_64_mep_model::model_cpmovfrcsar1_P0S_P1_before, & mepcop1_64_mep_model::model_cpmovfrcsar1_P0S_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPMOVFRCC_P0S_P1, & mepcop1_64_mep_model::model_cpmovfrcc_P0S_P1_before, & mepcop1_64_mep_model::model_cpmovfrcc_P0S_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPMOVTOCSAR0_P0S_P1, & mepcop1_64_mep_model::model_cpmovtocsar0_P0S_P1_before, & mepcop1_64_mep_model::model_cpmovtocsar0_P0S_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPMOVTOCSAR1_P0S_P1, & mepcop1_64_mep_model::model_cpmovtocsar1_P0S_P1_before, & mepcop1_64_mep_model::model_cpmovtocsar1_P0S_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPMOVTOCC_P0S_P1, & mepcop1_64_mep_model::model_cpmovtocc_P0S_P1_before, & mepcop1_64_mep_model::model_cpmovtocc_P0S_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPCMPEQZ_B_P0S_P1, & mepcop1_64_mep_model::model_cpcmpeqz_b_P0S_P1_before, & mepcop1_64_mep_model::model_cpcmpeqz_b_P0S_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPCMPEQ_B_P0S_P1, & mepcop1_64_mep_model::model_cpcmpeq_b_P0S_P1_before, & mepcop1_64_mep_model::model_cpcmpeq_b_P0S_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPCMPEQ_H_P0S_P1, & mepcop1_64_mep_model::model_cpcmpeq_h_P0S_P1_before, & mepcop1_64_mep_model::model_cpcmpeq_h_P0S_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPCMPEQ_W_P0S_P1, & mepcop1_64_mep_model::model_cpcmpeq_w_P0S_P1_before, & mepcop1_64_mep_model::model_cpcmpeq_w_P0S_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPCMPNE_B_P0S_P1, & mepcop1_64_mep_model::model_cpcmpne_b_P0S_P1_before, & mepcop1_64_mep_model::model_cpcmpne_b_P0S_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPCMPNE_H_P0S_P1, & mepcop1_64_mep_model::model_cpcmpne_h_P0S_P1_before, & mepcop1_64_mep_model::model_cpcmpne_h_P0S_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPCMPNE_W_P0S_P1, & mepcop1_64_mep_model::model_cpcmpne_w_P0S_P1_before, & mepcop1_64_mep_model::model_cpcmpne_w_P0S_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPCMPGTU_B_P0S_P1, & mepcop1_64_mep_model::model_cpcmpgtu_b_P0S_P1_before, & mepcop1_64_mep_model::model_cpcmpgtu_b_P0S_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPCMPGT_B_P0S_P1, & mepcop1_64_mep_model::model_cpcmpgt_b_P0S_P1_before, & mepcop1_64_mep_model::model_cpcmpgt_b_P0S_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPCMPGT_H_P0S_P1, & mepcop1_64_mep_model::model_cpcmpgt_h_P0S_P1_before, & mepcop1_64_mep_model::model_cpcmpgt_h_P0S_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPCMPGTU_W_P0S_P1, & mepcop1_64_mep_model::model_cpcmpgtu_w_P0S_P1_before, & mepcop1_64_mep_model::model_cpcmpgtu_w_P0S_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPCMPGT_W_P0S_P1, & mepcop1_64_mep_model::model_cpcmpgt_w_P0S_P1_before, & mepcop1_64_mep_model::model_cpcmpgt_w_P0S_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPCMPGEU_B_P0S_P1, & mepcop1_64_mep_model::model_cpcmpgeu_b_P0S_P1_before, & mepcop1_64_mep_model::model_cpcmpgeu_b_P0S_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPCMPGE_B_P0S_P1, & mepcop1_64_mep_model::model_cpcmpge_b_P0S_P1_before, & mepcop1_64_mep_model::model_cpcmpge_b_P0S_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPCMPGE_H_P0S_P1, & mepcop1_64_mep_model::model_cpcmpge_h_P0S_P1_before, & mepcop1_64_mep_model::model_cpcmpge_h_P0S_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPCMPGEU_W_P0S_P1, & mepcop1_64_mep_model::model_cpcmpgeu_w_P0S_P1_before, & mepcop1_64_mep_model::model_cpcmpgeu_w_P0S_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPCMPGE_W_P0S_P1, & mepcop1_64_mep_model::model_cpcmpge_w_P0S_P1_before, & mepcop1_64_mep_model::model_cpcmpge_w_P0S_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPFSFTBI_P0_P1, & mepcop1_64_mep_model::model_cpfsftbi_P0_P1_before, & mepcop1_64_mep_model::model_cpfsftbi_P0_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPACMPEQ_B_P0_P1, & mepcop1_64_mep_model::model_cpacmpeq_b_P0_P1_before, & mepcop1_64_mep_model::model_cpacmpeq_b_P0_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPACMPEQ_H_P0_P1, & mepcop1_64_mep_model::model_cpacmpeq_h_P0_P1_before, & mepcop1_64_mep_model::model_cpacmpeq_h_P0_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPACMPEQ_W_P0_P1, & mepcop1_64_mep_model::model_cpacmpeq_w_P0_P1_before, & mepcop1_64_mep_model::model_cpacmpeq_w_P0_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPACMPNE_B_P0_P1, & mepcop1_64_mep_model::model_cpacmpne_b_P0_P1_before, & mepcop1_64_mep_model::model_cpacmpne_b_P0_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPACMPNE_H_P0_P1, & mepcop1_64_mep_model::model_cpacmpne_h_P0_P1_before, & mepcop1_64_mep_model::model_cpacmpne_h_P0_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPACMPNE_W_P0_P1, & mepcop1_64_mep_model::model_cpacmpne_w_P0_P1_before, & mepcop1_64_mep_model::model_cpacmpne_w_P0_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPACMPGTU_B_P0_P1, & mepcop1_64_mep_model::model_cpacmpgtu_b_P0_P1_before, & mepcop1_64_mep_model::model_cpacmpgtu_b_P0_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPACMPGT_B_P0_P1, & mepcop1_64_mep_model::model_cpacmpgt_b_P0_P1_before, & mepcop1_64_mep_model::model_cpacmpgt_b_P0_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPACMPGT_H_P0_P1, & mepcop1_64_mep_model::model_cpacmpgt_h_P0_P1_before, & mepcop1_64_mep_model::model_cpacmpgt_h_P0_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPACMPGTU_W_P0_P1, & mepcop1_64_mep_model::model_cpacmpgtu_w_P0_P1_before, & mepcop1_64_mep_model::model_cpacmpgtu_w_P0_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPACMPGT_W_P0_P1, & mepcop1_64_mep_model::model_cpacmpgt_w_P0_P1_before, & mepcop1_64_mep_model::model_cpacmpgt_w_P0_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPACMPGEU_B_P0_P1, & mepcop1_64_mep_model::model_cpacmpgeu_b_P0_P1_before, & mepcop1_64_mep_model::model_cpacmpgeu_b_P0_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPACMPGE_B_P0_P1, & mepcop1_64_mep_model::model_cpacmpge_b_P0_P1_before, & mepcop1_64_mep_model::model_cpacmpge_b_P0_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPACMPGE_H_P0_P1, & mepcop1_64_mep_model::model_cpacmpge_h_P0_P1_before, & mepcop1_64_mep_model::model_cpacmpge_h_P0_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPACMPGEU_W_P0_P1, & mepcop1_64_mep_model::model_cpacmpgeu_w_P0_P1_before, & mepcop1_64_mep_model::model_cpacmpgeu_w_P0_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPACMPGE_W_P0_P1, & mepcop1_64_mep_model::model_cpacmpge_w_P0_P1_before, & mepcop1_64_mep_model::model_cpacmpge_w_P0_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPOCMPEQ_B_P0_P1, & mepcop1_64_mep_model::model_cpocmpeq_b_P0_P1_before, & mepcop1_64_mep_model::model_cpocmpeq_b_P0_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPOCMPEQ_H_P0_P1, & mepcop1_64_mep_model::model_cpocmpeq_h_P0_P1_before, & mepcop1_64_mep_model::model_cpocmpeq_h_P0_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPOCMPEQ_W_P0_P1, & mepcop1_64_mep_model::model_cpocmpeq_w_P0_P1_before, & mepcop1_64_mep_model::model_cpocmpeq_w_P0_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPOCMPNE_B_P0_P1, & mepcop1_64_mep_model::model_cpocmpne_b_P0_P1_before, & mepcop1_64_mep_model::model_cpocmpne_b_P0_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPOCMPNE_H_P0_P1, & mepcop1_64_mep_model::model_cpocmpne_h_P0_P1_before, & mepcop1_64_mep_model::model_cpocmpne_h_P0_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPOCMPNE_W_P0_P1, & mepcop1_64_mep_model::model_cpocmpne_w_P0_P1_before, & mepcop1_64_mep_model::model_cpocmpne_w_P0_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPOCMPGTU_B_P0_P1, & mepcop1_64_mep_model::model_cpocmpgtu_b_P0_P1_before, & mepcop1_64_mep_model::model_cpocmpgtu_b_P0_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPOCMPGT_B_P0_P1, & mepcop1_64_mep_model::model_cpocmpgt_b_P0_P1_before, & mepcop1_64_mep_model::model_cpocmpgt_b_P0_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPOCMPGT_H_P0_P1, & mepcop1_64_mep_model::model_cpocmpgt_h_P0_P1_before, & mepcop1_64_mep_model::model_cpocmpgt_h_P0_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPOCMPGTU_W_P0_P1, & mepcop1_64_mep_model::model_cpocmpgtu_w_P0_P1_before, & mepcop1_64_mep_model::model_cpocmpgtu_w_P0_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPOCMPGT_W_P0_P1, & mepcop1_64_mep_model::model_cpocmpgt_w_P0_P1_before, & mepcop1_64_mep_model::model_cpocmpgt_w_P0_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPOCMPGEU_B_P0_P1, & mepcop1_64_mep_model::model_cpocmpgeu_b_P0_P1_before, & mepcop1_64_mep_model::model_cpocmpgeu_b_P0_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPOCMPGE_B_P0_P1, & mepcop1_64_mep_model::model_cpocmpge_b_P0_P1_before, & mepcop1_64_mep_model::model_cpocmpge_b_P0_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPOCMPGE_H_P0_P1, & mepcop1_64_mep_model::model_cpocmpge_h_P0_P1_before, & mepcop1_64_mep_model::model_cpocmpge_h_P0_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPOCMPGEU_W_P0_P1, & mepcop1_64_mep_model::model_cpocmpgeu_w_P0_P1_before, & mepcop1_64_mep_model::model_cpocmpgeu_w_P0_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPOCMPGE_W_P0_P1, & mepcop1_64_mep_model::model_cpocmpge_w_P0_P1_before, & mepcop1_64_mep_model::model_cpocmpge_w_P0_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CDADD3_P0_P1, & mepcop1_64_mep_model::model_cdadd3_P0_P1_before, & mepcop1_64_mep_model::model_cdadd3_P0_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPSUB3_B_P0_P1, & mepcop1_64_mep_model::model_cpsub3_b_P0_P1_before, & mepcop1_64_mep_model::model_cpsub3_b_P0_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPSUB3_H_P0_P1, & mepcop1_64_mep_model::model_cpsub3_h_P0_P1_before, & mepcop1_64_mep_model::model_cpsub3_h_P0_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPSUB3_W_P0_P1, & mepcop1_64_mep_model::model_cpsub3_w_P0_P1_before, & mepcop1_64_mep_model::model_cpsub3_w_P0_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CDSUB3_P0_P1, & mepcop1_64_mep_model::model_cdsub3_P0_P1_before, & mepcop1_64_mep_model::model_cdsub3_P0_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPSADD3_H_P0_P1, & mepcop1_64_mep_model::model_cpsadd3_h_P0_P1_before, & mepcop1_64_mep_model::model_cpsadd3_h_P0_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPSADD3_W_P0_P1, & mepcop1_64_mep_model::model_cpsadd3_w_P0_P1_before, & mepcop1_64_mep_model::model_cpsadd3_w_P0_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPSSUB3_H_P0_P1, & mepcop1_64_mep_model::model_cpssub3_h_P0_P1_before, & mepcop1_64_mep_model::model_cpssub3_h_P0_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPSSUB3_W_P0_P1, & mepcop1_64_mep_model::model_cpssub3_w_P0_P1_before, & mepcop1_64_mep_model::model_cpssub3_w_P0_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPEXTUADDU3_B_P0_P1, & mepcop1_64_mep_model::model_cpextuaddu3_b_P0_P1_before, & mepcop1_64_mep_model::model_cpextuaddu3_b_P0_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPEXTUADD3_B_P0_P1, & mepcop1_64_mep_model::model_cpextuadd3_b_P0_P1_before, & mepcop1_64_mep_model::model_cpextuadd3_b_P0_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPEXTLADDU3_B_P0_P1, & mepcop1_64_mep_model::model_cpextladdu3_b_P0_P1_before, & mepcop1_64_mep_model::model_cpextladdu3_b_P0_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPEXTLADD3_B_P0_P1, & mepcop1_64_mep_model::model_cpextladd3_b_P0_P1_before, & mepcop1_64_mep_model::model_cpextladd3_b_P0_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPEXTUSUBU3_B_P0_P1, & mepcop1_64_mep_model::model_cpextusubu3_b_P0_P1_before, & mepcop1_64_mep_model::model_cpextusubu3_b_P0_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPEXTUSUB3_B_P0_P1, & mepcop1_64_mep_model::model_cpextusub3_b_P0_P1_before, & mepcop1_64_mep_model::model_cpextusub3_b_P0_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPEXTLSUBU3_B_P0_P1, & mepcop1_64_mep_model::model_cpextlsubu3_b_P0_P1_before, & mepcop1_64_mep_model::model_cpextlsubu3_b_P0_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPEXTLSUB3_B_P0_P1, & mepcop1_64_mep_model::model_cpextlsub3_b_P0_P1_before, & mepcop1_64_mep_model::model_cpextlsub3_b_P0_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPAVEU3_B_P0_P1, & mepcop1_64_mep_model::model_cpaveu3_b_P0_P1_before, & mepcop1_64_mep_model::model_cpaveu3_b_P0_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPAVE3_B_P0_P1, & mepcop1_64_mep_model::model_cpave3_b_P0_P1_before, & mepcop1_64_mep_model::model_cpave3_b_P0_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPAVE3_H_P0_P1, & mepcop1_64_mep_model::model_cpave3_h_P0_P1_before, & mepcop1_64_mep_model::model_cpave3_h_P0_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPAVE3_W_P0_P1, & mepcop1_64_mep_model::model_cpave3_w_P0_P1_before, & mepcop1_64_mep_model::model_cpave3_w_P0_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPADDSRU3_B_P0_P1, & mepcop1_64_mep_model::model_cpaddsru3_b_P0_P1_before, & mepcop1_64_mep_model::model_cpaddsru3_b_P0_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPADDSR3_B_P0_P1, & mepcop1_64_mep_model::model_cpaddsr3_b_P0_P1_before, & mepcop1_64_mep_model::model_cpaddsr3_b_P0_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPADDSR3_H_P0_P1, & mepcop1_64_mep_model::model_cpaddsr3_h_P0_P1_before, & mepcop1_64_mep_model::model_cpaddsr3_h_P0_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPADDSR3_W_P0_P1, & mepcop1_64_mep_model::model_cpaddsr3_w_P0_P1_before, & mepcop1_64_mep_model::model_cpaddsr3_w_P0_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPABSU3_B_P0_P1, & mepcop1_64_mep_model::model_cpabsu3_b_P0_P1_before, & mepcop1_64_mep_model::model_cpabsu3_b_P0_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPABS3_B_P0_P1, & mepcop1_64_mep_model::model_cpabs3_b_P0_P1_before, & mepcop1_64_mep_model::model_cpabs3_b_P0_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPABS3_H_P0_P1, & mepcop1_64_mep_model::model_cpabs3_h_P0_P1_before, & mepcop1_64_mep_model::model_cpabs3_h_P0_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPAND3_P0_P1, & mepcop1_64_mep_model::model_cpand3_P0_P1_before, & mepcop1_64_mep_model::model_cpand3_P0_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPOR3_P0_P1, & mepcop1_64_mep_model::model_cpor3_P0_P1_before, & mepcop1_64_mep_model::model_cpor3_P0_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPNOR3_P0_P1, & mepcop1_64_mep_model::model_cpnor3_P0_P1_before, & mepcop1_64_mep_model::model_cpnor3_P0_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPXOR3_P0_P1, & mepcop1_64_mep_model::model_cpxor3_P0_P1_before, & mepcop1_64_mep_model::model_cpxor3_P0_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPPACKU_B_P0_P1, & mepcop1_64_mep_model::model_cppacku_b_P0_P1_before, & mepcop1_64_mep_model::model_cppacku_b_P0_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPPACK_B_P0_P1, & mepcop1_64_mep_model::model_cppack_b_P0_P1_before, & mepcop1_64_mep_model::model_cppack_b_P0_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPPACK_H_P0_P1, & mepcop1_64_mep_model::model_cppack_h_P0_P1_before, & mepcop1_64_mep_model::model_cppack_h_P0_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPMAXU3_B_P0_P1, & mepcop1_64_mep_model::model_cpmaxu3_b_P0_P1_before, & mepcop1_64_mep_model::model_cpmaxu3_b_P0_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPMAX3_B_P0_P1, & mepcop1_64_mep_model::model_cpmax3_b_P0_P1_before, & mepcop1_64_mep_model::model_cpmax3_b_P0_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPMAX3_H_P0_P1, & mepcop1_64_mep_model::model_cpmax3_h_P0_P1_before, & mepcop1_64_mep_model::model_cpmax3_h_P0_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPMAXU3_W_P0_P1, & mepcop1_64_mep_model::model_cpmaxu3_w_P0_P1_before, & mepcop1_64_mep_model::model_cpmaxu3_w_P0_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPMAX3_W_P0_P1, & mepcop1_64_mep_model::model_cpmax3_w_P0_P1_before, & mepcop1_64_mep_model::model_cpmax3_w_P0_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPMINU3_B_P0_P1, & mepcop1_64_mep_model::model_cpminu3_b_P0_P1_before, & mepcop1_64_mep_model::model_cpminu3_b_P0_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPMIN3_B_P0_P1, & mepcop1_64_mep_model::model_cpmin3_b_P0_P1_before, & mepcop1_64_mep_model::model_cpmin3_b_P0_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPMIN3_H_P0_P1, & mepcop1_64_mep_model::model_cpmin3_h_P0_P1_before, & mepcop1_64_mep_model::model_cpmin3_h_P0_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPMINU3_W_P0_P1, & mepcop1_64_mep_model::model_cpminu3_w_P0_P1_before, & mepcop1_64_mep_model::model_cpminu3_w_P0_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPMIN3_W_P0_P1, & mepcop1_64_mep_model::model_cpmin3_w_P0_P1_before, & mepcop1_64_mep_model::model_cpmin3_w_P0_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPSRL3_B_P0_P1, & mepcop1_64_mep_model::model_cpsrl3_b_P0_P1_before, & mepcop1_64_mep_model::model_cpsrl3_b_P0_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPSSRL3_B_P0_P1, & mepcop1_64_mep_model::model_cpssrl3_b_P0_P1_before, & mepcop1_64_mep_model::model_cpssrl3_b_P0_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPSRL3_H_P0_P1, & mepcop1_64_mep_model::model_cpsrl3_h_P0_P1_before, & mepcop1_64_mep_model::model_cpsrl3_h_P0_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPSSRL3_H_P0_P1, & mepcop1_64_mep_model::model_cpssrl3_h_P0_P1_before, & mepcop1_64_mep_model::model_cpssrl3_h_P0_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPSRL3_W_P0_P1, & mepcop1_64_mep_model::model_cpsrl3_w_P0_P1_before, & mepcop1_64_mep_model::model_cpsrl3_w_P0_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPSSRL3_W_P0_P1, & mepcop1_64_mep_model::model_cpssrl3_w_P0_P1_before, & mepcop1_64_mep_model::model_cpssrl3_w_P0_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CDSRL3_P0_P1, & mepcop1_64_mep_model::model_cdsrl3_P0_P1_before, & mepcop1_64_mep_model::model_cdsrl3_P0_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPSRA3_B_P0_P1, & mepcop1_64_mep_model::model_cpsra3_b_P0_P1_before, & mepcop1_64_mep_model::model_cpsra3_b_P0_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPSSRA3_B_P0_P1, & mepcop1_64_mep_model::model_cpssra3_b_P0_P1_before, & mepcop1_64_mep_model::model_cpssra3_b_P0_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPSRA3_H_P0_P1, & mepcop1_64_mep_model::model_cpsra3_h_P0_P1_before, & mepcop1_64_mep_model::model_cpsra3_h_P0_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPSSRA3_H_P0_P1, & mepcop1_64_mep_model::model_cpssra3_h_P0_P1_before, & mepcop1_64_mep_model::model_cpssra3_h_P0_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPSRA3_W_P0_P1, & mepcop1_64_mep_model::model_cpsra3_w_P0_P1_before, & mepcop1_64_mep_model::model_cpsra3_w_P0_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPSSRA3_W_P0_P1, & mepcop1_64_mep_model::model_cpssra3_w_P0_P1_before, & mepcop1_64_mep_model::model_cpssra3_w_P0_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CDSRA3_P0_P1, & mepcop1_64_mep_model::model_cdsra3_P0_P1_before, & mepcop1_64_mep_model::model_cdsra3_P0_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPSLL3_B_P0_P1, & mepcop1_64_mep_model::model_cpsll3_b_P0_P1_before, & mepcop1_64_mep_model::model_cpsll3_b_P0_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPSSLL3_B_P0_P1, & mepcop1_64_mep_model::model_cpssll3_b_P0_P1_before, & mepcop1_64_mep_model::model_cpssll3_b_P0_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPSLL3_H_P0_P1, & mepcop1_64_mep_model::model_cpsll3_h_P0_P1_before, & mepcop1_64_mep_model::model_cpsll3_h_P0_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPSSLL3_H_P0_P1, & mepcop1_64_mep_model::model_cpssll3_h_P0_P1_before, & mepcop1_64_mep_model::model_cpssll3_h_P0_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPSLL3_W_P0_P1, & mepcop1_64_mep_model::model_cpsll3_w_P0_P1_before, & mepcop1_64_mep_model::model_cpsll3_w_P0_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPSSLL3_W_P0_P1, & mepcop1_64_mep_model::model_cpssll3_w_P0_P1_before, & mepcop1_64_mep_model::model_cpssll3_w_P0_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CDSLL3_P0_P1, & mepcop1_64_mep_model::model_cdsll3_P0_P1_before, & mepcop1_64_mep_model::model_cdsll3_P0_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPSLA3_H_P0_P1, & mepcop1_64_mep_model::model_cpsla3_h_P0_P1_before, & mepcop1_64_mep_model::model_cpsla3_h_P0_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPSLA3_W_P0_P1, & mepcop1_64_mep_model::model_cpsla3_w_P0_P1_before, & mepcop1_64_mep_model::model_cpsla3_w_P0_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPSRLI3_B_P0_P1, & mepcop1_64_mep_model::model_cpsrli3_b_P0_P1_before, & mepcop1_64_mep_model::model_cpsrli3_b_P0_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPSRLI3_H_P0_P1, & mepcop1_64_mep_model::model_cpsrli3_h_P0_P1_before, & mepcop1_64_mep_model::model_cpsrli3_h_P0_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPSRLI3_W_P0_P1, & mepcop1_64_mep_model::model_cpsrli3_w_P0_P1_before, & mepcop1_64_mep_model::model_cpsrli3_w_P0_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CDSRLI3_P0_P1, & mepcop1_64_mep_model::model_cdsrli3_P0_P1_before, & mepcop1_64_mep_model::model_cdsrli3_P0_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPSRAI3_B_P0_P1, & mepcop1_64_mep_model::model_cpsrai3_b_P0_P1_before, & mepcop1_64_mep_model::model_cpsrai3_b_P0_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPSRAI3_H_P0_P1, & mepcop1_64_mep_model::model_cpsrai3_h_P0_P1_before, & mepcop1_64_mep_model::model_cpsrai3_h_P0_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPSRAI3_W_P0_P1, & mepcop1_64_mep_model::model_cpsrai3_w_P0_P1_before, & mepcop1_64_mep_model::model_cpsrai3_w_P0_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CDSRAI3_P0_P1, & mepcop1_64_mep_model::model_cdsrai3_P0_P1_before, & mepcop1_64_mep_model::model_cdsrai3_P0_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPSLLI3_B_P0_P1, & mepcop1_64_mep_model::model_cpslli3_b_P0_P1_before, & mepcop1_64_mep_model::model_cpslli3_b_P0_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPSLLI3_H_P0_P1, & mepcop1_64_mep_model::model_cpslli3_h_P0_P1_before, & mepcop1_64_mep_model::model_cpslli3_h_P0_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPSLLI3_W_P0_P1, & mepcop1_64_mep_model::model_cpslli3_w_P0_P1_before, & mepcop1_64_mep_model::model_cpslli3_w_P0_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CDSLLI3_P0_P1, & mepcop1_64_mep_model::model_cdslli3_P0_P1_before, & mepcop1_64_mep_model::model_cdslli3_P0_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPSLAI3_H_P0_P1, & mepcop1_64_mep_model::model_cpslai3_h_P0_P1_before, & mepcop1_64_mep_model::model_cpslai3_h_P0_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPSLAI3_W_P0_P1, & mepcop1_64_mep_model::model_cpslai3_w_P0_P1_before, & mepcop1_64_mep_model::model_cpslai3_w_P0_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPCLIPIU3_W_P0_P1, & mepcop1_64_mep_model::model_cpclipiu3_w_P0_P1_before, & mepcop1_64_mep_model::model_cpclipiu3_w_P0_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPCLIPI3_W_P0_P1, & mepcop1_64_mep_model::model_cpclipi3_w_P0_P1_before, & mepcop1_64_mep_model::model_cpclipi3_w_P0_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CDCLIPIU3_P0_P1, & mepcop1_64_mep_model::model_cdclipiu3_P0_P1_before, & mepcop1_64_mep_model::model_cdclipiu3_P0_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CDCLIPI3_P0_P1, & mepcop1_64_mep_model::model_cdclipi3_P0_P1_before, & mepcop1_64_mep_model::model_cdclipi3_P0_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPMOVI_H_P0_P1, & mepcop1_64_mep_model::model_cpmovi_h_P0_P1_before, & mepcop1_64_mep_model::model_cpmovi_h_P0_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPMOVIU_W_P0_P1, & mepcop1_64_mep_model::model_cpmoviu_w_P0_P1_before, & mepcop1_64_mep_model::model_cpmoviu_w_P0_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPMOVI_W_P0_P1, & mepcop1_64_mep_model::model_cpmovi_w_P0_P1_before, & mepcop1_64_mep_model::model_cpmovi_w_P0_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CDMOVIU_P0_P1, & mepcop1_64_mep_model::model_cdmoviu_P0_P1_before, & mepcop1_64_mep_model::model_cdmoviu_P0_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CDMOVI_P0_P1, & mepcop1_64_mep_model::model_cdmovi_P0_P1_before, & mepcop1_64_mep_model::model_cdmovi_P0_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_C1NOP_P1, & mepcop1_64_mep_model::model_c1nop_P1_before, & mepcop1_64_mep_model::model_c1nop_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPADDA1U_B_P1, & mepcop1_64_mep_model::model_cpadda1u_b_P1_before, & mepcop1_64_mep_model::model_cpadda1u_b_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPADDA1_B_P1, & mepcop1_64_mep_model::model_cpadda1_b_P1_before, & mepcop1_64_mep_model::model_cpadda1_b_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPADDUA1_H_P1, & mepcop1_64_mep_model::model_cpaddua1_h_P1_before, & mepcop1_64_mep_model::model_cpaddua1_h_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPADDLA1_H_P1, & mepcop1_64_mep_model::model_cpaddla1_h_P1_before, & mepcop1_64_mep_model::model_cpaddla1_h_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPADDACA1U_B_P1, & mepcop1_64_mep_model::model_cpaddaca1u_b_P1_before, & mepcop1_64_mep_model::model_cpaddaca1u_b_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPADDACA1_B_P1, & mepcop1_64_mep_model::model_cpaddaca1_b_P1_before, & mepcop1_64_mep_model::model_cpaddaca1_b_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPADDACUA1_H_P1, & mepcop1_64_mep_model::model_cpaddacua1_h_P1_before, & mepcop1_64_mep_model::model_cpaddacua1_h_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPADDACLA1_H_P1, & mepcop1_64_mep_model::model_cpaddacla1_h_P1_before, & mepcop1_64_mep_model::model_cpaddacla1_h_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPSUBA1U_B_P1, & mepcop1_64_mep_model::model_cpsuba1u_b_P1_before, & mepcop1_64_mep_model::model_cpsuba1u_b_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPSUBA1_B_P1, & mepcop1_64_mep_model::model_cpsuba1_b_P1_before, & mepcop1_64_mep_model::model_cpsuba1_b_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPSUBUA1_H_P1, & mepcop1_64_mep_model::model_cpsubua1_h_P1_before, & mepcop1_64_mep_model::model_cpsubua1_h_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPSUBLA1_H_P1, & mepcop1_64_mep_model::model_cpsubla1_h_P1_before, & mepcop1_64_mep_model::model_cpsubla1_h_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPSUBACA1U_B_P1, & mepcop1_64_mep_model::model_cpsubaca1u_b_P1_before, & mepcop1_64_mep_model::model_cpsubaca1u_b_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPSUBACA1_B_P1, & mepcop1_64_mep_model::model_cpsubaca1_b_P1_before, & mepcop1_64_mep_model::model_cpsubaca1_b_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPSUBACUA1_H_P1, & mepcop1_64_mep_model::model_cpsubacua1_h_P1_before, & mepcop1_64_mep_model::model_cpsubacua1_h_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPSUBACLA1_H_P1, & mepcop1_64_mep_model::model_cpsubacla1_h_P1_before, & mepcop1_64_mep_model::model_cpsubacla1_h_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPABSA1U_B_P1, & mepcop1_64_mep_model::model_cpabsa1u_b_P1_before, & mepcop1_64_mep_model::model_cpabsa1u_b_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPABSA1_B_P1, & mepcop1_64_mep_model::model_cpabsa1_b_P1_before, & mepcop1_64_mep_model::model_cpabsa1_b_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPABSUA1_H_P1, & mepcop1_64_mep_model::model_cpabsua1_h_P1_before, & mepcop1_64_mep_model::model_cpabsua1_h_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPABSLA1_H_P1, & mepcop1_64_mep_model::model_cpabsla1_h_P1_before, & mepcop1_64_mep_model::model_cpabsla1_h_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPSADA1U_B_P1, & mepcop1_64_mep_model::model_cpsada1u_b_P1_before, & mepcop1_64_mep_model::model_cpsada1u_b_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPSADA1_B_P1, & mepcop1_64_mep_model::model_cpsada1_b_P1_before, & mepcop1_64_mep_model::model_cpsada1_b_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPSADUA1_H_P1, & mepcop1_64_mep_model::model_cpsadua1_h_P1_before, & mepcop1_64_mep_model::model_cpsadua1_h_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPSADLA1_H_P1, & mepcop1_64_mep_model::model_cpsadla1_h_P1_before, & mepcop1_64_mep_model::model_cpsadla1_h_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPSETA1_H_P1, & mepcop1_64_mep_model::model_cpseta1_h_P1_before, & mepcop1_64_mep_model::model_cpseta1_h_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPSETUA1_W_P1, & mepcop1_64_mep_model::model_cpsetua1_w_P1_before, & mepcop1_64_mep_model::model_cpsetua1_w_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPSETLA1_W_P1, & mepcop1_64_mep_model::model_cpsetla1_w_P1_before, & mepcop1_64_mep_model::model_cpsetla1_w_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPMOVA1_B_P1, & mepcop1_64_mep_model::model_cpmova1_b_P1_before, & mepcop1_64_mep_model::model_cpmova1_b_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPMOVUA1_H_P1, & mepcop1_64_mep_model::model_cpmovua1_h_P1_before, & mepcop1_64_mep_model::model_cpmovua1_h_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPMOVLA1_H_P1, & mepcop1_64_mep_model::model_cpmovla1_h_P1_before, & mepcop1_64_mep_model::model_cpmovla1_h_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPMOVUUA1_W_P1, & mepcop1_64_mep_model::model_cpmovuua1_w_P1_before, & mepcop1_64_mep_model::model_cpmovuua1_w_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPMOVULA1_W_P1, & mepcop1_64_mep_model::model_cpmovula1_w_P1_before, & mepcop1_64_mep_model::model_cpmovula1_w_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPMOVLUA1_W_P1, & mepcop1_64_mep_model::model_cpmovlua1_w_P1_before, & mepcop1_64_mep_model::model_cpmovlua1_w_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPMOVLLA1_W_P1, & mepcop1_64_mep_model::model_cpmovlla1_w_P1_before, & mepcop1_64_mep_model::model_cpmovlla1_w_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPPACKA1U_B_P1, & mepcop1_64_mep_model::model_cppacka1u_b_P1_before, & mepcop1_64_mep_model::model_cppacka1u_b_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPPACKA1_B_P1, & mepcop1_64_mep_model::model_cppacka1_b_P1_before, & mepcop1_64_mep_model::model_cppacka1_b_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPPACKUA1_H_P1, & mepcop1_64_mep_model::model_cppackua1_h_P1_before, & mepcop1_64_mep_model::model_cppackua1_h_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPPACKLA1_H_P1, & mepcop1_64_mep_model::model_cppackla1_h_P1_before, & mepcop1_64_mep_model::model_cppackla1_h_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPPACKUA1_W_P1, & mepcop1_64_mep_model::model_cppackua1_w_P1_before, & mepcop1_64_mep_model::model_cppackua1_w_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPPACKLA1_W_P1, & mepcop1_64_mep_model::model_cppackla1_w_P1_before, & mepcop1_64_mep_model::model_cppackla1_w_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPMOVHUA1_W_P1, & mepcop1_64_mep_model::model_cpmovhua1_w_P1_before, & mepcop1_64_mep_model::model_cpmovhua1_w_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPMOVHLA1_W_P1, & mepcop1_64_mep_model::model_cpmovhla1_w_P1_before, & mepcop1_64_mep_model::model_cpmovhla1_w_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPACSUMA1_P1, & mepcop1_64_mep_model::model_cpacsuma1_P1_before, & mepcop1_64_mep_model::model_cpacsuma1_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPACCPA1_P1, & mepcop1_64_mep_model::model_cpaccpa1_P1_before, & mepcop1_64_mep_model::model_cpaccpa1_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPACSWP_P1, & mepcop1_64_mep_model::model_cpacswp_P1_before, & mepcop1_64_mep_model::model_cpacswp_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPSRLA1_P1, & mepcop1_64_mep_model::model_cpsrla1_P1_before, & mepcop1_64_mep_model::model_cpsrla1_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPSRAA1_P1, & mepcop1_64_mep_model::model_cpsraa1_P1_before, & mepcop1_64_mep_model::model_cpsraa1_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPSLLA1_P1, & mepcop1_64_mep_model::model_cpslla1_P1_before, & mepcop1_64_mep_model::model_cpslla1_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPSRLIA1_1_P1, & mepcop1_64_mep_model::model_cpsrlia1_1_p1_before, & mepcop1_64_mep_model::model_cpsrlia1_1_p1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPSRAIA1_1_P1, & mepcop1_64_mep_model::model_cpsraia1_1_p1_before, & mepcop1_64_mep_model::model_cpsraia1_1_p1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPSLLIA1_1_P1, & mepcop1_64_mep_model::model_cpsllia1_1_p1_before, & mepcop1_64_mep_model::model_cpsllia1_1_p1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPFMULIA1S0U_B_P1, & mepcop1_64_mep_model::model_cpfmulia1s0u_b_P1_before, & mepcop1_64_mep_model::model_cpfmulia1s0u_b_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPFMULIA1S0_B_P1, & mepcop1_64_mep_model::model_cpfmulia1s0_b_P1_before, & mepcop1_64_mep_model::model_cpfmulia1s0_b_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPFMULIUA1S0_H_P1, & mepcop1_64_mep_model::model_cpfmuliua1s0_h_P1_before, & mepcop1_64_mep_model::model_cpfmuliua1s0_h_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPFMULILA1S0_H_P1, & mepcop1_64_mep_model::model_cpfmulila1s0_h_P1_before, & mepcop1_64_mep_model::model_cpfmulila1s0_h_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPFMADIA1S0U_B_P1, & mepcop1_64_mep_model::model_cpfmadia1s0u_b_P1_before, & mepcop1_64_mep_model::model_cpfmadia1s0u_b_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPFMADIA1S0_B_P1, & mepcop1_64_mep_model::model_cpfmadia1s0_b_P1_before, & mepcop1_64_mep_model::model_cpfmadia1s0_b_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPFMADIUA1S0_H_P1, & mepcop1_64_mep_model::model_cpfmadiua1s0_h_P1_before, & mepcop1_64_mep_model::model_cpfmadiua1s0_h_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPFMADILA1S0_H_P1, & mepcop1_64_mep_model::model_cpfmadila1s0_h_P1_before, & mepcop1_64_mep_model::model_cpfmadila1s0_h_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPFMULIA1S1U_B_P1, & mepcop1_64_mep_model::model_cpfmulia1s1u_b_P1_before, & mepcop1_64_mep_model::model_cpfmulia1s1u_b_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPFMULIA1S1_B_P1, & mepcop1_64_mep_model::model_cpfmulia1s1_b_P1_before, & mepcop1_64_mep_model::model_cpfmulia1s1_b_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPFMULIUA1S1_H_P1, & mepcop1_64_mep_model::model_cpfmuliua1s1_h_P1_before, & mepcop1_64_mep_model::model_cpfmuliua1s1_h_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPFMULILA1S1_H_P1, & mepcop1_64_mep_model::model_cpfmulila1s1_h_P1_before, & mepcop1_64_mep_model::model_cpfmulila1s1_h_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPFMADIA1S1U_B_P1, & mepcop1_64_mep_model::model_cpfmadia1s1u_b_P1_before, & mepcop1_64_mep_model::model_cpfmadia1s1u_b_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPFMADIA1S1_B_P1, & mepcop1_64_mep_model::model_cpfmadia1s1_b_P1_before, & mepcop1_64_mep_model::model_cpfmadia1s1_b_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPFMADIUA1S1_H_P1, & mepcop1_64_mep_model::model_cpfmadiua1s1_h_P1_before, & mepcop1_64_mep_model::model_cpfmadiua1s1_h_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPFMADILA1S1_H_P1, & mepcop1_64_mep_model::model_cpfmadila1s1_h_P1_before, & mepcop1_64_mep_model::model_cpfmadila1s1_h_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPAMULIA1U_B_P1, & mepcop1_64_mep_model::model_cpamulia1u_b_P1_before, & mepcop1_64_mep_model::model_cpamulia1u_b_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPAMULIA1_B_P1, & mepcop1_64_mep_model::model_cpamulia1_b_P1_before, & mepcop1_64_mep_model::model_cpamulia1_b_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPAMULIUA1_H_P1, & mepcop1_64_mep_model::model_cpamuliua1_h_P1_before, & mepcop1_64_mep_model::model_cpamuliua1_h_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPAMULILA1_H_P1, & mepcop1_64_mep_model::model_cpamulila1_h_P1_before, & mepcop1_64_mep_model::model_cpamulila1_h_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPAMADIA1U_B_P1, & mepcop1_64_mep_model::model_cpamadia1u_b_P1_before, & mepcop1_64_mep_model::model_cpamadia1u_b_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPAMADIA1_B_P1, & mepcop1_64_mep_model::model_cpamadia1_b_P1_before, & mepcop1_64_mep_model::model_cpamadia1_b_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPAMADIUA1_H_P1, & mepcop1_64_mep_model::model_cpamadiua1_h_P1_before, & mepcop1_64_mep_model::model_cpamadiua1_h_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPAMADILA1_H_P1, & mepcop1_64_mep_model::model_cpamadila1_h_P1_before, & mepcop1_64_mep_model::model_cpamadila1_h_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPFMULIA1U_B_P1, & mepcop1_64_mep_model::model_cpfmulia1u_b_P1_before, & mepcop1_64_mep_model::model_cpfmulia1u_b_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPFMULIA1_B_P1, & mepcop1_64_mep_model::model_cpfmulia1_b_P1_before, & mepcop1_64_mep_model::model_cpfmulia1_b_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPFMULIUA1_H_P1, & mepcop1_64_mep_model::model_cpfmuliua1_h_P1_before, & mepcop1_64_mep_model::model_cpfmuliua1_h_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPFMULILA1_H_P1, & mepcop1_64_mep_model::model_cpfmulila1_h_P1_before, & mepcop1_64_mep_model::model_cpfmulila1_h_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPFMADIA1U_B_P1, & mepcop1_64_mep_model::model_cpfmadia1u_b_P1_before, & mepcop1_64_mep_model::model_cpfmadia1u_b_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPFMADIA1_B_P1, & mepcop1_64_mep_model::model_cpfmadia1_b_P1_before, & mepcop1_64_mep_model::model_cpfmadia1_b_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPFMADIUA1_H_P1, & mepcop1_64_mep_model::model_cpfmadiua1_h_P1_before, & mepcop1_64_mep_model::model_cpfmadiua1_h_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPFMADILA1_H_P1, & mepcop1_64_mep_model::model_cpfmadila1_h_P1_before, & mepcop1_64_mep_model::model_cpfmadila1_h_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPSSQA1U_B_P1, & mepcop1_64_mep_model::model_cpssqa1u_b_P1_before, & mepcop1_64_mep_model::model_cpssqa1u_b_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPSSQA1_B_P1, & mepcop1_64_mep_model::model_cpssqa1_b_P1_before, & mepcop1_64_mep_model::model_cpssqa1_b_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPSSDA1U_B_P1, & mepcop1_64_mep_model::model_cpssda1u_b_P1_before, & mepcop1_64_mep_model::model_cpssda1u_b_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPSSDA1_B_P1, & mepcop1_64_mep_model::model_cpssda1_b_P1_before, & mepcop1_64_mep_model::model_cpssda1_b_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPMULA1U_B_P1, & mepcop1_64_mep_model::model_cpmula1u_b_P1_before, & mepcop1_64_mep_model::model_cpmula1u_b_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPMULA1_B_P1, & mepcop1_64_mep_model::model_cpmula1_b_P1_before, & mepcop1_64_mep_model::model_cpmula1_b_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPMULUA1_H_P1, & mepcop1_64_mep_model::model_cpmulua1_h_P1_before, & mepcop1_64_mep_model::model_cpmulua1_h_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPMULLA1_H_P1, & mepcop1_64_mep_model::model_cpmulla1_h_P1_before, & mepcop1_64_mep_model::model_cpmulla1_h_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPMULUA1U_W_P1, & mepcop1_64_mep_model::model_cpmulua1u_w_P1_before, & mepcop1_64_mep_model::model_cpmulua1u_w_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPMULLA1U_W_P1, & mepcop1_64_mep_model::model_cpmulla1u_w_P1_before, & mepcop1_64_mep_model::model_cpmulla1u_w_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPMULUA1_W_P1, & mepcop1_64_mep_model::model_cpmulua1_w_P1_before, & mepcop1_64_mep_model::model_cpmulua1_w_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPMULLA1_W_P1, & mepcop1_64_mep_model::model_cpmulla1_w_P1_before, & mepcop1_64_mep_model::model_cpmulla1_w_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPMADA1U_B_P1, & mepcop1_64_mep_model::model_cpmada1u_b_P1_before, & mepcop1_64_mep_model::model_cpmada1u_b_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPMADA1_B_P1, & mepcop1_64_mep_model::model_cpmada1_b_P1_before, & mepcop1_64_mep_model::model_cpmada1_b_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPMADUA1_H_P1, & mepcop1_64_mep_model::model_cpmadua1_h_P1_before, & mepcop1_64_mep_model::model_cpmadua1_h_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPMADLA1_H_P1, & mepcop1_64_mep_model::model_cpmadla1_h_P1_before, & mepcop1_64_mep_model::model_cpmadla1_h_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPMADUA1U_W_P1, & mepcop1_64_mep_model::model_cpmadua1u_w_P1_before, & mepcop1_64_mep_model::model_cpmadua1u_w_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPMADLA1U_W_P1, & mepcop1_64_mep_model::model_cpmadla1u_w_P1_before, & mepcop1_64_mep_model::model_cpmadla1u_w_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPMADUA1_W_P1, & mepcop1_64_mep_model::model_cpmadua1_w_P1_before, & mepcop1_64_mep_model::model_cpmadua1_w_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPMADLA1_W_P1, & mepcop1_64_mep_model::model_cpmadla1_w_P1_before, & mepcop1_64_mep_model::model_cpmadla1_w_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPMSBUA1_H_P1, & mepcop1_64_mep_model::model_cpmsbua1_h_P1_before, & mepcop1_64_mep_model::model_cpmsbua1_h_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPMSBLA1_H_P1, & mepcop1_64_mep_model::model_cpmsbla1_h_P1_before, & mepcop1_64_mep_model::model_cpmsbla1_h_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPMSBUA1U_W_P1, & mepcop1_64_mep_model::model_cpmsbua1u_w_P1_before, & mepcop1_64_mep_model::model_cpmsbua1u_w_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPMSBLA1U_W_P1, & mepcop1_64_mep_model::model_cpmsbla1u_w_P1_before, & mepcop1_64_mep_model::model_cpmsbla1u_w_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPMSBUA1_W_P1, & mepcop1_64_mep_model::model_cpmsbua1_w_P1_before, & mepcop1_64_mep_model::model_cpmsbua1_w_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPMSBLA1_W_P1, & mepcop1_64_mep_model::model_cpmsbla1_w_P1_before, & mepcop1_64_mep_model::model_cpmsbla1_w_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPSMADUA1_H_P1, & mepcop1_64_mep_model::model_cpsmadua1_h_P1_before, & mepcop1_64_mep_model::model_cpsmadua1_h_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPSMADLA1_H_P1, & mepcop1_64_mep_model::model_cpsmadla1_h_P1_before, & mepcop1_64_mep_model::model_cpsmadla1_h_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPSMADUA1_W_P1, & mepcop1_64_mep_model::model_cpsmadua1_w_P1_before, & mepcop1_64_mep_model::model_cpsmadua1_w_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPSMADLA1_W_P1, & mepcop1_64_mep_model::model_cpsmadla1_w_P1_before, & mepcop1_64_mep_model::model_cpsmadla1_w_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPSMSBUA1_H_P1, & mepcop1_64_mep_model::model_cpsmsbua1_h_P1_before, & mepcop1_64_mep_model::model_cpsmsbua1_h_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPSMSBLA1_H_P1, & mepcop1_64_mep_model::model_cpsmsbla1_h_P1_before, & mepcop1_64_mep_model::model_cpsmsbla1_h_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPSMSBUA1_W_P1, & mepcop1_64_mep_model::model_cpsmsbua1_w_P1_before, & mepcop1_64_mep_model::model_cpsmsbua1_w_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPSMSBLA1_W_P1, & mepcop1_64_mep_model::model_cpsmsbla1_w_P1_before, & mepcop1_64_mep_model::model_cpsmsbla1_w_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPMULSLUA1_H_P1, & mepcop1_64_mep_model::model_cpmulslua1_h_P1_before, & mepcop1_64_mep_model::model_cpmulslua1_h_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPMULSLLA1_H_P1, & mepcop1_64_mep_model::model_cpmulslla1_h_P1_before, & mepcop1_64_mep_model::model_cpmulslla1_h_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPMULSLUA1_W_P1, & mepcop1_64_mep_model::model_cpmulslua1_w_P1_before, & mepcop1_64_mep_model::model_cpmulslua1_w_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPMULSLLA1_W_P1, & mepcop1_64_mep_model::model_cpmulslla1_w_P1_before, & mepcop1_64_mep_model::model_cpmulslla1_w_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPSMADSLUA1_H_P1, & mepcop1_64_mep_model::model_cpsmadslua1_h_P1_before, & mepcop1_64_mep_model::model_cpsmadslua1_h_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPSMADSLLA1_H_P1, & mepcop1_64_mep_model::model_cpsmadslla1_h_P1_before, & mepcop1_64_mep_model::model_cpsmadslla1_h_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPSMADSLUA1_W_P1, & mepcop1_64_mep_model::model_cpsmadslua1_w_P1_before, & mepcop1_64_mep_model::model_cpsmadslua1_w_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPSMADSLLA1_W_P1, & mepcop1_64_mep_model::model_cpsmadslla1_w_P1_before, & mepcop1_64_mep_model::model_cpsmadslla1_w_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPSMSBSLUA1_H_P1, & mepcop1_64_mep_model::model_cpsmsbslua1_h_P1_before, & mepcop1_64_mep_model::model_cpsmsbslua1_h_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPSMSBSLLA1_H_P1, & mepcop1_64_mep_model::model_cpsmsbslla1_h_P1_before, & mepcop1_64_mep_model::model_cpsmsbslla1_h_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPSMSBSLUA1_W_P1, & mepcop1_64_mep_model::model_cpsmsbslua1_w_P1_before, & mepcop1_64_mep_model::model_cpsmsbslua1_w_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, + { MEPCOP1_64_INSN_CPSMSBSLLA1_W_P1, & mepcop1_64_mep_model::model_cpsmsbslla1_w_P1_before, & mepcop1_64_mep_model::model_cpsmsbslla1_w_P1_after, { { mepcop1_64_mep_model::UNIT_U_EXEC, 1, 1 } } }, +}; + diff --git a/sid/component/cgen-cpu/mep/mep-cop1-64-model.h b/sid/component/cgen-cpu/mep/mep-cop1-64-model.h new file mode 100644 index 0000000000..91c457b5d5 --- /dev/null +++ b/sid/component/cgen-cpu/mep/mep-cop1-64-model.h @@ -0,0 +1,814 @@ +/* Simulator model support for mepcop1_64. + +THIS FILE IS MACHINE GENERATED WITH CGEN. + +Copyright (C) 2000-2007 Red Hat, Inc. + +This file is part of the Red Hat simulators. + + +*/ + +#ifndef MEPCOP1_64_MODEL_H +#define MEPCOP1_64_MODEL_H + +#include "cgen-cpu.h" +#include "cgen-model.h" + +namespace mep_ext1 +{ +using namespace cgen; + +class mepcop1_64_mep_model : public cgen_model +{ +public: + mepcop1_64_mep_model (mep_ext1_cpu *cpu); + + // Call the proper unit modelling function for the given insn. + UINT model_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache* sem) + { + return (this->*(timing[sem->idesc->sem_index].model_before)) (current_cpu, sem); + } + UINT model_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache* sem) + { + return (this->*(timing[sem->idesc->sem_index].model_after)) (current_cpu, sem); + } + +// Function unit handlers +// To be overridden as needed. + virtual UINT model_u_store_ctrl_reg_before (mep_ext1_cpu *cpu, const struct mepcop1_64_idesc *idesc, int unit_num, INT /*storereg*/) + { + return 0; + } + virtual UINT model_u_store_ctrl_reg_after (mep_ext1_cpu *cpu, const struct mepcop1_64_idesc *idesc, int unit_num, unsigned long long referenced, INT /*storereg*/) + { + return timing[idesc->sem_index].units[unit_num].done; + } + virtual UINT model_u_use_ctrl_reg_before (mep_ext1_cpu *cpu, const struct mepcop1_64_idesc *idesc, int unit_num, INT /*usereg*/) + { + return 0; + } + virtual UINT model_u_use_ctrl_reg_after (mep_ext1_cpu *cpu, const struct mepcop1_64_idesc *idesc, int unit_num, unsigned long long referenced, INT /*usereg*/) + { + return timing[idesc->sem_index].units[unit_num].done; + } + virtual UINT model_u_use_gpr_before (mep_ext1_cpu *cpu, const struct mepcop1_64_idesc *idesc, int unit_num, INT /*usereg*/) + { + return 0; + } + virtual UINT model_u_use_gpr_after (mep_ext1_cpu *cpu, const struct mepcop1_64_idesc *idesc, int unit_num, unsigned long long referenced, INT /*usereg*/) + { + return timing[idesc->sem_index].units[unit_num].done; + } + virtual UINT model_u_mul_gpr_before (mep_ext1_cpu *cpu, const struct mepcop1_64_idesc *idesc, int unit_num, INT /*resultreg*/) + { + return 0; + } + virtual UINT model_u_mul_gpr_after (mep_ext1_cpu *cpu, const struct mepcop1_64_idesc *idesc, int unit_num, unsigned long long referenced, INT /*resultreg*/) + { + return timing[idesc->sem_index].units[unit_num].done; + } + virtual UINT model_u_ldcb_gpr_before (mep_ext1_cpu *cpu, const struct mepcop1_64_idesc *idesc, int unit_num, INT /*loadreg*/) + { + return 0; + } + virtual UINT model_u_ldcb_gpr_after (mep_ext1_cpu *cpu, const struct mepcop1_64_idesc *idesc, int unit_num, unsigned long long referenced, INT /*loadreg*/) + { + return timing[idesc->sem_index].units[unit_num].done; + } + virtual UINT model_u_load_gpr_before (mep_ext1_cpu *cpu, const struct mepcop1_64_idesc *idesc, int unit_num, INT /*loadreg*/) + { + return 0; + } + virtual UINT model_u_load_gpr_after (mep_ext1_cpu *cpu, const struct mepcop1_64_idesc *idesc, int unit_num, unsigned long long referenced, INT /*loadreg*/) + { + return timing[idesc->sem_index].units[unit_num].done; + } + virtual UINT model_u_ldcb_before (mep_ext1_cpu *cpu, const struct mepcop1_64_idesc *idesc, int unit_num) + { + return 0; + } + virtual UINT model_u_ldcb_after (mep_ext1_cpu *cpu, const struct mepcop1_64_idesc *idesc, int unit_num, unsigned long long referenced) + { + return timing[idesc->sem_index].units[unit_num].done; + } + virtual UINT model_u_stcb_before (mep_ext1_cpu *cpu, const struct mepcop1_64_idesc *idesc, int unit_num) + { + return 0; + } + virtual UINT model_u_stcb_after (mep_ext1_cpu *cpu, const struct mepcop1_64_idesc *idesc, int unit_num, unsigned long long referenced) + { + return timing[idesc->sem_index].units[unit_num].done; + } + virtual UINT model_u_divide_before (mep_ext1_cpu *cpu, const struct mepcop1_64_idesc *idesc, int unit_num) + { + return 0; + } + virtual UINT model_u_divide_after (mep_ext1_cpu *cpu, const struct mepcop1_64_idesc *idesc, int unit_num, unsigned long long referenced) + { + return timing[idesc->sem_index].units[unit_num].done; + } + virtual UINT model_u_multiply_before (mep_ext1_cpu *cpu, const struct mepcop1_64_idesc *idesc, int unit_num) + { + return 0; + } + virtual UINT model_u_multiply_after (mep_ext1_cpu *cpu, const struct mepcop1_64_idesc *idesc, int unit_num, unsigned long long referenced) + { + return timing[idesc->sem_index].units[unit_num].done; + } + virtual UINT model_u_branch_before (mep_ext1_cpu *cpu, const struct mepcop1_64_idesc *idesc, int unit_num) + { + return 0; + } + virtual UINT model_u_branch_after (mep_ext1_cpu *cpu, const struct mepcop1_64_idesc *idesc, int unit_num, unsigned long long referenced) + { + return timing[idesc->sem_index].units[unit_num].done; + } + virtual UINT model_u_exec_before (mep_ext1_cpu *cpu, const struct mepcop1_64_idesc *idesc, int unit_num) + { + return 0; + } + virtual UINT model_u_exec_after (mep_ext1_cpu *cpu, const struct mepcop1_64_idesc *idesc, int unit_num, unsigned long long referenced) + { + return timing[idesc->sem_index].units[unit_num].done; + } + +protected: + // These methods call the appropriate unit modeller(s) for each insn. + UINT model_cpadd3_b_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpadd3_b_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpadd3_h_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpadd3_h_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpadd3_w_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpadd3_w_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpunpacku_b_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpunpacku_b_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpunpacku_h_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpunpacku_h_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpunpacku_w_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpunpacku_w_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpunpackl_b_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpunpackl_b_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpunpackl_h_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpunpackl_h_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpunpackl_w_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpunpackl_w_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpsel_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpsel_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpfsftbs0_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpfsftbs0_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpfsftbs1_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpfsftbs1_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpmov_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpmov_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpabsz_b_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpabsz_b_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpabsz_h_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpabsz_h_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpabsz_w_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpabsz_w_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpldz_h_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpldz_h_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpldz_w_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpldz_w_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpnorm_h_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpnorm_h_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpnorm_w_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpnorm_w_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cphaddu_b_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cphaddu_b_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cphadd_b_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cphadd_b_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cphadd_h_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cphadd_h_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cphadd_w_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cphadd_w_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpccadd_b_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpccadd_b_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpbcast_b_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpbcast_b_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpbcast_h_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpbcast_h_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpbcast_w_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpbcast_w_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpextuu_b_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpextuu_b_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpextu_b_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpextu_b_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpextuu_h_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpextuu_h_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpextu_h_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpextu_h_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpextlu_b_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpextlu_b_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpextl_b_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpextl_b_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpextlu_h_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpextlu_h_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpextl_h_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpextl_h_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpcastub_h_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpcastub_h_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpcastb_h_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpcastb_h_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpcastub_w_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpcastub_w_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpcastb_w_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpcastb_w_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpcastuh_w_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpcastuh_w_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpcasth_w_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpcasth_w_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cdcastuw_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cdcastuw_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cdcastw_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cdcastw_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpmovfrcsar0_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpmovfrcsar0_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpmovfrcsar1_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpmovfrcsar1_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpmovfrcc_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpmovfrcc_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpmovtocsar0_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpmovtocsar0_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpmovtocsar1_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpmovtocsar1_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpmovtocc_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpmovtocc_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpcmpeqz_b_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpcmpeqz_b_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpcmpeq_b_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpcmpeq_b_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpcmpeq_h_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpcmpeq_h_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpcmpeq_w_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpcmpeq_w_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpcmpne_b_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpcmpne_b_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpcmpne_h_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpcmpne_h_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpcmpne_w_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpcmpne_w_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpcmpgtu_b_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpcmpgtu_b_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpcmpgt_b_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpcmpgt_b_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpcmpgt_h_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpcmpgt_h_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpcmpgtu_w_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpcmpgtu_w_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpcmpgt_w_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpcmpgt_w_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpcmpgeu_b_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpcmpgeu_b_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpcmpge_b_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpcmpge_b_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpcmpge_h_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpcmpge_h_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpcmpgeu_w_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpcmpgeu_w_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpcmpge_w_P0S_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpcmpge_w_P0S_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpfsftbi_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpfsftbi_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpacmpeq_b_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpacmpeq_b_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpacmpeq_h_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpacmpeq_h_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpacmpeq_w_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpacmpeq_w_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpacmpne_b_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpacmpne_b_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpacmpne_h_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpacmpne_h_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpacmpne_w_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpacmpne_w_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpacmpgtu_b_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpacmpgtu_b_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpacmpgt_b_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpacmpgt_b_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpacmpgt_h_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpacmpgt_h_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpacmpgtu_w_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpacmpgtu_w_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpacmpgt_w_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpacmpgt_w_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpacmpgeu_b_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpacmpgeu_b_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpacmpge_b_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpacmpge_b_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpacmpge_h_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpacmpge_h_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpacmpgeu_w_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpacmpgeu_w_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpacmpge_w_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpacmpge_w_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpocmpeq_b_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpocmpeq_b_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpocmpeq_h_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpocmpeq_h_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpocmpeq_w_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpocmpeq_w_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpocmpne_b_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpocmpne_b_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpocmpne_h_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpocmpne_h_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpocmpne_w_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpocmpne_w_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpocmpgtu_b_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpocmpgtu_b_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpocmpgt_b_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpocmpgt_b_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpocmpgt_h_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpocmpgt_h_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpocmpgtu_w_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpocmpgtu_w_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpocmpgt_w_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpocmpgt_w_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpocmpgeu_b_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpocmpgeu_b_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpocmpge_b_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpocmpge_b_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpocmpge_h_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpocmpge_h_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpocmpgeu_w_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpocmpgeu_w_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpocmpge_w_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpocmpge_w_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cdadd3_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cdadd3_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpsub3_b_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpsub3_b_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpsub3_h_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpsub3_h_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpsub3_w_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpsub3_w_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cdsub3_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cdsub3_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpsadd3_h_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpsadd3_h_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpsadd3_w_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpsadd3_w_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpssub3_h_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpssub3_h_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpssub3_w_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpssub3_w_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpextuaddu3_b_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpextuaddu3_b_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpextuadd3_b_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpextuadd3_b_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpextladdu3_b_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpextladdu3_b_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpextladd3_b_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpextladd3_b_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpextusubu3_b_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpextusubu3_b_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpextusub3_b_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpextusub3_b_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpextlsubu3_b_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpextlsubu3_b_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpextlsub3_b_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpextlsub3_b_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpaveu3_b_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpaveu3_b_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpave3_b_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpave3_b_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpave3_h_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpave3_h_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpave3_w_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpave3_w_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpaddsru3_b_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpaddsru3_b_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpaddsr3_b_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpaddsr3_b_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpaddsr3_h_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpaddsr3_h_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpaddsr3_w_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpaddsr3_w_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpabsu3_b_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpabsu3_b_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpabs3_b_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpabs3_b_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpabs3_h_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpabs3_h_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpand3_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpand3_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpor3_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpor3_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpnor3_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpnor3_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpxor3_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpxor3_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cppacku_b_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cppacku_b_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cppack_b_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cppack_b_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cppack_h_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cppack_h_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpmaxu3_b_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpmaxu3_b_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpmax3_b_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpmax3_b_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpmax3_h_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpmax3_h_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpmaxu3_w_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpmaxu3_w_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpmax3_w_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpmax3_w_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpminu3_b_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpminu3_b_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpmin3_b_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpmin3_b_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpmin3_h_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpmin3_h_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpminu3_w_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpminu3_w_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpmin3_w_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpmin3_w_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpsrl3_b_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpsrl3_b_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpssrl3_b_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpssrl3_b_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpsrl3_h_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpsrl3_h_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpssrl3_h_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpssrl3_h_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpsrl3_w_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpsrl3_w_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpssrl3_w_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpssrl3_w_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cdsrl3_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cdsrl3_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpsra3_b_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpsra3_b_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpssra3_b_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpssra3_b_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpsra3_h_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpsra3_h_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpssra3_h_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpssra3_h_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpsra3_w_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpsra3_w_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpssra3_w_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpssra3_w_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cdsra3_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cdsra3_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpsll3_b_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpsll3_b_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpssll3_b_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpssll3_b_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpsll3_h_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpsll3_h_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpssll3_h_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpssll3_h_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpsll3_w_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpsll3_w_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpssll3_w_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpssll3_w_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cdsll3_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cdsll3_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpsla3_h_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpsla3_h_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpsla3_w_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpsla3_w_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpsrli3_b_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpsrli3_b_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpsrli3_h_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpsrli3_h_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpsrli3_w_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpsrli3_w_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cdsrli3_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cdsrli3_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpsrai3_b_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpsrai3_b_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpsrai3_h_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpsrai3_h_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpsrai3_w_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpsrai3_w_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cdsrai3_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cdsrai3_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpslli3_b_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpslli3_b_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpslli3_h_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpslli3_h_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpslli3_w_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpslli3_w_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cdslli3_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cdslli3_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpslai3_h_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpslai3_h_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpslai3_w_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpslai3_w_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpclipiu3_w_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpclipiu3_w_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpclipi3_w_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpclipi3_w_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cdclipiu3_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cdclipiu3_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cdclipi3_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cdclipi3_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpmovi_h_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpmovi_h_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpmoviu_w_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpmoviu_w_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpmovi_w_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpmovi_w_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cdmoviu_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cdmoviu_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cdmovi_P0_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cdmovi_P0_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_c1nop_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_c1nop_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpadda1u_b_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpadda1u_b_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpadda1_b_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpadda1_b_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpaddua1_h_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpaddua1_h_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpaddla1_h_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpaddla1_h_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpaddaca1u_b_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpaddaca1u_b_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpaddaca1_b_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpaddaca1_b_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpaddacua1_h_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpaddacua1_h_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpaddacla1_h_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpaddacla1_h_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpsuba1u_b_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpsuba1u_b_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpsuba1_b_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpsuba1_b_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpsubua1_h_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpsubua1_h_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpsubla1_h_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpsubla1_h_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpsubaca1u_b_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpsubaca1u_b_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpsubaca1_b_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpsubaca1_b_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpsubacua1_h_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpsubacua1_h_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpsubacla1_h_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpsubacla1_h_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpabsa1u_b_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpabsa1u_b_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpabsa1_b_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpabsa1_b_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpabsua1_h_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpabsua1_h_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpabsla1_h_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpabsla1_h_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpsada1u_b_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpsada1u_b_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpsada1_b_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpsada1_b_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpsadua1_h_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpsadua1_h_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpsadla1_h_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpsadla1_h_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpseta1_h_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpseta1_h_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpsetua1_w_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpsetua1_w_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpsetla1_w_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpsetla1_w_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpmova1_b_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpmova1_b_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpmovua1_h_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpmovua1_h_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpmovla1_h_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpmovla1_h_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpmovuua1_w_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpmovuua1_w_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpmovula1_w_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpmovula1_w_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpmovlua1_w_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpmovlua1_w_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpmovlla1_w_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpmovlla1_w_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cppacka1u_b_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cppacka1u_b_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cppacka1_b_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cppacka1_b_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cppackua1_h_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cppackua1_h_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cppackla1_h_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cppackla1_h_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cppackua1_w_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cppackua1_w_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cppackla1_w_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cppackla1_w_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpmovhua1_w_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpmovhua1_w_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpmovhla1_w_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpmovhla1_w_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpacsuma1_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpacsuma1_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpaccpa1_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpaccpa1_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpacswp_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpacswp_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpsrla1_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpsrla1_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpsraa1_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpsraa1_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpslla1_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpslla1_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpsrlia1_1_p1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpsrlia1_1_p1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpsraia1_1_p1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpsraia1_1_p1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpsllia1_1_p1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpsllia1_1_p1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpfmulia1s0u_b_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpfmulia1s0u_b_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpfmulia1s0_b_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpfmulia1s0_b_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpfmuliua1s0_h_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpfmuliua1s0_h_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpfmulila1s0_h_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpfmulila1s0_h_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpfmadia1s0u_b_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpfmadia1s0u_b_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpfmadia1s0_b_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpfmadia1s0_b_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpfmadiua1s0_h_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpfmadiua1s0_h_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpfmadila1s0_h_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpfmadila1s0_h_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpfmulia1s1u_b_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpfmulia1s1u_b_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpfmulia1s1_b_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpfmulia1s1_b_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpfmuliua1s1_h_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpfmuliua1s1_h_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpfmulila1s1_h_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpfmulila1s1_h_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpfmadia1s1u_b_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpfmadia1s1u_b_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpfmadia1s1_b_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpfmadia1s1_b_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpfmadiua1s1_h_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpfmadiua1s1_h_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpfmadila1s1_h_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpfmadila1s1_h_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpamulia1u_b_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpamulia1u_b_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpamulia1_b_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpamulia1_b_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpamuliua1_h_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpamuliua1_h_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpamulila1_h_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpamulila1_h_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpamadia1u_b_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpamadia1u_b_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpamadia1_b_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpamadia1_b_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpamadiua1_h_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpamadiua1_h_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpamadila1_h_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpamadila1_h_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpfmulia1u_b_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpfmulia1u_b_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpfmulia1_b_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpfmulia1_b_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpfmuliua1_h_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpfmuliua1_h_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpfmulila1_h_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpfmulila1_h_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpfmadia1u_b_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpfmadia1u_b_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpfmadia1_b_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpfmadia1_b_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpfmadiua1_h_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpfmadiua1_h_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpfmadila1_h_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpfmadila1_h_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpssqa1u_b_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpssqa1u_b_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpssqa1_b_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpssqa1_b_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpssda1u_b_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpssda1u_b_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpssda1_b_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpssda1_b_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpmula1u_b_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpmula1u_b_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpmula1_b_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpmula1_b_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpmulua1_h_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpmulua1_h_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpmulla1_h_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpmulla1_h_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpmulua1u_w_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpmulua1u_w_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpmulla1u_w_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpmulla1u_w_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpmulua1_w_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpmulua1_w_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpmulla1_w_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpmulla1_w_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpmada1u_b_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpmada1u_b_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpmada1_b_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpmada1_b_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpmadua1_h_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpmadua1_h_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpmadla1_h_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpmadla1_h_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpmadua1u_w_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpmadua1u_w_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpmadla1u_w_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpmadla1u_w_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpmadua1_w_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpmadua1_w_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpmadla1_w_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpmadla1_w_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpmsbua1_h_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpmsbua1_h_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpmsbla1_h_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpmsbla1_h_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpmsbua1u_w_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpmsbua1u_w_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpmsbla1u_w_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpmsbla1u_w_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpmsbua1_w_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpmsbua1_w_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpmsbla1_w_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpmsbla1_w_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpsmadua1_h_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpsmadua1_h_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpsmadla1_h_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpsmadla1_h_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpsmadua1_w_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpsmadua1_w_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpsmadla1_w_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpsmadla1_w_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpsmsbua1_h_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpsmsbua1_h_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpsmsbla1_h_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpsmsbla1_h_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpsmsbua1_w_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpsmsbua1_w_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpsmsbla1_w_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpsmsbla1_w_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpmulslua1_h_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpmulslua1_h_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpmulslla1_h_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpmulslla1_h_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpmulslua1_w_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpmulslua1_w_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpmulslla1_w_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpmulslla1_w_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpsmadslua1_h_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpsmadslua1_h_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpsmadslla1_h_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpsmadslla1_h_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpsmadslua1_w_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpsmadslua1_w_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpsmadslla1_w_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpsmadslla1_w_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpsmsbslua1_h_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpsmsbslua1_h_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpsmsbslla1_h_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpsmsbslla1_h_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpsmsbslua1_w_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpsmsbslua1_w_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpsmsbslla1_w_P1_before (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + UINT model_cpsmsbslla1_w_P1_after (mep_ext1_cpu *current_cpu, mepcop1_64_scache *sem); + + /* Enum declaration for unit types. */ +typedef enum unit_number { + UNIT_NONE, UNIT_U_STORE_CTRL_REG, UNIT_U_USE_CTRL_REG, UNIT_U_USE_GPR + , UNIT_U_MUL_GPR, UNIT_U_LDCB_GPR, UNIT_U_LOAD_GPR, UNIT_U_LDCB + , UNIT_U_STCB, UNIT_U_DIVIDE, UNIT_U_MULTIPLY, UNIT_U_BRANCH + , UNIT_U_EXEC, UNIT_MAX +} UNIT_NUMBER; + + struct unit { + unit_number unit; + UINT issue; + UINT done; + }; + + static const int MAX_UNITS = 1; + + typedef UINT (mepcop1_64_mep_model::*model_function) (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem); + + struct insn_timing { + // This is an integer that identifies this insn. + UINT num; + // Functions to handle insn-specific profiling. + model_function model_before; + model_function model_after; + // Array of function units used by this insn. + unit units[MAX_UNITS]; + }; + + static const insn_timing timing[]; +}; + +} // namespace mep_ext1 + +#endif // MEPCOP1_64_MODEL_H diff --git a/sid/component/cgen-cpu/mep/mep-cop1-64-sem.cxx b/sid/component/cgen-cpu/mep/mep-cop1-64-sem.cxx new file mode 100644 index 0000000000..1dce701403 --- /dev/null +++ b/sid/component/cgen-cpu/mep/mep-cop1-64-sem.cxx @@ -0,0 +1,7871 @@ +/* Simulator instruction semantics for mepcop1_64. + +THIS FILE IS MACHINE GENERATED WITH CGEN. + +Copyright (C) 2000-2007 Red Hat, Inc. + +This file is part of the Red Hat simulators. + + +*/ + + +#if HAVE_CONFIG_H +#include "config.h" +#endif +#include "mep_ext1.h" + +using namespace mep_ext1; // FIXME: namespace organization still wip +#define GET_ATTR(name) GET_ATTR_##name () + + +// ********** x-invalid: --invalid-- + +sem_status +mepcop1_64_sem_x_invalid (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.fmt_empty.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 0; + + { + current_cpu->invalid_insn (pc); + assert (0); + /* NOTREACHED */ + } + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpadd3_b_P0S_P1: cpadd3.b $crop,$crqp,$crpp + +sem_status +mepcop1_64_sem_cpadd3_b_P0S_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpadd3_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpadd3_h_P0S_P1: cpadd3.h $crop,$crqp,$crpp + +sem_status +mepcop1_64_sem_cpadd3_h_P0S_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpadd3_h (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpadd3_w_P0S_P1: cpadd3.w $crop,$crqp,$crpp + +sem_status +mepcop1_64_sem_cpadd3_w_P0S_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpadd3_w (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpunpacku_b_P0S_P1: cpunpacku.b $crop,$crqp,$crpp + +sem_status +mepcop1_64_sem_cpunpacku_b_P0S_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpunpacku_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpunpacku_h_P0S_P1: cpunpacku.h $crop,$crqp,$crpp + +sem_status +mepcop1_64_sem_cpunpacku_h_P0S_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpunpacku_h (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpunpacku_w_P0S_P1: cpunpacku.w $crop,$crqp,$crpp + +sem_status +mepcop1_64_sem_cpunpacku_w_P0S_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpunpacku_w (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpunpackl_b_P0S_P1: cpunpackl.b $crop,$crqp,$crpp + +sem_status +mepcop1_64_sem_cpunpackl_b_P0S_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpunpackl_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpunpackl_h_P0S_P1: cpunpackl.h $crop,$crqp,$crpp + +sem_status +mepcop1_64_sem_cpunpackl_h_P0S_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpunpackl_h (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpunpackl_w_P0S_P1: cpunpackl.w $crop,$crqp,$crpp + +sem_status +mepcop1_64_sem_cpunpackl_w_P0S_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpunpackl_w (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpsel_P0S_P1: cpsel $crop,$crqp,$crpp + +sem_status +mepcop1_64_sem_cpsel_P0S_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpsel (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpfsftbs0_P0S_P1: cpfsftbs0 $crop,$crqp,$crpp + +sem_status +mepcop1_64_sem_cpfsftbs0_P0S_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpfsftbs0 (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpfsftbs1_P0S_P1: cpfsftbs1 $crop,$crqp,$crpp + +sem_status +mepcop1_64_sem_cpfsftbs1_P0S_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpfsftbs1 (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpmov_P0S_P1: cpmov $crop,$crqp + +sem_status +mepcop1_64_sem_cpmov_P0S_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpmov (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpabsz_b_P0S_P1: cpabsz.b $crop,$crqp + +sem_status +mepcop1_64_sem_cpabsz_b_P0S_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpabsz_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpabsz_h_P0S_P1: cpabsz.h $crop,$crqp + +sem_status +mepcop1_64_sem_cpabsz_h_P0S_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpabsz_h (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpabsz_w_P0S_P1: cpabsz.w $crop,$crqp + +sem_status +mepcop1_64_sem_cpabsz_w_P0S_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpabsz_w (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpldz_h_P0S_P1: cpldz.h $crop,$crqp + +sem_status +mepcop1_64_sem_cpldz_h_P0S_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpldz_h (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpldz_w_P0S_P1: cpldz.w $crop,$crqp + +sem_status +mepcop1_64_sem_cpldz_w_P0S_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpldz_w (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpnorm_h_P0S_P1: cpnorm.h $crop,$crqp + +sem_status +mepcop1_64_sem_cpnorm_h_P0S_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpnorm_h (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpnorm_w_P0S_P1: cpnorm.w $crop,$crqp + +sem_status +mepcop1_64_sem_cpnorm_w_P0S_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpnorm_w (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cphaddu_b_P0S_P1: cphaddu.b $crop,$crqp + +sem_status +mepcop1_64_sem_cphaddu_b_P0S_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cphaddu_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cphadd_b_P0S_P1: cphadd.b $crop,$crqp + +sem_status +mepcop1_64_sem_cphadd_b_P0S_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cphadd_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cphadd_h_P0S_P1: cphadd.h $crop,$crqp + +sem_status +mepcop1_64_sem_cphadd_h_P0S_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cphadd_h (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cphadd_w_P0S_P1: cphadd.w $crop,$crqp + +sem_status +mepcop1_64_sem_cphadd_w_P0S_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cphadd_w (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpccadd_b_P0S_P1: cpccadd.b $crqp + +sem_status +mepcop1_64_sem_cpccadd_b_P0S_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpmoviu_w_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpccadd_b (pc, FLD (f_ivc2_5u13)); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpbcast_b_P0S_P1: cpbcast.b $crop,$crqp + +sem_status +mepcop1_64_sem_cpbcast_b_P0S_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpbcast_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpbcast_h_P0S_P1: cpbcast.h $crop,$crqp + +sem_status +mepcop1_64_sem_cpbcast_h_P0S_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpbcast_h (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpbcast_w_P0S_P1: cpbcast.w $crop,$crqp + +sem_status +mepcop1_64_sem_cpbcast_w_P0S_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpbcast_w (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpextuu_b_P0S_P1: cpextuu.b $crop,$crqp + +sem_status +mepcop1_64_sem_cpextuu_b_P0S_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpextuu_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpextu_b_P0S_P1: cpextu.b $crop,$crqp + +sem_status +mepcop1_64_sem_cpextu_b_P0S_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpextu_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpextuu_h_P0S_P1: cpextuu.h $crop,$crqp + +sem_status +mepcop1_64_sem_cpextuu_h_P0S_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpextuu_h (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpextu_h_P0S_P1: cpextu.h $crop,$crqp + +sem_status +mepcop1_64_sem_cpextu_h_P0S_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpextu_h (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpextlu_b_P0S_P1: cpextlu.b $crop,$crqp + +sem_status +mepcop1_64_sem_cpextlu_b_P0S_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpextlu_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpextl_b_P0S_P1: cpextl.b $crop,$crqp + +sem_status +mepcop1_64_sem_cpextl_b_P0S_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpextl_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpextlu_h_P0S_P1: cpextlu.h $crop,$crqp + +sem_status +mepcop1_64_sem_cpextlu_h_P0S_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpextlu_h (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpextl_h_P0S_P1: cpextl.h $crop,$crqp + +sem_status +mepcop1_64_sem_cpextl_h_P0S_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpextl_h (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpcastub_h_P0S_P1: cpcastub.h $crop,$crqp + +sem_status +mepcop1_64_sem_cpcastub_h_P0S_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpcastub_h (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpcastb_h_P0S_P1: cpcastb.h $crop,$crqp + +sem_status +mepcop1_64_sem_cpcastb_h_P0S_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpcastb_h (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpcastub_w_P0S_P1: cpcastub.w $crop,$crqp + +sem_status +mepcop1_64_sem_cpcastub_w_P0S_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpcastub_w (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpcastb_w_P0S_P1: cpcastb.w $crop,$crqp + +sem_status +mepcop1_64_sem_cpcastb_w_P0S_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpcastb_w (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpcastuh_w_P0S_P1: cpcastuh.w $crop,$crqp + +sem_status +mepcop1_64_sem_cpcastuh_w_P0S_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpcastuh_w (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpcasth_w_P0S_P1: cpcasth.w $crop,$crqp + +sem_status +mepcop1_64_sem_cpcasth_w_P0S_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpcasth_w (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cdcastuw_P0S_P1: cdcastuw $crop,$crqp + +sem_status +mepcop1_64_sem_cdcastuw_P0S_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cdcastuw (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cdcastw_P0S_P1: cdcastw $crop,$crqp + +sem_status +mepcop1_64_sem_cdcastw_P0S_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cdcastw (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpmovfrcsar0_P0S_P1: cpmovfrcsar0 $crop + +sem_status +mepcop1_64_sem_cpmovfrcsar0_P0S_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpmovfrcsar0 (pc); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpmovfrcsar1_P0S_P1: cpmovfrcsar1 $crop + +sem_status +mepcop1_64_sem_cpmovfrcsar1_P0S_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpmovfrcsar1 (pc); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpmovfrcc_P0S_P1: cpmovfrcc $crop + +sem_status +mepcop1_64_sem_cpmovfrcc_P0S_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpmovfrcc (pc); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpmovtocsar0_P0S_P1: cpmovtocsar0 $crqp + +sem_status +mepcop1_64_sem_cpmovtocsar0_P0S_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpmoviu_w_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpmovtocsar0 (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpmovtocsar1_P0S_P1: cpmovtocsar1 $crqp + +sem_status +mepcop1_64_sem_cpmovtocsar1_P0S_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpmoviu_w_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpmovtocsar1 (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpmovtocc_P0S_P1: cpmovtocc $crqp + +sem_status +mepcop1_64_sem_cpmovtocc_P0S_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpmoviu_w_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpmovtocc (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpcmpeqz_b_P0S_P1: cpcmpeqz.b $crqp,$crpp + +sem_status +mepcop1_64_sem_cpcmpeqz_b_P0S_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpcmpeqz_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpcmpeq_b_P0S_P1: cpcmpeq.b $crqp,$crpp + +sem_status +mepcop1_64_sem_cpcmpeq_b_P0S_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpcmpeq_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpcmpeq_h_P0S_P1: cpcmpeq.h $crqp,$crpp + +sem_status +mepcop1_64_sem_cpcmpeq_h_P0S_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpcmpeq_h (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpcmpeq_w_P0S_P1: cpcmpeq.w $crqp,$crpp + +sem_status +mepcop1_64_sem_cpcmpeq_w_P0S_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpcmpeq_w (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpcmpne_b_P0S_P1: cpcmpne.b $crqp,$crpp + +sem_status +mepcop1_64_sem_cpcmpne_b_P0S_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpcmpne_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpcmpne_h_P0S_P1: cpcmpne.h $crqp,$crpp + +sem_status +mepcop1_64_sem_cpcmpne_h_P0S_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpcmpne_h (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpcmpne_w_P0S_P1: cpcmpne.w $crqp,$crpp + +sem_status +mepcop1_64_sem_cpcmpne_w_P0S_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpcmpne_w (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpcmpgtu_b_P0S_P1: cpcmpgtu.b $crqp,$crpp + +sem_status +mepcop1_64_sem_cpcmpgtu_b_P0S_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpcmpgtu_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpcmpgt_b_P0S_P1: cpcmpgt.b $crqp,$crpp + +sem_status +mepcop1_64_sem_cpcmpgt_b_P0S_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpcmpgt_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpcmpgt_h_P0S_P1: cpcmpgt.h $crqp,$crpp + +sem_status +mepcop1_64_sem_cpcmpgt_h_P0S_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpcmpgt_h (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpcmpgtu_w_P0S_P1: cpcmpgtu.w $crqp,$crpp + +sem_status +mepcop1_64_sem_cpcmpgtu_w_P0S_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpcmpgtu_w (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpcmpgt_w_P0S_P1: cpcmpgt.w $crqp,$crpp + +sem_status +mepcop1_64_sem_cpcmpgt_w_P0S_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpcmpgt_w (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpcmpgeu_b_P0S_P1: cpcmpgeu.b $crqp,$crpp + +sem_status +mepcop1_64_sem_cpcmpgeu_b_P0S_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpcmpgeu_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpcmpge_b_P0S_P1: cpcmpge.b $crqp,$crpp + +sem_status +mepcop1_64_sem_cpcmpge_b_P0S_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpcmpge_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpcmpge_h_P0S_P1: cpcmpge.h $crqp,$crpp + +sem_status +mepcop1_64_sem_cpcmpge_h_P0S_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpcmpge_h (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpcmpgeu_w_P0S_P1: cpcmpgeu.w $crqp,$crpp + +sem_status +mepcop1_64_sem_cpcmpgeu_w_P0S_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpcmpgeu_w (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpcmpge_w_P0S_P1: cpcmpge.w $crqp,$crpp + +sem_status +mepcop1_64_sem_cpcmpge_w_P0S_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpcmpge_w (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpfsftbi_P0_P1: cpfsftbi $crop,$crqp,$crpp,$imm3p5 + +sem_status +mepcop1_64_sem_cpfsftbi_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpfsftbi (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)], FLD (f_ivc2_3u5)); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpacmpeq_b_P0_P1: cpacmpeq.b $crqp,$crpp + +sem_status +mepcop1_64_sem_cpacmpeq_b_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpacmpeq_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpacmpeq_h_P0_P1: cpacmpeq.h $crqp,$crpp + +sem_status +mepcop1_64_sem_cpacmpeq_h_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpacmpeq_h (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpacmpeq_w_P0_P1: cpacmpeq.w $crqp,$crpp + +sem_status +mepcop1_64_sem_cpacmpeq_w_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpacmpeq_w (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpacmpne_b_P0_P1: cpacmpne.b $crqp,$crpp + +sem_status +mepcop1_64_sem_cpacmpne_b_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpacmpne_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpacmpne_h_P0_P1: cpacmpne.h $crqp,$crpp + +sem_status +mepcop1_64_sem_cpacmpne_h_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpacmpne_h (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpacmpne_w_P0_P1: cpacmpne.w $crqp,$crpp + +sem_status +mepcop1_64_sem_cpacmpne_w_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpacmpne_w (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpacmpgtu_b_P0_P1: cpacmpgtu.b $crqp,$crpp + +sem_status +mepcop1_64_sem_cpacmpgtu_b_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpacmpgtu_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpacmpgt_b_P0_P1: cpacmpgt.b $crqp,$crpp + +sem_status +mepcop1_64_sem_cpacmpgt_b_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpacmpgt_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpacmpgt_h_P0_P1: cpacmpgt.h $crqp,$crpp + +sem_status +mepcop1_64_sem_cpacmpgt_h_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpacmpgt_h (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpacmpgtu_w_P0_P1: cpacmpgtu.w $crqp,$crpp + +sem_status +mepcop1_64_sem_cpacmpgtu_w_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpacmpgtu_w (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpacmpgt_w_P0_P1: cpacmpgt.w $crqp,$crpp + +sem_status +mepcop1_64_sem_cpacmpgt_w_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpacmpgt_w (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpacmpgeu_b_P0_P1: cpacmpgeu.b $crqp,$crpp + +sem_status +mepcop1_64_sem_cpacmpgeu_b_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpacmpgeu_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpacmpge_b_P0_P1: cpacmpge.b $crqp,$crpp + +sem_status +mepcop1_64_sem_cpacmpge_b_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpacmpge_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpacmpge_h_P0_P1: cpacmpge.h $crqp,$crpp + +sem_status +mepcop1_64_sem_cpacmpge_h_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpacmpge_h (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpacmpgeu_w_P0_P1: cpacmpgeu.w $crqp,$crpp + +sem_status +mepcop1_64_sem_cpacmpgeu_w_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpacmpgeu_w (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpacmpge_w_P0_P1: cpacmpge.w $crqp,$crpp + +sem_status +mepcop1_64_sem_cpacmpge_w_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpacmpge_w (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpocmpeq_b_P0_P1: cpocmpeq.b $crqp,$crpp + +sem_status +mepcop1_64_sem_cpocmpeq_b_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpocmpeq_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpocmpeq_h_P0_P1: cpocmpeq.h $crqp,$crpp + +sem_status +mepcop1_64_sem_cpocmpeq_h_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpocmpeq_h (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpocmpeq_w_P0_P1: cpocmpeq.w $crqp,$crpp + +sem_status +mepcop1_64_sem_cpocmpeq_w_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpocmpeq_w (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpocmpne_b_P0_P1: cpocmpne.b $crqp,$crpp + +sem_status +mepcop1_64_sem_cpocmpne_b_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpocmpne_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpocmpne_h_P0_P1: cpocmpne.h $crqp,$crpp + +sem_status +mepcop1_64_sem_cpocmpne_h_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpocmpne_h (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpocmpne_w_P0_P1: cpocmpne.w $crqp,$crpp + +sem_status +mepcop1_64_sem_cpocmpne_w_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpocmpne_w (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpocmpgtu_b_P0_P1: cpocmpgtu.b $crqp,$crpp + +sem_status +mepcop1_64_sem_cpocmpgtu_b_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpocmpgtu_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpocmpgt_b_P0_P1: cpocmpgt.b $crqp,$crpp + +sem_status +mepcop1_64_sem_cpocmpgt_b_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpocmpgt_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpocmpgt_h_P0_P1: cpocmpgt.h $crqp,$crpp + +sem_status +mepcop1_64_sem_cpocmpgt_h_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpocmpgt_h (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpocmpgtu_w_P0_P1: cpocmpgtu.w $crqp,$crpp + +sem_status +mepcop1_64_sem_cpocmpgtu_w_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpocmpgtu_w (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpocmpgt_w_P0_P1: cpocmpgt.w $crqp,$crpp + +sem_status +mepcop1_64_sem_cpocmpgt_w_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpocmpgt_w (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpocmpgeu_b_P0_P1: cpocmpgeu.b $crqp,$crpp + +sem_status +mepcop1_64_sem_cpocmpgeu_b_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpocmpgeu_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpocmpge_b_P0_P1: cpocmpge.b $crqp,$crpp + +sem_status +mepcop1_64_sem_cpocmpge_b_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpocmpge_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpocmpge_h_P0_P1: cpocmpge.h $crqp,$crpp + +sem_status +mepcop1_64_sem_cpocmpge_h_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpocmpge_h (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpocmpgeu_w_P0_P1: cpocmpgeu.w $crqp,$crpp + +sem_status +mepcop1_64_sem_cpocmpgeu_w_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpocmpgeu_w (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpocmpge_w_P0_P1: cpocmpge.w $crqp,$crpp + +sem_status +mepcop1_64_sem_cpocmpge_w_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpocmpge_w (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cdadd3_P0_P1: cdadd3 $crop,$crqp,$crpp + +sem_status +mepcop1_64_sem_cdadd3_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cdadd3 (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpsub3_b_P0_P1: cpsub3.b $crop,$crqp,$crpp + +sem_status +mepcop1_64_sem_cpsub3_b_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpsub3_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpsub3_h_P0_P1: cpsub3.h $crop,$crqp,$crpp + +sem_status +mepcop1_64_sem_cpsub3_h_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpsub3_h (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpsub3_w_P0_P1: cpsub3.w $crop,$crqp,$crpp + +sem_status +mepcop1_64_sem_cpsub3_w_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpsub3_w (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cdsub3_P0_P1: cdsub3 $crop,$crqp,$crpp + +sem_status +mepcop1_64_sem_cdsub3_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cdsub3 (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpsadd3_h_P0_P1: cpsadd3.h $crop,$crqp,$crpp + +sem_status +mepcop1_64_sem_cpsadd3_h_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpsadd3_h (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpsadd3_w_P0_P1: cpsadd3.w $crop,$crqp,$crpp + +sem_status +mepcop1_64_sem_cpsadd3_w_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpsadd3_w (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpssub3_h_P0_P1: cpssub3.h $crop,$crqp,$crpp + +sem_status +mepcop1_64_sem_cpssub3_h_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpssub3_h (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpssub3_w_P0_P1: cpssub3.w $crop,$crqp,$crpp + +sem_status +mepcop1_64_sem_cpssub3_w_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpssub3_w (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpextuaddu3_b_P0_P1: cpextuaddu3.b $crop,$crqp,$crpp + +sem_status +mepcop1_64_sem_cpextuaddu3_b_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpextuaddu3_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpextuadd3_b_P0_P1: cpextuadd3.b $crop,$crqp,$crpp + +sem_status +mepcop1_64_sem_cpextuadd3_b_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpextuadd3_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpextladdu3_b_P0_P1: cpextladdu3.b $crop,$crqp,$crpp + +sem_status +mepcop1_64_sem_cpextladdu3_b_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpextladdu3_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpextladd3_b_P0_P1: cpextladd3.b $crop,$crqp,$crpp + +sem_status +mepcop1_64_sem_cpextladd3_b_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpextladd3_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpextusubu3_b_P0_P1: cpextusubu3.b $crop,$crqp,$crpp + +sem_status +mepcop1_64_sem_cpextusubu3_b_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpextusubu3_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpextusub3_b_P0_P1: cpextusub3.b $crop,$crqp,$crpp + +sem_status +mepcop1_64_sem_cpextusub3_b_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpextusub3_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpextlsubu3_b_P0_P1: cpextlsubu3.b $crop,$crqp,$crpp + +sem_status +mepcop1_64_sem_cpextlsubu3_b_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpextlsubu3_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpextlsub3_b_P0_P1: cpextlsub3.b $crop,$crqp,$crpp + +sem_status +mepcop1_64_sem_cpextlsub3_b_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpextlsub3_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpaveu3_b_P0_P1: cpaveu3.b $crop,$crqp,$crpp + +sem_status +mepcop1_64_sem_cpaveu3_b_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpaveu3_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpave3_b_P0_P1: cpave3.b $crop,$crqp,$crpp + +sem_status +mepcop1_64_sem_cpave3_b_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpave3_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpave3_h_P0_P1: cpave3.h $crop,$crqp,$crpp + +sem_status +mepcop1_64_sem_cpave3_h_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpave3_h (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpave3_w_P0_P1: cpave3.w $crop,$crqp,$crpp + +sem_status +mepcop1_64_sem_cpave3_w_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpave3_w (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpaddsru3_b_P0_P1: cpaddsru3.b $crop,$crqp,$crpp + +sem_status +mepcop1_64_sem_cpaddsru3_b_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpaddsru3_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpaddsr3_b_P0_P1: cpaddsr3.b $crop,$crqp,$crpp + +sem_status +mepcop1_64_sem_cpaddsr3_b_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpaddsr3_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpaddsr3_h_P0_P1: cpaddsr3.h $crop,$crqp,$crpp + +sem_status +mepcop1_64_sem_cpaddsr3_h_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpaddsr3_h (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpaddsr3_w_P0_P1: cpaddsr3.w $crop,$crqp,$crpp + +sem_status +mepcop1_64_sem_cpaddsr3_w_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpaddsr3_w (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpabsu3_b_P0_P1: cpabsu3.b $crop,$crqp,$crpp + +sem_status +mepcop1_64_sem_cpabsu3_b_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpabsu3_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpabs3_b_P0_P1: cpabs3.b $crop,$crqp,$crpp + +sem_status +mepcop1_64_sem_cpabs3_b_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpabs3_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpabs3_h_P0_P1: cpabs3.h $crop,$crqp,$crpp + +sem_status +mepcop1_64_sem_cpabs3_h_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpabs3_h (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpand3_P0_P1: cpand3 $crop,$crqp,$crpp + +sem_status +mepcop1_64_sem_cpand3_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpand3 (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpor3_P0_P1: cpor3 $crop,$crqp,$crpp + +sem_status +mepcop1_64_sem_cpor3_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpor3 (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpnor3_P0_P1: cpnor3 $crop,$crqp,$crpp + +sem_status +mepcop1_64_sem_cpnor3_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpnor3 (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpxor3_P0_P1: cpxor3 $crop,$crqp,$crpp + +sem_status +mepcop1_64_sem_cpxor3_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpxor3 (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cppacku_b_P0_P1: cppacku.b $crop,$crqp,$crpp + +sem_status +mepcop1_64_sem_cppacku_b_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cppacku_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cppack_b_P0_P1: cppack.b $crop,$crqp,$crpp + +sem_status +mepcop1_64_sem_cppack_b_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cppack_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cppack_h_P0_P1: cppack.h $crop,$crqp,$crpp + +sem_status +mepcop1_64_sem_cppack_h_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cppack_h (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpmaxu3_b_P0_P1: cpmaxu3.b $crop,$crqp,$crpp + +sem_status +mepcop1_64_sem_cpmaxu3_b_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpmaxu3_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpmax3_b_P0_P1: cpmax3.b $crop,$crqp,$crpp + +sem_status +mepcop1_64_sem_cpmax3_b_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpmax3_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpmax3_h_P0_P1: cpmax3.h $crop,$crqp,$crpp + +sem_status +mepcop1_64_sem_cpmax3_h_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpmax3_h (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpmaxu3_w_P0_P1: cpmaxu3.w $crop,$crqp,$crpp + +sem_status +mepcop1_64_sem_cpmaxu3_w_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpmaxu3_w (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpmax3_w_P0_P1: cpmax3.w $crop,$crqp,$crpp + +sem_status +mepcop1_64_sem_cpmax3_w_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpmax3_w (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpminu3_b_P0_P1: cpminu3.b $crop,$crqp,$crpp + +sem_status +mepcop1_64_sem_cpminu3_b_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpminu3_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpmin3_b_P0_P1: cpmin3.b $crop,$crqp,$crpp + +sem_status +mepcop1_64_sem_cpmin3_b_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpmin3_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpmin3_h_P0_P1: cpmin3.h $crop,$crqp,$crpp + +sem_status +mepcop1_64_sem_cpmin3_h_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpmin3_h (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpminu3_w_P0_P1: cpminu3.w $crop,$crqp,$crpp + +sem_status +mepcop1_64_sem_cpminu3_w_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpminu3_w (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpmin3_w_P0_P1: cpmin3.w $crop,$crqp,$crpp + +sem_status +mepcop1_64_sem_cpmin3_w_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpmin3_w (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpsrl3_b_P0_P1: cpsrl3.b $crop,$crqp,$crpp + +sem_status +mepcop1_64_sem_cpsrl3_b_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpsrl3_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpssrl3_b_P0_P1: cpssrl3.b $crop,$crqp,$crpp + +sem_status +mepcop1_64_sem_cpssrl3_b_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpssrl3_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpsrl3_h_P0_P1: cpsrl3.h $crop,$crqp,$crpp + +sem_status +mepcop1_64_sem_cpsrl3_h_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpsrl3_h (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpssrl3_h_P0_P1: cpssrl3.h $crop,$crqp,$crpp + +sem_status +mepcop1_64_sem_cpssrl3_h_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpssrl3_h (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpsrl3_w_P0_P1: cpsrl3.w $crop,$crqp,$crpp + +sem_status +mepcop1_64_sem_cpsrl3_w_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpsrl3_w (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpssrl3_w_P0_P1: cpssrl3.w $crop,$crqp,$crpp + +sem_status +mepcop1_64_sem_cpssrl3_w_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpssrl3_w (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cdsrl3_P0_P1: cdsrl3 $crop,$crqp,$crpp + +sem_status +mepcop1_64_sem_cdsrl3_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cdsrl3 (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpsra3_b_P0_P1: cpsra3.b $crop,$crqp,$crpp + +sem_status +mepcop1_64_sem_cpsra3_b_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpsra3_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpssra3_b_P0_P1: cpssra3.b $crop,$crqp,$crpp + +sem_status +mepcop1_64_sem_cpssra3_b_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpssra3_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpsra3_h_P0_P1: cpsra3.h $crop,$crqp,$crpp + +sem_status +mepcop1_64_sem_cpsra3_h_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpsra3_h (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpssra3_h_P0_P1: cpssra3.h $crop,$crqp,$crpp + +sem_status +mepcop1_64_sem_cpssra3_h_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpssra3_h (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpsra3_w_P0_P1: cpsra3.w $crop,$crqp,$crpp + +sem_status +mepcop1_64_sem_cpsra3_w_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpsra3_w (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpssra3_w_P0_P1: cpssra3.w $crop,$crqp,$crpp + +sem_status +mepcop1_64_sem_cpssra3_w_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpssra3_w (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cdsra3_P0_P1: cdsra3 $crop,$crqp,$crpp + +sem_status +mepcop1_64_sem_cdsra3_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cdsra3 (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpsll3_b_P0_P1: cpsll3.b $crop,$crqp,$crpp + +sem_status +mepcop1_64_sem_cpsll3_b_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpsll3_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpssll3_b_P0_P1: cpssll3.b $crop,$crqp,$crpp + +sem_status +mepcop1_64_sem_cpssll3_b_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpssll3_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpsll3_h_P0_P1: cpsll3.h $crop,$crqp,$crpp + +sem_status +mepcop1_64_sem_cpsll3_h_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpsll3_h (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpssll3_h_P0_P1: cpssll3.h $crop,$crqp,$crpp + +sem_status +mepcop1_64_sem_cpssll3_h_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpssll3_h (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpsll3_w_P0_P1: cpsll3.w $crop,$crqp,$crpp + +sem_status +mepcop1_64_sem_cpsll3_w_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpsll3_w (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpssll3_w_P0_P1: cpssll3.w $crop,$crqp,$crpp + +sem_status +mepcop1_64_sem_cpssll3_w_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpssll3_w (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cdsll3_P0_P1: cdsll3 $crop,$crqp,$crpp + +sem_status +mepcop1_64_sem_cdsll3_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cdsll3 (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpsla3_h_P0_P1: cpsla3.h $crop,$crqp,$crpp + +sem_status +mepcop1_64_sem_cpsla3_h_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpsla3_h (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpsla3_w_P0_P1: cpsla3.w $crop,$crqp,$crpp + +sem_status +mepcop1_64_sem_cpsla3_w_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpsla3_w (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpsrli3_b_P0_P1: cpsrli3.b $crop,$crqp,$imm3p5 + +sem_status +mepcop1_64_sem_cpsrli3_b_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpsrli3_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], FLD (f_ivc2_3u5)); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpsrli3_h_P0_P1: cpsrli3.h $crop,$crqp,$imm4p4 + +sem_status +mepcop1_64_sem_cpsrli3_h_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpsrli3_h_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpsrli3_h (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], FLD (f_ivc2_4u4)); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpsrli3_w_P0_P1: cpsrli3.w $crop,$crqp,$imm5p3 + +sem_status +mepcop1_64_sem_cpsrli3_w_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpsrli3_w_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpsrli3_w (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], FLD (f_ivc2_5u3)); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cdsrli3_P0_P1: cdsrli3 $crop,$crqp,$imm6p2 + +sem_status +mepcop1_64_sem_cdsrli3_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cdsrli3 (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], FLD (f_ivc2_6u2)); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpsrai3_b_P0_P1: cpsrai3.b $crop,$crqp,$imm3p5 + +sem_status +mepcop1_64_sem_cpsrai3_b_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpsrai3_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], FLD (f_ivc2_3u5)); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpsrai3_h_P0_P1: cpsrai3.h $crop,$crqp,$imm4p4 + +sem_status +mepcop1_64_sem_cpsrai3_h_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpsrli3_h_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpsrai3_h (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], FLD (f_ivc2_4u4)); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpsrai3_w_P0_P1: cpsrai3.w $crop,$crqp,$imm5p3 + +sem_status +mepcop1_64_sem_cpsrai3_w_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpsrli3_w_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpsrai3_w (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], FLD (f_ivc2_5u3)); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cdsrai3_P0_P1: cdsrai3 $crop,$crqp,$imm6p2 + +sem_status +mepcop1_64_sem_cdsrai3_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cdsrai3 (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], FLD (f_ivc2_6u2)); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpslli3_b_P0_P1: cpslli3.b $crop,$crqp,$imm3p5 + +sem_status +mepcop1_64_sem_cpslli3_b_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfsftbi_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpslli3_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], FLD (f_ivc2_3u5)); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpslli3_h_P0_P1: cpslli3.h $crop,$crqp,$imm4p4 + +sem_status +mepcop1_64_sem_cpslli3_h_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpsrli3_h_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpslli3_h (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], FLD (f_ivc2_4u4)); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpslli3_w_P0_P1: cpslli3.w $crop,$crqp,$imm5p3 + +sem_status +mepcop1_64_sem_cpslli3_w_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpsrli3_w_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpslli3_w (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], FLD (f_ivc2_5u3)); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cdslli3_P0_P1: cdslli3 $crop,$crqp,$imm6p2 + +sem_status +mepcop1_64_sem_cdslli3_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cdslli3 (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], FLD (f_ivc2_6u2)); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpslai3_h_P0_P1: cpslai3.h $crop,$crqp,$imm4p4 + +sem_status +mepcop1_64_sem_cpslai3_h_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpsrli3_h_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpslai3_h (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], FLD (f_ivc2_4u4)); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpslai3_w_P0_P1: cpslai3.w $crop,$crqp,$imm5p3 + +sem_status +mepcop1_64_sem_cpslai3_w_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpsrli3_w_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpslai3_w (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], FLD (f_ivc2_5u3)); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpclipiu3_w_P0_P1: cpclipiu3.w $crop,$crqp,$imm5p3 + +sem_status +mepcop1_64_sem_cpclipiu3_w_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpsrli3_w_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpclipiu3_w (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], FLD (f_ivc2_5u3)); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpclipi3_w_P0_P1: cpclipi3.w $crop,$crqp,$imm5p3 + +sem_status +mepcop1_64_sem_cpclipi3_w_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpsrli3_w_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpclipi3_w (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], FLD (f_ivc2_5u3)); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cdclipiu3_P0_P1: cdclipiu3 $crop,$crqp,$imm6p2 + +sem_status +mepcop1_64_sem_cdclipiu3_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cdclipiu3 (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], FLD (f_ivc2_6u2)); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cdclipi3_P0_P1: cdclipi3 $crop,$crqp,$imm6p2 + +sem_status +mepcop1_64_sem_cdclipi3_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cdclipi3 (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], FLD (f_ivc2_6u2)); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpmovi_h_P0_P1: cpmovi.h $crqp,$simm16p0 + +sem_status +mepcop1_64_sem_cpmovi_h_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpmovi_h_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpmovi_h16 (pc, FLD (f_ivc2_simm16p0)); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u13) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u13), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpmoviu_w_P0_P1: cpmoviu.w $crqp,$imm16p0 + +sem_status +mepcop1_64_sem_cpmoviu_w_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpmoviu_w_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpmoviu_w16 (pc, FLD (f_ivc2_imm16p0)); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u13) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u13), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpmovi_w_P0_P1: cpmovi.w $crqp,$simm16p0 + +sem_status +mepcop1_64_sem_cpmovi_w_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpmovi_h_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpmovi_w16 (pc, FLD (f_ivc2_simm16p0)); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u13) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u13), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cdmoviu_P0_P1: cdmoviu $crqp,$imm16p0 + +sem_status +mepcop1_64_sem_cdmoviu_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpmoviu_w_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cdmoviu16 (pc, FLD (f_ivc2_imm16p0)); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u13) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u13), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cdmovi_P0_P1: cdmovi $crqp,$simm16p0 + +sem_status +mepcop1_64_sem_cdmovi_P0_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpmovi_h_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cdmovi16 (pc, FLD (f_ivc2_simm16p0)); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u13) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u13), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** c1nop_P1: c1nop + +sem_status +mepcop1_64_sem_c1nop_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.fmt_empty.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_c1nop (pc); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpadda1u_b_P1: cpadda1u.b $crqp,$crpp + +sem_status +mepcop1_64_sem_cpadda1u_b_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpadda1u_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpadda1_b_P1: cpadda1.b $crqp,$crpp + +sem_status +mepcop1_64_sem_cpadda1_b_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpadda1_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpaddua1_h_P1: cpaddua1.h $crqp,$crpp + +sem_status +mepcop1_64_sem_cpaddua1_h_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpaddua1_h (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpaddla1_h_P1: cpaddla1.h $crqp,$crpp + +sem_status +mepcop1_64_sem_cpaddla1_h_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpaddla1_h (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpaddaca1u_b_P1: cpaddaca1u.b $crqp,$crpp + +sem_status +mepcop1_64_sem_cpaddaca1u_b_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpaddaca1u_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpaddaca1_b_P1: cpaddaca1.b $crqp,$crpp + +sem_status +mepcop1_64_sem_cpaddaca1_b_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpaddaca1_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpaddacua1_h_P1: cpaddacua1.h $crqp,$crpp + +sem_status +mepcop1_64_sem_cpaddacua1_h_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpaddacua1_h (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpaddacla1_h_P1: cpaddacla1.h $crqp,$crpp + +sem_status +mepcop1_64_sem_cpaddacla1_h_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpaddacla1_h (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpsuba1u_b_P1: cpsuba1u.b $crqp,$crpp + +sem_status +mepcop1_64_sem_cpsuba1u_b_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpsuba1u_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpsuba1_b_P1: cpsuba1.b $crqp,$crpp + +sem_status +mepcop1_64_sem_cpsuba1_b_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpsuba1_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpsubua1_h_P1: cpsubua1.h $crqp,$crpp + +sem_status +mepcop1_64_sem_cpsubua1_h_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpsubua1_h (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpsubla1_h_P1: cpsubla1.h $crqp,$crpp + +sem_status +mepcop1_64_sem_cpsubla1_h_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpsubla1_h (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpsubaca1u_b_P1: cpsubaca1u.b $crqp,$crpp + +sem_status +mepcop1_64_sem_cpsubaca1u_b_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpsubaca1u_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpsubaca1_b_P1: cpsubaca1.b $crqp,$crpp + +sem_status +mepcop1_64_sem_cpsubaca1_b_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpsubaca1_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpsubacua1_h_P1: cpsubacua1.h $crqp,$crpp + +sem_status +mepcop1_64_sem_cpsubacua1_h_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpsubacua1_h (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpsubacla1_h_P1: cpsubacla1.h $crqp,$crpp + +sem_status +mepcop1_64_sem_cpsubacla1_h_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpsubacla1_h (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpabsa1u_b_P1: cpabsa1u.b $crqp,$crpp + +sem_status +mepcop1_64_sem_cpabsa1u_b_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpabsa1u_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpabsa1_b_P1: cpabsa1.b $crqp,$crpp + +sem_status +mepcop1_64_sem_cpabsa1_b_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpabsa1_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpabsua1_h_P1: cpabsua1.h $crqp,$crpp + +sem_status +mepcop1_64_sem_cpabsua1_h_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpabsua1_h (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpabsla1_h_P1: cpabsla1.h $crqp,$crpp + +sem_status +mepcop1_64_sem_cpabsla1_h_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpabsla1_h (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpsada1u_b_P1: cpsada1u.b $crqp,$crpp + +sem_status +mepcop1_64_sem_cpsada1u_b_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpsada1u_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpsada1_b_P1: cpsada1.b $crqp,$crpp + +sem_status +mepcop1_64_sem_cpsada1_b_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpsada1_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpsadua1_h_P1: cpsadua1.h $crqp,$crpp + +sem_status +mepcop1_64_sem_cpsadua1_h_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpsadua1_h (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpsadla1_h_P1: cpsadla1.h $crqp,$crpp + +sem_status +mepcop1_64_sem_cpsadla1_h_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpsadla1_h (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpseta1_h_P1: cpseta1.h $crqp,$crpp + +sem_status +mepcop1_64_sem_cpseta1_h_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpseta1_h (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpsetua1_w_P1: cpsetua1.w $crqp,$crpp + +sem_status +mepcop1_64_sem_cpsetua1_w_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpsetua1_w (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpsetla1_w_P1: cpsetla1.w $crqp,$crpp + +sem_status +mepcop1_64_sem_cpsetla1_w_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpsetla1_w (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpmova1_b_P1: cpmova1.b $crop + +sem_status +mepcop1_64_sem_cpmova1_b_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpmova1_b (pc); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpmovua1_h_P1: cpmovua1.h $crop + +sem_status +mepcop1_64_sem_cpmovua1_h_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpmovua1_h (pc); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpmovla1_h_P1: cpmovla1.h $crop + +sem_status +mepcop1_64_sem_cpmovla1_h_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpmovla1_h (pc); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpmovuua1_w_P1: cpmovuua1.w $crop + +sem_status +mepcop1_64_sem_cpmovuua1_w_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpmovuua1_w (pc); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpmovula1_w_P1: cpmovula1.w $crop + +sem_status +mepcop1_64_sem_cpmovula1_w_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpmovula1_w (pc); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpmovlua1_w_P1: cpmovlua1.w $crop + +sem_status +mepcop1_64_sem_cpmovlua1_w_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpmovlua1_w (pc); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpmovlla1_w_P1: cpmovlla1.w $crop + +sem_status +mepcop1_64_sem_cpmovlla1_w_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpmovlla1_w (pc); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cppacka1u_b_P1: cppacka1u.b $crop + +sem_status +mepcop1_64_sem_cppacka1u_b_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cppacka1u_b (pc); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cppacka1_b_P1: cppacka1.b $crop + +sem_status +mepcop1_64_sem_cppacka1_b_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cppacka1_b (pc); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cppackua1_h_P1: cppackua1.h $crop + +sem_status +mepcop1_64_sem_cppackua1_h_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cppackua1_h (pc); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cppackla1_h_P1: cppackla1.h $crop + +sem_status +mepcop1_64_sem_cppackla1_h_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cppackla1_h (pc); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cppackua1_w_P1: cppackua1.w $crop + +sem_status +mepcop1_64_sem_cppackua1_w_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cppackua1_w (pc); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cppackla1_w_P1: cppackla1.w $crop + +sem_status +mepcop1_64_sem_cppackla1_w_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cppackla1_w (pc); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpmovhua1_w_P1: cpmovhua1.w $crop + +sem_status +mepcop1_64_sem_cpmovhua1_w_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpmovhua1_w (pc); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpmovhla1_w_P1: cpmovhla1.w $crop + +sem_status +mepcop1_64_sem_cpmovhla1_w_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); + { + DI opval = current_cpu->ivc2_cpmovhla1_w (pc); + if (UNLIKELY(current_cpu->trace_result_p)) + current_cpu->trace_stream << "cr64" << '[' << FLD (f_ivc2_5u23) << ']' << ":=0x" << hex << opval << dec << " "; + current_cpu->h_cr64_set (FLD (f_ivc2_5u23), opval); + } +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpacsuma1_P1: cpacsuma1 + +sem_status +mepcop1_64_sem_cpacsuma1_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.fmt_empty.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpacsuma1 (pc); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpaccpa1_P1: cpaccpa1 + +sem_status +mepcop1_64_sem_cpaccpa1_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.fmt_empty.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpaccpa1 (pc); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpacswp_P1: cpacswp + +sem_status +mepcop1_64_sem_cpacswp_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.fmt_empty.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpacswp (pc); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpsrla1_P1: cpsrla1 $crqp + +sem_status +mepcop1_64_sem_cpsrla1_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpmoviu_w_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpsrla1 (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpsraa1_P1: cpsraa1 $crqp + +sem_status +mepcop1_64_sem_cpsraa1_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpmoviu_w_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpsraa1 (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpslla1_P1: cpslla1 $crqp + +sem_status +mepcop1_64_sem_cpslla1_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpmoviu_w_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpslla1 (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpsrlia1_1_p1: cpsrlia1 $imm5p23 + +sem_status +mepcop1_64_sem_cpsrlia1_1_p1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpsrlia1 (pc, FLD (f_ivc2_5u23)); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpsraia1_1_p1: cpsraia1 $imm5p23 + +sem_status +mepcop1_64_sem_cpsraia1_1_p1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpsraia1 (pc, FLD (f_ivc2_5u23)); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpsllia1_1_p1: cpsllia1 $imm5p23 + +sem_status +mepcop1_64_sem_cpsllia1_1_p1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cdsrli3_P0_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpsllia1 (pc, FLD (f_ivc2_5u23)); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpfmulia1s0u_b_P1: cpfmulia1s0u.b $crqp,$crpp,$simm8p0 + +sem_status +mepcop1_64_sem_cpfmulia1s0u_b_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpfmulia1s0u_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)], FLD (f_ivc2_8s0)); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpfmulia1s0_b_P1: cpfmulia1s0.b $crqp,$crpp,$simm8p0 + +sem_status +mepcop1_64_sem_cpfmulia1s0_b_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpfmulia1s0_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)], FLD (f_ivc2_8s0)); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpfmuliua1s0_h_P1: cpfmuliua1s0.h $crqp,$crpp,$simm8p0 + +sem_status +mepcop1_64_sem_cpfmuliua1s0_h_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpfmuliua1s0_h (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)], FLD (f_ivc2_8s0)); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpfmulila1s0_h_P1: cpfmulila1s0.h $crqp,$crpp,$simm8p0 + +sem_status +mepcop1_64_sem_cpfmulila1s0_h_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpfmulila1s0_h (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)], FLD (f_ivc2_8s0)); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpfmadia1s0u_b_P1: cpfmadia1s0u.b $crqp,$crpp,$simm8p0 + +sem_status +mepcop1_64_sem_cpfmadia1s0u_b_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpfmadia1s0u_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)], FLD (f_ivc2_8s0)); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpfmadia1s0_b_P1: cpfmadia1s0.b $crqp,$crpp,$simm8p0 + +sem_status +mepcop1_64_sem_cpfmadia1s0_b_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpfmadia1s0_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)], FLD (f_ivc2_8s0)); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpfmadiua1s0_h_P1: cpfmadiua1s0.h $crqp,$crpp,$simm8p0 + +sem_status +mepcop1_64_sem_cpfmadiua1s0_h_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpfmadiua1s0_h (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)], FLD (f_ivc2_8s0)); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpfmadila1s0_h_P1: cpfmadila1s0.h $crqp,$crpp,$simm8p0 + +sem_status +mepcop1_64_sem_cpfmadila1s0_h_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpfmadila1s0_h (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)], FLD (f_ivc2_8s0)); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpfmulia1s1u_b_P1: cpfmulia1s1u.b $crqp,$crpp,$simm8p0 + +sem_status +mepcop1_64_sem_cpfmulia1s1u_b_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpfmulia1s1u_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)], FLD (f_ivc2_8s0)); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpfmulia1s1_b_P1: cpfmulia1s1.b $crqp,$crpp,$simm8p0 + +sem_status +mepcop1_64_sem_cpfmulia1s1_b_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpfmulia1s1_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)], FLD (f_ivc2_8s0)); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpfmuliua1s1_h_P1: cpfmuliua1s1.h $crqp,$crpp,$simm8p0 + +sem_status +mepcop1_64_sem_cpfmuliua1s1_h_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpfmuliua1s1_h (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)], FLD (f_ivc2_8s0)); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpfmulila1s1_h_P1: cpfmulila1s1.h $crqp,$crpp,$simm8p0 + +sem_status +mepcop1_64_sem_cpfmulila1s1_h_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpfmulila1s1_h (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)], FLD (f_ivc2_8s0)); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpfmadia1s1u_b_P1: cpfmadia1s1u.b $crqp,$crpp,$simm8p0 + +sem_status +mepcop1_64_sem_cpfmadia1s1u_b_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpfmadia1s1u_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)], FLD (f_ivc2_8s0)); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpfmadia1s1_b_P1: cpfmadia1s1.b $crqp,$crpp,$simm8p0 + +sem_status +mepcop1_64_sem_cpfmadia1s1_b_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpfmadia1s1_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)], FLD (f_ivc2_8s0)); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpfmadiua1s1_h_P1: cpfmadiua1s1.h $crqp,$crpp,$simm8p0 + +sem_status +mepcop1_64_sem_cpfmadiua1s1_h_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpfmadiua1s1_h (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)], FLD (f_ivc2_8s0)); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpfmadila1s1_h_P1: cpfmadila1s1.h $crqp,$crpp,$simm8p0 + +sem_status +mepcop1_64_sem_cpfmadila1s1_h_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpfmadila1s1_h (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)], FLD (f_ivc2_8s0)); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpamulia1u_b_P1: cpamulia1u.b $crqp,$crpp,$simm8p0 + +sem_status +mepcop1_64_sem_cpamulia1u_b_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpamulia1u_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)], FLD (f_ivc2_8s0)); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpamulia1_b_P1: cpamulia1.b $crqp,$crpp,$simm8p0 + +sem_status +mepcop1_64_sem_cpamulia1_b_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpamulia1_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)], FLD (f_ivc2_8s0)); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpamuliua1_h_P1: cpamuliua1.h $crqp,$crpp,$simm8p0 + +sem_status +mepcop1_64_sem_cpamuliua1_h_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpamuliua1_h (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)], FLD (f_ivc2_8s0)); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpamulila1_h_P1: cpamulila1.h $crqp,$crpp,$simm8p0 + +sem_status +mepcop1_64_sem_cpamulila1_h_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpamulila1_h (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)], FLD (f_ivc2_8s0)); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpamadia1u_b_P1: cpamadia1u.b $crqp,$crpp,$simm8p0 + +sem_status +mepcop1_64_sem_cpamadia1u_b_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpamadia1u_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)], FLD (f_ivc2_8s0)); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpamadia1_b_P1: cpamadia1.b $crqp,$crpp,$simm8p0 + +sem_status +mepcop1_64_sem_cpamadia1_b_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpamadia1_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)], FLD (f_ivc2_8s0)); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpamadiua1_h_P1: cpamadiua1.h $crqp,$crpp,$simm8p0 + +sem_status +mepcop1_64_sem_cpamadiua1_h_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpamadiua1_h (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)], FLD (f_ivc2_8s0)); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpamadila1_h_P1: cpamadila1.h $crqp,$crpp,$simm8p0 + +sem_status +mepcop1_64_sem_cpamadila1_h_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpamadila1_h (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)], FLD (f_ivc2_8s0)); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpfmulia1u_b_P1: cpfmulia1u.b $crqp,$crpp,$imm3p25,$simm8p0 + +sem_status +mepcop1_64_sem_cpfmulia1u_b_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpfmulia1u_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)], FLD (f_ivc2_3u25), FLD (f_ivc2_8s0)); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpfmulia1_b_P1: cpfmulia1.b $crqp,$crpp,$imm3p25,$simm8p0 + +sem_status +mepcop1_64_sem_cpfmulia1_b_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpfmulia1_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)], FLD (f_ivc2_3u25), FLD (f_ivc2_8s0)); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpfmuliua1_h_P1: cpfmuliua1.h $crqp,$crpp,$imm3p25,$simm8p0 + +sem_status +mepcop1_64_sem_cpfmuliua1_h_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpfmuliua1_h (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)], FLD (f_ivc2_3u25), FLD (f_ivc2_8s0)); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpfmulila1_h_P1: cpfmulila1.h $crqp,$crpp,$imm3p25,$simm8p0 + +sem_status +mepcop1_64_sem_cpfmulila1_h_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpfmulila1_h (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)], FLD (f_ivc2_3u25), FLD (f_ivc2_8s0)); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpfmadia1u_b_P1: cpfmadia1u.b $crqp,$crpp,$imm3p25,$simm8p0 + +sem_status +mepcop1_64_sem_cpfmadia1u_b_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpfmadia1u_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)], FLD (f_ivc2_3u25), FLD (f_ivc2_8s0)); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpfmadia1_b_P1: cpfmadia1.b $crqp,$crpp,$imm3p25,$simm8p0 + +sem_status +mepcop1_64_sem_cpfmadia1_b_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpfmadia1_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)], FLD (f_ivc2_3u25), FLD (f_ivc2_8s0)); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpfmadiua1_h_P1: cpfmadiua1.h $crqp,$crpp,$imm3p25,$simm8p0 + +sem_status +mepcop1_64_sem_cpfmadiua1_h_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpfmadiua1_h (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)], FLD (f_ivc2_3u25), FLD (f_ivc2_8s0)); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpfmadila1_h_P1: cpfmadila1.h $crqp,$crpp,$imm3p25,$simm8p0 + +sem_status +mepcop1_64_sem_cpfmadila1_h_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpfmadila1_h (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)], FLD (f_ivc2_3u25), FLD (f_ivc2_8s0)); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpssqa1u_b_P1: cpssqa1u.b $crqp,$crpp + +sem_status +mepcop1_64_sem_cpssqa1u_b_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpssqa1u_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpssqa1_b_P1: cpssqa1.b $crqp,$crpp + +sem_status +mepcop1_64_sem_cpssqa1_b_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpssqa1_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpssda1u_b_P1: cpssda1u.b $crqp,$crpp + +sem_status +mepcop1_64_sem_cpssda1u_b_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpssda1u_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpssda1_b_P1: cpssda1.b $crqp,$crpp + +sem_status +mepcop1_64_sem_cpssda1_b_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpssda1_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpmula1u_b_P1: cpmula1u.b $crqp,$crpp + +sem_status +mepcop1_64_sem_cpmula1u_b_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpmula1u_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpmula1_b_P1: cpmula1.b $crqp,$crpp + +sem_status +mepcop1_64_sem_cpmula1_b_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpmula1_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpmulua1_h_P1: cpmulua1.h $crqp,$crpp + +sem_status +mepcop1_64_sem_cpmulua1_h_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpmulua1_h (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpmulla1_h_P1: cpmulla1.h $crqp,$crpp + +sem_status +mepcop1_64_sem_cpmulla1_h_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpmulla1_h (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpmulua1u_w_P1: cpmulua1u.w $crqp,$crpp + +sem_status +mepcop1_64_sem_cpmulua1u_w_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpmulua1u_w (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpmulla1u_w_P1: cpmulla1u.w $crqp,$crpp + +sem_status +mepcop1_64_sem_cpmulla1u_w_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpmulla1u_w (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpmulua1_w_P1: cpmulua1.w $crqp,$crpp + +sem_status +mepcop1_64_sem_cpmulua1_w_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpmulua1_w (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpmulla1_w_P1: cpmulla1.w $crqp,$crpp + +sem_status +mepcop1_64_sem_cpmulla1_w_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpmulla1_w (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpmada1u_b_P1: cpmada1u.b $crqp,$crpp + +sem_status +mepcop1_64_sem_cpmada1u_b_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpmada1u_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpmada1_b_P1: cpmada1.b $crqp,$crpp + +sem_status +mepcop1_64_sem_cpmada1_b_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpmada1_b (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpmadua1_h_P1: cpmadua1.h $crqp,$crpp + +sem_status +mepcop1_64_sem_cpmadua1_h_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpmadua1_h (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpmadla1_h_P1: cpmadla1.h $crqp,$crpp + +sem_status +mepcop1_64_sem_cpmadla1_h_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpmadla1_h (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpmadua1u_w_P1: cpmadua1u.w $crqp,$crpp + +sem_status +mepcop1_64_sem_cpmadua1u_w_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpmadua1u_w (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpmadla1u_w_P1: cpmadla1u.w $crqp,$crpp + +sem_status +mepcop1_64_sem_cpmadla1u_w_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpmadla1u_w (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpmadua1_w_P1: cpmadua1.w $crqp,$crpp + +sem_status +mepcop1_64_sem_cpmadua1_w_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpmadua1_w (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpmadla1_w_P1: cpmadla1.w $crqp,$crpp + +sem_status +mepcop1_64_sem_cpmadla1_w_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpmadla1_w (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpmsbua1_h_P1: cpmsbua1.h $crqp,$crpp + +sem_status +mepcop1_64_sem_cpmsbua1_h_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpmsbua1_h (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpmsbla1_h_P1: cpmsbla1.h $crqp,$crpp + +sem_status +mepcop1_64_sem_cpmsbla1_h_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpmsbla1_h (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpmsbua1u_w_P1: cpmsbua1u.w $crqp,$crpp + +sem_status +mepcop1_64_sem_cpmsbua1u_w_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpmsbua1u_w (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpmsbla1u_w_P1: cpmsbla1u.w $crqp,$crpp + +sem_status +mepcop1_64_sem_cpmsbla1u_w_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpmsbla1u_w (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpmsbua1_w_P1: cpmsbua1.w $crqp,$crpp + +sem_status +mepcop1_64_sem_cpmsbua1_w_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpmsbua1_w (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpmsbla1_w_P1: cpmsbla1.w $crqp,$crpp + +sem_status +mepcop1_64_sem_cpmsbla1_w_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpmsbla1_w (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpsmadua1_h_P1: cpsmadua1.h $crqp,$crpp + +sem_status +mepcop1_64_sem_cpsmadua1_h_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpsmadua1_h (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpsmadla1_h_P1: cpsmadla1.h $crqp,$crpp + +sem_status +mepcop1_64_sem_cpsmadla1_h_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpsmadla1_h (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpsmadua1_w_P1: cpsmadua1.w $crqp,$crpp + +sem_status +mepcop1_64_sem_cpsmadua1_w_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpsmadua1_w (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpsmadla1_w_P1: cpsmadla1.w $crqp,$crpp + +sem_status +mepcop1_64_sem_cpsmadla1_w_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpsmadla1_w (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpsmsbua1_h_P1: cpsmsbua1.h $crqp,$crpp + +sem_status +mepcop1_64_sem_cpsmsbua1_h_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpsmsbua1_h (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpsmsbla1_h_P1: cpsmsbla1.h $crqp,$crpp + +sem_status +mepcop1_64_sem_cpsmsbla1_h_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpsmsbla1_h (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpsmsbua1_w_P1: cpsmsbua1.w $crqp,$crpp + +sem_status +mepcop1_64_sem_cpsmsbua1_w_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpsmsbua1_w (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpsmsbla1_w_P1: cpsmsbla1.w $crqp,$crpp + +sem_status +mepcop1_64_sem_cpsmsbla1_w_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpsmsbla1_w (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpmulslua1_h_P1: cpmulslua1.h $crqp,$crpp + +sem_status +mepcop1_64_sem_cpmulslua1_h_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpmulslua1_h (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpmulslla1_h_P1: cpmulslla1.h $crqp,$crpp + +sem_status +mepcop1_64_sem_cpmulslla1_h_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpmulslla1_h (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpmulslua1_w_P1: cpmulslua1.w $crqp,$crpp + +sem_status +mepcop1_64_sem_cpmulslua1_w_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpmulslua1_w (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpmulslla1_w_P1: cpmulslla1.w $crqp,$crpp + +sem_status +mepcop1_64_sem_cpmulslla1_w_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpmulslla1_w (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpsmadslua1_h_P1: cpsmadslua1.h $crqp,$crpp + +sem_status +mepcop1_64_sem_cpsmadslua1_h_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpsmadslua1_h (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpsmadslla1_h_P1: cpsmadslla1.h $crqp,$crpp + +sem_status +mepcop1_64_sem_cpsmadslla1_h_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpsmadslla1_h (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpsmadslua1_w_P1: cpsmadslua1.w $crqp,$crpp + +sem_status +mepcop1_64_sem_cpsmadslua1_w_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpsmadslua1_w (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpsmadslla1_w_P1: cpsmadslla1.w $crqp,$crpp + +sem_status +mepcop1_64_sem_cpsmadslla1_w_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpsmadslla1_w (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpsmsbslua1_h_P1: cpsmsbslua1.h $crqp,$crpp + +sem_status +mepcop1_64_sem_cpsmsbslua1_h_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpsmsbslua1_h (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpsmsbslla1_h_P1: cpsmsbslla1.h $crqp,$crpp + +sem_status +mepcop1_64_sem_cpsmsbslla1_h_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpsmsbslla1_h (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpsmsbslua1_w_P1: cpsmsbslua1.w $crqp,$crpp + +sem_status +mepcop1_64_sem_cpsmsbslua1_w_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpsmsbslua1_w (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + +// ********** cpsmsbslla1_w_P1: cpsmsbslla1.w $crqp,$crpp + +sem_status +mepcop1_64_sem_cpsmsbslla1_w_P1 (mep_ext1_cpu* current_cpu, mepcop1_64_scache* sem) +{ +#define FLD(f) abuf->fields.sfmt_cpfmulia1u_b_P1.f + sem_status status = SEM_STATUS_NORMAL; + mepcop1_64_scache* abuf = sem; + unsigned long long written = 0; + PCADDR pc = abuf->addr; + PCADDR npc = pc + 4; + +{ +current_cpu->check_option_cp (pc); +current_cpu->ivc2_cpsmsbslla1_w (pc, current_cpu->hardware.h_cr64[FLD (f_ivc2_5u13)], current_cpu->hardware.h_cr64[FLD (f_ivc2_5u18)]); +} + + current_cpu->done_insn (npc, status); + return status; +#undef FLD +} + diff --git a/sid/component/cgen-cpu/mep/mep-core1-decode.cxx b/sid/component/cgen-cpu/mep/mep-core1-decode.cxx index 9ee8b8831d..a3269441aa 100644 --- a/sid/component/cgen-cpu/mep/mep-core1-decode.cxx +++ b/sid/component/cgen-cpu/mep/mep-core1-decode.cxx @@ -22,230 +22,230 @@ using namespace mep_ext1; // FIXME: namespace organization still wip mepcore1_idesc mepcore1_idesc::idesc_table[MEPCORE1_INSN_RI_26 + 1] = { - { mepcore1_sem_x_invalid, "X_INVALID", MEPCORE1_INSN_X_INVALID, { 0|(1<check_option_cp64 (pc); DI opval = current_cpu->do_lmcp (* FLD (i_rma), pc); if (UNLIKELY(current_cpu->trace_result_p)) current_cpu->trace_stream << "cr64" << '[' << FLD (f_crn) << ']' << ":=0x" << hex << opval << dec << " "; - current_cpu->hardware.h_cr64[FLD (f_crn)] = opval; + current_cpu->h_cr64_set (FLD (f_crn), opval); } } @@ -5403,7 +5403,7 @@ current_cpu->check_option_cp64 (pc); DI opval = current_cpu->do_lmcpi (FLD (f_rm), pc); if (UNLIKELY(current_cpu->trace_result_p)) current_cpu->trace_stream << "cr64" << '[' << FLD (f_crn) << ']' << ":=0x" << hex << opval << dec << " "; - current_cpu->hardware.h_cr64[FLD (f_crn)] = opval; + current_cpu->h_cr64_set (FLD (f_crn), opval); } { SI opval = * FLD (i_rma); @@ -5514,7 +5514,7 @@ current_cpu->check_option_cp64 (pc); DI opval = current_cpu->do_lmcp16 (* FLD (i_rma), FLD (f_16s16), pc); if (UNLIKELY(current_cpu->trace_result_p)) current_cpu->trace_stream << "cr64" << '[' << FLD (f_crn) << ']' << ":=0x" << hex << opval << dec << " "; - current_cpu->hardware.h_cr64[FLD (f_crn)] = opval; + current_cpu->h_cr64_set (FLD (f_crn), opval); } } @@ -5773,7 +5773,7 @@ current_cpu->check_option_cp64 (pc); DI opval = current_cpu->do_lmcpa (FLD (f_rm), FLD (f_cdisp10), pc); if (UNLIKELY(current_cpu->trace_result_p)) current_cpu->trace_stream << "cr64" << '[' << FLD (f_crn) << ']' << ":=0x" << hex << opval << dec << " "; - current_cpu->hardware.h_cr64[FLD (f_crn)] = opval; + current_cpu->h_cr64_set (FLD (f_crn), opval); } { SI opval = * FLD (i_rma); @@ -6066,7 +6066,7 @@ current_cpu->check_option_cp64 (pc); DI opval = current_cpu->do_lmcp (* FLD (i_rma), pc); if (UNLIKELY(current_cpu->trace_result_p)) current_cpu->trace_stream << "cr64" << '[' << FLD (f_crn) << ']' << ":=0x" << hex << opval << dec << " "; - current_cpu->hardware.h_cr64[FLD (f_crn)] = opval; + current_cpu->h_cr64_set (FLD (f_crn), opval); } { SI opval = ({ SI tmp_modulo_mask; @@ -6363,7 +6363,7 @@ current_cpu->check_option_cp64 (pc); DI opval = current_cpu->do_lmcp (* FLD (i_rma), pc); if (UNLIKELY(current_cpu->trace_result_p)) current_cpu->trace_stream << "cr64" << '[' << FLD (f_crn) << ']' << ":=0x" << hex << opval << dec << " "; - current_cpu->hardware.h_cr64[FLD (f_crn)] = opval; + current_cpu->h_cr64_set (FLD (f_crn), opval); } { SI opval = ({ SI tmp_modulo_mask; @@ -6788,7 +6788,7 @@ current_cpu->hardware.h_csr[((UINT) 16)] = ORSI (ANDSI (current_cpu->hardware.h_ #undef FLD } -// ********** sim-syscall: --unused-- +// ********** sim-syscall: --syscall-- sem_status mepcore1_sem_sim_syscall (mep_ext1_cpu* current_cpu, mepcore1_scache* sem) diff --git a/sid/component/cgen-cpu/mep/mep-cpu.h b/sid/component/cgen-cpu/mep/mep-cpu.h index 34ee19c4e1..c4807ed29f 100644 --- a/sid/component/cgen-cpu/mep/mep-cpu.h +++ b/sid/component/cgen-cpu/mep/mep-cpu.h @@ -25,8 +25,12 @@ public: SI h_csr[32]; /* 64-bit coprocessor registers */ DI h_cr64[32]; + /* 64-bit coprocessor registers, pending writes */ + DI h_cr64_w[32]; /* Coprocessor control registers */ SI h_ccr[64]; + /* Coprocessor control registers, pending writes */ + SI h_ccr_w[64]; } hardware; void stream_cgen_hardware (std::ostream &ost) const @@ -38,8 +42,12 @@ public: ost << hardware.h_csr[i] << ' '; for (int i = 0; i < 32; i++) ost << hardware.h_cr64[i] << ' '; + for (int i = 0; i < 32; i++) + ost << hardware.h_cr64_w[i] << ' '; for (int i = 0; i < 64; i++) ost << hardware.h_ccr[i] << ' '; + for (int i = 0; i < 64; i++) + ost << hardware.h_ccr_w[i] << ' '; } void destream_cgen_hardware (std::istream &ist) { @@ -50,8 +58,12 @@ public: ist >> hardware.h_csr[i]; for (int i = 0; i < 32; i++) ist >> hardware.h_cr64[i]; + for (int i = 0; i < 32; i++) + ist >> hardware.h_cr64_w[i]; for (int i = 0; i < 64; i++) ist >> hardware.h_ccr[i]; + for (int i = 0; i < 64; i++) + ist >> hardware.h_ccr_w[i]; } // C++ register access function templates #define current_cpu this @@ -67,14 +79,29 @@ public: } inline DI h_cr64_get (UINT regno) const { return this->hardware.h_cr64[regno]; } - inline void h_cr64_set (UINT regno, DI newval) { this->hardware.h_cr64[regno] = newval; } + inline void h_cr64_set (UINT regno, DI newval) { current_cpu->h_cr64_queue_set (regno, newval); + } + + inline DI h_cr64_w_get (UINT regno) const { return this->hardware.h_cr64_w[regno]; } + inline void h_cr64_w_set (UINT regno, DI newval) { this->hardware.h_cr64_w[regno] = newval; } inline SI h_cr_get (UINT regno) const { return TRUNCDISI (current_cpu->h_cr64_get (regno)); } inline void h_cr_set (UINT regno, SI newval) { current_cpu->h_cr64_set (regno, EXTSIDI (newval)); } inline SI h_ccr_get (UINT regno) const { return this->hardware.h_ccr[regno]; } - inline void h_ccr_set (UINT regno, SI newval) { current_cpu->cgen_set_ccr_value (regno, newval); + inline void h_ccr_set (UINT regno, SI newval) { current_cpu->h_ccr_queue_set (regno, newval); + } + + inline SI h_ccr_w_get (UINT regno) const { return this->hardware.h_ccr_w[regno]; } + inline void h_ccr_w_set (UINT regno, SI newval) { this->hardware.h_ccr_w[regno] = newval; } + + inline DI h_cr_ivc2_get (UINT regno) const { return current_cpu->h_cr64_get (regno); } + inline void h_cr_ivc2_set (UINT regno, DI newval) { current_cpu->h_cr64_set (regno, newval); + } + + inline DI h_ccr_ivc2_get (UINT regno) const { return current_cpu->h_ccr_get (regno); } + inline void h_ccr_ivc2_set (UINT regno, DI newval) { current_cpu->h_ccr_set (regno, newval); } #undef current_cpu diff --git a/sid/component/cgen-cpu/mep/mep-decode.cxx b/sid/component/cgen-cpu/mep/mep-decode.cxx index d441a67e35..581b84b9d4 100644 --- a/sid/component/cgen-cpu/mep/mep-decode.cxx +++ b/sid/component/cgen-cpu/mep/mep-decode.cxx @@ -22,230 +22,230 @@ using namespace mep_basic; // FIXME: namespace organization still wip mep_idesc mep_idesc::idesc_table[MEP_INSN_RI_26 + 1] = { - { mep_sem_x_invalid, "X_INVALID", MEP_INSN_X_INVALID, { 0|(1<check_option_cp64 (pc); DI opval = current_cpu->do_lmcp (* FLD (i_rma), pc); if (UNLIKELY(current_cpu->trace_result_p)) current_cpu->trace_stream << "cr64" << '[' << FLD (f_crn) << ']' << ":=0x" << hex << opval << dec << " "; - current_cpu->hardware.h_cr64[FLD (f_crn)] = opval; + current_cpu->h_cr64_set (FLD (f_crn), opval); } } @@ -5403,7 +5403,7 @@ current_cpu->check_option_cp64 (pc); DI opval = current_cpu->do_lmcpi (FLD (f_rm), pc); if (UNLIKELY(current_cpu->trace_result_p)) current_cpu->trace_stream << "cr64" << '[' << FLD (f_crn) << ']' << ":=0x" << hex << opval << dec << " "; - current_cpu->hardware.h_cr64[FLD (f_crn)] = opval; + current_cpu->h_cr64_set (FLD (f_crn), opval); } { SI opval = * FLD (i_rma); @@ -5514,7 +5514,7 @@ current_cpu->check_option_cp64 (pc); DI opval = current_cpu->do_lmcp16 (* FLD (i_rma), FLD (f_16s16), pc); if (UNLIKELY(current_cpu->trace_result_p)) current_cpu->trace_stream << "cr64" << '[' << FLD (f_crn) << ']' << ":=0x" << hex << opval << dec << " "; - current_cpu->hardware.h_cr64[FLD (f_crn)] = opval; + current_cpu->h_cr64_set (FLD (f_crn), opval); } } @@ -5773,7 +5773,7 @@ current_cpu->check_option_cp64 (pc); DI opval = current_cpu->do_lmcpa (FLD (f_rm), FLD (f_cdisp10), pc); if (UNLIKELY(current_cpu->trace_result_p)) current_cpu->trace_stream << "cr64" << '[' << FLD (f_crn) << ']' << ":=0x" << hex << opval << dec << " "; - current_cpu->hardware.h_cr64[FLD (f_crn)] = opval; + current_cpu->h_cr64_set (FLD (f_crn), opval); } { SI opval = * FLD (i_rma); @@ -6066,7 +6066,7 @@ current_cpu->check_option_cp64 (pc); DI opval = current_cpu->do_lmcp (* FLD (i_rma), pc); if (UNLIKELY(current_cpu->trace_result_p)) current_cpu->trace_stream << "cr64" << '[' << FLD (f_crn) << ']' << ":=0x" << hex << opval << dec << " "; - current_cpu->hardware.h_cr64[FLD (f_crn)] = opval; + current_cpu->h_cr64_set (FLD (f_crn), opval); } { SI opval = ({ SI tmp_modulo_mask; @@ -6363,7 +6363,7 @@ current_cpu->check_option_cp64 (pc); DI opval = current_cpu->do_lmcp (* FLD (i_rma), pc); if (UNLIKELY(current_cpu->trace_result_p)) current_cpu->trace_stream << "cr64" << '[' << FLD (f_crn) << ']' << ":=0x" << hex << opval << dec << " "; - current_cpu->hardware.h_cr64[FLD (f_crn)] = opval; + current_cpu->h_cr64_set (FLD (f_crn), opval); } { SI opval = ({ SI tmp_modulo_mask; @@ -6788,7 +6788,7 @@ current_cpu->hardware.h_csr[((UINT) 16)] = ORSI (ANDSI (current_cpu->hardware.h_ #undef FLD } -// ********** sim-syscall: --unused-- +// ********** sim-syscall: --syscall-- sem_status mep_sem_sim_syscall (mep_basic_cpu* current_cpu, mep_scache* sem) diff --git a/sid/component/cgen-cpu/mep/mep.cxx b/sid/component/cgen-cpu/mep/mep.cxx index d8a6f03fff..b5b272699f 100644 --- a/sid/component/cgen-cpu/mep/mep.cxx +++ b/sid/component/cgen-cpu/mep/mep.cxx @@ -106,6 +106,7 @@ mep_cpu::mep_cpu () add_attribute ("mul-option?", &insn_options[MUL], "setting"); add_attribute ("sat-option?", &insn_options[SAT], "setting"); add_attribute ("uci-option?", &insn_options[UCI], "setting"); + add_attribute ("ivc2-decode?", &ivc2_decode_p, "setting"); add_attribute ("warn-write-to-code-option?", &warn_write_to_code, "setting"); add_attribute ("dsp-user-out-option?", &dsp_user_out, "setting"); add_attribute ("corrupt-caches?", &corrupt_caches, "setting"); @@ -1471,6 +1472,9 @@ mep_cpu::step_insns() { PCADDR save_pc; stepping = true; + + this->h_regs_flush_write_queue (); + while (true) { // Check whether the scaches need to be flushed. @@ -1528,6 +1532,9 @@ mep_cpu::step_insns() // Call down to VLIW or non-VLIW steppers s = this->step_one_insn (pc, insn_size); + // Now copy any queued writes to the main registers. + this->h_regs_flush_write_queue (); + // Handle fresh DSP exception if (UNLIKELY (this->dsp_exception_pending_p)) { diff --git a/sid/component/cgen-cpu/mep/mep.h b/sid/component/cgen-cpu/mep/mep.h index 8a2a15e841..8883800d5e 100644 --- a/sid/component/cgen-cpu/mep/mep.h +++ b/sid/component/cgen-cpu/mep/mep.h @@ -13,6 +13,11 @@ using namespace cgen; #include "mep-desc.h" +/* This is a hack. This function is in libopcodes; we call it to tell + the disassembler what mode and slot we want the bits disassembled + for. */ +extern "C" void mep_print_insn_set_ivc2_mode (int, int, int); + using sidutil::callback_pin; // begin-fpu-includes @@ -25,6 +30,7 @@ namespace mep // Include cgen generated elements. #include "mep-cpu.h" // begin-copro-cpu-includes +#include "ivc2-cpu.h" // end-copro-cpu-includes public: @@ -40,6 +46,51 @@ namespace mep { cerr << "mep-cpu rtx error: " << msg << endl; } + + // Each queue is a list of which foo_w[] registers need to be + // copied back to the foo[] registers after an insn bundle + // cycle. + unsigned char cr64_queue[64]; /* num regs * num parallel insns */ + unsigned int cr64_queuelen; + unsigned char ccr_queue[64]; /* num regs * num parallel insns */ + unsigned int ccr_queuelen; + + inline void h_cr64_queue_set (int index, DI newval) + { + hardware.h_cr64_w[index] = newval; + cr64_queue[cr64_queuelen++] = index; + } + inline void h_ccr_queue_set (int index, DI newval) + { + hardware.h_ccr_w[index] = newval; + ccr_queue[ccr_queuelen++] = index; + } + inline void h_regs_flush_write_queue () + { + while (cr64_queuelen) + { + -- cr64_queuelen; + hardware.h_cr64 [cr64_queue [cr64_queuelen]] + = hardware.h_cr64_w [cr64_queue [cr64_queuelen]]; + } + while (ccr_queuelen) + { + -- ccr_queuelen; + hardware.h_ccr [ccr_queue [ccr_queuelen]] + = hardware.h_ccr_w [ccr_queue [ccr_queuelen]]; + } + } + + // IVC2 instructions + enum ivc2_slot_types { + IVC2_CORE, IVC2_C3, IVC2_P0S, IVC2_P0, IVC2_P1 + }; + enum ivc2_slot_types ivc2_slot; + + mep_cpu_cgen() + : cr64_queuelen(0), + ccr_queuelen(0) + { } }; class debugger_bus_with_control_bus_vision : @@ -242,6 +293,8 @@ namespace mep bool step_insn_count_1_required; bool hwe_option; bool bit_insn_p; + bool ivc2_decode_p; + USI p0_insn, p1_insn; sid::host_int_4 config_index; int cop_data_bus_width; int dsp_dmem_if_width; @@ -252,7 +305,7 @@ namespace mep static const int CORE_C2 = 0x02; static const int CORE_C3 = 0x03; static const int CORE_C4 = 0x04; - static const int CORE_C5 = 0x50; + static const int CORE_C5 = 0x08; static const int CORE_H1 = 0x10; int core_type () const { return (h_csr_get (17) >> 8) & 0xff; } int machine () const { switch (core_type ()) { @@ -385,12 +438,18 @@ namespace mep cgen_bitset_add (isas, isa); host_int_4 save_passthrough = this->downstream_passthrough_pin.recall (); downstream_passthrough_pin.on (); + if (ivc2_decode_p) + mep_print_insn_set_ivc2_mode (ivc2_decode_p, + (h_csr_get (16) & 0x1000) && (h_csr_get (26) & 0x40), + config_index); cgen_bi_endian_cpu::disassemble (pc, print_insn_mep, bfd_target_elf_flavour, bfd_arch_mep, (current_endianness() == endian_little ? BFD_ENDIAN_LITTLE : BFD_ENDIAN_BIG), machine_name (), isas, machine ()); + if (ivc2_decode_p) + mep_print_insn_set_ivc2_mode (0, 0, 0); downstream_passthrough_pin.set (save_passthrough); } @@ -462,6 +521,7 @@ namespace mep MEP_COPRO_32, MEP_COPRO_64, MEP_CORE_16_COPRO_16, MEP_CORE_16_COPRO_48, MEP_CORE_32_COPRO_32, + MEP_IVC2_V1, MEP_IVC2_V2, MEP_IVC2_V3, }; template @@ -566,8 +626,18 @@ namespace mep { // We are in vliw64 mode. We have to find the instruction // proportions before we continue. + + if (ivc2_decode_p) + { + if ((insn_0 & 0xf00f) == 0xf007) + result = MEP_IVC2_V3; + else if ((insn_0 & 0xc000) == 0xc000) + result = MEP_IVC2_V2; + else + result = MEP_IVC2_V1; + } - if ((insn_0 & 0x8000) && (insn_0 & 0x4000)) + else if ((insn_0 & 0x8000) && (insn_0 & 0x4000)) { // We either have a 64-bit copro insn or a 32-bit // core insn with a 32-bit copro insn. @@ -602,7 +672,11 @@ namespace mep { // Core mode. - if ((insn_0 & 0x8000) && (insn_0 & 0x4000)) + if ( ivc2_decode_p + && ((insn_0 & 0xf000) == 0xf000) + && ((insn_0 & 0x000f) == 0x0007) ) + result = MEP_COPRO_32; + else if ((insn_0 & 0x8000) && (insn_0 & 0x4000)) result = MEP_CORE_32; else result = MEP_CORE_16; @@ -618,6 +692,9 @@ namespace mep result == MEP_CORE_16_COPRO_16 ? "core-16-copro-16" : result == MEP_CORE_16_COPRO_48 ? "core-16-copro-48" : result == MEP_CORE_32_COPRO_32 ? "core-32-copro-32" : + result == MEP_IVC2_V1 ? "ivc2-v1" : + result == MEP_IVC2_V2 ? "ivc2-v2" : + result == MEP_IVC2_V3 ? "ivc2-v3" : "core-?-copro-?") << " "; } @@ -802,6 +879,106 @@ namespace mep } break; + // IVC instructions need to be unpacked; they're not + // byte-aligned. CGEN encodes these msb-justified in a 32 bit + // word in a single list (p0/p1 format) with a SLOTS attribute + // that says which instructions can run in which slots. The p0s + // instructions are zero-extended to 28 bits, then treated as p0 + // instructions. + + // We use COP16 for p0s instructions, COP48 for p0, and COP64 + // for p1. COP32 is used for 32-bit core-mode insns. We store + // the unpacked instructions in p0_insn and p1_insn. + + case MEP_IVC2_V1: + { + // 01234567 01234567 01234567 01234567 01234567 01234567 01234567 01234567 + // [-----core------] [--------p0s---------][--------------p1-------------] + insn_size = 8; + UHI insn_1 = GETIMEMHI (pc, pc + 2); + UHI insn_2 = GETIMEMHI (pc, pc + 4); + UHI insn_3 = GETIMEMHI (pc, pc + 6); + + bool found; + sem = this->engine_core.find (pc, found); + if (UNLIKELY (! found)) + { + USI insn = (insn_0 << 16); + sem->decode (thisp, pc, insn, insn); + } + + sem_cop_16 = this->engine_cop_16.find (pc, found); + if (UNLIKELY (! found)) + { + p0_insn = (insn_1 << 8) | ((insn_2 >> 8) & 0xf0); + sem_cop_16->decode (thisp, pc, p0_insn, p0_insn); + } + + sem_cop_64 = this->engine_cop_64.find (pc, found); + if (UNLIKELY (! found)) + { + p1_insn = (insn_2 << 20) | (insn_3 << 4); + sem_cop_64->decode (thisp, pc, p1_insn, p1_insn); + } + } + break; + + case MEP_IVC2_V2: + { + // 01234567 01234567 01234567 01234567 01234567 01234567 01234567 01234567 + // [---------------core--------------] xxxx[--------------p1-------------] + insn_size = 8; + UHI insn_1 = GETIMEMHI (pc, pc + 2); + UHI insn_2 = GETIMEMHI (pc, pc + 4); + UHI insn_3 = GETIMEMHI (pc, pc + 6); + + bool found; + sem = this->engine_core.find (pc, found); + if (UNLIKELY (! found)) + { + USI insn = (insn_0 << 16) | insn_1; + sem->decode (thisp, pc, insn, insn); + } + + sem_cop_64 = this->engine_cop_64.find (pc, found); + if (UNLIKELY (! found)) + { + p1_insn = (insn_2 << 20) | (insn_3 << 4); + sem_cop_64->decode (thisp, pc, p1_insn, p1_insn); + } + } + break; + + case MEP_IVC2_V3: + { + // 01234567 01234567 01234567 01234567 01234567 01234567 01234567 01234567 + // 1111[--p0---]0111 [--------p0----------][--------------p1-------------] + // 1234 5678 12345678 12345678 12345678 + + insn_size = 8; + UHI insn_1 = GETIMEMHI (pc, pc + 2); + UHI insn_2 = GETIMEMHI (pc, pc + 4); + UHI insn_3 = GETIMEMHI (pc, pc + 6); + + bool found; + sem_cop_48 = this->engine_cop_48.find (pc, found); + if (UNLIKELY (! found)) + { + p0_insn = (((insn_0 << 20) & 0xff000000) + | (insn_1 << 8) + | ((insn_2 >> 8) & 0xf0)); + sem_cop_48->decode (thisp, pc, p0_insn, p0_insn); + } + + sem_cop_64 = this->engine_cop_64.find (pc, found); + if (UNLIKELY (! found)) + { + p1_insn = (insn_2 << 20) | (insn_3 << 4); + sem_cop_64->decode (thisp, pc, p1_insn, p1_insn); + } + } + break; + case MEP_BUNDLING_UNKNOWN: default: // Shouldn't happen. @@ -818,9 +995,20 @@ namespace mep cycles = 1; } + if (ivc2_decode_p) + { + // For IVC2 we disassemble the whole bundle at once, rather + // than one insn at a time like we do for other coprocessors, + // as the disassembler needs to know which slot each insn + // comes from. + if (UNLIKELY (trace_disass_p)) + this->disassemble (pc, (b == MEP_COPRO_32) ? cop32isa : coreisa); + } + s = SEM_STATUS_NORMAL; if (sem) { + ivc2_slot = IVC2_CORE; if (UNLIKELY (trace_counter_p || final_insn_count_p)) { // Determine whether there was insn fetch latency. If so, @@ -861,7 +1049,7 @@ namespace mep this->set_total_latency (pre_fetch_latency + this->pending_latency); this->pending_latency = 0; } - if (UNLIKELY (trace_disass_p)) + if (UNLIKELY (trace_disass_p && !ivc2_decode_p)) { if (LIKELY (! dsp_user_out || !(sem->idesc->attrs.bools & (1 << CGEN_INSN_OPTIONAL_DSP_INSN)))) @@ -883,11 +1071,11 @@ namespace mep if (sem_cop_16) { - if (UNLIKELY (trace_disass_p)) + ivc2_slot = IVC2_P0S; + if (UNLIKELY (trace_disass_p && !ivc2_decode_p)) this->disassemble (pc + 2, cop16isa); if (UNLIKELY (trace_semantics_p)) this->begin_trace (pc, sem_cop_16->idesc->insn_name); - sem_status s1 = sem_cop_16->idesc->execute (thisp, sem_cop_16); if (UNLIKELY (trace_counter_p || final_insn_count_p)) { @@ -897,14 +1085,15 @@ namespace mep } if (s1 != SEM_STATUS_NORMAL) s = s1; } - else if (sem_cop_32) + if (sem_cop_32) { + ivc2_slot = IVC2_C3; if (UNLIKELY (trace_counter_p && b == MEP_COPRO_32)) { this->trace_stream << ((h_csr_get (17) >> 16) & 0xff) << " "; this->trace_counter (pc); } - if (UNLIKELY (trace_disass_p)) + if (UNLIKELY (trace_disass_p && !ivc2_decode_p)) { if (b == MEP_COPRO_32) this->disassemble (pc, cop32isa); @@ -923,9 +1112,10 @@ namespace mep } if (s1 != SEM_STATUS_NORMAL) s = s1; } - else if (sem_cop_48) + if (sem_cop_48) { - if (UNLIKELY (trace_disass_p)) + ivc2_slot = IVC2_P0; + if (UNLIKELY (trace_disass_p && !ivc2_decode_p)) this->disassemble (pc + 2, cop48isa); if (UNLIKELY (trace_semantics_p)) this->begin_trace (pc, sem_cop_48->idesc->insn_name); @@ -939,14 +1129,15 @@ namespace mep } if (s1 != SEM_STATUS_NORMAL) s = s1; } - else if (sem_cop_64) + if (sem_cop_64) { + ivc2_slot = IVC2_P1; if (UNLIKELY (trace_counter_p)) { this->trace_stream << ((h_csr_get (17) >> 16) & 0xff) << " "; this->trace_counter (pc); } - if (UNLIKELY (trace_disass_p)) + if (UNLIKELY (trace_disass_p && !ivc2_decode_p)) this->disassemble (pc, cop64isa); if (UNLIKELY (trace_semantics_p)) this->begin_trace (pc, sem_cop_64->idesc->insn_name); diff --git a/sid/component/cgen-cpu/mep/mep_ext1.h b/sid/component/cgen-cpu/mep/mep_ext1.h index 99f6802325..67476dc5ef 100644 --- a/sid/component/cgen-cpu/mep/mep_ext1.h +++ b/sid/component/cgen-cpu/mep/mep_ext1.h @@ -6,19 +6,35 @@ #include "mep-core1-defs.h" #include "mep-core1-decode.h" #include "mep-core1-model.h" +#include "mep-cop1-16-defs.h" +#include "mep-cop1-16-decode.h" +#include "mep-cop1-16-model.h" +#include "mep-cop1-32-defs.h" +#include "mep-cop1-32-decode.h" +#include "mep-cop1-32-model.h" +#include "mep-cop1-48-defs.h" +#include "mep-cop1-48-decode.h" +#include "mep-cop1-48-model.h" +#include "mep-cop1-64-defs.h" +#include "mep-cop1-64-decode.h" +#include "mep-cop1-64-model.h" #include "common_model.h" using namespace mep; namespace mep_ext1 { - class mep_ext1_cpu: public mep_cpu_vliw + class mep_ext1_cpu: public mep_cpu_vliw { public: mep_ext1_cpu() : - mep_cpu_vliw - (this,ISA_EXT_CORE1,ISA_MAX,ISA_MAX,ISA_MAX,ISA_MAX), - my_core_model (this) + mep_cpu_vliw + (this,ISA_EXT_CORE1,ISA_EXT_COP1_16,ISA_EXT_COP1_32,ISA_EXT_COP1_48,ISA_EXT_COP1_64), + my_core_model (this), + my_cop16_model (this), + my_cop32_model (this), + my_cop48_model (this), + my_cop64_model (this) {} void core_model_insn_before (bool first_p = true) { my_core_model.model_insn_before (first_p); } @@ -32,13 +48,24 @@ namespace mep_ext1 { } UINT model_after (mepcore1_scache* sem) { return my_core_model.model_after (this, sem); } - UINT model_after (dummy_scache* sem) { return 1; } + UINT model_after (mepcop1_16_scache* sem) { return my_cop16_model.model_after (this, sem); } + UINT model_after (mepcop1_32_scache* sem) { return my_cop32_model.model_after (this, sem); } + UINT model_after (mepcop1_48_scache* sem) { return my_cop48_model.model_after (this, sem); } + UINT model_after (mepcop1_64_scache* sem) { return my_cop64_model.model_after (this, sem); } void core_model_insn_after (bool last_p = true, UINT cycles = 1) { my_core_model.model_insn_after (last_p, cycles); } + public: +#include "ivc2.h" + private: mep_common_model my_core_model; + mep_common_model my_cop16_model; + mep_common_model my_cop32_model; + mep_common_model my_cop48_model; + mep_common_model my_cop64_model; }; #define mep_ext1_hardware hardware +#define CGEN_CPU_FPU(cpu) (&cpu->fpu) } diff --git a/sid/main/dynamic/ChangeLog b/sid/main/dynamic/ChangeLog index c83885be5a..434c34f95d 100644 --- a/sid/main/dynamic/ChangeLog +++ b/sid/main/dynamic/ChangeLog @@ -1,3 +1,9 @@ +2009-04-30 DJ Delorie + + * mainDynamic: Regenerate. + * mepCfg.cxx (MepBoardCfg::set_ivc2_decode): New. + * mepCfg.h (MepBoardCfg::set_ivc2_decode): Add. + 2009-04-08 DJ Delorie * mainDynamic.cxx: Add C5 support. diff --git a/sid/main/dynamic/mainDynamic.cxx b/sid/main/dynamic/mainDynamic.cxx index 4fabaf1b77..ec5bc69c21 100644 --- a/sid/main/dynamic/mainDynamic.cxx +++ b/sid/main/dynamic/mainDynamic.cxx @@ -70,6 +70,12 @@ mk_default (const string name, SessionCfg *sess) b->set_dcache_cwf (false); b->add_timer (4); b->add_dmac (6, 64, true); + b->add_cop ("ivc2", 0); + b->set_ivc2_decode (1); + b->set_cop_vliw_bitw (64); + b->set_cop_data_bus_width (64); + for (int ccr = 0; ccr < 64; ++ccr) + b->set_cop_ccr (ccr, 0x00000000); b->set_opt_biu (64); b->set_endian ("little"); b->set_opt_abs (true); diff --git a/sid/main/dynamic/mepCfg.cxx b/sid/main/dynamic/mepCfg.cxx index 23dd98477f..9cd332d62b 100644 --- a/sid/main/dynamic/mepCfg.cxx +++ b/sid/main/dynamic/mepCfg.cxx @@ -3131,6 +3131,12 @@ void MepBoardCfg::add_cop (const string name, int cbus_if) } } +void MepBoardCfg::set_ivc2_decode (bool b) +{ + assert (cpu); + cpu->set (cpu, "ivc2-decode?", b ? "true" : "false"); +} + void MepBoardCfg::set_cop_vliw_bitw (sid::host_int_4 v) { assert ((v == 32) || (v == 64)); diff --git a/sid/main/dynamic/mepCfg.h b/sid/main/dynamic/mepCfg.h index c2b4595d4b..5787b8d119 100644 --- a/sid/main/dynamic/mepCfg.h +++ b/sid/main/dynamic/mepCfg.h @@ -112,6 +112,7 @@ class MepBoardCfg : void add_toshapi_local_bus_model (const string type, const string instance); void add_cop (const string name, int cbus_if); + void set_ivc2_decode (bool enabled); void allocate_dmac (); void add_dmac (int channel_bitw, int data_width, bool rectangle); void configure_dmac (); -- 2.11.0