From 568ab6a8dcc2ce0081113291163ee1aeae0221c0 Mon Sep 17 00:00:00 2001 From: Chandler Carruth Date: Fri, 25 Jul 2014 09:19:23 +0000 Subject: [PATCH] [SDAG] Enable the new assert for out-of-range result numbers in SDValues, fixing the two bugs left in the regression suite. The key for both of these was the use a single value type rather than a VTList which caused an unintentionally single-result merge-value node. Fix this by getting the appropriate VTList in place. Doing this exposed that the comments in x86's code abouth how MUL_LOHI operands are handle is wrong. The bug with the use of out-of-range result numbers was hiding the bug about the order of operands here (as best i can tell). There are more places where the code appears to get this backwards still... git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213931 91177308-0d34-0410-b5e6-96231b3b80d8 --- include/llvm/CodeGen/SelectionDAGNodes.h | 5 ----- lib/Target/R600/AMDGPUISelLowering.cpp | 4 ++-- lib/Target/X86/X86ISelLowering.cpp | 7 ++++--- 3 files changed, 6 insertions(+), 10 deletions(-) diff --git a/include/llvm/CodeGen/SelectionDAGNodes.h b/include/llvm/CodeGen/SelectionDAGNodes.h index f93f8e41e62..78e6fc5c826 100644 --- a/include/llvm/CodeGen/SelectionDAGNodes.h +++ b/include/llvm/CodeGen/SelectionDAGNodes.h @@ -885,13 +885,8 @@ public: inline SDValue::SDValue(SDNode *node, unsigned resno) : Node(node), ResNo(resno) { -// This is currently disabled because it fires pretty widely, but I wanted to -// commit it so others could help reproduce and aid in the cleanup. It will get -// enabled ASAP. -#if 0 assert((!Node || ResNo < Node->getNumValues()) && "Invalid result number for the given node!"); -#endif assert(ResNo < -2U && "Cannot use result numbers reserved for DenseMaps."); } diff --git a/lib/Target/R600/AMDGPUISelLowering.cpp b/lib/Target/R600/AMDGPUISelLowering.cpp index b77b37b9465..7869ae0b4b0 100644 --- a/lib/Target/R600/AMDGPUISelLowering.cpp +++ b/lib/Target/R600/AMDGPUISelLowering.cpp @@ -823,8 +823,8 @@ SDValue AMDGPUTargetLowering::LowerINTRINSIC_WO_CHAIN(SDValue Op, SDValue Denominator = Op.getOperand(2); SDValue Src0 = Param->isAllOnesValue() ? Numerator : Denominator; - return DAG.getNode(AMDGPUISD::DIV_SCALE, DL, VT, - Src0, Denominator, Numerator); + return DAG.getNode(AMDGPUISD::DIV_SCALE, DL, Op->getVTList(), Src0, + Denominator, Numerator); } case Intrinsic::AMDGPU_div_fmas: diff --git a/lib/Target/X86/X86ISelLowering.cpp b/lib/Target/X86/X86ISelLowering.cpp index ffa689a45ad..8e7dfa78995 100644 --- a/lib/Target/X86/X86ISelLowering.cpp +++ b/lib/Target/X86/X86ISelLowering.cpp @@ -15478,9 +15478,10 @@ static SDValue LowerMUL_LOHI(SDValue Op, const X86Subtarget *Subtarget, Highs = DAG.getNode(ISD::SUB, dl, VT, Highs, Fixup); } - // The low part of a MUL_LOHI is supposed to be the first value and the - // high part the second value. - return DAG.getNode(ISD::MERGE_VALUES, dl, Op.getValueType(), Lows, Highs); + // THe first result of MUL_LOHI is actually the high value, followed by the + // low value. + SDValue Ops[] = {Highs, Lows}; + return DAG.getMergeValues(Ops, dl); } static SDValue LowerScalarImmediateShift(SDValue Op, SelectionDAG &DAG, -- 2.11.0