From 59515780433837ad3975f8ed20b93cf2fe6870e5 Mon Sep 17 00:00:00 2001 From: Dave Airlie Date: Fri, 29 Dec 2017 10:30:39 +1000 Subject: [PATCH] radv/gfx9: fix block compression texture views. This ports a fix from amdvlk, to fix the sizing for mip levels when block compressed images are viewed using uncompressed views. Fixes: dEQP-VK.image.texel_view_compatible.graphic.extended*bc* Fixes: e38685cc62e 'Revert "radv: disable support for VEGA for now."' Reviewed-by: Bas Nieuwenhuizen Signed-off-by: Dave Airlie --- src/amd/vulkan/radv_image.c | 35 +++++++++++++++++++++++++++++++++++ 1 file changed, 35 insertions(+) diff --git a/src/amd/vulkan/radv_image.c b/src/amd/vulkan/radv_image.c index 40e6dfc3af1..0f6c5a171f2 100644 --- a/src/amd/vulkan/radv_image.c +++ b/src/amd/vulkan/radv_image.c @@ -1067,6 +1067,41 @@ radv_image_view_init(struct radv_image_view *iview, vk_format_get_blockwidth(image->vk_format)); iview->extent.height = round_up_u32(iview->extent.height * vk_format_get_blockheight(iview->vk_format), vk_format_get_blockheight(image->vk_format)); + /* Comment ported from amdvlk - + * If we have the following image: + * Uncompressed pixels Compressed block sizes (4x4) + * mip0: 22 x 22 6 x 6 + * mip1: 11 x 11 3 x 3 + * mip2: 5 x 5 2 x 2 + * mip3: 2 x 2 1 x 1 + * mip4: 1 x 1 1 x 1 + * + * On GFX9 the descriptor is always programmed with the WIDTH and HEIGHT of the base level and the HW is + * calculating the degradation of the block sizes down the mip-chain as follows (straight-up + * divide-by-two integer math): + * mip0: 6x6 + * mip1: 3x3 + * mip2: 1x1 + * mip3: 1x1 + * + * This means that mip2 will be missing texels. + * + * Fix this by calculating the base mip's width and height, then convert that, and round it + * back up to get the level 0 size. Take the max of the converted size and the scaled up size. + */ + if (device->physical_device->rad_info.chip_class >= GFX9 && + vk_format_is_compressed(image->vk_format)) { + unsigned lvl_width = radv_minify(image->info.width , range->baseMipLevel); + unsigned lvl_height = radv_minify(image->info.height, range->baseMipLevel); + + lvl_width = round_up_u32(lvl_width * vk_format_get_blockwidth(iview->vk_format), + vk_format_get_blockwidth(image->vk_format)); + lvl_height = round_up_u32(lvl_height * vk_format_get_blockheight(iview->vk_format), + vk_format_get_blockheight(image->vk_format)); + + iview->extent.width = MAX2(iview->extent.width, lvl_width << range->baseMipLevel); + iview->extent.height = MAX2(iview->extent.height, lvl_height << range->baseMipLevel); + } } iview->base_layer = range->baseArrayLayer; -- 2.11.0