From 59f5ae05c18a2f4a3f0494ec814155bb44a08dd7 Mon Sep 17 00:00:00 2001 From: Jonas Kuenstler Date: Fri, 18 Feb 2022 13:04:58 +0100 Subject: [PATCH] arm64: dts: imx8mp-phycore-som: Set usdhc root clock for eMMC Set the usdhc root clock to 400MHz to be able to support HS400/HS400ES modes for eMMC on phyCORE-i.MX8MP SoM. Signed-off-by: Jonas Kuenstler Signed-off-by: Teresa Remmet Reviewed-by: Haibo Chen Signed-off-by: Shawn Guo --- arch/arm64/boot/dts/freescale/imx8mp-phycore-som.dtsi | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/imx8mp-phycore-som.dtsi b/arch/arm64/boot/dts/freescale/imx8mp-phycore-som.dtsi index c471ab252a69..79b290a002c1 100644 --- a/arch/arm64/boot/dts/freescale/imx8mp-phycore-som.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mp-phycore-som.dtsi @@ -197,6 +197,8 @@ /* eMMC */ &usdhc3 { + assigned-clocks = <&clk IMX8MP_CLK_USDHC3_ROOT>; + assigned-clock-rates = <400000000>; pinctrl-names = "default", "state_100mhz", "state_200mhz"; pinctrl-0 = <&pinctrl_usdhc3>; pinctrl-1 = <&pinctrl_usdhc3_100mhz>; -- 2.11.0