From 5a0390f3ad74ec3106cf4cd605d241bbd51634f0 Mon Sep 17 00:00:00 2001 From: Marina Yatsina Date: Tue, 11 Aug 2015 12:05:06 +0000 Subject: [PATCH] [X86] Add SAL mnemonics for Intel syntax SAL and SHL instructions perform the same operation Differential Revision: http://reviews.llvm.org/D11882 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@244588 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/X86/X86InstrInfo.td | 1 + test/MC/X86/intel-syntax.s | 3 +++ 2 files changed, 4 insertions(+) diff --git a/lib/Target/X86/X86InstrInfo.td b/lib/Target/X86/X86InstrInfo.td index fff094ddf43..d626e078110 100644 --- a/lib/Target/X86/X86InstrInfo.td +++ b/lib/Target/X86/X86InstrInfo.td @@ -2548,6 +2548,7 @@ def : MnemonicAlias<"ret", "retw", "att">, Requires<[In16BitMode]>; def : MnemonicAlias<"ret", "retl", "att">, Requires<[In32BitMode]>; def : MnemonicAlias<"ret", "retq", "att">, Requires<[In64BitMode]>; +def : MnemonicAlias<"sal", "shl", "intel">; def : MnemonicAlias<"salb", "shlb", "att">; def : MnemonicAlias<"salw", "shlw", "att">; def : MnemonicAlias<"sall", "shll", "att">; diff --git a/test/MC/X86/intel-syntax.s b/test/MC/X86/intel-syntax.s index 8be9642bc5c..ae221bdfcef 100644 --- a/test/MC/X86/intel-syntax.s +++ b/test/MC/X86/intel-syntax.s @@ -701,3 +701,6 @@ repnz cmpsb // CHECK: cmpsb %es:(%rdi), (%rsi) // CHECK: repne // CHECK: cmpsb %es:(%rdi), (%rsi) + +sal eax, 123 +// CHECK: shll $123, %eax -- 2.11.0