From 5a0bc4b5aeba3bb32eb7da6a98108e93bbd64f7e Mon Sep 17 00:00:00 2001 From: Samuel Pitoiset Date: Sun, 7 Jun 2015 22:40:15 +0200 Subject: [PATCH] drm/nouveau/pm: reorganize the nvif interface This commit introduces the NVIF_IOCTL_NEW_V0_PERFMON class which will be used in order to query domains, signals and sources. This separates the querying and the counting interface. Signed-off-by: Samuel Pitoiset Signed-off-by: Ben Skeggs --- drivers/gpu/drm/nouveau/include/nvif/class.h | 26 +++++++++++------- drivers/gpu/drm/nouveau/include/nvif/ioctl.h | 5 ++-- drivers/gpu/drm/nouveau/nvkm/engine/pm/base.c | 38 ++++++++++++++++++++++----- 3 files changed, 51 insertions(+), 18 deletions(-) diff --git a/drivers/gpu/drm/nouveau/include/nvif/class.h b/drivers/gpu/drm/nouveau/include/nvif/class.h index 64f8b2f687d2..11935a048744 100644 --- a/drivers/gpu/drm/nouveau/include/nvif/class.h +++ b/drivers/gpu/drm/nouveau/include/nvif/class.h @@ -251,6 +251,20 @@ struct gf110_dma_v0 { * perfmon ******************************************************************************/ +#define NVIF_PERFMON_V0_QUERY_SIGNAL 0x00 + +struct nvif_perfmon_query_signal_v0 { + __u8 version; + __u8 pad01[3]; + __u32 iter; + char name[64]; +}; + + +/******************************************************************************* + * perfctr + ******************************************************************************/ + struct nvif_perfctr_v0 { __u8 version; __u8 pad01[1]; @@ -259,16 +273,8 @@ struct nvif_perfctr_v0 { char name[4][64]; }; -#define NVIF_PERFCTR_V0_QUERY 0x00 -#define NVIF_PERFCTR_V0_SAMPLE 0x01 -#define NVIF_PERFCTR_V0_READ 0x02 - -struct nvif_perfctr_query_v0 { - __u8 version; - __u8 pad01[3]; - __u32 iter; - char name[64]; -}; +#define NVIF_PERFCTR_V0_SAMPLE 0x00 +#define NVIF_PERFCTR_V0_READ 0x01 struct nvif_perfctr_sample { }; diff --git a/drivers/gpu/drm/nouveau/include/nvif/ioctl.h b/drivers/gpu/drm/nouveau/include/nvif/ioctl.h index 4cd8e323b23d..517cd27cdc37 100644 --- a/drivers/gpu/drm/nouveau/include/nvif/ioctl.h +++ b/drivers/gpu/drm/nouveau/include/nvif/ioctl.h @@ -49,8 +49,9 @@ struct nvif_ioctl_new_v0 { __u64 token; __u32 handle; /* these class numbers are made up by us, and not nvidia-assigned */ -#define NVIF_IOCTL_NEW_V0_PERFCTR 0x0000ffff -#define NVIF_IOCTL_NEW_V0_CONTROL 0x0000fffe +#define NVIF_IOCTL_NEW_V0_PERFMON 0x0000ffff +#define NVIF_IOCTL_NEW_V0_PERFCTR 0x0000fffe +#define NVIF_IOCTL_NEW_V0_CONTROL 0x0000fffd __u32 oclass; __u8 data[]; /* class data (class.h) */ }; diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/pm/base.c b/drivers/gpu/drm/nouveau/nvkm/engine/pm/base.c index 7b07e8b04052..cb88170610bb 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/pm/base.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/pm/base.c @@ -83,10 +83,10 @@ nvkm_perfsig_find(struct nvkm_pm *ppm, const char *name, u32 size, * Perfmon object classes ******************************************************************************/ static int -nvkm_perfctr_query(struct nvkm_object *object, void *data, u32 size) +nvkm_perfmon_mthd_query_signal(struct nvkm_object *object, void *data, u32 size) { union { - struct nvif_perfctr_query_v0 v0; + struct nvif_perfmon_query_signal_v0 v0; } *args = data; struct nvkm_device *device = nv_device(object); struct nvkm_pm *ppm = (void *)object->engine; @@ -97,9 +97,9 @@ nvkm_perfctr_query(struct nvkm_object *object, void *data, u32 size) int tmp = 0, di, si; int ret; - nv_ioctl(object, "perfctr query size %d\n", size); + nv_ioctl(object, "perfmon query signal size %d\n", size); if (nvif_unpack(args->v0, 0, 0, false)) { - nv_ioctl(object, "perfctr query vers %d iter %08x\n", + nv_ioctl(object, "perfmon query signal vers %d iter %08x\n", args->v0.version, args->v0.iter); di = (args->v0.iter & 0xff000000) >> 24; si = (args->v0.iter & 0x00ffffff) - 1; @@ -142,6 +142,30 @@ nvkm_perfctr_query(struct nvkm_object *object, void *data, u32 size) } static int +nvkm_perfmon_mthd(struct nvkm_object *object, u32 mthd, void *data, u32 size) +{ + switch (mthd) { + case NVIF_PERFMON_V0_QUERY_SIGNAL: + return nvkm_perfmon_mthd_query_signal(object, data, size); + default: + break; + } + return -EINVAL; +} + +static struct nvkm_ofuncs +nvkm_perfmon_ofuncs = { + .ctor = _nvkm_object_ctor, + .dtor = nvkm_object_destroy, + .init = nvkm_object_init, + .fini = nvkm_object_fini, + .mthd = nvkm_perfmon_mthd, +}; + +/******************************************************************************* + * Perfctr object classes + ******************************************************************************/ +static int nvkm_perfctr_sample(struct nvkm_object *object, void *data, u32 size) { union { @@ -221,8 +245,6 @@ static int nvkm_perfctr_mthd(struct nvkm_object *object, u32 mthd, void *data, u32 size) { switch (mthd) { - case NVIF_PERFCTR_V0_QUERY: - return nvkm_perfctr_query(object, data, size); case NVIF_PERFCTR_V0_SAMPLE: return nvkm_perfctr_sample(object, data, size); case NVIF_PERFCTR_V0_READ: @@ -299,6 +321,10 @@ nvkm_perfctr_ofuncs = { struct nvkm_oclass nvkm_pm_sclass[] = { + { + .handle = NVIF_IOCTL_NEW_V0_PERFMON, + .ofuncs = &nvkm_perfmon_ofuncs, + }, { .handle = NVIF_IOCTL_NEW_V0_PERFCTR, .ofuncs = &nvkm_perfctr_ofuncs, }, -- 2.11.0