From 5a54516adf2b15fa337445d327ec3ad9bd1e3648 Mon Sep 17 00:00:00 2001 From: Bill Wendling Date: Thu, 16 Dec 2010 00:49:54 +0000 Subject: [PATCH] Add tSpill and tRestore to the opcodes to replace with tSTRi and tLDRi respectively. It may be a bug that these opcodes are getting this far into machine code generation. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121931 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/ARM/Thumb1RegisterInfo.cpp | 2 ++ 1 file changed, 2 insertions(+) diff --git a/lib/Target/ARM/Thumb1RegisterInfo.cpp b/lib/Target/ARM/Thumb1RegisterInfo.cpp index 4e77bd87cc2..9f917234d13 100644 --- a/lib/Target/ARM/Thumb1RegisterInfo.cpp +++ b/lib/Target/ARM/Thumb1RegisterInfo.cpp @@ -356,9 +356,11 @@ static void removeOperands(MachineInstr &MI, unsigned i) { static unsigned convertToNonSPOpcode(unsigned Opcode) { switch (Opcode) { case ARM::tLDRspi: + case ARM::tRestore: // FIXME: Should this opcode be here? return ARM::tLDRi; case ARM::tSTRspi: + case ARM::tSpill: // FIXME: Should this opcode be here? return ARM::tSTRi; } -- 2.11.0