From 5c927500c823aecafb46881626a5db7822ad019a Mon Sep 17 00:00:00 2001 From: Chris Lattner Date: Sun, 9 Mar 2008 08:46:19 +0000 Subject: [PATCH] add some code to support cross-register class copying from RST -> RFP{32/64/80}. We only handle ST(0) for now. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48104 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/X86/X86InstrInfo.cpp | 26 ++++++++++++++++++++++---- 1 file changed, 22 insertions(+), 4 deletions(-) diff --git a/lib/Target/X86/X86InstrInfo.cpp b/lib/Target/X86/X86InstrInfo.cpp index c1ccc375bdd..01a7cd401f9 100644 --- a/lib/Target/X86/X86InstrInfo.cpp +++ b/lib/Target/X86/X86InstrInfo.cpp @@ -1400,10 +1400,10 @@ X86InstrInfo::InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB, } void X86InstrInfo::copyRegToReg(MachineBasicBlock &MBB, - MachineBasicBlock::iterator MI, - unsigned DestReg, unsigned SrcReg, - const TargetRegisterClass *DestRC, - const TargetRegisterClass *SrcRC) const { + MachineBasicBlock::iterator MI, + unsigned DestReg, unsigned SrcReg, + const TargetRegisterClass *DestRC, + const TargetRegisterClass *SrcRC) const { if (DestRC == SrcRC) { unsigned Opc; if (DestRC == &X86::GR64RegClass) { @@ -1464,6 +1464,24 @@ void X86InstrInfo::copyRegToReg(MachineBasicBlock &MBB, return; } } + + // Moving ST(0) to/from a register turns into FpGET_ST0_32 etc. + if (SrcRC == &X86::RSTRegClass) { + // Copying from ST(0). FIXME: handle ST(1) also + assert(SrcReg == X86::ST0 && "Can only copy from TOS right now"); + unsigned Opc; + if (DestRC == &X86::RFP32RegClass) + Opc = X86::FpGET_ST0_32; + else if (DestRC == &X86::RFP64RegClass) + Opc = X86::FpGET_ST0_64; + else { + assert(DestRC == &X86::RFP80RegClass); + Opc = X86::FpGET_ST0_80; + } + BuildMI(MBB, MI, get(Opc), DestReg); + return; + } + cerr << "Not yet supported!"; abort(); } -- 2.11.0