From 5d06b8caae98be3a7c18cc37343533416b2d7b77 Mon Sep 17 00:00:00 2001 From: Chris Lattner Date: Fri, 29 Jul 2005 01:00:29 +0000 Subject: [PATCH] Implement a FIXME: move a bunch of cruft for handling FP_TO_*INT operations that the X86 does not support to the legalizer. This allows it to be better optimized, etc, and will help with SSE support. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22551 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/X86/X86ISelPattern.cpp | 44 +++++++++++++++------------------------ 1 file changed, 17 insertions(+), 27 deletions(-) diff --git a/lib/Target/X86/X86ISelPattern.cpp b/lib/Target/X86/X86ISelPattern.cpp index 86260ae2dba..31bd79ef127 100644 --- a/lib/Target/X86/X86ISelPattern.cpp +++ b/lib/Target/X86/X86ISelPattern.cpp @@ -132,6 +132,18 @@ namespace { setOperationAction(ISD::FP_TO_SINT , MVT::i64 , Custom); } + // Handle FP_TO_UINT by promoting the destination to a larger signed + // conversion. + setOperationAction(ISD::FP_TO_UINT , MVT::i1 , Promote); + setOperationAction(ISD::FP_TO_UINT , MVT::i8 , Promote); + setOperationAction(ISD::FP_TO_UINT , MVT::i16 , Promote); + setOperationAction(ISD::FP_TO_UINT , MVT::i32 , Promote); + + // Promote i1/i8 FP_TO_SINT to larger FP_TO_SINTS's, as X86 doesn't have + // this operation. + setOperationAction(ISD::FP_TO_SINT , MVT::i1 , Promote); + setOperationAction(ISD::FP_TO_SINT , MVT::i8 , Promote); + setOperationAction(ISD::BRCONDTWOWAY , MVT::Other, Expand); setOperationAction(ISD::MEMMOVE , MVT::Other, Expand); setOperationAction(ISD::SIGN_EXTEND_INREG, MVT::i16 , Expand); @@ -2437,15 +2449,13 @@ unsigned ISel::SelectExpr(SDOperand N) { } return Result; } - case ISD::FP_TO_SINT: - case ISD::FP_TO_UINT: { - // FIXME: Most of this grunt work should be done by legalize! + case ISD::FP_TO_SINT: { Tmp1 = SelectExpr(N.getOperand(0)); // Get the operand register // If the target supports SSE2 and is performing FP operations in SSE regs // instead of the FP stack, then we can use the efficient CVTSS2SI and // CVTSD2SI instructions. - if (ISD::FP_TO_SINT == N.getOpcode() && X86ScalarSSE) { + if (X86ScalarSSE) { if (MVT::f32 == N.getOperand(0).getValueType()) { BuildMI(BB, X86::CVTTSS2SIrr, 1, Result).addReg(Tmp1); } else if (MVT::f64 == N.getOperand(0).getValueType()) { @@ -2480,34 +2490,18 @@ unsigned ISel::SelectExpr(SDOperand N) { addFrameReference(BuildMI(BB, X86::MOV8mr, 5), CWFrameIdx, 1).addReg(HighPartOfCW); - // We don't have the facilities for directly storing byte sized data to - // memory. Promote it to 16 bits. We also must promote unsigned values to - // larger classes because we only have signed FP stores. - MVT::ValueType StoreClass = Node->getValueType(0); - if (StoreClass == MVT::i8 || Node->getOpcode() == ISD::FP_TO_UINT) - switch (StoreClass) { - case MVT::i1: - case MVT::i8: StoreClass = MVT::i16; break; - case MVT::i16: StoreClass = MVT::i32; break; - case MVT::i32: StoreClass = MVT::i64; break; - default: assert(0 && "Unknown store class!"); - } - // Spill the integer to memory and reload it from there. - unsigned Size = MVT::getSizeInBits(StoreClass)/8; + unsigned Size = MVT::getSizeInBits(Node->getValueType(0))/8; int FrameIdx = F->getFrameInfo()->CreateStackObject(Size, Size); - switch (StoreClass) { - default: assert(0 && "Unknown store class!"); + switch (Node->getValueType(0)) { + default: assert(0 && "Unsupported store class!"); case MVT::i16: addFrameReference(BuildMI(BB, X86::FIST16m, 5), FrameIdx).addReg(Tmp1); break; case MVT::i32: addFrameReference(BuildMI(BB, X86::FIST32m, 5), FrameIdx).addReg(Tmp1); break; - case MVT::i64: - addFrameReference(BuildMI(BB, X86::FISTP64m, 5), FrameIdx).addReg(Tmp1); - break; } switch (Node->getValueType(0)) { @@ -2519,10 +2513,6 @@ unsigned ISel::SelectExpr(SDOperand N) { case MVT::i16: addFrameReference(BuildMI(BB, X86::MOV16rm, 4, Result), FrameIdx); break; - case MVT::i8: - case MVT::i1: - addFrameReference(BuildMI(BB, X86::MOV8rm, 4, Result), FrameIdx); - break; } // Reload the original control word now. -- 2.11.0