From 5e55bb95bb8b5ee66926b6c63bc63732b8ef828b Mon Sep 17 00:00:00 2001 From: Craig Topper Date: Thu, 15 Nov 2018 21:19:32 +0000 Subject: [PATCH] [X86] Remove ANY_EXTEND special case from canReduceVMulWidth Removing this code doesn't affect any lit tests so it doesn't appear to be tested anymore. I assume it was when it was added, but I guess something else changed? Code coverage report also says its unused. I mostly didn't like that it seemed to count the sign bits as if it was a sign_extend, but then set isPositive as if it was a zero_extend. It feels like we should have picked one interpretation? Differential Revision: https://reviews.llvm.org/D54596 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@346995 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/X86/X86ISelLowering.cpp | 20 ++------------------ 1 file changed, 2 insertions(+), 18 deletions(-) diff --git a/lib/Target/X86/X86ISelLowering.cpp b/lib/Target/X86/X86ISelLowering.cpp index 4d1d8ae1cb7..2ba2934e007 100644 --- a/lib/Target/X86/X86ISelLowering.cpp +++ b/lib/Target/X86/X86ISelLowering.cpp @@ -34337,24 +34337,8 @@ static bool canReduceVMulWidth(SDNode *N, SelectionDAG &DAG, ShrinkMode &Mode) { for (unsigned i = 0; i < 2; i++) { SDValue Opd = N->getOperand(i); - // DAG.ComputeNumSignBits return 1 for ISD::ANY_EXTEND, so we need to - // compute signbits for it separately. - if (Opd.getOpcode() == ISD::ANY_EXTEND) { - // For anyextend, it is safe to assume an appropriate number of leading - // sign/zero bits. - if (Opd.getOperand(0).getValueType().getVectorElementType() == MVT::i8) - SignBits[i] = 25; - else if (Opd.getOperand(0).getValueType().getVectorElementType() == - MVT::i16) - SignBits[i] = 17; - else - return false; - IsPositive[i] = true; - } else { - SignBits[i] = DAG.ComputeNumSignBits(Opd); - if (DAG.SignBitIsZero(Opd)) - IsPositive[i] = true; - } + SignBits[i] = DAG.ComputeNumSignBits(Opd); + IsPositive[i] = DAG.SignBitIsZero(Opd); } bool AllPositive = IsPositive[0] && IsPositive[1]; -- 2.11.0