From 605787606eb24918b266a71319143430974db2de Mon Sep 17 00:00:00 2001 From: Peter Maydell Date: Thu, 24 Nov 2022 11:50:06 +0000 Subject: [PATCH] target/avr: Convert to 3-phase reset MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit Convert the avr CPU class to use 3-phase reset, so it doesn't need to use device_class_set_parent_reset() any more. Signed-off-by: Peter Maydell Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Reviewed-by: Alistair Francis Reviewed-by: Cédric Le Goater Message-id: 20221124115023.2437291-4-peter.maydell@linaro.org --- target/avr/cpu-qom.h | 4 ++-- target/avr/cpu.c | 13 +++++++++---- 2 files changed, 11 insertions(+), 6 deletions(-) diff --git a/target/avr/cpu-qom.h b/target/avr/cpu-qom.h index b5c3507d6d..01ea5f160b 100644 --- a/target/avr/cpu-qom.h +++ b/target/avr/cpu-qom.h @@ -31,7 +31,7 @@ OBJECT_DECLARE_CPU_TYPE(AVRCPU, AVRCPUClass, AVR_CPU) /** * AVRCPUClass: * @parent_realize: The parent class' realize handler. - * @parent_reset: The parent class' reset handler. + * @parent_phases: The parent class' reset phase handlers. * * A AVR CPU model. */ @@ -40,7 +40,7 @@ struct AVRCPUClass { CPUClass parent_class; /*< public >*/ DeviceRealize parent_realize; - DeviceReset parent_reset; + ResettablePhases parent_phases; }; diff --git a/target/avr/cpu.c b/target/avr/cpu.c index c7295b488d..d0139804b9 100644 --- a/target/avr/cpu.c +++ b/target/avr/cpu.c @@ -67,14 +67,16 @@ static void avr_restore_state_to_opc(CPUState *cs, env->pc_w = data[0]; } -static void avr_cpu_reset(DeviceState *ds) +static void avr_cpu_reset_hold(Object *obj) { - CPUState *cs = CPU(ds); + CPUState *cs = CPU(obj); AVRCPU *cpu = AVR_CPU(cs); AVRCPUClass *mcc = AVR_CPU_GET_CLASS(cpu); CPUAVRState *env = &cpu->env; - mcc->parent_reset(ds); + if (mcc->parent_phases.hold) { + mcc->parent_phases.hold(obj); + } env->pc_w = 0; env->sregI = 1; @@ -223,9 +225,12 @@ static void avr_cpu_class_init(ObjectClass *oc, void *data) DeviceClass *dc = DEVICE_CLASS(oc); CPUClass *cc = CPU_CLASS(oc); AVRCPUClass *mcc = AVR_CPU_CLASS(oc); + ResettableClass *rc = RESETTABLE_CLASS(oc); device_class_set_parent_realize(dc, avr_cpu_realizefn, &mcc->parent_realize); - device_class_set_parent_reset(dc, avr_cpu_reset, &mcc->parent_reset); + + resettable_class_set_parent_phases(rc, NULL, avr_cpu_reset_hold, NULL, + &mcc->parent_phases); cc->class_by_name = avr_cpu_class_by_name; -- 2.11.0