From 61f7a16bfa54bf2230eef4588f0fe2ef65fc2ee6 Mon Sep 17 00:00:00 2001
From: David Bolvansky <david.bolvansky@gmail.com>
Date: Wed, 19 Jun 2019 12:55:39 +0000
Subject: [PATCH] [NFC] Added tests for cttz(abs(x)) -> cttz(x) fold

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363795 91177308-0d34-0410-b5e6-96231b3b80d8
---
 test/Transforms/InstCombine/cttz-abs.ll | 169 ++++++++++++++++++++++++++++++++
 1 file changed, 169 insertions(+)
 create mode 100644 test/Transforms/InstCombine/cttz-abs.ll

diff --git a/test/Transforms/InstCombine/cttz-abs.ll b/test/Transforms/InstCombine/cttz-abs.ll
new file mode 100644
index 00000000000..d2a6a868e76
--- /dev/null
+++ b/test/Transforms/InstCombine/cttz-abs.ll
@@ -0,0 +1,169 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
+; RUN: opt -instcombine -S < %s | FileCheck %s
+
+define i32 @cttz_abs(i32 %x) {
+; CHECK-LABEL: @cttz_abs(
+; CHECK-NEXT:    [[C:%.*]] = icmp slt i32 [[X:%.*]], 0
+; CHECK-NEXT:    [[S:%.*]] = sub nsw i32 0, [[X]]
+; CHECK-NEXT:    [[D:%.*]] = select i1 [[C]], i32 [[S]], i32 [[X]]
+; CHECK-NEXT:    [[R:%.*]] = tail call i32 @llvm.cttz.i32(i32 [[D]], i1 true), !range !0
+; CHECK-NEXT:    ret i32 [[R]]
+;
+  %c = icmp slt i32 %x, 0
+  %s = sub nsw i32 0, %x
+  %d = select i1 %c, i32 %s, i32 %x
+  %r = tail call i32 @llvm.cttz.i32(i32 %d, i1 true)
+  ret i32 %r
+}
+
+define i32 @cttz_abs2(i32 %x) {
+; CHECK-LABEL: @cttz_abs2(
+; CHECK-NEXT:    [[C:%.*]] = icmp sgt i32 [[X:%.*]], 0
+; CHECK-NEXT:    call void @use_cond(i1 [[C]])
+; CHECK-NEXT:    [[S:%.*]] = sub nsw i32 0, [[X]]
+; CHECK-NEXT:    [[D:%.*]] = select i1 [[C]], i32 [[X]], i32 [[S]]
+; CHECK-NEXT:    [[R:%.*]] = tail call i32 @llvm.cttz.i32(i32 [[D]], i1 true), !range !0
+; CHECK-NEXT:    ret i32 [[R]]
+;
+  %c = icmp sgt i32 %x, 0
+  call void @use_cond(i1 %c)
+  %s = sub nsw i32 0, %x
+  %d = select i1 %c, i32 %x, i32 %s
+  %r = tail call i32 @llvm.cttz.i32(i32 %d, i1 true)
+  ret i32 %r
+}
+
+define i32 @cttz_abs3(i32 %x) {
+; CHECK-LABEL: @cttz_abs3(
+; CHECK-NEXT:    [[C:%.*]] = icmp sgt i32 [[X:%.*]], -1
+; CHECK-NEXT:    call void @use_cond(i1 [[C]])
+; CHECK-NEXT:    [[S:%.*]] = sub nsw i32 0, [[X]]
+; CHECK-NEXT:    [[D:%.*]] = select i1 [[C]], i32 [[X]], i32 [[S]]
+; CHECK-NEXT:    [[R:%.*]] = tail call i32 @llvm.cttz.i32(i32 [[D]], i1 true), !range !0
+; CHECK-NEXT:    ret i32 [[R]]
+;
+  %c = icmp sgt i32 %x, -1
+  call void @use_cond(i1 %c)
+  %s = sub nsw i32 0, %x
+  %d = select i1 %c, i32 %x, i32 %s
+  %r = tail call i32 @llvm.cttz.i32(i32 %d, i1 true)
+  ret i32 %r
+}
+
+define i32 @cttz_abs4(i32 %x) {
+; CHECK-LABEL: @cttz_abs4(
+; CHECK-NEXT:    [[C:%.*]] = icmp slt i32 [[X:%.*]], 0
+; CHECK-NEXT:    [[S:%.*]] = sub nsw i32 0, [[X]]
+; CHECK-NEXT:    [[D:%.*]] = select i1 [[C]], i32 [[S]], i32 [[X]]
+; CHECK-NEXT:    [[R:%.*]] = tail call i32 @llvm.cttz.i32(i32 [[D]], i1 true), !range !0
+; CHECK-NEXT:    ret i32 [[R]]
+;
+  %c = icmp slt i32 %x, 1
+  %s = sub nsw i32 0, %x
+  %d = select i1 %c, i32 %s, i32 %x
+  %r = tail call i32 @llvm.cttz.i32(i32 %d, i1 true)
+  ret i32 %r
+}
+
+define i64 @cttz_abs_64(i64 %x) {
+; CHECK-LABEL: @cttz_abs_64(
+; CHECK-NEXT:    [[C:%.*]] = icmp slt i64 [[X:%.*]], 0
+; CHECK-NEXT:    [[S:%.*]] = sub nsw i64 0, [[X]]
+; CHECK-NEXT:    [[D:%.*]] = select i1 [[C]], i64 [[S]], i64 [[X]]
+; CHECK-NEXT:    [[R:%.*]] = call i64 @llvm.cttz.i64(i64 [[D]], i1 false), !range !1
+; CHECK-NEXT:    ret i64 [[R]]
+;
+  %c = icmp slt i64 %x, 0
+  %s = sub nsw i64 0, %x
+  %d = select i1 %c, i64 %s, i64 %x
+  %r = tail call i64 @llvm.cttz.i64(i64 %d)
+  ret i64 %r
+}
+
+; Negative tests
+
+define i32 @no_cttz_abs(i32 %x) {
+; CHECK-LABEL: @no_cttz_abs(
+; CHECK-NEXT:    [[C:%.*]] = icmp slt i32 [[X:%.*]], 2
+; CHECK-NEXT:    [[S:%.*]] = sub nsw i32 0, [[X]]
+; CHECK-NEXT:    [[D:%.*]] = select i1 [[C]], i32 [[S]], i32 [[X]]
+; CHECK-NEXT:    [[R:%.*]] = tail call i32 @llvm.cttz.i32(i32 [[D]], i1 true), !range !0
+; CHECK-NEXT:    ret i32 [[R]]
+;
+  %c = icmp slt i32 %x, 2
+  %s = sub nsw i32 0, %x
+  %d = select i1 %c, i32 %s, i32 %x
+  %r = tail call i32 @llvm.cttz.i32(i32 %d, i1 true)
+  ret i32 %r
+}
+
+define i32 @no_cttz_abs2(i32 %x) {
+; CHECK-LABEL: @no_cttz_abs2(
+; CHECK-NEXT:    [[C:%.*]] = icmp slt i32 [[X:%.*]], 0
+; CHECK-NEXT:    [[S:%.*]] = sub nsw i32 1, [[X]]
+; CHECK-NEXT:    [[D:%.*]] = select i1 [[C]], i32 [[S]], i32 [[X]]
+; CHECK-NEXT:    [[R:%.*]] = tail call i32 @llvm.cttz.i32(i32 [[D]], i1 true), !range !0
+; CHECK-NEXT:    ret i32 [[R]]
+;
+  %c = icmp slt i32 %x, 0
+  %s = sub nsw i32 1, %x
+  %d = select i1 %c, i32 %s, i32 %x
+  %r = tail call i32 @llvm.cttz.i32(i32 %d, i1 true)
+  ret i32 %r
+}
+
+
+define i32 @no_cttz_abs3(i32 %x) {
+; CHECK-LABEL: @no_cttz_abs3(
+; CHECK-NEXT:    [[C:%.*]] = icmp slt i32 [[X:%.*]], 0
+; CHECK-NEXT:    [[S:%.*]] = sub nsw i32 0, [[X]]
+; CHECK-NEXT:    [[D:%.*]] = select i1 [[C]], i32 [[X]], i32 [[S]]
+; CHECK-NEXT:    [[R:%.*]] = tail call i32 @llvm.cttz.i32(i32 [[D]], i1 false), !range !0
+; CHECK-NEXT:    ret i32 [[R]]
+;
+  %c = icmp slt i32 %x, 0
+  %s = sub nsw i32 0, %x
+  %d = select i1 %c, i32 %x, i32 %s
+  %r = tail call i32 @llvm.cttz.i32(i32 %d, i1 false)
+  ret i32 %r
+}
+
+define i32 @no_cttz_abs4(i32 %x) {
+; CHECK-LABEL: @no_cttz_abs4(
+; CHECK-NEXT:    [[C:%.*]] = icmp sgt i32 [[X:%.*]], -2
+; CHECK-NEXT:    call void @use_cond(i1 [[C]])
+; CHECK-NEXT:    [[S:%.*]] = sub nsw i32 0, [[X]]
+; CHECK-NEXT:    [[D:%.*]] = select i1 [[C]], i32 [[X]], i32 [[S]]
+; CHECK-NEXT:    [[R:%.*]] = tail call i32 @llvm.cttz.i32(i32 [[D]], i1 true), !range !0
+; CHECK-NEXT:    ret i32 [[R]]
+;
+  %c = icmp sgt i32 %x, -2
+  call void @use_cond(i1 %c)
+  %s = sub nsw i32 0, %x
+  %d = select i1 %c, i32 %x, i32 %s
+  %r = tail call i32 @llvm.cttz.i32(i32 %d, i1 true)
+  ret i32 %r
+}
+
+define i32 @no_cttz_abs_multiuse(i32 %x) {
+; CHECK-LABEL: @no_cttz_abs_multiuse(
+; CHECK-NEXT:    [[C:%.*]] = icmp slt i32 [[X:%.*]], 0
+; CHECK-NEXT:    [[S:%.*]] = sub nsw i32 0, [[X]]
+; CHECK-NEXT:    [[D:%.*]] = select i1 [[C]], i32 [[S]], i32 [[X]]
+; CHECK-NEXT:    call void @use_abs(i32 [[D]])
+; CHECK-NEXT:    [[R:%.*]] = tail call i32 @llvm.cttz.i32(i32 [[D]], i1 true), !range !0
+; CHECK-NEXT:    ret i32 [[R]]
+;
+  %c = icmp slt i32 %x, 1
+  %s = sub nsw i32 0, %x
+  %d = select i1 %c, i32 %s, i32 %x
+  call void @use_abs(i32 %d)
+  %r = tail call i32 @llvm.cttz.i32(i32 %d, i1 true)
+  ret i32 %r
+}
+
+
+declare void @use_cond(i1)
+declare void @use_abs(i32)
+declare i32 @llvm.cttz.i32(i32, i1)
+declare i64 @llvm.cttz.i64(i64)
-- 
2.11.0