From 636864d8e7d7642d2052744b982adb477602c516 Mon Sep 17 00:00:00 2001 From: Ahmed Bougacha Date: Fri, 24 Oct 2014 00:03:46 +0000 Subject: [PATCH] Make test for r220533 more robust by using GPR pattern. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@220541 91177308-0d34-0410-b5e6-96231b3b80d8 --- test/CodeGen/AArch64/fpconv-vector-op-scalarize.ll | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/test/CodeGen/AArch64/fpconv-vector-op-scalarize.ll b/test/CodeGen/AArch64/fpconv-vector-op-scalarize.ll index b91e1e20f60..56e0b4a0b18 100644 --- a/test/CodeGen/AArch64/fpconv-vector-op-scalarize.ll +++ b/test/CodeGen/AArch64/fpconv-vector-op-scalarize.ll @@ -7,8 +7,8 @@ define <1 x double> @test_sitofp(<1 x i1> %in) { ; CHECK-LABEL: test_sitofp: -; CHECK: sbfx w8, w0, #0, #1 -; CHECK-NEXT: scvtf d0, w8 +; CHECK: sbfx [[GPR:w[0-9]+]], w0, #0, #1 +; CHECK-NEXT: scvtf d0, [[GPR]] ; CHECK-NEXT: ret entry: %0 = sitofp <1 x i1> %in to <1 x double> @@ -17,8 +17,8 @@ entry: define <1 x double> @test_uitofp(<1 x i1> %in) { ; CHECK-LABEL: test_uitofp: -; CHECK: and w8, w0, #0x1 -; CHECK-NEXT: ucvtf d0, w8 +; CHECK: and [[GPR:w[0-9]+]], w0, #0x1 +; CHECK-NEXT: ucvtf d0, [[GPR]] ; CHECK-NEXT: ret entry: %0 = uitofp <1 x i1> %in to <1 x double> -- 2.11.0