From 63d578b5aa0f07a0789d3bae84750ea145ec06b1 Mon Sep 17 00:00:00 2001 From: Andrew Trick Date: Thu, 23 Feb 2012 03:16:24 +0000 Subject: [PATCH] misched: cleanup reaching def computation Ignore undef uses completely. Use a more explicit SlotIndex API. Add more explicit comments. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151233 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/CodeGen/ScheduleDAGInstrs.cpp | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-) diff --git a/lib/CodeGen/ScheduleDAGInstrs.cpp b/lib/CodeGen/ScheduleDAGInstrs.cpp index 29e4df670c3..2858904fde3 100644 --- a/lib/CodeGen/ScheduleDAGInstrs.cpp +++ b/lib/CodeGen/ScheduleDAGInstrs.cpp @@ -408,10 +408,12 @@ void ScheduleDAGInstrs::addVRegUseDeps(SUnit *SU, unsigned OperIdx) { // Lookup this operand's reaching definition. assert(LIS && "vreg dependencies requires LiveIntervals"); - SlotIndex UseIdx = LIS->getSlotIndexes()->getInstructionIndex(MI); + SlotIndex UseIdx = LIS->getInstructionIndex(MI).getRegSlot(); LiveInterval *LI = &LIS->getInterval(Reg); - VNInfo *VNI = LI->getVNInfoAt(UseIdx); + VNInfo *VNI = LI->getVNInfoBefore(UseIdx); + // VNI will be valid because MachineOperand::readsReg() is checked by caller. MachineInstr *Def = LIS->getInstructionFromIndex(VNI->def); + // Phis and other noninstructions (after coalescing) have a NULL Def. if (Def) { SUnit *DefSU = getSUnit(Def); if (DefSU) { @@ -540,7 +542,7 @@ void ScheduleDAGInstrs::BuildSchedGraph(AliasAnalysis *AA) { assert(!IsPostRA && "Virtual register encountered!"); if (MO.isDef()) addVRegDefDeps(SU, j); - else + else if (MO.readsReg()) // ignore undef operands addVRegUseDeps(SU, j); } } -- 2.11.0