From 701074a6fc7470d0ed54e4a4bcd4d491ad8da22e Mon Sep 17 00:00:00 2001 From: Leon Alrae Date: Thu, 28 Jul 2016 09:28:23 +0100 Subject: [PATCH] target-mips: fix EntryHi.EHINV being cleared on TLB exception While implementing TLB invalidation feature we forgot to modify part of code responsible for updating EntryHi during TLB exception. Consequently EntryHi.EHINV is unexpectedly cleared on the exception. Signed-off-by: Leon Alrae --- target-mips/helper.c | 1 + 1 file changed, 1 insertion(+) diff --git a/target-mips/helper.c b/target-mips/helper.c index 9fbca26d41..c864b15b97 100644 --- a/target-mips/helper.c +++ b/target-mips/helper.c @@ -396,6 +396,7 @@ static void raise_mmu_exception(CPUMIPSState *env, target_ulong address, env->CP0_Context = (env->CP0_Context & ~0x007fffff) | ((address >> 9) & 0x007ffff0); env->CP0_EntryHi = (env->CP0_EntryHi & env->CP0_EntryHi_ASID_mask) | + (env->CP0_EntryHi & (1 << CP0EnHi_EHINV)) | (address & (TARGET_PAGE_MASK << 1)); #if defined(TARGET_MIPS64) env->CP0_EntryHi &= env->SEGMask; -- 2.11.0